testMain.cppbc 13 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384
  1. #include <stdio.h>
  2. #include <stdlib.h>
  3. #include <string.h>
  4. #ifdef _XOS
  5. #define IDMA_APP_USE_XOS // will use inlined disable/enable int
  6. #endif
  7. #ifdef _XTOS
  8. #define IDMA_APP_USE_XTOS // will use inlined disable/enable int
  9. #endif
  10. #include "../src/driver/isp/isp_hw.h"
  11. #include "../src/driver/isp/post_isp_hw.h"
  12. #include "../src/include/isp_api.h"
  13. #include "CppUTest/CommandLineTestRunner.h"
  14. #include "CppUTest/TestHarness.h"
  15. #include "isp_hw.h"
  16. #include <xtensa/hal.h>
  17. #include <xtensa/idma.h>
  18. // Define this to enable the wide address API.
  19. #define IDMA_USE_WIDE_ADDRESS_COMPILE 1
  20. // Define this to enable the large Description API.
  21. #define IDMA_USE_64B_DESC 1
  22. #define IDMA_DEBUG 1
  23. IDMA_BUFFER_DEFINE(task_copy, 2, IDMA_64B_DESC);
  24. // IDMA_BUFFER_DEFINE(task_write, 1, IDMA_64B_DESC);
  25. #define TCM_SIZE (128 * 1024)
  26. #define HOR_RES 4096
  27. #define VER_RES 3192
  28. #define SIZE_PER_PEX_BIT 8
  29. #define LINE_SIZE ((HOR_RES * SIZE_PER_PEX_BIT + 7) / 8)
  30. #define N_LINE 16
  31. char temp_bufer_tcm[TCM_SIZE] __attribute__((section(".dram1.data")));
  32. #define MAX_ENTRY 256
  33. uint32_t post_isp_tick[MAX_ENTRY];
  34. uint32_t isp_int_tick[MAX_ENTRY];
  35. int32_t post_isp_cnt;
  36. int32_t isp_int_cnt;
  37. //char source_pic[FRAME_NUM][VER_RES * LINE_SIZE];
  38. int32_t bus_idle_flag;
  39. int idma_copy(uint64_t src_addr, uint64_t dst_addr, uint32_t block_size,
  40. idma_callback_fn cb) {
  41. // Construct wide pointers for the 3 buffers. Note that the addresses for
  42. // the two buffers in local memory must not have any of the high bits set or
  43. // else they'll look like sysmem addresses.
  44. int loop;
  45. int fragment_size = block_size % TCM_SIZE;
  46. int loop_num = block_size / TCM_SIZE;
  47. int ret = 0;
  48. int size = TCM_SIZE;
  49. loop_num = fragment_size ? loop_num + 1 : loop_num;
  50. uint32_t frame_counter = 0;
  51. // idma_log_handler(idmaLogHander);
  52. idma_init(0, MAX_BLOCK_2, 16, TICK_CYCLES_8, 100000, NULL);
  53. for (loop = 0; loop < loop_num; loop++) {
  54. uint64_t dst1_wide =
  55. ((uint64_t)0xffffffff) & ((uint64_t)&temp_bufer_tcm[0]);
  56. uint64_t src1_wide = src_addr + size * loop;
  57. uint64_t dst2_wide = dst_addr + size * loop;
  58. if (loop == (loop_num - 1) && fragment_size) {
  59. size = fragment_size;
  60. }
  61. idma_init_task(task_copy, IDMA_64B_DESC, 2, cb, task_copy);
  62. idma_add_desc64_wide(task_copy, &dst1_wide, &src1_wide, size, 0);
  63. idma_add_desc64_wide(task_copy, &dst2_wide, &dst1_wide, size,
  64. DESC_NOTIFY_W_INT);
  65. ret = idma_schedule_task(task_copy);
  66. if (ret != IDMA_OK) {
  67. printf("FAILED to schedule taskh: %d\n", ret);
  68. return -1;
  69. }
  70. idma_hw_wait_all();
  71. // ret |= compareBuffers_task(task_sram, dst2, src1, size);
  72. // printf("total tick:%d",total);
  73. // printf("Go through SRAM (0x%llx,0x%llx)\n",(long
  74. // long)dst1_wide,(long
  75. // long )dst1_wide+size); ?? long long print not work
  76. }
  77. return 0;
  78. }
  79. int compare(char *src, char *dst, uint32_t size) {
  80. int i;
  81. for (i = 0; i < size; i++) {
  82. if (src[i] != dst[i]) {
  83. printf("Compare fail,expect:%d,actrul:%d,at:%d\n", src[i], dst[i],
  84. i);
  85. return -1;
  86. }
  87. }
  88. return 0;
  89. }
  90. #define FRAME_NUM 2
  91. #define N_BUFFER_NUM 2
  92. char dst_pic[FRAME_NUM][VER_RES * LINE_SIZE];
  93. // __attribute__((section(".sram.data")));
  94. char source_pic[FRAME_NUM][VER_RES * LINE_SIZE];
  95. char frame_buffer[N_BUFFER_NUM][LINE_SIZE * N_LINE];
  96. TEST_GROUP(IspTest){
  97. void setup(){int ind1, ind2;
  98. for (ind1 = 0; ind1 < FRAME_NUM; ind1++) {
  99. for (ind2 = 0; ind2 < VER_RES; ind2++) {
  100. source_pic[ind1][LINE_SIZE * ind2] = (char)(ind2 % 256);
  101. source_pic[ind1][LINE_SIZE * (ind2 + 1) - 1] = (char)(ind2 % 256);
  102. dst_pic[ind1][LINE_SIZE * ind2] = (char)((ind2 + 1) % 256);
  103. dst_pic[ind1][LINE_SIZE * (ind2 + 1) - 1] = (char)((ind2 + 1) % 256);
  104. }
  105. }
  106. }
  107. void teardown() {}
  108. }
  109. ;
  110. //TEST(IspTest, IspBasicFullFrameBuffer) {
  111. // uint32_t frame_counter = 0;
  112. // uint32_t line_counter=0;
  113. // uint64_t frame_buffer_addr = (uint64_t)&dst_pic[frame_counter];
  114. // int ret = 0;
  115. // Sisp_buffer buffer_list[2];
  116. //
  117. // idma_cnt =0;
  118. // isp_initialize(0);
  119. // isp_handler_config(HOR_RES, VER_RES, EISP_RAW8_FORMAT, N_LINE,
  120. // (uint64_t)source_pic, LINE_SIZE * N_LINE*2);
  121. // *(unsigned int*)ISP_N_COUNTER_REG =0;
  122. // while (frame_counter < 1) {
  123. // if (isp_check_exeptional() == EISP_ERROR_OVER_FLOW) {
  124. // printf("Err ISP input is overflow\n");
  125. // break;
  126. // }
  127. //
  128. // if (isp_get_next_entry(buffer_list) != EISP_BOOL_TRUE) {
  129. // if((*(unsigned int*)ISP_N_COUNTER_REG + N_LINE) > VER_RES){
  130. // *(unsigned int*)ISP_N_COUNTER_REG = VER_RES;
  131. // }
  132. // else
  133. // {
  134. // *(unsigned int*)ISP_N_COUNTER_REG= *(unsigned int*)ISP_N_COUNTER_REG+N_LINE;
  135. // }
  136. //
  137. // *(unsigned int*)ISP_N_INTERRUPT_STATUS_REG = 0x8;
  138. // isp_interrupt_handler(NULL);
  139. // continue;
  140. // }
  141. // int buffer_index;
  142. // for(buffer_index=0;buffer_index<2;buffer_index++)
  143. // {
  144. // if(buffer_list[buffer_index].size==0){
  145. // continue;
  146. // }
  147. // if (idma_copy(buffer_list[buffer_index].start_addr,
  148. // frame_buffer_addr + get_n_counter() * isp_get_line_size(),
  149. // buffer_list[buffer_index].size, NULL) != 0) {
  150. // printf("idma copy error\n");
  151. // ret = -1;
  152. // break;
  153. // }
  154. //
  155. // if (isp_check_exeptional() == EISP_ERROR_OVER_FLOW) {
  156. // printf("%s:line:%d,Err ISP input is overflow\n",__FUNCTION__,__LINE__);
  157. // ret = -1;
  158. // break;
  159. // }
  160. //
  161. // if (isp_is_last_entry_pop_in_frame() == EISP_BOOL_TRUE) {
  162. // frame_counter++;
  163. // *(unsigned int*)ISP_N_COUNTER_REG =0;
  164. // frame_buffer_addr = (uint64_t)&dst_pic[frame_counter][0];
  165. // }
  166. // if (isp_pop_n_line(buffer_list[buffer_index].line_num) != EISP_BOOL_TRUE) {
  167. // printf("pop fail\n");
  168. // ret = -1;
  169. // break;
  170. // }
  171. // }
  172. //
  173. // }
  174. // CHECK_EQUAL_ZERO(ret);
  175. // ret = compare((char *)dst_pic, (char *)source_pic, LINE_SIZE * VER_RES);
  176. // print_tick();
  177. // CHECK_EQUAL_ZERO(ret);
  178. // // MEMCMP_EQUAL(dst_pic, source_pic, 128 *2);
  179. //}
  180. //TEST(IspTest, IspBasicTwoBlockFrameBuffer) {
  181. // uint32_t frame_counter = 0;
  182. // uint64_t dst_buffer_addr = (uint64_t)&dst_pic[frame_counter];
  183. // uint64_t src_buffer_addr = (uint64_t)&source_pic[frame_counter];
  184. // int ret = 0;
  185. // int N_counter = 0;
  186. // int index = 0;
  187. // Sisp_buffer buffer_list[2];
  188. // isp_initialize(0);
  189. // isp_handler_config(HOR_RES, VER_RES, EISP_RAW8_FORMAT, N_LINE,
  190. // (uint64_t)frame_buffer,
  191. // LINE_SIZE * N_LINE * N_BUFFER_NUM);
  192. // while (frame_counter < FRAME_NUM) {
  193. // if (isp_check_exeptional() == EISP_ERROR_OVER_FLOW) {
  194. // printf("Err ISP input is overflow\n");
  195. // break;
  196. // }
  197. //
  198. // uint64_t block_addr = 0;
  199. // uint32_t block_size = 0;
  200. // if (isp_get_next_n_line(&block_addr, &block_size) != EISP_BOOL_TRUE) {
  201. //
  202. //
  203. // if((*(unsigned int*)ISP_N_COUNTER_REG + N_LINE) > VER_RES){
  204. // *(unsigned int*)ISP_N_COUNTER_REG = VER_RES;
  205. // }
  206. // else
  207. // {
  208. // *(unsigned int*)ISP_N_COUNTER_REG= *(unsigned int*)ISP_N_COUNTER_REG+N_LINE;
  209. // }
  210. //
  211. //
  212. //
  213. // /*****************ISP behavious *********************************/
  214. //
  215. // if (idma_copy(src_buffer_addr + N_counter * LINE_SIZE,
  216. // (uint64_t)frame_buffer[index % N_BUFFER_NUM],
  217. // LINE_SIZE * N_LINE, isp_interrupt_handler) != 0) {
  218. // printf("idma copy error\n");
  219. // ret = -1;
  220. // break;
  221. // }
  222. // N_counter += N_LINE;
  223. // index++;
  224. //
  225. // /***********************************************/
  226. // *(unsigned int*)ISP_N_INTERRUPT_STATUS_REG = 0x8;
  227. // isp_interrupt_handler(NULL);
  228. // continue;
  229. // }
  230. //
  231. // int buffer_index;
  232. // for(buffer_index=0;buffer_index<2;buffer_index++)
  233. // {
  234. // if(buffer_list[buffer_index].size==0){
  235. // continue;
  236. // }
  237. //
  238. // }
  239. //
  240. // if (idma_copy(buffer_list[buffer_index].start_addr,
  241. // dst_buffer_addr + get_n_counter() * isp_get_line_size(),
  242. // buffer_list[buffer_index].size, NULL) != 0) {
  243. // printf("idma copy error\n");
  244. // ret = -1;
  245. // break;
  246. // }
  247. //
  248. // if (isp_check_exeptional() == EISP_ERROR_OVER_FLOW) {
  249. // printf("%s:line:%d,Err ISP input is overflow\n",__FUNCTION__,__LINE__);
  250. // ret = -1;
  251. // break;
  252. // }
  253. //
  254. // if (isp_is_last_entry_pop_in_frame() == EISP_BOOL_TRUE) {
  255. // frame_counter++;
  256. // *(unsigned int*)ISP_N_COUNTER_REG =0;
  257. // frame_buffer_addr = (uint64_t)&dst_pic[frame_counter][0];
  258. // }
  259. // if (isp_pop_n_line(buffer_list[buffer_index].line_num) != EISP_BOOL_TRUE) {
  260. // printf("pop fail\n");
  261. // ret = -1;
  262. // break;
  263. // }
  264. //
  265. // }
  266. //
  267. // CHECK_EQUAL_ZERO(ret);
  268. // ret = compare((char *)dst_pic, (char *)source_pic,
  269. // LINE_SIZE * VER_RES * FRAME_NUM);
  270. // CHECK_EQUAL_ZERO(ret);
  271. //}
  272. TEST(IspTest, PostIspBasicFullFrameBuffer) {
  273. uint32_t frame_counter = 0;
  274. uint64_t frame_buffer_addr = (uint64_t)&dst_pic[frame_counter];
  275. int ret = 0;
  276. Sisp_buffer buffer_list[2];
  277. post_isp_initialize(0);
  278. post_isp_handler_config(HOR_RES, VER_RES, EISP_RAW8_FORMAT, N_LINE,
  279. (uint64_t)source_pic, LINE_SIZE * VER_RES);
  280. while (frame_counter < 1) {
  281. }
  282. CHECK_EQUAL_ZERO(ret);
  283. ret = compare((char *)dst_pic, (char *)source_pic, LINE_SIZE * VER_RES);
  284. CHECK_EQUAL_ZERO(ret);
  285. // MEMCMP_EQUAL(dst_pic, source_pic, VER_RES * LINE_SIZE);
  286. }
  287. //TEST(IspTest, PostIspBasicTwoBlockFrameBuffer) {
  288. //
  289. // uint32_t frame_counter = 0;
  290. // uint64_t dst_buffer_addr = (uint64_t)&dst_pic[frame_counter];
  291. // uint64_t src_buffer_addr = (uint64_t)&source_pic[frame_counter];
  292. // int ret = 0;
  293. // int M_counter = 0;
  294. // post_isp_initialize(0);
  295. // post_isp_handler_config(HOR_RES, VER_RES, SIZE_PER_PEX_BIT, N_LINE,
  296. // (uint64_t)frame_buffer,
  297. // LINE_SIZE * N_LINE * N_BUFFER_NUM);
  298. // while (frame_counter < FRAME_NUM) {
  299. // uint64_t block_addr = 0;
  300. // uint32_t block_size = 0;
  301. // if (post_isp_get_next_m_line(&block_addr, &block_size) != EISP_OK) {
  302. // ret = -1;
  303. // break;
  304. // }
  305. // if (get_m_counter() < 0) {
  306. // break;
  307. // }
  308. //
  309. // if (idma_copy(src_buffer_addr +
  310. // post_isp_get_line_size() * get_m_counter(),
  311. // block_addr, block_size, NULL) != 0) {
  312. // printf("idma copy error");
  313. // ret = -1;
  314. // break;
  315. // }
  316. //
  317. // if (post_isp_check_exeptional() == EISP_ERROR_OVER_FLOW) {
  318. // printf("Err Post ISP input is overflow");
  319. // ret = -1;
  320. // break;
  321. // }
  322. //
  323. // if (post_isp_is_last_block_in_frame() == EISP_BOOL_TRUE) {
  324. // frame_counter++;
  325. //
  326. // src_buffer_addr = (uint64_t)&source_pic[frame_counter][0];
  327. // }
  328. // // printf("current N value:%d,src:%x,dst:%x,size:%d\n",
  329. // // get_m_counter(),
  330. // // (uint32_t)block_addr, (uint32_t)dst_buffer_addr,
  331. // // block_size);
  332. // post_isp_push_m_line();
  333. //
  334. // /*****************post isp behavior**************************/
  335. // if (idma_copy(block_addr, dst_buffer_addr + M_counter * LINE_SIZE,
  336. // block_size, post_isp_interrupt_handler) != 0) {
  337. // printf("idma copy error");
  338. // ret = -1;
  339. // break;
  340. // }
  341. // M_counter += N_LINE;
  342. // if (M_counter >= VER_RES) {
  343. // dst_buffer_addr = (uint64_t)&dst_pic[frame_counter][0];
  344. // M_counter = 0;
  345. // }
  346. // /********************************************************************/
  347. // }
  348. // CHECK_EQUAL_ZERO(ret);
  349. // ret = compare((char *)source_pic, (char *)dst_pic, LINE_SIZE * VER_RES);
  350. // CHECK_EQUAL_ZERO(ret);
  351. // // MEMCMP_EQUAL(dst_pic, source_pic, VER_RES * LINE_SIZE);
  352. //}
  353. // int main(int argc, char **argv) { return RUN_ALL_TESTS(argc, argv); }