// Memory map file to generate linker scripts for programs without board I/O. // Customer ID=16470; Build=0x8e648; Copyright (c) 2004-2015 Cadence Design Systems, Inc. // // Permission is hereby granted, free of charge, to any person obtaining // a copy of this software and associated documentation files (the // "Software"), to deal in the Software without restriction, including // without limitation the rights to use, copy, modify, merge, publish, // distribute, sublicense, and/or sell copies of the Software, and to // permit persons to whom the Software is furnished to do so, subject to // the following conditions: // // The above copyright notice and this permission notice shall be included // in all copies or substantial portions of the Software. // // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, // EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF // MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. // IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY // CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, // TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE // SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. // Place stack in local RAM: PLACE SECTIONS(STACK) WITH_SECTION(.dram1.bss) // A memory map is a sequence of memory descriptions and // optional parameter assignments. // // Each memory description has the following format: // BEGIN // [,] : : : [,] // : [writable] [,executable] [,device] ; // * // END // // where each description has the following format: // : F|C : - [ : STACK ] [ : HEAP ] // : * ; // // Each parameter assignment is a keyword/value pair in the following format: // = (no spaces in ) // or // = "" (spaces allowed in ) // // The following primitives are also defined: // PLACE SECTIONS( * ) { WITH_SECTION() // | IN_SEGMENT() } // // NOLOAD [ ... ] // // Please refer to the Xtensa LSP Reference Manual for more details. // VECSELECT=1 VECRESET=0x20400000 VECBASE= 0x20400000 BEGIN sram 0x20400000: extra_mem : sram : 0x00280000 : executable, writable ; sram0 : F : 0x20400000 - 0x20400fff : .DispatchVector.text .ResetVector.text .ResetHandler.literal .ResetHandler.text .DispatchHandler.literal .DispatchHandler.text; sram1 : C : 0x20401000 - 0x205fffff : HEAP : .sram.rodata .clib.rodata .rtos.rodata .sram.literal .rtos.literal .clib.literal .sram.text .clib.text .rtos.text .clib.data .clib.percpu.data .rtos.percpu.data .rtos.data .sram.data __llvm_prf_names .clib.bss .clib.percpu.bss .rtos.percpu.bss .rtos.bss .sram.bss .debug.bss; sram2 : C : 0x20600000 - 0x2063ffff : .sram2.rodata .rodata .sram2.literal .literal .sram2.text .text .sram2.data .data .sram2.bss .bss; sram3 : C : 0x20640000 - 0x2067ffff : .sram3.rodata .sram3.literal .sram3.text .sram3.data .sram3.bss; END sram BEGIN dram0 0xe0180000: dataRam : dram0 : 0x20000 : writable ; dram0_0 : C : 0xe0180000 - 0xe019ffff :.dram0.rodata .dram0.data .dram0.bss .dram0_user.bss; END dram0 BEGIN dram1 0xe01a0000: dataRam : dram1 : 0x20000 : writable ; dram1_0 : C : 0xe01a0000 - 0xe01bffff :STACK :.dram1.rodata .dram1.data .dram1.bss .dram1_user.bss; END dram1 BEGIN local_sram 0xffa00000: sysram : local_sram : 0x180000: writable ; local_sram_0 : C : 0xffa00000 - 0xffb7ffff :.local_sram.bss ; END local_sram ENTRY = _libinit USE_SEGMENT_AREA = ".dram0.data 120832 + 0 end : .dram1.data 120832 + 0 end : .sram2.data 262144 + 0 end "