/* This linker script generated from xt-genldscripts.tpp for LSP C:\Users\DELL\workspace\CSI_DSP_FW\LSP\min-rt_core0_main_stack_tcm1 */ /* Linker Script for default link */ MEMORY { sram0_seg : org = 0x20000000, len = 0x1000 sram1_seg : org = 0x20001000, len = 0x1FF000 sram2_seg : org = 0x20200000, len = 0x0 sram3_seg : org = 0x20240000, len = 0x0 dram0_0_seg : org = 0xE0180000, len = 0x2800 dram1_0_seg : org = 0xE01A0000, len = 0x2800 local_sram_0_seg : org = 0xFFA00000, len = 0x180000 } PHDRS { sram0_phdr PT_LOAD; sram1_phdr PT_LOAD; sram1_bss_phdr PT_LOAD; sram2_phdr PT_LOAD; sram2_bss_phdr PT_LOAD; sram3_phdr PT_LOAD; sram3_bss_phdr PT_LOAD; dram0_0_phdr PT_LOAD; dram0_0_bss_phdr PT_LOAD; dram1_0_phdr PT_LOAD; dram1_0_bss_phdr PT_LOAD; local_sram_0_phdr PT_LOAD; local_sram_0_bss_phdr PT_LOAD; } /* Default entry point: */ ENTRY(_ResetVector) /* Memory boundary addresses: */ _memmap_mem_sram_start = 0x20000000; _memmap_mem_sram_end = 0x20280000; _memmap_mem_dram0_start = 0xe0180000; _memmap_mem_dram0_end = 0xe01a0000; _memmap_mem_dram1_start = 0xe01a0000; _memmap_mem_dram1_end = 0xe01c0000; _memmap_mem_local_sram_start = 0xffa00000; _memmap_mem_local_sram_end = 0xffb80000; /* Memory segment boundary addresses: */ _memmap_seg_sram0_start = 0x20000000; _memmap_seg_sram0_max = 0x20001000; _memmap_seg_sram1_start = 0x20001000; _memmap_seg_sram1_max = 0x20200000; _memmap_seg_dram0_0_start = 0xe0180000; _memmap_seg_dram0_0_max = 0xe0182800; _memmap_seg_dram1_0_start = 0xe01a0000; _memmap_seg_dram1_0_max = 0xe01a2800; _memmap_seg_local_sram_0_start = 0xffa00000; _memmap_seg_local_sram_0_max = 0xffb80000; _rom_store_table = 0; PROVIDE(_memmap_reset_vector = 0x20000000); PROVIDE(_memmap_vecbase_reset = 0x20000000); /* Various memory-map dependent cache attribute settings: */ _memmap_cacheattr_wb_base = 0x10000010; _memmap_cacheattr_wt_base = 0x30000030; _memmap_cacheattr_bp_base = 0x40000040; _memmap_cacheattr_unused_mask = 0x0FFFFF0F; _memmap_cacheattr_wb_trapnull = 0x14444411; _memmap_cacheattr_wba_trapnull = 0x14444410; _memmap_cacheattr_wbna_trapnull = 0x24444420; _memmap_cacheattr_wt_trapnull = 0x34444430; _memmap_cacheattr_bp_trapnull = 0x44444440; _memmap_cacheattr_wb_strict = 0x10000010; _memmap_cacheattr_wt_strict = 0x30000030; _memmap_cacheattr_bp_strict = 0x40000040; _memmap_cacheattr_wb_allvalid = 0x14444414; _memmap_cacheattr_wt_allvalid = 0x34444434; _memmap_cacheattr_bp_allvalid = 0x44444444; _memmap_region_map = 0x00000082; PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull); SECTIONS { .DispatchVector.text : ALIGN(4) { _DispatchVector_text_start = ABSOLUTE(.); KEEP (*(.DispatchVector.text)) . = ALIGN (4); _DispatchVector_text_end = ABSOLUTE(.); } >sram0_seg :sram0_phdr .ResetVector.text : ALIGN(4) { _ResetVector_text_start = ABSOLUTE(.); *(.ResetVector.text) . = ALIGN (4); _ResetVector_text_end = ABSOLUTE(.); } >sram0_seg :sram0_phdr .ResetHandler.text : ALIGN(4) { _ResetHandler_text_start = ABSOLUTE(.); *(.ResetHandler.literal .ResetHandler.text) . = ALIGN (4); _ResetHandler_text_end = ABSOLUTE(.); } >sram0_seg :sram0_phdr .DispatchHandler.text : ALIGN(4) { _DispatchHandler_text_start = ABSOLUTE(.); *(.DispatchHandler.literal .DispatchHandler.text) . = ALIGN (4); _DispatchHandler_text_end = ABSOLUTE(.); _memmap_seg_sram0_end = ALIGN(0x8); } >sram0_seg :sram0_phdr .sram.rodata : ALIGN(4) { _sram_rodata_start = ABSOLUTE(.); *(.sram.rodata) . = ALIGN (4); _sram_rodata_end = ABSOLUTE(.); } >sram1_seg :sram1_phdr .clib.rodata : ALIGN(4) { _clib_rodata_start = ABSOLUTE(.); *(.clib.rodata) . = ALIGN (4); _clib_rodata_end = ABSOLUTE(.); } >sram1_seg :sram1_phdr .rtos.rodata : ALIGN(4) { _rtos_rodata_start = ABSOLUTE(.); *(.rtos.rodata) . = ALIGN (4); _rtos_rodata_end = ABSOLUTE(.); } >sram1_seg :sram1_phdr .rodata : ALIGN(4) { _rodata_start = ABSOLUTE(.); *(.rodata) *(SORT(.rodata.sort.*)) KEEP (*(SORT(.rodata.keepsort.*) .rodata.keep.*)) *(.rodata.*) *(.gnu.linkonce.r.*) *(.rodata1) __XT_EXCEPTION_TABLE__ = ABSOLUTE(.); KEEP (*(.xt_except_table)) KEEP (*(.gcc_except_table)) *(.gnu.linkonce.e.*) *(.gnu.version_r) KEEP (*(.eh_frame)) /* C++ constructor and destructor tables, properly ordered: */ KEEP (*crtbegin.o(.ctors)) KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) KEEP (*(SORT(.ctors.*))) KEEP (*(.ctors)) KEEP (*crtbegin.o(.dtors)) KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) KEEP (*(SORT(.dtors.*))) KEEP (*(.dtors)) /* C++ exception handlers table: */ __XT_EXCEPTION_DESCS__ = ABSOLUTE(.); *(.xt_except_desc) *(.gnu.linkonce.h.*) __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.); *(.xt_except_desc_end) *(.dynamic) *(.gnu.version_d) . = ALIGN(4); /* this table MUST be 4-byte aligned */ _bss_table_start = ABSOLUTE(.); LONG(_bss_start) LONG(_bss_end) LONG(_sram2_bss_start) LONG(_sram2_bss_end) LONG(_sram3_bss_start) LONG(_sram3_bss_end) LONG(_dram0_bss_start) LONG(_dram0_bss_end) LONG(_dram1_bss_start) LONG(_dram1_bss_end) LONG(_local_sram_bss_start) LONG(_local_sram_bss_end) _bss_table_end = ABSOLUTE(.); . = ALIGN (4); _rodata_end = ABSOLUTE(.); } >sram1_seg :sram1_phdr .sram.text : ALIGN(4) { _sram_text_start = ABSOLUTE(.); *(.sram.literal .sram.text) . = ALIGN (4); _sram_text_end = ABSOLUTE(.); } >sram1_seg :sram1_phdr .text : ALIGN(4) { _stext = .; _text_start = ABSOLUTE(.); *(.entry.text) *(.init.literal) KEEP(*(.init)) *(.literal.sort.* SORT(.text.sort.*)) KEEP (*(.literal.keepsort.* SORT(.text.keepsort.*) .literal.keep.* .text.keep.* .literal.*personality* .text.*personality*)) *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) *(.fini.literal) KEEP(*(.fini)) *(.gnu.version) . = ALIGN (4); _text_end = ABSOLUTE(.); _etext = .; } >sram1_seg :sram1_phdr .clib.text : ALIGN(4) { _clib_text_start = ABSOLUTE(.); *(.clib.literal .clib.text) . = ALIGN (4); _clib_text_end = ABSOLUTE(.); } >sram1_seg :sram1_phdr .rtos.text : ALIGN(4) { _rtos_text_start = ABSOLUTE(.); *(.rtos.literal .rtos.text) . = ALIGN (4); _rtos_text_end = ABSOLUTE(.); } >sram1_seg :sram1_phdr .clib.data : ALIGN(4) { _clib_data_start = ABSOLUTE(.); *(.clib.data) . = ALIGN (4); _clib_data_end = ABSOLUTE(.); } >sram1_seg :sram1_phdr .clib.percpu.data : ALIGN(4) { _clib_percpu_data_start = ABSOLUTE(.); *(.clib.percpu.data) . = ALIGN (4); _clib_percpu_data_end = ABSOLUTE(.); } >sram1_seg :sram1_phdr .rtos.percpu.data : ALIGN(4) { _rtos_percpu_data_start = ABSOLUTE(.); *(.rtos.percpu.data) . = ALIGN (4); _rtos_percpu_data_end = ABSOLUTE(.); } >sram1_seg :sram1_phdr .rtos.data : ALIGN(4) { _rtos_data_start = ABSOLUTE(.); *(.rtos.data) . = ALIGN (4); _rtos_data_end = ABSOLUTE(.); } >sram1_seg :sram1_phdr .sram.data : ALIGN(4) { _sram_data_start = ABSOLUTE(.); *(.sram.data) . = ALIGN (4); _sram_data_end = ABSOLUTE(.); } >sram1_seg :sram1_phdr .data : ALIGN(4) { _data_start = ABSOLUTE(.); *(.data) *(SORT(.data.sort.*)) KEEP (*(SORT(.data.keepsort.*) .data.keep.*)) *(.data.*) *(.gnu.linkonce.d.*) KEEP(*(.gnu.linkonce.d.*personality*)) *(.data1) *(.sdata) *(.sdata.*) *(.gnu.linkonce.s.*) *(.sdata2) *(.sdata2.*) *(.gnu.linkonce.s2.*) KEEP(*(.jcr)) *(__llvm_prf_cnts) *(__llvm_prf_data) *(__llvm_prf_vnds) . = ALIGN (4); _data_end = ABSOLUTE(.); } >sram1_seg :sram1_phdr __llvm_prf_names : ALIGN(4) { __llvm_prf_names_start = ABSOLUTE(.); *(__llvm_prf_names) . = ALIGN (4); __llvm_prf_names_end = ABSOLUTE(.); } >sram1_seg :sram1_phdr .bss (NOLOAD) : ALIGN(8) { . = ALIGN (8); _bss_start = ABSOLUTE(.); *(.dynsbss) *(.sbss) *(.sbss.*) *(.gnu.linkonce.sb.*) *(.scommon) *(.sbss2) *(.sbss2.*) *(.gnu.linkonce.sb2.*) *(.dynbss) *(.bss) *(SORT(.bss.sort.*)) KEEP (*(SORT(.bss.keepsort.*) .bss.keep.*)) *(.bss.*) *(.gnu.linkonce.b.*) *(COMMON) *(.clib.bss) *(.clib.percpu.bss) *(.rtos.percpu.bss) *(.rtos.bss) *(.sram.bss) *(.debug.bss) . = ALIGN (8); _bss_end = ABSOLUTE(.); _end = ALIGN(0x8); PROVIDE(end = ALIGN(0x8)); _memmap_seg_sram1_end = ALIGN(0x8); } >sram1_seg :sram1_bss_phdr _heap_sentry = 0x20200000; .sram2.rodata : ALIGN(4) { _sram2_rodata_start = ABSOLUTE(.); *(.sram2.rodata) . = ALIGN (4); _sram2_rodata_end = ABSOLUTE(.); } >sram2_seg :sram2_phdr .sram2.text : ALIGN(4) { _sram2_text_start = ABSOLUTE(.); *(.sram2.literal .sram2.text) . = ALIGN (4); _sram2_text_end = ABSOLUTE(.); } >sram2_seg :sram2_phdr .sram2.data : ALIGN(4) { _sram2_data_start = ABSOLUTE(.); *(.sram2.data) . = ALIGN (4); _sram2_data_end = ABSOLUTE(.); } >sram2_seg :sram2_phdr .sram2.bss (NOLOAD) : ALIGN(8) { . = ALIGN (8); _sram2_bss_start = ABSOLUTE(.); *(.sram2.bss) . = ALIGN (8); _sram2_bss_end = ABSOLUTE(.); _memmap_seg_sram2_end = ALIGN(0x8); } >sram2_seg :sram2_bss_phdr .sram3.rodata : ALIGN(4) { _sram3_rodata_start = ABSOLUTE(.); *(.sram3.rodata) . = ALIGN (4); _sram3_rodata_end = ABSOLUTE(.); } >sram3_seg :sram3_phdr .sram3.text : ALIGN(4) { _sram3_text_start = ABSOLUTE(.); *(.sram3.literal .sram3.text) . = ALIGN (4); _sram3_text_end = ABSOLUTE(.); } >sram3_seg :sram3_phdr .sram3.data : ALIGN(4) { _sram3_data_start = ABSOLUTE(.); *(.sram3.data) . = ALIGN (4); _sram3_data_end = ABSOLUTE(.); } >sram3_seg :sram3_phdr .sram3.bss (NOLOAD) : ALIGN(8) { . = ALIGN (8); _sram3_bss_start = ABSOLUTE(.); *(.sram3.bss) . = ALIGN (8); _sram3_bss_end = ABSOLUTE(.); _memmap_seg_sram3_end = ALIGN(0x8); } >sram3_seg :sram3_bss_phdr _memmap_mem_sram_max = ABSOLUTE(.); .dram0.rodata : ALIGN(4) { _dram0_rodata_start = ABSOLUTE(.); *(.dram0.rodata) . = ALIGN (4); _dram0_rodata_end = ABSOLUTE(.); } >dram0_0_seg :dram0_0_phdr .dram0.data : ALIGN(4) { _dram0_data_start = ABSOLUTE(.); *(.dram0.data) . = ALIGN (4); _dram0_data_end = ABSOLUTE(.); } >dram0_0_seg :dram0_0_phdr .dram0.bss (NOLOAD) : ALIGN(8) { . = ALIGN (8); _dram0_bss_start = ABSOLUTE(.); *(.dram0.bss) *(.dram0_user.bss) . = ALIGN (8); _dram0_bss_end = ABSOLUTE(.); _memmap_seg_dram0_0_end = ALIGN(0x8); } >dram0_0_seg :dram0_0_bss_phdr _memmap_mem_dram0_max = ABSOLUTE(.); .dram1.rodata : ALIGN(4) { _dram1_rodata_start = ABSOLUTE(.); *(.dram1.rodata) . = ALIGN (4); _dram1_rodata_end = ABSOLUTE(.); } >dram1_0_seg :dram1_0_phdr .dram1.data : ALIGN(4) { _dram1_data_start = ABSOLUTE(.); *(.dram1.data) . = ALIGN (4); _dram1_data_end = ABSOLUTE(.); } >dram1_0_seg :dram1_0_phdr .dram1.bss (NOLOAD) : ALIGN(8) { . = ALIGN (8); _dram1_bss_start = ABSOLUTE(.); *(.dram1.bss) *(.dram1_user.bss) . = ALIGN (8); _dram1_bss_end = ABSOLUTE(.); _stack_sentry = ALIGN(0x8); _memmap_seg_dram1_0_end = ALIGN(0x8); } >dram1_0_seg :dram1_0_bss_phdr PROVIDE(__stack = 0xe01a2800); _memmap_mem_dram1_max = ABSOLUTE(.); .local_sram.bss (NOLOAD) : ALIGN(8) { . = ALIGN (8); _local_sram_bss_start = ABSOLUTE(.); *(.local_sram.bss) . = ALIGN (8); _local_sram_bss_end = ABSOLUTE(.); _memmap_seg_local_sram_0_end = ALIGN(0x8); } >local_sram_0_seg :local_sram_0_bss_phdr _memmap_mem_local_sram_max = ABSOLUTE(.); .debug 0 : { *(.debug) } .line 0 : { *(.line) } .debug_srcinfo 0 : { *(.debug_srcinfo) } .debug_sfnames 0 : { *(.debug_sfnames) } .debug_aranges 0 : { *(.debug_aranges) } .debug_pubnames 0 : { *(.debug_pubnames) } .debug_info 0 : { *(.debug_info) } .debug_abbrev 0 : { *(.debug_abbrev) } .debug_line 0 : { *(.debug_line) } .debug_frame 0 : { *(.debug_frame) } .debug_str 0 : { *(.debug_str) } .debug_loc 0 : { *(.debug_loc) } .debug_macinfo 0 : { *(.debug_macinfo) } .debug_weaknames 0 : { *(.debug_weaknames) } .debug_funcnames 0 : { *(.debug_funcnames) } .debug_typenames 0 : { *(.debug_typenames) } .debug_varnames 0 : { *(.debug_varnames) } .xt.insn 0 : { KEEP (*(.xt.insn)) KEEP (*(.gnu.linkonce.x.*)) } .xt.prop 0 : { KEEP (*(.xt.prop)) KEEP (*(.xt.prop.*)) KEEP (*(.gnu.linkonce.prop.*)) } .xt.lit 0 : { KEEP (*(.xt.lit)) KEEP (*(.xt.lit.*)) KEEP (*(.gnu.linkonce.p.*)) } .debug.xt.callgraph 0 : { KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*)) } }