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Linux_SDK_V0.9.5

thead_admin 1 year ago
commit
81ed37e90a
100 changed files with 18406 additions and 0 deletions
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+									<listOptionValue builtIn="false" value="DSP_IP_TEST=1"/>
+									<listOptionValue builtIn="false" value="TEST_RESULT_TO_BUFFER=1"/>
+									<listOptionValue builtIn="false" value="DEBUG=1"/>
+									<listOptionValue builtIn="false" value="DSP_TEST=1"/>
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+									<listOptionValue builtIn="false" value="DSP_PROFILE_ENBALE=1"/>
+									<listOptionValue builtIn="false" value="USE_PI_OBJ=1"/>
+									<listOptionValue builtIn="false" value="LOAD_LIB_OTF=1"/>
+								</option>
+								<inputType id="org.eclipse.cdt.build.core.settings.holder.inType.204608124" languageId="org.eclipse.cdt.core.assembly" languageName="Assembly" sourceContentType="org.eclipse.cdt.core.asmSource" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
+							</tool>
+							<tool errorParsers="org.eclipse.cdt.core.GASErrorParser;org.eclipse.cdt.core.VCErrorParser" id="org.eclipse.cdt.build.core.settings.holder.880535522" name="GNU C++" superClass="org.eclipse.cdt.build.core.settings.holder">
+								<option id="org.eclipse.cdt.build.core.settings.holder.incpaths.341934912" name="Include Paths" superClass="org.eclipse.cdt.build.core.settings.holder.incpaths" valueType="includePath">
+									<listOptionValue builtIn="false" value="C:/usr/xtensa/XtDevTools/install/builds/RI-2020.4-win32/q7_check/xtensa-elf/arch/include"/>
+									<listOptionValue builtIn="false" value="C:/usr/xtensa/XtDevTools/install/builds/RI-2020.4-win32/q7_check/xtensa-elf/include"/>
+									<listOptionValue builtIn="false" value="C:/usr/xtensa/XtDevTools/install/tools/RI-2020.4-win32/XtensaTools/lib/xcc/include"/>
+									<listOptionValue builtIn="false" value="C:/usr/xtensa/XtDevTools/install/tools/RI-2020.4-win32/XtensaTools/xtensa-elf/include"/>
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+									<listOptionValue builtIn="false" value="D:/workspace/Code/csi_dsp_firmware/src/algo"/>
+									<listOptionValue builtIn="false" value="D:/workspace/Code/csi_dsp_firmware/src/core"/>
+									<listOptionValue builtIn="false" value="D:/workspace/Code/csi_dsp_firmware/src/driver/common"/>
+									<listOptionValue builtIn="false" value="D:/workspace/Code/csi_dsp_firmware/src/driver/idma"/>
+									<listOptionValue builtIn="false" value="D:/workspace/Code/csi_dsp_firmware/src/driver/isp"/>
+									<listOptionValue builtIn="false" value="D:/workspace/Code/csi_dsp_firmware/src/driver/TileManager/inc"/>
+									<listOptionValue builtIn="false" value="D:/workspace/Code/csi_dsp_firmware/src/driver/vipre"/>
+									<listOptionValue builtIn="false" value="D:/workspace/Code/csi_dsp_firmware/src/include"/>
+									<listOptionValue builtIn="false" value="D:/workspace/Code/csi_dsp_firmware/src/loader"/>
+									<listOptionValue builtIn="false" value="D:/workspace/Code/csi_dsp_firmware/src/xrp-dsp"/>
+									<listOptionValue builtIn="false" value="D:/workspace/Code/csi_dsp_firmware/src/xrp-dsp/xrp-common"/>
+									<listOptionValue builtIn="false" value="D:/workspace/Code/csi_dsp_firmware/test/include"/>
+									<listOptionValue builtIn="false" value="D:/workspace/Code/csi_dsp_firmware/test/include/CppUTest"/>
+									<listOptionValue builtIn="false" value="D:/workspace/Code/csi_dsp_firmware/test/include/CppUTestExt"/>
+									<listOptionValue builtIn="false" value="D:/workspace/Code/csi_dsp_firmware/test/test_dsp/common"/>
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+									<listOptionValue builtIn="false" value="&quot;D:\workspace\Code\csi_dsp_firmware\src\include&quot;"/>
+									<listOptionValue builtIn="false" value="&quot;D:\workspace\Code\csi_dsp_firmware\test\include&quot;"/>
+									<listOptionValue builtIn="false" value="&quot;D:\workspace\Code\csi_dsp_firmware\src\xrp-dsp\xrp-common&quot;"/>
+									<listOptionValue builtIn="false" value="&quot;D:\workspace\Code\csi_dsp_firmware\src\driver\common&quot;"/>
+									<listOptionValue builtIn="false" value="&quot;D:\workspace\Code\csi_dsp_firmware\src\algo&quot;"/>
+								</option>
+								<option id="org.eclipse.cdt.build.core.settings.holder.symbols.1812593768" name="Symbols" superClass="org.eclipse.cdt.build.core.settings.holder.symbols" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="__CHAR_BIT__=8"/>
+									<listOptionValue builtIn="false" value="__WCHAR_MAX__=65535U"/>
+									<listOptionValue builtIn="false" value="__FLT_EVAL_METHOD__=0"/>
+									<listOptionValue builtIn="false" value="__FINITE_MATH_ONLY__=0"/>
+									<listOptionValue builtIn="false" value="__GNUC_PATCHLEVEL__=0"/>
+									<listOptionValue builtIn="false" value="__SHRT_MAX__=32767"/>
+									<listOptionValue builtIn="false" value="__UINTMAX_TYPE__=long"/>
+									<listOptionValue builtIn="false" value="__CHAR_UNSIGNED__=1"/>
+									<listOptionValue builtIn="false" value="__XCC__=14000"/>
+									<listOptionValue builtIn="false" value="__SCHAR_MAX__=127"/>
+									<listOptionValue builtIn="false" value="__USER_LABEL_PREFIX__"/>
+									<listOptionValue builtIn="false" value="__STDC_HOSTED__=1"/>
+									<listOptionValue builtIn="false" value="__XTENSA_EL__=1"/>
+									<listOptionValue builtIn="false" value="__XCC_MINOR__=4"/>
+									<listOptionValue builtIn="false" value="__GNUC__=4"/>
+									<listOptionValue builtIn="false" value="__LONG_LONG_MAX__=9223372036854775807LL"/>
+									<listOptionValue builtIn="false" value="__GXX_ABI_VERSION=1002"/>
+									<listOptionValue builtIn="false" value="__NO_INLINE__=1"/>
+									<listOptionValue builtIn="false" value="__VERSION__=&quot;4.2.0"/>
+									<listOptionValue builtIn="false" value="__REGISTER_PREFIX__"/>
+									<listOptionValue builtIn="false" value="__SIZE_TYPE__=unsigned"/>
+									<listOptionValue builtIn="false" value="__ELF__=1"/>
+									<listOptionValue builtIn="false" value="__xtensa__=1"/>
+									<listOptionValue builtIn="false" value="__LONG_MAX__=2147483647L"/>
+									<listOptionValue builtIn="false" value="__WCHAR_TYPE__=short"/>
+									<listOptionValue builtIn="false" value="__WINT_TYPE__=unsigned"/>
+									<listOptionValue builtIn="false" value="__INT_MAX__=2147483647"/>
+									<listOptionValue builtIn="false" value="__XTENSA_WINDOWED_ABI__=1"/>
+									<listOptionValue builtIn="false" value="__XTENSA__=1"/>
+									<listOptionValue builtIn="false" value="__INTMAX_MAX__=9223372036854775807LL"/>
+									<listOptionValue builtIn="false" value="__INTMAX_TYPE__=long"/>
+									<listOptionValue builtIn="false" value="__XTENSA_SOFT_DOUBLE__=1"/>
+									<listOptionValue builtIn="false" value="__GNUC_MINOR__=2"/>
+									<listOptionValue builtIn="false" value="__STDC__=1"/>
+									<listOptionValue builtIn="false" value="__PTRDIFF_TYPE__=int"/>
+									<listOptionValue builtIn="false" value="__GNUC_GNU_INLINE__=1"/>
+									<listOptionValue builtIn="false" value="&quot;__FILENAME__=&quot;$(subst $(dir $&lt;),,$&lt;)&quot;"/>
+									<listOptionValue builtIn="false" value="DSP_IP_TEST=1"/>
+									<listOptionValue builtIn="false" value="TEST_RESULT_TO_BUFFER=1"/>
+									<listOptionValue builtIn="false" value="DEBUG=1"/>
+									<listOptionValue builtIn="false" value="DSP_TEST=1"/>
+									<listOptionValue builtIn="false" value="_USE_TCM_ALLOCATE=1"/>
+									<listOptionValue builtIn="false" value="DSP_PROFILE_ENBALE=1"/>
+									<listOptionValue builtIn="false" value="USE_PI_OBJ=1"/>
+									<listOptionValue builtIn="false" value="LOAD_LIB_OTF=1"/>
+								</option>
+								<inputType id="org.eclipse.cdt.build.core.settings.holder.inType.255245693" languageId="org.eclipse.cdt.core.g++" languageName="GNU C++" sourceContentType="org.eclipse.cdt.core.cxxSource,org.eclipse.cdt.core.cxxHeader" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
+							</tool>
+							<tool errorParsers="org.eclipse.cdt.core.GASErrorParser;org.eclipse.cdt.core.VCErrorParser" id="org.eclipse.cdt.build.core.settings.holder.1713631918" name="GNU C" superClass="org.eclipse.cdt.build.core.settings.holder">
+								<option id="org.eclipse.cdt.build.core.settings.holder.incpaths.2114878849" name="Include Paths" superClass="org.eclipse.cdt.build.core.settings.holder.incpaths" valueType="includePath">
+									<listOptionValue builtIn="false" value="C:/usr/xtensa/XtDevTools/install/builds/RI-2020.4-win32/q7_check/xtensa-elf/arch/include"/>
+									<listOptionValue builtIn="false" value="C:/usr/xtensa/XtDevTools/install/builds/RI-2020.4-win32/q7_check/xtensa-elf/include"/>
+									<listOptionValue builtIn="false" value="C:/usr/xtensa/XtDevTools/install/tools/RI-2020.4-win32/XtensaTools/lib/xcc/include"/>
+									<listOptionValue builtIn="false" value="C:/usr/xtensa/XtDevTools/install/tools/RI-2020.4-win32/XtensaTools/xtensa-elf/include"/>
+									<listOptionValue builtIn="false" value="C:/usr/xtensa/XtDevTools/install/builds/RI-2020.4-win32/q7_check/xtensa-elf/include/xcc/c++"/>
+									<listOptionValue builtIn="false" value="C:/usr/xtensa/XtDevTools/install/builds/RI-2020.4-win32/q7_check/xtensa-elf/include/xcc/c++/xtensa-elf"/>
+									<listOptionValue builtIn="false" value="D:/workspace/Code/csi_dsp_firmware/src/algo"/>
+									<listOptionValue builtIn="false" value="D:/workspace/Code/csi_dsp_firmware/src/core"/>
+									<listOptionValue builtIn="false" value="D:/workspace/Code/csi_dsp_firmware/src/driver/common"/>
+									<listOptionValue builtIn="false" value="D:/workspace/Code/csi_dsp_firmware/src/driver/idma"/>
+									<listOptionValue builtIn="false" value="D:/workspace/Code/csi_dsp_firmware/src/driver/isp"/>
+									<listOptionValue builtIn="false" value="D:/workspace/Code/csi_dsp_firmware/src/driver/TileManager/inc"/>
+									<listOptionValue builtIn="false" value="D:/workspace/Code/csi_dsp_firmware/src/driver/vipre"/>
+									<listOptionValue builtIn="false" value="D:/workspace/Code/csi_dsp_firmware/src/include"/>
+									<listOptionValue builtIn="false" value="D:/workspace/Code/csi_dsp_firmware/src/loader"/>
+									<listOptionValue builtIn="false" value="D:/workspace/Code/csi_dsp_firmware/src/xrp-dsp"/>
+									<listOptionValue builtIn="false" value="D:/workspace/Code/csi_dsp_firmware/src/xrp-dsp/xrp-common"/>
+									<listOptionValue builtIn="false" value="D:/workspace/Code/csi_dsp_firmware/test/include"/>
+									<listOptionValue builtIn="false" value="D:/workspace/Code/csi_dsp_firmware/test/include/CppUTest"/>
+									<listOptionValue builtIn="false" value="D:/workspace/Code/csi_dsp_firmware/test/include/CppUTestExt"/>
+									<listOptionValue builtIn="false" value="D:/workspace/Code/csi_dsp_firmware/test/test_dsp/common"/>
+									<listOptionValue builtIn="false" value="D:/workspace/Code/csi_dsp_firmware/test/test_dsp/vectorization_test"/>
+									<listOptionValue builtIn="false" value="&quot;D:\workspace\Code\csi_dsp_firmware\src\include&quot;"/>
+									<listOptionValue builtIn="false" value="&quot;D:\workspace\Code\csi_dsp_firmware\test\include&quot;"/>
+									<listOptionValue builtIn="false" value="&quot;D:\workspace\Code\csi_dsp_firmware\src\xrp-dsp\xrp-common&quot;"/>
+									<listOptionValue builtIn="false" value="&quot;D:\workspace\Code\csi_dsp_firmware\src\driver\common&quot;"/>
+									<listOptionValue builtIn="false" value="&quot;D:\workspace\Code\csi_dsp_firmware\src\algo&quot;"/>
+								</option>
+								<option id="org.eclipse.cdt.build.core.settings.holder.symbols.363659346" name="Symbols" superClass="org.eclipse.cdt.build.core.settings.holder.symbols" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="__CHAR_BIT__=8"/>
+									<listOptionValue builtIn="false" value="__WCHAR_MAX__=65535U"/>
+									<listOptionValue builtIn="false" value="__FLT_EVAL_METHOD__=0"/>
+									<listOptionValue builtIn="false" value="__FINITE_MATH_ONLY__=0"/>
+									<listOptionValue builtIn="false" value="__GNUC_PATCHLEVEL__=0"/>
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+									<listOptionValue builtIn="false" value="__UINTMAX_TYPE__=long"/>
+									<listOptionValue builtIn="false" value="__CHAR_UNSIGNED__=1"/>
+									<listOptionValue builtIn="false" value="__XCC__=14000"/>
+									<listOptionValue builtIn="false" value="__SCHAR_MAX__=127"/>
+									<listOptionValue builtIn="false" value="__USER_LABEL_PREFIX__"/>
+									<listOptionValue builtIn="false" value="__STDC_HOSTED__=1"/>
+									<listOptionValue builtIn="false" value="__XTENSA_EL__=1"/>
+									<listOptionValue builtIn="false" value="__XCC_MINOR__=4"/>
+									<listOptionValue builtIn="false" value="__GNUC__=4"/>
+									<listOptionValue builtIn="false" value="__LONG_LONG_MAX__=9223372036854775807LL"/>
+									<listOptionValue builtIn="false" value="__GXX_ABI_VERSION=1002"/>
+									<listOptionValue builtIn="false" value="__NO_INLINE__=1"/>
+									<listOptionValue builtIn="false" value="__VERSION__=&quot;4.2.0"/>
+									<listOptionValue builtIn="false" value="__REGISTER_PREFIX__"/>
+									<listOptionValue builtIn="false" value="__SIZE_TYPE__=unsigned"/>
+									<listOptionValue builtIn="false" value="__ELF__=1"/>
+									<listOptionValue builtIn="false" value="__xtensa__=1"/>
+									<listOptionValue builtIn="false" value="__LONG_MAX__=2147483647L"/>
+									<listOptionValue builtIn="false" value="__WCHAR_TYPE__=short"/>
+									<listOptionValue builtIn="false" value="__WINT_TYPE__=unsigned"/>
+									<listOptionValue builtIn="false" value="__INT_MAX__=2147483647"/>
+									<listOptionValue builtIn="false" value="__XTENSA_WINDOWED_ABI__=1"/>
+									<listOptionValue builtIn="false" value="__XTENSA__=1"/>
+									<listOptionValue builtIn="false" value="__INTMAX_MAX__=9223372036854775807LL"/>
+									<listOptionValue builtIn="false" value="__INTMAX_TYPE__=long"/>
+									<listOptionValue builtIn="false" value="__XTENSA_SOFT_DOUBLE__=1"/>
+									<listOptionValue builtIn="false" value="__GNUC_MINOR__=2"/>
+									<listOptionValue builtIn="false" value="__STDC__=1"/>
+									<listOptionValue builtIn="false" value="__PTRDIFF_TYPE__=int"/>
+									<listOptionValue builtIn="false" value="__GNUC_GNU_INLINE__=1"/>
+									<listOptionValue builtIn="false" value="&quot;__FILENAME__=&quot;$(subst $(dir $&lt;),,$&lt;)&quot;"/>
+									<listOptionValue builtIn="false" value="DSP_IP_TEST=1"/>
+									<listOptionValue builtIn="false" value="TEST_RESULT_TO_BUFFER=1"/>
+									<listOptionValue builtIn="false" value="DEBUG=1"/>
+									<listOptionValue builtIn="false" value="DSP_TEST=1"/>
+									<listOptionValue builtIn="false" value="_USE_TCM_ALLOCATE=1"/>
+									<listOptionValue builtIn="false" value="DSP_PROFILE_ENBALE=1"/>
+									<listOptionValue builtIn="false" value="USE_PI_OBJ=1"/>
+									<listOptionValue builtIn="false" value="LOAD_LIB_OTF=1"/>
+								</option>
+								<inputType id="org.eclipse.cdt.build.core.settings.holder.inType.1716101954" languageId="org.eclipse.cdt.core.gcc" languageName="GNU C" sourceContentType="org.eclipse.cdt.core.cSource,org.eclipse.cdt.core.cHeader" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
+							</tool>
+						</toolChain>
+					</folderInfo>
+				</configuration>
+			</storageModule>
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="Xtensa.1531410605" moduleId="org.eclipse.cdt.core.settings" name="Xtensa">
+				<externalSettings/>
+				<extensions>
+					<extension id="com.tensilica.xide.cdt.XtensaELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.VCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="com.tensilica.xide.cdt.TCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="com.tensilica.xide.cdt.XtLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="com.tensilica.xide.cdt.XCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="com.tensilica.xide.cdt.FlexLmErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+	</storageModule>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="DSP_PS.null.2113036648" name="DSP_PS"/>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		<scannerConfigBuildInfo instanceId="Xtensa.1531410605">
+			<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		</scannerConfigBuildInfo>
+	</storageModule>
+</cproject>

+ 30 - 0
.project

@@ -0,0 +1,30 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>CSI_DSP_FW</name>
+	<comment></comment>
+	<projects>
+		<project>XtensaInfo</project>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>com.tensilica.xide.cdt.xtensamanagedbuilder</name>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>org.eclipse.cdt.core.ccnature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+		<nature>com.tensilica.xide.cdt.XtensaCProjectNature</nature>
+		<nature>com.tensilica.xide.cdt.XideManagedProjectNature</nature>
+		<nature>com.tensilica.xide.cdt.XtensaCProjectExeNature</nature>
+	</natures>
+</projectDescription>

+ 10 - 0
.settings/autolaunch.info

@@ -0,0 +1,10 @@
+#
+#Fri Sep 03 15:19:14 CST 2021
+com.tensilica.xide.cdtcommandlist=
+com.tensilica.xide.cdtinitfileprovided=false
+org.eclipse.cdt.launch.WORKING_DIRECTORY=
+com.tensilica.xide.cdtrunscriptafterload=false
+com.tensilica.xide.cdtinitfile=
+com.tensilica.xide.cdt.launch.attachingdo=do nothing
+org.eclipse.cdt.launch.PROGRAM_ARGUMENTS=-v
+com.tensilica.xide.cdt.launch.attachingdo.stop.at.symbol=main

+ 2 - 0
.settings/org.eclipse.core.resources.prefs

@@ -0,0 +1,2 @@
+eclipse.preferences.version=1
+encoding//src/include/csi_dsp_task_defs.h=UTF-8

+ 10 - 0
.settings/targets/xtensa/CommonTarget.bts

@@ -0,0 +1,10 @@
+<?xml version="1.0" encoding="UTF-8" standalone="yes"?>
+<BuildTarget version="1.0" tool="xtensa">
+    <BuildSettings>
+        <BaseSettings path="project">
+            <LinkerOptions>
+                <LinkerSupport value="sim" key="-mlsp=" custom="false"/>
+            </LinkerOptions>
+        </BaseSettings>
+    </BuildSettings>
+</BuildTarget>

+ 36 - 0
.settings/targets/xtensa/Debug.bts

@@ -0,0 +1,36 @@
+<?xml version="1.0" encoding="UTF-8" standalone="yes"?>
+<BuildTarget version="1.0" tool="xtensa">
+    <BuildSettings>
+        <BaseSettings path="project">
+            <CompilerOptions>
+                <FlagValueMapOptions>
+                    <FlagValueMapEntry>
+                        <key>Debug</key>
+                        <value level="-3" flag="-g" use="true"/>
+                    </FlagValueMapEntry>
+                    <FlagValueMapEntry>
+                        <key>Optimization</key>
+                        <value level="0" flag="-O" use="true"/>
+                    </FlagValueMapEntry>
+                </FlagValueMapOptions>
+            </CompilerOptions>
+            <AssemblerOptions>
+                <SingleFlagMapOptions>
+                    <SingleFlagMapEntry>
+                        <key>AssemblerIncludeDebug</key>
+                        <value flag="--gdwarf-2" use="true"/>
+                    </SingleFlagMapEntry>
+                </SingleFlagMapOptions>
+            </AssemblerOptions>
+            <LinkerOptions>
+                <BooleanMapOptions>
+                    <BooleanMapEntry>
+                        <key>CreateMinsize</key>
+                        <value selected="true"/>
+                    </BooleanMapEntry>
+                </BooleanMapOptions>
+                <LinkerSupport value="sim" key="-mlsp=" custom="false"/>
+            </LinkerOptions>
+        </BaseSettings>
+    </BuildSettings>
+</BuildTarget>

+ 104 - 0
.settings/targets/xtensa/Release.bts

@@ -0,0 +1,104 @@
+<?xml version="1.0" encoding="UTF-8" standalone="yes"?>
+<BuildTarget tool="xtensa" version="1.0">
+    <BuildSettings>
+        <BaseSettings path="project">
+            <PreprocessorOptions>
+                <StringListMapOptions>
+                    <StringListMapEntry>
+                        <key>Includes</key>
+                        <value flag="-I" inheritance="prepend">
+                            <ListEntry>${workspace_loc:CSI_DSP_FW/src/include}</ListEntry>
+                            <ListEntry>${workspace_loc:CSI_DSP_FW/test/include}</ListEntry>
+                            <ListEntry>${workspace_loc:CSI_DSP_FW/src/xrp-dsp/xrp-common}</ListEntry>
+                            <ListEntry>${workspace_loc:CSI_DSP_FW/src/driver/common}</ListEntry>
+                            <ListEntry>${workspace_loc:CSI_DSP_FW/src/algo}</ListEntry>
+                        </value>
+                    </StringListMapEntry>
+                    <StringListMapEntry>
+                        <key>UnDefines</key>
+                        <value flag="-U" inheritance="prepend">
+                            <ListEntry>DSP_IP_TEST</ListEntry>
+                            <ListEntry>TEST_RESULT_TO_BUFFER</ListEntry>
+                            <ListEntry>DSP_TEST</ListEntry>
+                            <ListEntry>_USE_TCM_ALLOCATE</ListEntry>
+                            <ListEntry>DSP_PROFILE_ENBALE</ListEntry>
+                        </value>
+                    </StringListMapEntry>
+                </StringListMapOptions>
+                <KeyValueListMapOptions>
+                    <KeyValueListMapEntry>
+                        <key>Defines</key>
+                        <value flag="-D" inheritance="append">
+                            <ListEntry key="__FILENAME__" value="&quot;$(subst $(dir $&lt;),,$&lt;)&quot;"/>
+                            <ListEntry key="DSP_IP_TEST" value=""/>
+                            <ListEntry key="TEST_RESULT_TO_BUFFER" value=""/>
+                            <ListEntry key="DEBUG" value=""/>
+                            <ListEntry key="DSP_TEST" value=""/>
+                            <ListEntry key="_USE_TCM_ALLOCATE" value=""/>
+                            <ListEntry key="DSP_PROFILE_ENBALE" value=""/>
+                            <ListEntry key="USE_SUBFUNC_OBJ" value=""/>
+                        </value>
+                    </KeyValueListMapEntry>
+                </KeyValueListMapOptions>
+            </PreprocessorOptions>
+            <CompilerOptions>
+                <SingleFlagMapOptions>
+                    <SingleFlagMapEntry>
+                        <key>EnableSIMD</key>
+                        <value flag="-LNO:simd" use="true"/>
+                    </SingleFlagMapEntry>
+                    <SingleFlagMapEntry>
+                        <key>CompilerVariant</key>
+                        <value flag="xt-clang" use="true"/>
+                    </SingleFlagMapEntry>
+                </SingleFlagMapOptions>
+                <FlagValueMapOptions>
+                    <FlagValueMapEntry>
+                        <key>Debug</key>
+                        <value level="-3" flag="-g" use="true"/>
+                    </FlagValueMapEntry>
+                </FlagValueMapOptions>
+            </CompilerOptions>
+            <LinkerOptions>
+                <BooleanMapOptions>
+                    <BooleanMapEntry>
+                        <key>CreateMinsize</key>
+                        <value selected="true"/>
+                    </BooleanMapEntry>
+                    <BooleanMapEntry>
+                        <key>GenerateMapFile</key>
+                        <value selected="true"/>
+                    </BooleanMapEntry>
+                </BooleanMapOptions>
+                <StringListMapOptions>
+                    <StringListMapEntry>
+                        <key>LibrarySearchPath</key>
+                        <value flag="-L" inheritance="prepend">
+                            <ListEntry>${workspace_loc:CSI_DSP_FW/test/lib}</ListEntry>
+                        </value>
+                    </StringListMapEntry>
+                    <StringListMapEntry>
+                        <key>LinkerAdditionalOptions</key>
+                        <value flag="" inheritance="append">
+                            <ListEntry>-Wl,--defsym,xrp_dsp_comm_base_magic=0x25000000</ListEntry>
+                        </value>
+                    </StringListMapEntry>
+                    <StringListMapEntry>
+                        <key>Libraries</key>
+                        <value flag="-l" inheritance="prepend">
+                            <ListEntry>idma-xtos</ListEntry>
+                            <ListEntry>idma-debug-xtos</ListEntry>
+                            <ListEntry>idma</ListEntry>
+                            <ListEntry>idma-debug</ListEntry>
+                            <ListEntry>xtutil</ListEntry>
+                            <ListEntry>CppUTest</ListEntry>
+                            <ListEntry>CppUTestExt</ListEntry>
+                            <ListEntry>loader</ListEntry>
+                        </value>
+                    </StringListMapEntry>
+                </StringListMapOptions>
+                <LinkerSupport custom="true" key="-mlsp=" value="C:\Users\DELL\workspace\CSI_DSP_FW\LSP\min-rt_0x24_core1_stact_tcm1"/>
+            </LinkerOptions>
+        </BaseSettings>
+    </BuildSettings>
+</BuildTarget>

+ 34 - 0
.settings/targets/xtensa/ReleaseSize.bts

@@ -0,0 +1,34 @@
+<?xml version="1.0" encoding="UTF-8" standalone="yes"?>
+<BuildTarget version="1.0" tool="xtensa">
+    <BuildSettings>
+        <BaseSettings path="project">
+            <CompilerOptions>
+                <SingleFlagMapOptions>
+                    <SingleFlagMapEntry>
+                        <key>OptimizeSpace</key>
+                        <value flag="-Os" use="true"/>
+                    </SingleFlagMapEntry>
+                </SingleFlagMapOptions>
+                <FlagValueMapOptions>
+                    <FlagValueMapEntry>
+                        <key>Optimization</key>
+                        <value level="2" flag="-O" use="true"/>
+                    </FlagValueMapEntry>
+                    <FlagValueMapEntry>
+                        <key>Debug</key>
+                        <value level="-3" flag="-g" use="true"/>
+                    </FlagValueMapEntry>
+                </FlagValueMapOptions>
+            </CompilerOptions>
+            <LinkerOptions>
+                <BooleanMapOptions>
+                    <BooleanMapEntry>
+                        <key>CreateMinsize</key>
+                        <value selected="true"/>
+                    </BooleanMapEntry>
+                </BooleanMapOptions>
+                <LinkerSupport value="tiny" key="-mlsp=" custom="false"/>
+            </LinkerOptions>
+        </BaseSettings>
+    </BuildSettings>
+</BuildTarget>

+ 108 - 0
.settings/targets/xtensa/Release_Core0.bts

@@ -0,0 +1,108 @@
+<?xml version="1.0" encoding="UTF-8" standalone="yes"?>
+<BuildTarget tool="xtensa" version="1.0">
+    <BuildSettings>
+        <BaseSettings path="project">
+            <PreprocessorOptions>
+                <StringListMapOptions>
+                    <StringListMapEntry>
+                        <key>Includes</key>
+                        <value flag="-I" inheritance="prepend">
+                            <ListEntry>${workspace_loc:CSI_DSP_FW/src/include}</ListEntry>
+                            <ListEntry>${workspace_loc:CSI_DSP_FW/test/include}</ListEntry>
+                            <ListEntry>${workspace_loc:CSI_DSP_FW/src/xrp-dsp/xrp-common}</ListEntry>
+                            <ListEntry>${workspace_loc:CSI_DSP_FW/src/driver/common}</ListEntry>
+                            <ListEntry>${workspace_loc:CSI_DSP_FW/src/algo}</ListEntry>
+                        </value>
+                    </StringListMapEntry>
+                    <StringListMapEntry>
+                        <key>UnDefines</key>
+                        <value flag="-U" inheritance="prepend">
+                            <ListEntry>DSP_IP_TEST</ListEntry>
+                            <ListEntry>TEST_RESULT_TO_BUFFER</ListEntry>
+                            <ListEntry>DSP_TEST</ListEntry>
+                            <ListEntry>_USE_TCM_ALLOCATE</ListEntry>
+                            <ListEntry>DSP_PROFILE_ENBALE</ListEntry>
+                        </value>
+                    </StringListMapEntry>
+                </StringListMapOptions>
+                <KeyValueListMapOptions>
+                    <KeyValueListMapEntry>
+                        <key>Defines</key>
+                        <value flag="-D" inheritance="append">
+                            <ListEntry key="__FILENAME__" value="&quot;$(subst $(dir $&lt;),,$&lt;)&quot;"/>
+                            <ListEntry key="DSP_IP_TEST" value=""/>
+                            <ListEntry key="TEST_RESULT_TO_BUFFER" value=""/>
+                            <ListEntry key="DEBUG" value=""/>
+                            <ListEntry key="DSP_TEST" value=""/>
+                            <ListEntry key="_USE_TCM_ALLOCATE" value=""/>
+                            <ListEntry key="DSP_PROFILE_ENBALE" value=""/>
+                            <ListEntry key="USE_SUBFUNC_OBJ" value=""/>
+                        </value>
+                    </KeyValueListMapEntry>
+                </KeyValueListMapOptions>
+            </PreprocessorOptions>
+            <CompilerOptions>
+                <SingleFlagMapOptions>
+                    <SingleFlagMapEntry>
+                        <key>EnableSIMD</key>
+                        <value flag="-LNO:simd" use="true"/>
+                    </SingleFlagMapEntry>
+                    <SingleFlagMapEntry>
+                        <key>CompilerVariant</key>
+                        <value flag="xt-clang" use="true"/>
+                    </SingleFlagMapEntry>
+                </SingleFlagMapOptions>
+                <FlagValueMapOptions>
+                    <FlagValueMapEntry>
+                        <key>Debug</key>
+                        <value level="-3" flag="-g" use="true"/>
+                    </FlagValueMapEntry>
+                    <FlagValueMapEntry>
+                        <key>Optimization</key>
+                        <value level="3" flag="-O" use="true"/>
+                    </FlagValueMapEntry>
+                </FlagValueMapOptions>
+            </CompilerOptions>
+            <LinkerOptions>
+                <BooleanMapOptions>
+                    <BooleanMapEntry>
+                        <key>CreateMinsize</key>
+                        <value selected="true"/>
+                    </BooleanMapEntry>
+                    <BooleanMapEntry>
+                        <key>GenerateMapFile</key>
+                        <value selected="true"/>
+                    </BooleanMapEntry>
+                </BooleanMapOptions>
+                <StringListMapOptions>
+                    <StringListMapEntry>
+                        <key>LibrarySearchPath</key>
+                        <value flag="-L" inheritance="prepend">
+                            <ListEntry>${workspace_loc:CSI_DSP_FW/test/lib}</ListEntry>
+                        </value>
+                    </StringListMapEntry>
+                    <StringListMapEntry>
+                        <key>LinkerAdditionalOptions</key>
+                        <value flag="" inheritance="append">
+                            <ListEntry>-Wl,--defsym,xrp_dsp_comm_base_magic=0x25000000</ListEntry>
+                        </value>
+                    </StringListMapEntry>
+                    <StringListMapEntry>
+                        <key>Libraries</key>
+                        <value flag="-l" inheritance="prepend">
+                            <ListEntry>idma-xtos</ListEntry>
+                            <ListEntry>idma-debug-xtos</ListEntry>
+                            <ListEntry>idma</ListEntry>
+                            <ListEntry>idma-debug</ListEntry>
+                            <ListEntry>xtutil</ListEntry>
+                            <ListEntry>CppUTest</ListEntry>
+                            <ListEntry>CppUTestExt</ListEntry>
+                            <ListEntry>loader</ListEntry>
+                        </value>
+                    </StringListMapEntry>
+                </StringListMapOptions>
+                <LinkerSupport custom="true" key="-mlsp=" value="D:\workspace\Code\csi_dsp_firmware\LSP\min-rt_core0_stack_tcm1"/>
+            </LinkerOptions>
+        </BaseSettings>
+    </BuildSettings>
+</BuildTarget>

+ 105 - 0
.settings/targets/xtensa/Release_Core0_FL.bts

@@ -0,0 +1,105 @@
+<?xml version="1.0" encoding="UTF-8" standalone="yes"?>
+<BuildTarget tool="xtensa" version="1.0">
+    <BuildSettings>
+        <BaseSettings path="project">
+            <PreprocessorOptions>
+                <StringListMapOptions>
+                    <StringListMapEntry>
+                        <key>Includes</key>
+                        <value flag="-I" inheritance="prepend">
+                            <ListEntry>${workspace_loc:CSI_DSP_FW/src/include}</ListEntry>
+                            <ListEntry>${workspace_loc:CSI_DSP_FW/test/include}</ListEntry>
+                            <ListEntry>${workspace_loc:CSI_DSP_FW/src/xrp-dsp/xrp-common}</ListEntry>
+                            <ListEntry>${workspace_loc:CSI_DSP_FW/src/driver/common}</ListEntry>
+                            <ListEntry>${workspace_loc:CSI_DSP_FW/src/algo}</ListEntry>
+                        </value>
+                    </StringListMapEntry>
+                    <StringListMapEntry>
+                        <key>UnDefines</key>
+                        <value flag="-U" inheritance="prepend">
+                            <ListEntry>DSP_IP_TEST</ListEntry>
+                            <ListEntry>TEST_RESULT_TO_BUFFER</ListEntry>
+                            <ListEntry>DSP_TEST</ListEntry>
+                            <ListEntry>_USE_TCM_ALLOCATE</ListEntry>
+                            <ListEntry>DSP_PROFILE_ENBALE</ListEntry>
+                        </value>
+                    </StringListMapEntry>
+                </StringListMapOptions>
+                <KeyValueListMapOptions>
+                    <KeyValueListMapEntry>
+                        <key>Defines</key>
+                        <value flag="-D" inheritance="append">
+                            <ListEntry key="__FILENAME__" value="&quot;$(subst $(dir $&lt;),,$&lt;)&quot;"/>
+                            <ListEntry key="DSP_IP_TEST" value=""/>
+                            <ListEntry key="TEST_RESULT_TO_BUFFER" value=""/>
+                            <ListEntry key="DEBUG" value=""/>
+                            <ListEntry key="DSP_TEST" value=""/>
+                            <ListEntry key="_USE_TCM_ALLOCATE" value=""/>
+                            <ListEntry key="DSP_PROFILE_ENBALE" value=""/>
+                            <ListEntry key="USE_FL_OBJ" value=""/>
+                            <ListEntry key="LOAD_LIB_OTF" value=""/>
+                        </value>
+                    </KeyValueListMapEntry>
+                </KeyValueListMapOptions>
+            </PreprocessorOptions>
+            <CompilerOptions>
+                <SingleFlagMapOptions>
+                    <SingleFlagMapEntry>
+                        <key>EnableSIMD</key>
+                        <value flag="-LNO:simd" use="true"/>
+                    </SingleFlagMapEntry>
+                    <SingleFlagMapEntry>
+                        <key>CompilerVariant</key>
+                        <value flag="xt-clang" use="true"/>
+                    </SingleFlagMapEntry>
+                </SingleFlagMapOptions>
+                <FlagValueMapOptions>
+                    <FlagValueMapEntry>
+                        <key>Debug</key>
+                        <value level="-3" flag="-g" use="true"/>
+                    </FlagValueMapEntry>
+                    <FlagValueMapEntry>
+                        <key>Optimization</key>
+                        <value level="3" flag="-O" use="true"/>
+                    </FlagValueMapEntry>
+                </FlagValueMapOptions>
+            </CompilerOptions>
+            <LinkerOptions>
+                <BooleanMapOptions>
+                    <BooleanMapEntry>
+                        <key>CreateMinsize</key>
+                        <value selected="true"/>
+                    </BooleanMapEntry>
+                    <BooleanMapEntry>
+                        <key>GenerateMapFile</key>
+                        <value selected="true"/>
+                    </BooleanMapEntry>
+                </BooleanMapOptions>
+                <StringListMapOptions>
+                    <StringListMapEntry>
+                        <key>LibrarySearchPath</key>
+                        <value flag="-L" inheritance="prepend">
+                            <ListEntry>${workspace_loc:CSI_DSP_FW/test/lib}</ListEntry>
+                        </value>
+                    </StringListMapEntry>
+                    <StringListMapEntry>
+                        <key>Libraries</key>
+                        <value flag="-l" inheritance="prepend">
+                            <ListEntry>idma</ListEntry>
+                            <ListEntry>idma-debug</ListEntry>
+                            <ListEntry>idma-debug-os</ListEntry>
+                            <ListEntry>idma-debug-xtos</ListEntry>
+                            <ListEntry>idma-os</ListEntry>
+                            <ListEntry>idma-xtos</ListEntry>
+                            <ListEntry>xtutil</ListEntry>
+                            <ListEntry>CppUTest</ListEntry>
+                            <ListEntry>CppUTestExt</ListEntry>
+                            <ListEntry>loader</ListEntry>
+                        </value>
+                    </StringListMapEntry>
+                </StringListMapOptions>
+                <LinkerSupport custom="true" key="-mlsp=" value="D:\workspace\Code\csi_dsp_firmware\LSP\min-rt_core0_main_stack_tcm1"/>
+            </LinkerOptions>
+        </BaseSettings>
+    </BuildSettings>
+</BuildTarget>

+ 104 - 0
.settings/targets/xtensa/Release_Core0_PI.bts

@@ -0,0 +1,104 @@
+<?xml version="1.0" encoding="UTF-8" standalone="yes"?>
+<BuildTarget tool="xtensa" version="1.0">
+    <BuildSettings>
+        <BaseSettings path="project">
+            <PreprocessorOptions>
+                <StringListMapOptions>
+                    <StringListMapEntry>
+                        <key>Includes</key>
+                        <value flag="-I" inheritance="prepend">
+                            <ListEntry>${workspace_loc:CSI_DSP_FW/src/include}</ListEntry>
+                            <ListEntry>${workspace_loc:CSI_DSP_FW/test/include}</ListEntry>
+                            <ListEntry>${workspace_loc:CSI_DSP_FW/src/xrp-dsp/xrp-common}</ListEntry>
+                            <ListEntry>${workspace_loc:CSI_DSP_FW/src/driver/common}</ListEntry>
+                            <ListEntry>${workspace_loc:CSI_DSP_FW/src/algo}</ListEntry>
+                        </value>
+                    </StringListMapEntry>
+                    <StringListMapEntry>
+                        <key>UnDefines</key>
+                        <value flag="-U" inheritance="prepend">
+                            <ListEntry>DSP_IP_TEST</ListEntry>
+                            <ListEntry>TEST_RESULT_TO_BUFFER</ListEntry>
+                            <ListEntry>DSP_TEST</ListEntry>
+                            <ListEntry>DSP_PROFILE_ENBALE</ListEntry>
+                        </value>
+                    </StringListMapEntry>
+                </StringListMapOptions>
+                <KeyValueListMapOptions>
+                    <KeyValueListMapEntry>
+                        <key>Defines</key>
+                        <value flag="-D" inheritance="append">
+                            <ListEntry key="__FILENAME__" value="&quot;$(subst $(dir $&lt;),,$&lt;)&quot;"/>
+                            <ListEntry key="DSP_IP_TEST" value=""/>
+                            <ListEntry key="TEST_RESULT_TO_BUFFER" value=""/>
+                            <ListEntry key="DEBUG" value=""/>
+                            <ListEntry key="DSP_TEST" value=""/>
+                            <ListEntry key="_USE_TCM_ALLOCATE" value=""/>
+                            <ListEntry key="DSP_PROFILE_ENBALE" value=""/>
+                            <ListEntry key="USE_PI_OBJ" value=""/>
+                            <ListEntry key="LOAD_LIB_OTF" value=""/>
+                        </value>
+                    </KeyValueListMapEntry>
+                </KeyValueListMapOptions>
+            </PreprocessorOptions>
+            <CompilerOptions>
+                <SingleFlagMapOptions>
+                    <SingleFlagMapEntry>
+                        <key>EnableSIMD</key>
+                        <value flag="-LNO:simd" use="true"/>
+                    </SingleFlagMapEntry>
+                    <SingleFlagMapEntry>
+                        <key>CompilerVariant</key>
+                        <value flag="xt-clang" use="true"/>
+                    </SingleFlagMapEntry>
+                </SingleFlagMapOptions>
+                <FlagValueMapOptions>
+                    <FlagValueMapEntry>
+                        <key>Optimization</key>
+                        <value level="3" flag="-O" use="true"/>
+                    </FlagValueMapEntry>
+                    <FlagValueMapEntry>
+                        <key>Debug</key>
+                        <value level="-3" flag="-g" use="true"/>
+                    </FlagValueMapEntry>
+                </FlagValueMapOptions>
+            </CompilerOptions>
+            <LinkerOptions>
+                <BooleanMapOptions>
+                    <BooleanMapEntry>
+                        <key>CreateMinsize</key>
+                        <value selected="true"/>
+                    </BooleanMapEntry>
+                    <BooleanMapEntry>
+                        <key>GenerateMapFile</key>
+                        <value selected="true"/>
+                    </BooleanMapEntry>
+                </BooleanMapOptions>
+                <StringListMapOptions>
+                    <StringListMapEntry>
+                        <key>LibrarySearchPath</key>
+                        <value flag="-L" inheritance="prepend">
+                            <ListEntry>${workspace_loc:CSI_DSP_FW/test/lib}</ListEntry>
+                        </value>
+                    </StringListMapEntry>
+                    <StringListMapEntry>
+                        <key>Libraries</key>
+                        <value flag="-l" inheritance="prepend">
+                            <ListEntry>idma</ListEntry>
+                            <ListEntry>idma-debug</ListEntry>
+                            <ListEntry>idma-debug-os</ListEntry>
+                            <ListEntry>idma-debug-xtos</ListEntry>
+                            <ListEntry>idma-os</ListEntry>
+                            <ListEntry>idma-xtos</ListEntry>
+                            <ListEntry>xtutil</ListEntry>
+                            <ListEntry>CppUTest</ListEntry>
+                            <ListEntry>CppUTestExt</ListEntry>
+                            <ListEntry>loader</ListEntry>
+                        </value>
+                    </StringListMapEntry>
+                </StringListMapOptions>
+                <LinkerSupport custom="true" key="-mlsp=" value="D:\workspace\Code\csi_dsp_firmware\LSP\min-rt_core0_stack_tcm1"/>
+            </LinkerOptions>
+        </BaseSettings>
+    </BuildSettings>
+</BuildTarget>

+ 108 - 0
.settings/targets/xtensa/Release_Core1.bts

@@ -0,0 +1,108 @@
+<?xml version="1.0" encoding="UTF-8" standalone="yes"?>
+<BuildTarget tool="xtensa" version="1.0">
+    <BuildSettings>
+        <BaseSettings path="project">
+            <PreprocessorOptions>
+                <StringListMapOptions>
+                    <StringListMapEntry>
+                        <key>Includes</key>
+                        <value flag="-I" inheritance="prepend">
+                            <ListEntry>${workspace_loc:CSI_DSP_FW/src/include}</ListEntry>
+                            <ListEntry>${workspace_loc:CSI_DSP_FW/test/include}</ListEntry>
+                            <ListEntry>${workspace_loc:CSI_DSP_FW/src/xrp-dsp/xrp-common}</ListEntry>
+                            <ListEntry>${workspace_loc:CSI_DSP_FW/src/driver/common}</ListEntry>
+                            <ListEntry>${workspace_loc:CSI_DSP_FW/src/algo}</ListEntry>
+                        </value>
+                    </StringListMapEntry>
+                    <StringListMapEntry>
+                        <key>UnDefines</key>
+                        <value flag="-U" inheritance="prepend">
+                            <ListEntry>DSP_IP_TEST</ListEntry>
+                            <ListEntry>TEST_RESULT_TO_BUFFER</ListEntry>
+                            <ListEntry>DSP_TEST</ListEntry>
+                            <ListEntry>_USE_TCM_ALLOCATE</ListEntry>
+                            <ListEntry>DSP_PROFILE_ENBALE</ListEntry>
+                        </value>
+                    </StringListMapEntry>
+                </StringListMapOptions>
+                <KeyValueListMapOptions>
+                    <KeyValueListMapEntry>
+                        <key>Defines</key>
+                        <value flag="-D" inheritance="append">
+                            <ListEntry key="__FILENAME__" value="&quot;$(subst $(dir $&lt;),,$&lt;)&quot;"/>
+                            <ListEntry key="DSP_IP_TEST" value=""/>
+                            <ListEntry key="TEST_RESULT_TO_BUFFER" value=""/>
+                            <ListEntry key="DEBUG" value=""/>
+                            <ListEntry key="DSP_TEST" value=""/>
+                            <ListEntry key="_USE_TCM_ALLOCATE" value=""/>
+                            <ListEntry key="DSP_PROFILE_ENBALE" value=""/>
+                            <ListEntry key="USE_SUBFUNC_OBJ" value=""/>
+                        </value>
+                    </KeyValueListMapEntry>
+                </KeyValueListMapOptions>
+            </PreprocessorOptions>
+            <CompilerOptions>
+                <SingleFlagMapOptions>
+                    <SingleFlagMapEntry>
+                        <key>EnableSIMD</key>
+                        <value flag="-LNO:simd" use="true"/>
+                    </SingleFlagMapEntry>
+                    <SingleFlagMapEntry>
+                        <key>CompilerVariant</key>
+                        <value flag="xt-clang" use="true"/>
+                    </SingleFlagMapEntry>
+                </SingleFlagMapOptions>
+                <FlagValueMapOptions>
+                    <FlagValueMapEntry>
+                        <key>Debug</key>
+                        <value level="-3" flag="-g" use="true"/>
+                    </FlagValueMapEntry>
+                    <FlagValueMapEntry>
+                        <key>Optimization</key>
+                        <value level="3" flag="-O" use="true"/>
+                    </FlagValueMapEntry>
+                </FlagValueMapOptions>
+            </CompilerOptions>
+            <LinkerOptions>
+                <BooleanMapOptions>
+                    <BooleanMapEntry>
+                        <key>CreateMinsize</key>
+                        <value selected="true"/>
+                    </BooleanMapEntry>
+                    <BooleanMapEntry>
+                        <key>GenerateMapFile</key>
+                        <value selected="true"/>
+                    </BooleanMapEntry>
+                </BooleanMapOptions>
+                <StringListMapOptions>
+                    <StringListMapEntry>
+                        <key>LibrarySearchPath</key>
+                        <value flag="-L" inheritance="prepend">
+                            <ListEntry>${workspace_loc:CSI_DSP_FW/test/lib}</ListEntry>
+                        </value>
+                    </StringListMapEntry>
+                    <StringListMapEntry>
+                        <key>LinkerAdditionalOptions</key>
+                        <value flag="" inheritance="append">
+                            <ListEntry>-Wl,--defsym,xrp_dsp_comm_base_magic=0x25000000</ListEntry>
+                        </value>
+                    </StringListMapEntry>
+                    <StringListMapEntry>
+                        <key>Libraries</key>
+                        <value flag="-l" inheritance="prepend">
+                            <ListEntry>idma-xtos</ListEntry>
+                            <ListEntry>idma-debug-xtos</ListEntry>
+                            <ListEntry>idma</ListEntry>
+                            <ListEntry>idma-debug</ListEntry>
+                            <ListEntry>xtutil</ListEntry>
+                            <ListEntry>CppUTest</ListEntry>
+                            <ListEntry>CppUTestExt</ListEntry>
+                            <ListEntry>loader</ListEntry>
+                        </value>
+                    </StringListMapEntry>
+                </StringListMapOptions>
+                <LinkerSupport custom="true" key="-mlsp=" value="D:\workspace\Code\csi_dsp_firmware\LSP\min-rt_core1_stack_tcm1"/>
+            </LinkerOptions>
+        </BaseSettings>
+    </BuildSettings>
+</BuildTarget>

+ 111 - 0
.settings/targets/xtensa/Release_Core1_FL.bts

@@ -0,0 +1,111 @@
+<?xml version="1.0" encoding="UTF-8" standalone="yes"?>
+<BuildTarget tool="xtensa" version="1.0">
+    <BuildSettings>
+        <BaseSettings path="project">
+            <PreprocessorOptions>
+                <StringListMapOptions>
+                    <StringListMapEntry>
+                        <key>Includes</key>
+                        <value flag="-I" inheritance="prepend">
+                            <ListEntry>${workspace_loc:CSI_DSP_FW/src/include}</ListEntry>
+                            <ListEntry>${workspace_loc:CSI_DSP_FW/test/include}</ListEntry>
+                            <ListEntry>${workspace_loc:CSI_DSP_FW/src/xrp-dsp/xrp-common}</ListEntry>
+                            <ListEntry>${workspace_loc:CSI_DSP_FW/src/driver/common}</ListEntry>
+                            <ListEntry>${workspace_loc:CSI_DSP_FW/src/algo}</ListEntry>
+                        </value>
+                    </StringListMapEntry>
+                    <StringListMapEntry>
+                        <key>UnDefines</key>
+                        <value flag="-U" inheritance="prepend">
+                            <ListEntry>DSP_IP_TEST</ListEntry>
+                            <ListEntry>TEST_RESULT_TO_BUFFER</ListEntry>
+                            <ListEntry>DSP_TEST</ListEntry>
+                            <ListEntry>_USE_TCM_ALLOCATE</ListEntry>
+                            <ListEntry>DSP_PROFILE_ENBALE</ListEntry>
+                        </value>
+                    </StringListMapEntry>
+                </StringListMapOptions>
+                <KeyValueListMapOptions>
+                    <KeyValueListMapEntry>
+                        <key>Defines</key>
+                        <value flag="-D" inheritance="append">
+                            <ListEntry key="__FILENAME__" value="&quot;$(subst $(dir $&lt;),,$&lt;)&quot;"/>
+                            <ListEntry key="DSP_IP_TEST" value=""/>
+                            <ListEntry key="TEST_RESULT_TO_BUFFER" value=""/>
+                            <ListEntry key="DEBUG" value=""/>
+                            <ListEntry key="DSP_TEST" value=""/>
+                            <ListEntry key="_USE_TCM_ALLOCATE" value=""/>
+                            <ListEntry key="DSP_PROFILE_ENBALE" value=""/>
+                            <ListEntry key="USE_FL_OBJ" value=""/>
+                            <ListEntry key="LOAD_LIB_OTF" value=""/>
+                        </value>
+                    </KeyValueListMapEntry>
+                </KeyValueListMapOptions>
+            </PreprocessorOptions>
+            <CompilerOptions>
+                <SingleFlagMapOptions>
+                    <SingleFlagMapEntry>
+                        <key>EnableSIMD</key>
+                        <value flag="-LNO:simd" use="true"/>
+                    </SingleFlagMapEntry>
+                    <SingleFlagMapEntry>
+                        <key>CompilerVariant</key>
+                        <value flag="xt-clang" use="true"/>
+                    </SingleFlagMapEntry>
+                </SingleFlagMapOptions>
+                <FlagValueMapOptions>
+                    <FlagValueMapEntry>
+                        <key>Debug</key>
+                        <value level="-3" flag="-g" use="true"/>
+                    </FlagValueMapEntry>
+                    <FlagValueMapEntry>
+                        <key>Optimization</key>
+                        <value level="3" flag="-O" use="true"/>
+                    </FlagValueMapEntry>
+                </FlagValueMapOptions>
+            </CompilerOptions>
+            <LinkerOptions>
+                <BooleanMapOptions>
+                    <BooleanMapEntry>
+                        <key>CreateMinsize</key>
+                        <value selected="true"/>
+                    </BooleanMapEntry>
+                    <BooleanMapEntry>
+                        <key>GenerateMapFile</key>
+                        <value selected="true"/>
+                    </BooleanMapEntry>
+                </BooleanMapOptions>
+                <StringListMapOptions>
+                    <StringListMapEntry>
+                        <key>LibrarySearchPath</key>
+                        <value flag="-L" inheritance="prepend">
+                            <ListEntry>${workspace_loc:CSI_DSP_FW/test/lib}</ListEntry>
+                        </value>
+                    </StringListMapEntry>
+                    <StringListMapEntry>
+                        <key>LinkerAdditionalOptions</key>
+                        <value flag="" inheritance="append">
+                            <ListEntry>-Wl,--defsym,xrp_dsp_comm_base_magic=0x25000000</ListEntry>
+                        </value>
+                    </StringListMapEntry>
+                    <StringListMapEntry>
+                        <key>Libraries</key>
+                        <value flag="-l" inheritance="prepend">
+                            <ListEntry>idma</ListEntry>
+                            <ListEntry>idma-debug</ListEntry>
+                            <ListEntry>idma-debug-os</ListEntry>
+                            <ListEntry>idma-debug-xtos</ListEntry>
+                            <ListEntry>idma-os</ListEntry>
+                            <ListEntry>idma-xtos</ListEntry>
+                            <ListEntry>xtutil</ListEntry>
+                            <ListEntry>CppUTest</ListEntry>
+                            <ListEntry>CppUTestExt</ListEntry>
+                            <ListEntry>loader</ListEntry>
+                        </value>
+                    </StringListMapEntry>
+                </StringListMapOptions>
+                <LinkerSupport custom="true" key="-mlsp=" value="D:\workspace\Code\csi_dsp_firmware\LSP\min-rt_core1_main_stack_tcm1"/>
+            </LinkerOptions>
+        </BaseSettings>
+    </BuildSettings>
+</BuildTarget>

+ 104 - 0
.settings/targets/xtensa/Release_Core1_PI.bts

@@ -0,0 +1,104 @@
+<?xml version="1.0" encoding="UTF-8" standalone="yes"?>
+<BuildTarget tool="xtensa" version="1.0">
+    <BuildSettings>
+        <BaseSettings path="project">
+            <PreprocessorOptions>
+                <StringListMapOptions>
+                    <StringListMapEntry>
+                        <key>Includes</key>
+                        <value flag="-I" inheritance="prepend">
+                            <ListEntry>${workspace_loc:CSI_DSP_FW/src/include}</ListEntry>
+                            <ListEntry>${workspace_loc:CSI_DSP_FW/test/include}</ListEntry>
+                            <ListEntry>${workspace_loc:CSI_DSP_FW/src/xrp-dsp/xrp-common}</ListEntry>
+                            <ListEntry>${workspace_loc:CSI_DSP_FW/src/driver/common}</ListEntry>
+                            <ListEntry>${workspace_loc:CSI_DSP_FW/src/algo}</ListEntry>
+                        </value>
+                    </StringListMapEntry>
+                    <StringListMapEntry>
+                        <key>UnDefines</key>
+                        <value flag="-U" inheritance="prepend">
+                            <ListEntry>DSP_IP_TEST</ListEntry>
+                            <ListEntry>TEST_RESULT_TO_BUFFER</ListEntry>
+                            <ListEntry>DSP_TEST</ListEntry>
+                            <ListEntry>DSP_PROFILE_ENBALE</ListEntry>
+                        </value>
+                    </StringListMapEntry>
+                </StringListMapOptions>
+                <KeyValueListMapOptions>
+                    <KeyValueListMapEntry>
+                        <key>Defines</key>
+                        <value flag="-D" inheritance="append">
+                            <ListEntry key="__FILENAME__" value="&quot;$(subst $(dir $&lt;),,$&lt;)&quot;"/>
+                            <ListEntry key="DSP_IP_TEST" value=""/>
+                            <ListEntry key="TEST_RESULT_TO_BUFFER" value=""/>
+                            <ListEntry key="DEBUG" value=""/>
+                            <ListEntry key="DSP_TEST" value=""/>
+                            <ListEntry key="_USE_TCM_ALLOCATE" value=""/>
+                            <ListEntry key="DSP_PROFILE_ENBALE" value=""/>
+                            <ListEntry key="USE_PI_OBJ" value=""/>
+                            <ListEntry key="LOAD_LIB_OTF" value=""/>
+                        </value>
+                    </KeyValueListMapEntry>
+                </KeyValueListMapOptions>
+            </PreprocessorOptions>
+            <CompilerOptions>
+                <SingleFlagMapOptions>
+                    <SingleFlagMapEntry>
+                        <key>EnableSIMD</key>
+                        <value flag="-LNO:simd" use="true"/>
+                    </SingleFlagMapEntry>
+                    <SingleFlagMapEntry>
+                        <key>CompilerVariant</key>
+                        <value flag="xt-clang" use="true"/>
+                    </SingleFlagMapEntry>
+                </SingleFlagMapOptions>
+                <FlagValueMapOptions>
+                    <FlagValueMapEntry>
+                        <key>Debug</key>
+                        <value level="-3" flag="-g" use="true"/>
+                    </FlagValueMapEntry>
+                    <FlagValueMapEntry>
+                        <key>Optimization</key>
+                        <value level="3" flag="-O" use="true"/>
+                    </FlagValueMapEntry>
+                </FlagValueMapOptions>
+            </CompilerOptions>
+            <LinkerOptions>
+                <BooleanMapOptions>
+                    <BooleanMapEntry>
+                        <key>CreateMinsize</key>
+                        <value selected="true"/>
+                    </BooleanMapEntry>
+                    <BooleanMapEntry>
+                        <key>GenerateMapFile</key>
+                        <value selected="true"/>
+                    </BooleanMapEntry>
+                </BooleanMapOptions>
+                <StringListMapOptions>
+                    <StringListMapEntry>
+                        <key>LibrarySearchPath</key>
+                        <value flag="-L" inheritance="prepend">
+                            <ListEntry>${workspace_loc:CSI_DSP_FW/test/lib}</ListEntry>
+                        </value>
+                    </StringListMapEntry>
+                    <StringListMapEntry>
+                        <key>Libraries</key>
+                        <value flag="-l" inheritance="prepend">
+                            <ListEntry>idma</ListEntry>
+                            <ListEntry>idma-debug</ListEntry>
+                            <ListEntry>idma-debug-os</ListEntry>
+                            <ListEntry>idma-debug-xtos</ListEntry>
+                            <ListEntry>idma-os</ListEntry>
+                            <ListEntry>idma-xtos</ListEntry>
+                            <ListEntry>xtutil</ListEntry>
+                            <ListEntry>CppUTest</ListEntry>
+                            <ListEntry>CppUTestExt</ListEntry>
+                            <ListEntry>loader</ListEntry>
+                        </value>
+                    </StringListMapEntry>
+                </StringListMapOptions>
+                <LinkerSupport custom="true" key="-mlsp=" value="D:\workspace\Code\csi_dsp_firmware\LSP\min-rt_core1_stack_tcm1"/>
+            </LinkerOptions>
+        </BaseSettings>
+    </BuildSettings>
+</BuildTarget>

+ 100 - 0
.settings/targets/xtensa/Release_FL.bts

@@ -0,0 +1,100 @@
+<?xml version="1.0" encoding="UTF-8" standalone="yes"?>
+<BuildTarget tool="xtensa" version="1.0">
+    <BuildSettings>
+        <BaseSettings path="project">
+            <PreprocessorOptions>
+                <StringListMapOptions>
+                    <StringListMapEntry>
+                        <key>Includes</key>
+                        <value flag="-I" inheritance="prepend">
+                            <ListEntry>${workspace_loc:CSI_DSP_FW/src/include}</ListEntry>
+                            <ListEntry>${workspace_loc:CSI_DSP_FW/test/include}</ListEntry>
+                            <ListEntry>${workspace_loc:CSI_DSP_FW/src/xrp-dsp/xrp-common}</ListEntry>
+                            <ListEntry>${workspace_loc:CSI_DSP_FW/src/driver/common}</ListEntry>
+                            <ListEntry>${workspace_loc:CSI_DSP_FW/src/algo}</ListEntry>
+                        </value>
+                    </StringListMapEntry>
+                    <StringListMapEntry>
+                        <key>UnDefines</key>
+                        <value flag="-U" inheritance="prepend">
+                            <ListEntry>DSP_IP_TEST</ListEntry>
+                            <ListEntry>TEST_RESULT_TO_BUFFER</ListEntry>
+                            <ListEntry>DSP_TEST</ListEntry>
+                            <ListEntry>_USE_TCM_ALLOCATE</ListEntry>
+                        </value>
+                    </StringListMapEntry>
+                </StringListMapOptions>
+                <KeyValueListMapOptions>
+                    <KeyValueListMapEntry>
+                        <key>Defines</key>
+                        <value flag="-D" inheritance="append">
+                            <ListEntry key="__FILENAME__" value="&quot;$(subst $(dir $&lt;),,$&lt;)&quot;"/>
+                            <ListEntry key="DSP_IP_TEST" value=""/>
+                            <ListEntry key="TEST_RESULT_TO_BUFFER" value=""/>
+                            <ListEntry key="DEBUG" value=""/>
+                            <ListEntry key="DSP_TEST" value=""/>
+                            <ListEntry key="_USE_TCM_ALLOCATE" value=""/>
+                            <ListEntry key="DSP_PROFILE_ENBALE" value=""/>
+                            <ListEntry key="USE_FL_OBJ" value=""/>
+                            <ListEntry key="LOAD_LIB_OTF" value=""/>
+                        </value>
+                    </KeyValueListMapEntry>
+                </KeyValueListMapOptions>
+            </PreprocessorOptions>
+            <CompilerOptions>
+                <SingleFlagMapOptions>
+                    <SingleFlagMapEntry>
+                        <key>EnableSIMD</key>
+                        <value flag="-LNO:simd" use="true"/>
+                    </SingleFlagMapEntry>
+                    <SingleFlagMapEntry>
+                        <key>CompilerVariant</key>
+                        <value flag="xt-clang" use="true"/>
+                    </SingleFlagMapEntry>
+                </SingleFlagMapOptions>
+                <FlagValueMapOptions>
+                    <FlagValueMapEntry>
+                        <key>Debug</key>
+                        <value level="-3" flag="-g" use="true"/>
+                    </FlagValueMapEntry>
+                </FlagValueMapOptions>
+            </CompilerOptions>
+            <LinkerOptions>
+                <BooleanMapOptions>
+                    <BooleanMapEntry>
+                        <key>CreateMinsize</key>
+                        <value selected="true"/>
+                    </BooleanMapEntry>
+                    <BooleanMapEntry>
+                        <key>GenerateMapFile</key>
+                        <value selected="true"/>
+                    </BooleanMapEntry>
+                </BooleanMapOptions>
+                <StringListMapOptions>
+                    <StringListMapEntry>
+                        <key>LibrarySearchPath</key>
+                        <value flag="-L" inheritance="prepend">
+                            <ListEntry>${workspace_loc:CSI_DSP_FW/test/lib}</ListEntry>
+                        </value>
+                    </StringListMapEntry>
+                    <StringListMapEntry>
+                        <key>Libraries</key>
+                        <value flag="-l" inheritance="prepend">
+                            <ListEntry>idma</ListEntry>
+                            <ListEntry>idma-debug</ListEntry>
+                            <ListEntry>idma-debug-os</ListEntry>
+                            <ListEntry>idma-debug-xtos</ListEntry>
+                            <ListEntry>idma-os</ListEntry>
+                            <ListEntry>idma-xtos</ListEntry>
+                            <ListEntry>xtutil</ListEntry>
+                            <ListEntry>CppUTest</ListEntry>
+                            <ListEntry>CppUTestExt</ListEntry>
+                            <ListEntry>loader</ListEntry>
+                        </value>
+                    </StringListMapEntry>
+                </StringListMapOptions>
+                <LinkerSupport custom="true" key="-mlsp=" value="C:\Users\DELL\workspace\CSI_DSP_FW\LSP\min-rt_main_core0_stack_tcm1_100K"/>
+            </LinkerOptions>
+        </BaseSettings>
+    </BuildSettings>
+</BuildTarget>

+ 99 - 0
.settings/targets/xtensa/Release_PI.bts

@@ -0,0 +1,99 @@
+<?xml version="1.0" encoding="UTF-8" standalone="yes"?>
+<BuildTarget tool="xtensa" version="1.0">
+    <BuildSettings>
+        <BaseSettings path="project">
+            <PreprocessorOptions>
+                <StringListMapOptions>
+                    <StringListMapEntry>
+                        <key>Includes</key>
+                        <value flag="-I" inheritance="prepend">
+                            <ListEntry>${workspace_loc:CSI_DSP_FW/src/include}</ListEntry>
+                            <ListEntry>${workspace_loc:CSI_DSP_FW/test/include}</ListEntry>
+                            <ListEntry>${workspace_loc:CSI_DSP_FW/src/xrp-dsp/xrp-common}</ListEntry>
+                            <ListEntry>${workspace_loc:CSI_DSP_FW/src/driver/common}</ListEntry>
+                            <ListEntry>${workspace_loc:CSI_DSP_FW/src/algo}</ListEntry>
+                        </value>
+                    </StringListMapEntry>
+                    <StringListMapEntry>
+                        <key>UnDefines</key>
+                        <value flag="-U" inheritance="prepend">
+                            <ListEntry>DSP_IP_TEST</ListEntry>
+                            <ListEntry>TEST_RESULT_TO_BUFFER</ListEntry>
+                            <ListEntry>DSP_TEST</ListEntry>
+                        </value>
+                    </StringListMapEntry>
+                </StringListMapOptions>
+                <KeyValueListMapOptions>
+                    <KeyValueListMapEntry>
+                        <key>Defines</key>
+                        <value flag="-D" inheritance="append">
+                            <ListEntry key="__FILENAME__" value="&quot;$(subst $(dir $&lt;),,$&lt;)&quot;"/>
+                            <ListEntry key="DSP_IP_TEST" value=""/>
+                            <ListEntry key="TEST_RESULT_TO_BUFFER" value=""/>
+                            <ListEntry key="DEBUG" value=""/>
+                            <ListEntry key="DSP_TEST" value=""/>
+                            <ListEntry key="_USE_TCM_ALLOCATE" value=""/>
+                            <ListEntry key="DSP_PROFILE_ENBALE" value=""/>
+                            <ListEntry key="USE_PI_OBJ" value=""/>
+                            <ListEntry key="LOAD_LIB_OTF" value=""/>
+                        </value>
+                    </KeyValueListMapEntry>
+                </KeyValueListMapOptions>
+            </PreprocessorOptions>
+            <CompilerOptions>
+                <SingleFlagMapOptions>
+                    <SingleFlagMapEntry>
+                        <key>EnableSIMD</key>
+                        <value flag="-LNO:simd" use="true"/>
+                    </SingleFlagMapEntry>
+                    <SingleFlagMapEntry>
+                        <key>CompilerVariant</key>
+                        <value flag="xt-clang" use="true"/>
+                    </SingleFlagMapEntry>
+                </SingleFlagMapOptions>
+                <FlagValueMapOptions>
+                    <FlagValueMapEntry>
+                        <key>Debug</key>
+                        <value level="-3" flag="-g" use="true"/>
+                    </FlagValueMapEntry>
+                </FlagValueMapOptions>
+            </CompilerOptions>
+            <LinkerOptions>
+                <BooleanMapOptions>
+                    <BooleanMapEntry>
+                        <key>CreateMinsize</key>
+                        <value selected="true"/>
+                    </BooleanMapEntry>
+                    <BooleanMapEntry>
+                        <key>GenerateMapFile</key>
+                        <value selected="true"/>
+                    </BooleanMapEntry>
+                </BooleanMapOptions>
+                <StringListMapOptions>
+                    <StringListMapEntry>
+                        <key>LibrarySearchPath</key>
+                        <value flag="-L" inheritance="prepend">
+                            <ListEntry>${workspace_loc:CSI_DSP_FW/test/lib}</ListEntry>
+                        </value>
+                    </StringListMapEntry>
+                    <StringListMapEntry>
+                        <key>Libraries</key>
+                        <value flag="-l" inheritance="prepend">
+                            <ListEntry>idma</ListEntry>
+                            <ListEntry>idma-debug</ListEntry>
+                            <ListEntry>idma-debug-os</ListEntry>
+                            <ListEntry>idma-debug-xtos</ListEntry>
+                            <ListEntry>idma-os</ListEntry>
+                            <ListEntry>idma-xtos</ListEntry>
+                            <ListEntry>xtutil</ListEntry>
+                            <ListEntry>CppUTest</ListEntry>
+                            <ListEntry>CppUTestExt</ListEntry>
+                            <ListEntry>loader</ListEntry>
+                        </value>
+                    </StringListMapEntry>
+                </StringListMapOptions>
+                <LinkerSupport custom="true" key="-mlsp=" value="C:\Users\DELL\workspace\CSI_DSP_FW\LSP\min-rt_0x24_core1_stact_tcm1"/>
+            </LinkerOptions>
+        </BaseSettings>
+    </BuildSettings>
+</BuildTarget>

+ 19 - 0
.xxproject

@@ -0,0 +1,19 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<xxProperties>
+<propertyGroup name="project.information">
+<version value="3.0"/>
+</propertyGroup>
+<propertyGroup name="build.property">
+<buildTarget defaultTarget="Debug"/>
+</propertyGroup>
+<propertyGroup name="build.exclusion.data">
+<buildExclusionDatas>
+<exclusionSet name="Default" selected="1">
+<excludedEntry data="/.*/bin/.*"/>
+</exclusionSet>
+</buildExclusionDatas>
+</propertyGroup>
+<propertyGroup name="build.auto.includes">
+<exportDirs autoConsumeDirs="true" includeDepDirs="true" mode="auto"/>
+</propertyGroup>
+</xxProperties>

BIN
CSI_DSP_LIB_DEMO.xws


+ 443 - 0
LSP/gdbio_core0_main_stack_tcm1/ldscripts/elf32xtensa.x

@@ -0,0 +1,443 @@
+/* This linker script generated from xt-genldscripts.tpp for LSP C:\Users\DELL\workspace\CSI_DSP_FW\LSP\min-rt_0x20_main_core0_stack_tcm1 */
+/* Linker Script for default link */
+MEMORY
+{
+  sram0_seg :                         	org = 0x20000000, len = 0x2000
+  sram1_seg :                         	org = 0x20002000, len = 0xFD8800
+  dram0_0_seg :                       	org = 0xE0180000, len = 0x7000
+  dram1_0_seg :                       	org = 0xE01A0000, len = 0x7000
+  local_sram_0_seg :                  	org = 0xFFA00000, len = 0x180000
+}
+
+PHDRS
+{
+  sram0_phdr PT_LOAD;
+  sram1_phdr PT_LOAD;
+  sram1_bss_phdr PT_LOAD;
+  dram0_0_phdr PT_LOAD;
+  dram0_0_bss_phdr PT_LOAD;
+  dram1_0_phdr PT_LOAD;
+  dram1_0_bss_phdr PT_LOAD;
+  local_sram_0_phdr PT_LOAD;
+  local_sram_0_bss_phdr PT_LOAD;
+}
+
+
+/*  Default entry point:  */
+ENTRY(_ResetVector)
+
+
+/*  Memory boundary addresses:  */
+_memmap_mem_sram_start = 0x20000000;
+_memmap_mem_sram_end   = 0x21000000;
+_memmap_mem_dram0_start = 0xe0180000;
+_memmap_mem_dram0_end   = 0xe01a0000;
+_memmap_mem_dram1_start = 0xe01a0000;
+_memmap_mem_dram1_end   = 0xe01c0000;
+_memmap_mem_local_sram_start = 0xffa00000;
+_memmap_mem_local_sram_end   = 0xffb80000;
+
+/*  Memory segment boundary addresses:  */
+_memmap_seg_sram0_start = 0x20000000;
+_memmap_seg_sram0_max   = 0x20002000;
+_memmap_seg_sram1_start = 0x20002000;
+_memmap_seg_sram1_max   = 0x20fda800;
+_memmap_seg_dram0_0_start = 0xe0180000;
+_memmap_seg_dram0_0_max   = 0xe0187000;
+_memmap_seg_dram1_0_start = 0xe01a0000;
+_memmap_seg_dram1_0_max   = 0xe01a7000;
+_memmap_seg_local_sram_0_start = 0xffa00000;
+_memmap_seg_local_sram_0_max   = 0xffb80000;
+
+_rom_store_table = 0;
+PROVIDE(_memmap_reset_vector = 0x20000000);
+PROVIDE(_memmap_vecbase_reset = 0x20000000);
+/* Various memory-map dependent cache attribute settings: */
+_memmap_cacheattr_wb_base = 0x10000010;
+_memmap_cacheattr_wt_base = 0x30000030;
+_memmap_cacheattr_bp_base = 0x40000040;
+_memmap_cacheattr_unused_mask = 0x0FFFFF0F;
+_memmap_cacheattr_wb_trapnull = 0x14441441;
+_memmap_cacheattr_wba_trapnull = 0x14444410;
+_memmap_cacheattr_wbna_trapnull = 0x24444420;
+_memmap_cacheattr_wt_trapnull = 0x34444430;
+_memmap_cacheattr_bp_trapnull = 0x44444440;
+_memmap_cacheattr_wb_strict = 0x10000010;
+_memmap_cacheattr_wt_strict = 0x30000030;
+_memmap_cacheattr_bp_strict = 0x40000040;
+_memmap_cacheattr_wb_allvalid = 0x14444414;
+_memmap_cacheattr_wt_allvalid = 0x34444434;
+_memmap_cacheattr_bp_allvalid = 0x44444444;
+_memmap_region_map = 0x00000082;
+PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
+
+SECTIONS
+{
+
+  .DispatchVector.text : ALIGN(4)
+  {
+    _DispatchVector_text_start = ABSOLUTE(.);
+    KEEP (*(.DispatchVector.text))
+    . = ALIGN (4);
+    _DispatchVector_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .ResetVector.text : ALIGN(4)
+  {
+    _ResetVector_text_start = ABSOLUTE(.);
+    *(.ResetVector.text)
+    . = ALIGN (4);
+    _ResetVector_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .ResetHandler.text : ALIGN(4)
+  {
+    _ResetHandler_text_start = ABSOLUTE(.);
+    *(.ResetHandler.literal .ResetHandler.text)
+    . = ALIGN (4);
+    _ResetHandler_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .DispatchHandler.text : ALIGN(4)
+  {
+    _DispatchHandler_text_start = ABSOLUTE(.);
+    *(.DispatchHandler.literal .DispatchHandler.text)
+    . = ALIGN (4);
+    _DispatchHandler_text_end = ABSOLUTE(.);
+    _memmap_seg_sram0_end = ALIGN(0x8);
+  } >sram0_seg :sram0_phdr
+
+
+  .sram.rodata : ALIGN(4)
+  {
+    _sram_rodata_start = ABSOLUTE(.);
+    *(.sram.rodata)
+    . = ALIGN (4);
+    _sram_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.rodata : ALIGN(4)
+  {
+    _clib_rodata_start = ABSOLUTE(.);
+    *(.clib.rodata)
+    . = ALIGN (4);
+    _clib_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.rodata : ALIGN(4)
+  {
+    _rtos_rodata_start = ABSOLUTE(.);
+    *(.rtos.rodata)
+    . = ALIGN (4);
+    _rtos_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rodata : ALIGN(4)
+  {
+    _rodata_start = ABSOLUTE(.);
+    *(.rodata)
+    *(SORT(.rodata.sort.*))
+    KEEP (*(SORT(.rodata.keepsort.*) .rodata.keep.*))
+    *(.rodata.*)
+    *(.gnu.linkonce.r.*)
+    *(.rodata1)
+    __XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
+    KEEP (*(.xt_except_table))
+    KEEP (*(.gcc_except_table))
+    *(.gnu.linkonce.e.*)
+    *(.gnu.version_r)
+    KEEP (*(.eh_frame))
+    /*  C++ constructor and destructor tables, properly ordered:  */
+    KEEP (*crtbegin.o(.ctors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*(.ctors))
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*(.dtors))
+    /*  C++ exception handlers table:  */
+    __XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
+    *(.xt_except_desc)
+    *(.gnu.linkonce.h.*)
+    __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
+    *(.xt_except_desc_end)
+    *(.dynamic)
+    *(.gnu.version_d)
+    . = ALIGN(4);		/* this table MUST be 4-byte aligned */
+    _bss_table_start = ABSOLUTE(.);
+    LONG(_bss_start)
+    LONG(_bss_end)
+    LONG(_dram0_bss_start)
+    LONG(_dram0_bss_end)
+    LONG(_dram1_bss_start)
+    LONG(_dram1_bss_end)
+    LONG(_local_sram_bss_start)
+    LONG(_local_sram_bss_end)
+    _bss_table_end = ABSOLUTE(.);
+    . = ALIGN (4);
+    _rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .sram.text : ALIGN(4)
+  {
+    _sram_text_start = ABSOLUTE(.);
+    *(.sram.literal .sram.text)
+    . = ALIGN (4);
+    _sram_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .text : ALIGN(4)
+  {
+    _stext = .;
+    _text_start = ABSOLUTE(.);
+    *(.entry.text)
+    *(.init.literal)
+    KEEP(*(.init))
+    *(.literal.sort.* SORT(.text.sort.*))
+    KEEP (*(.literal.keepsort.* SORT(.text.keepsort.*) .literal.keep.* .text.keep.* .literal.*personality* .text.*personality*))
+    *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
+    *(.fini.literal)
+    KEEP(*(.fini))
+    *(.gnu.version)
+    . = ALIGN (4);
+    _text_end = ABSOLUTE(.);
+    _etext = .;
+  } >sram1_seg :sram1_phdr
+
+  .clib.text : ALIGN(4)
+  {
+    _clib_text_start = ABSOLUTE(.);
+    *(.clib.literal .clib.text)
+    . = ALIGN (4);
+    _clib_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.text : ALIGN(4)
+  {
+    _rtos_text_start = ABSOLUTE(.);
+    *(.rtos.literal .rtos.text)
+    . = ALIGN (4);
+    _rtos_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.data : ALIGN(4)
+  {
+    _clib_data_start = ABSOLUTE(.);
+    *(.clib.data)
+    . = ALIGN (4);
+    _clib_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.percpu.data : ALIGN(4)
+  {
+    _clib_percpu_data_start = ABSOLUTE(.);
+    *(.clib.percpu.data)
+    . = ALIGN (4);
+    _clib_percpu_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.percpu.data : ALIGN(4)
+  {
+    _rtos_percpu_data_start = ABSOLUTE(.);
+    *(.rtos.percpu.data)
+    . = ALIGN (4);
+    _rtos_percpu_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.data : ALIGN(4)
+  {
+    _rtos_data_start = ABSOLUTE(.);
+    *(.rtos.data)
+    . = ALIGN (4);
+    _rtos_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .sram.data : ALIGN(4)
+  {
+    _sram_data_start = ABSOLUTE(.);
+    *(.sram.data)
+    . = ALIGN (4);
+    _sram_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .data : ALIGN(4)
+  {
+    _data_start = ABSOLUTE(.);
+    *(.data)
+    *(SORT(.data.sort.*))
+    KEEP (*(SORT(.data.keepsort.*) .data.keep.*))
+    *(.data.*)
+    *(.gnu.linkonce.d.*)
+    KEEP(*(.gnu.linkonce.d.*personality*))
+    *(.data1)
+    *(.sdata)
+    *(.sdata.*)
+    *(.gnu.linkonce.s.*)
+    *(.sdata2)
+    *(.sdata2.*)
+    *(.gnu.linkonce.s2.*)
+    KEEP(*(.jcr))
+    *(__llvm_prf_cnts)
+    *(__llvm_prf_data)
+    *(__llvm_prf_vnds)
+    . = ALIGN (4);
+    _data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  __llvm_prf_names : ALIGN(4)
+  {
+    __llvm_prf_names_start = ABSOLUTE(.);
+    *(__llvm_prf_names)
+    . = ALIGN (4);
+    __llvm_prf_names_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _bss_start = ABSOLUTE(.);
+    *(.dynsbss)
+    *(.sbss)
+    *(.sbss.*)
+    *(.gnu.linkonce.sb.*)
+    *(.scommon)
+    *(.sbss2)
+    *(.sbss2.*)
+    *(.gnu.linkonce.sb2.*)
+    *(.dynbss)
+    *(.bss)
+    *(SORT(.bss.sort.*))
+    KEEP (*(SORT(.bss.keepsort.*) .bss.keep.*))
+    *(.bss.*)
+    *(.gnu.linkonce.b.*)
+    *(COMMON)
+    *(.clib.bss)
+    *(.clib.percpu.bss)
+    *(.rtos.percpu.bss)
+    *(.rtos.bss)
+    *(.sram.bss)
+    *(.debug.bss)
+    . = ALIGN (8);
+    _bss_end = ABSOLUTE(.);
+    _end = ALIGN(0x8);
+    PROVIDE(end = ALIGN(0x8));
+    _memmap_seg_sram1_end = ALIGN(0x8);
+  } >sram1_seg :sram1_bss_phdr
+
+  _heap_sentry = 0x20fda800;
+  _memmap_mem_sram_max = ABSOLUTE(.);
+
+  .dram0.rodata : ALIGN(4)
+  {
+    _dram0_rodata_start = ABSOLUTE(.);
+    *(.dram0.rodata)
+    . = ALIGN (4);
+    _dram0_rodata_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.data : ALIGN(4)
+  {
+    _dram0_data_start = ABSOLUTE(.);
+    *(.dram0.data)
+    . = ALIGN (4);
+    _dram0_data_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dram0_bss_start = ABSOLUTE(.);
+    *(.dram0.bss)
+    *(.dram0_user.bss)
+    . = ALIGN (8);
+    _dram0_bss_end = ABSOLUTE(.);
+    _memmap_seg_dram0_0_end = ALIGN(0x8);
+  } >dram0_0_seg :dram0_0_bss_phdr
+
+  _memmap_mem_dram0_max = ABSOLUTE(.);
+
+  .dram1.rodata : ALIGN(4)
+  {
+    _dram1_rodata_start = ABSOLUTE(.);
+    *(.dram1.rodata)
+    . = ALIGN (4);
+    _dram1_rodata_end = ABSOLUTE(.);
+  } >dram1_0_seg :dram1_0_phdr
+
+  .dram1.data : ALIGN(4)
+  {
+    _dram1_data_start = ABSOLUTE(.);
+    *(.dram1.data)
+    . = ALIGN (4);
+    _dram1_data_end = ABSOLUTE(.);
+  } >dram1_0_seg :dram1_0_phdr
+
+  .dram1.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dram1_bss_start = ABSOLUTE(.);
+    *(.dram1.bss)
+    *(.dram1_user.bss)
+    . = ALIGN (8);
+    _dram1_bss_end = ABSOLUTE(.);
+    _stack_sentry = ALIGN(0x8);
+    _memmap_seg_dram1_0_end = ALIGN(0x8);
+  } >dram1_0_seg :dram1_0_bss_phdr
+
+  PROVIDE(__stack = 0xe01a7000);
+  _memmap_mem_dram1_max = ABSOLUTE(.);
+
+  .local_sram.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _local_sram_bss_start = ABSOLUTE(.);
+    *(.local_sram.bss)
+    . = ALIGN (8);
+    _local_sram_bss_end = ABSOLUTE(.);
+    _memmap_seg_local_sram_0_end = ALIGN(0x8);
+  } >local_sram_0_seg :local_sram_0_bss_phdr
+
+
+  _memmap_mem_local_sram_max = ABSOLUTE(.);
+
+  .debug  0 :  { *(.debug) }
+  .line  0 :  { *(.line) }
+  .debug_srcinfo  0 :  { *(.debug_srcinfo) }
+  .debug_sfnames  0 :  { *(.debug_sfnames) }
+  .debug_aranges  0 :  { *(.debug_aranges) }
+  .debug_pubnames  0 :  { *(.debug_pubnames) }
+  .debug_info  0 :  { *(.debug_info) }
+  .debug_abbrev  0 :  { *(.debug_abbrev) }
+  .debug_line  0 :  { *(.debug_line) }
+  .debug_frame  0 :  { *(.debug_frame) }
+  .debug_str  0 :  { *(.debug_str) }
+  .debug_loc  0 :  { *(.debug_loc) }
+  .debug_macinfo  0 :  { *(.debug_macinfo) }
+  .debug_weaknames  0 :  { *(.debug_weaknames) }
+  .debug_funcnames  0 :  { *(.debug_funcnames) }
+  .debug_typenames  0 :  { *(.debug_typenames) }
+  .debug_varnames  0 :  { *(.debug_varnames) }
+  .xt.insn 0 :
+  {
+    KEEP (*(.xt.insn))
+    KEEP (*(.gnu.linkonce.x.*))
+  }
+  .xt.prop 0 :
+  {
+    KEEP (*(.xt.prop))
+    KEEP (*(.xt.prop.*))
+    KEEP (*(.gnu.linkonce.prop.*))
+  }
+  .xt.lit 0 :
+  {
+    KEEP (*(.xt.lit))
+    KEEP (*(.xt.lit.*))
+    KEEP (*(.gnu.linkonce.p.*))
+  }
+  .debug.xt.callgraph 0 :
+  {
+    KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
+  }
+}
+

+ 443 - 0
LSP/gdbio_core0_main_stack_tcm1/ldscripts/elf32xtensa.xbn

@@ -0,0 +1,443 @@
+/* This linker script generated from xt-genldscripts.tpp for LSP C:\Users\DELL\workspace\CSI_DSP_FW\LSP\min-rt_0x20_main_core0_stack_tcm1 */
+/* Linker Script for ld -N */
+MEMORY
+{
+  sram0_seg :                         	org = 0x20000000, len = 0x2000
+  sram1_seg :                         	org = 0x20002000, len = 0xFD8800
+  dram0_0_seg :                       	org = 0xE0180000, len = 0x7000
+  dram1_0_seg :                       	org = 0xE01A0000, len = 0x7000
+  local_sram_0_seg :                  	org = 0xFFA00000, len = 0x180000
+}
+
+PHDRS
+{
+  sram0_phdr PT_LOAD;
+  sram1_phdr PT_LOAD;
+  sram1_bss_phdr PT_LOAD;
+  dram0_0_phdr PT_LOAD;
+  dram0_0_bss_phdr PT_LOAD;
+  dram1_0_phdr PT_LOAD;
+  dram1_0_bss_phdr PT_LOAD;
+  local_sram_0_phdr PT_LOAD;
+  local_sram_0_bss_phdr PT_LOAD;
+}
+
+
+/*  Default entry point:  */
+ENTRY(_ResetVector)
+
+
+/*  Memory boundary addresses:  */
+_memmap_mem_sram_start = 0x20000000;
+_memmap_mem_sram_end   = 0x21000000;
+_memmap_mem_dram0_start = 0xe0180000;
+_memmap_mem_dram0_end   = 0xe01a0000;
+_memmap_mem_dram1_start = 0xe01a0000;
+_memmap_mem_dram1_end   = 0xe01c0000;
+_memmap_mem_local_sram_start = 0xffa00000;
+_memmap_mem_local_sram_end   = 0xffb80000;
+
+/*  Memory segment boundary addresses:  */
+_memmap_seg_sram0_start = 0x20000000;
+_memmap_seg_sram0_max   = 0x20002000;
+_memmap_seg_sram1_start = 0x20002000;
+_memmap_seg_sram1_max   = 0x20fda800;
+_memmap_seg_dram0_0_start = 0xe0180000;
+_memmap_seg_dram0_0_max   = 0xe0187000;
+_memmap_seg_dram1_0_start = 0xe01a0000;
+_memmap_seg_dram1_0_max   = 0xe01a7000;
+_memmap_seg_local_sram_0_start = 0xffa00000;
+_memmap_seg_local_sram_0_max   = 0xffb80000;
+
+_rom_store_table = 0;
+PROVIDE(_memmap_reset_vector = 0x20000000);
+PROVIDE(_memmap_vecbase_reset = 0x20000000);
+/* Various memory-map dependent cache attribute settings: */
+_memmap_cacheattr_wb_base = 0x10000010;
+_memmap_cacheattr_wt_base = 0x30000030;
+_memmap_cacheattr_bp_base = 0x40000040;
+_memmap_cacheattr_unused_mask = 0x0FFFFF0F;
+_memmap_cacheattr_wb_trapnull = 0x14444410;
+_memmap_cacheattr_wba_trapnull = 0x14444410;
+_memmap_cacheattr_wbna_trapnull = 0x24444420;
+_memmap_cacheattr_wt_trapnull = 0x34444430;
+_memmap_cacheattr_bp_trapnull = 0x44444440;
+_memmap_cacheattr_wb_strict = 0x10000010;
+_memmap_cacheattr_wt_strict = 0x30000030;
+_memmap_cacheattr_bp_strict = 0x40000040;
+_memmap_cacheattr_wb_allvalid = 0x14444414;
+_memmap_cacheattr_wt_allvalid = 0x34444434;
+_memmap_cacheattr_bp_allvalid = 0x44444444;
+_memmap_region_map = 0x00000082;
+PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
+
+SECTIONS
+{
+
+  .DispatchVector.text : ALIGN(4)
+  {
+    _DispatchVector_text_start = ABSOLUTE(.);
+    KEEP (*(.DispatchVector.text))
+    . = ALIGN (4);
+    _DispatchVector_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .ResetVector.text : ALIGN(4)
+  {
+    _ResetVector_text_start = ABSOLUTE(.);
+    *(.ResetVector.text)
+    . = ALIGN (4);
+    _ResetVector_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .ResetHandler.text : ALIGN(4)
+  {
+    _ResetHandler_text_start = ABSOLUTE(.);
+    *(.ResetHandler.literal .ResetHandler.text)
+    . = ALIGN (4);
+    _ResetHandler_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .DispatchHandler.text : ALIGN(4)
+  {
+    _DispatchHandler_text_start = ABSOLUTE(.);
+    *(.DispatchHandler.literal .DispatchHandler.text)
+    . = ALIGN (4);
+    _DispatchHandler_text_end = ABSOLUTE(.);
+    _memmap_seg_sram0_end = ALIGN(0x8);
+  } >sram0_seg :sram0_phdr
+
+
+  .sram.rodata : ALIGN(4)
+  {
+    _sram_rodata_start = ABSOLUTE(.);
+    *(.sram.rodata)
+    . = ALIGN (4);
+    _sram_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.rodata : ALIGN(4)
+  {
+    _clib_rodata_start = ABSOLUTE(.);
+    *(.clib.rodata)
+    . = ALIGN (4);
+    _clib_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.rodata : ALIGN(4)
+  {
+    _rtos_rodata_start = ABSOLUTE(.);
+    *(.rtos.rodata)
+    . = ALIGN (4);
+    _rtos_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rodata : ALIGN(4)
+  {
+    _rodata_start = ABSOLUTE(.);
+    *(.rodata)
+    *(SORT(.rodata.sort.*))
+    KEEP (*(SORT(.rodata.keepsort.*) .rodata.keep.*))
+    *(.rodata.*)
+    *(.gnu.linkonce.r.*)
+    *(.rodata1)
+    __XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
+    KEEP (*(.xt_except_table))
+    KEEP (*(.gcc_except_table))
+    *(.gnu.linkonce.e.*)
+    *(.gnu.version_r)
+    KEEP (*(.eh_frame))
+    /*  C++ constructor and destructor tables, properly ordered:  */
+    KEEP (*crtbegin.o(.ctors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*(.ctors))
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*(.dtors))
+    /*  C++ exception handlers table:  */
+    __XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
+    *(.xt_except_desc)
+    *(.gnu.linkonce.h.*)
+    __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
+    *(.xt_except_desc_end)
+    *(.dynamic)
+    *(.gnu.version_d)
+    . = ALIGN(4);		/* this table MUST be 4-byte aligned */
+    _bss_table_start = ABSOLUTE(.);
+    LONG(_bss_start)
+    LONG(_bss_end)
+    LONG(_dram0_bss_start)
+    LONG(_dram0_bss_end)
+    LONG(_dram1_bss_start)
+    LONG(_dram1_bss_end)
+    LONG(_local_sram_bss_start)
+    LONG(_local_sram_bss_end)
+    _bss_table_end = ABSOLUTE(.);
+    . = ALIGN (4);
+    _rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .sram.text : ALIGN(4)
+  {
+    _sram_text_start = ABSOLUTE(.);
+    *(.sram.literal .sram.text)
+    . = ALIGN (4);
+    _sram_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .text : ALIGN(4)
+  {
+    _stext = .;
+    _text_start = ABSOLUTE(.);
+    *(.entry.text)
+    *(.init.literal)
+    KEEP(*(.init))
+    *(.literal.sort.* SORT(.text.sort.*))
+    KEEP (*(.literal.keepsort.* SORT(.text.keepsort.*) .literal.keep.* .text.keep.* .literal.*personality* .text.*personality*))
+    *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
+    *(.fini.literal)
+    KEEP(*(.fini))
+    *(.gnu.version)
+    . = ALIGN (4);
+    _text_end = ABSOLUTE(.);
+    _etext = .;
+  } >sram1_seg :sram1_phdr
+
+  .clib.text : ALIGN(4)
+  {
+    _clib_text_start = ABSOLUTE(.);
+    *(.clib.literal .clib.text)
+    . = ALIGN (4);
+    _clib_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.text : ALIGN(4)
+  {
+    _rtos_text_start = ABSOLUTE(.);
+    *(.rtos.literal .rtos.text)
+    . = ALIGN (4);
+    _rtos_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.data : ALIGN(4)
+  {
+    _clib_data_start = ABSOLUTE(.);
+    *(.clib.data)
+    . = ALIGN (4);
+    _clib_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.percpu.data : ALIGN(4)
+  {
+    _clib_percpu_data_start = ABSOLUTE(.);
+    *(.clib.percpu.data)
+    . = ALIGN (4);
+    _clib_percpu_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.percpu.data : ALIGN(4)
+  {
+    _rtos_percpu_data_start = ABSOLUTE(.);
+    *(.rtos.percpu.data)
+    . = ALIGN (4);
+    _rtos_percpu_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.data : ALIGN(4)
+  {
+    _rtos_data_start = ABSOLUTE(.);
+    *(.rtos.data)
+    . = ALIGN (4);
+    _rtos_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .sram.data : ALIGN(4)
+  {
+    _sram_data_start = ABSOLUTE(.);
+    *(.sram.data)
+    . = ALIGN (4);
+    _sram_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .data : ALIGN(4)
+  {
+    _data_start = ABSOLUTE(.);
+    *(.data)
+    *(SORT(.data.sort.*))
+    KEEP (*(SORT(.data.keepsort.*) .data.keep.*))
+    *(.data.*)
+    *(.gnu.linkonce.d.*)
+    KEEP(*(.gnu.linkonce.d.*personality*))
+    *(.data1)
+    *(.sdata)
+    *(.sdata.*)
+    *(.gnu.linkonce.s.*)
+    *(.sdata2)
+    *(.sdata2.*)
+    *(.gnu.linkonce.s2.*)
+    KEEP(*(.jcr))
+    *(__llvm_prf_cnts)
+    *(__llvm_prf_data)
+    *(__llvm_prf_vnds)
+    . = ALIGN (4);
+    _data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  __llvm_prf_names : ALIGN(4)
+  {
+    __llvm_prf_names_start = ABSOLUTE(.);
+    *(__llvm_prf_names)
+    . = ALIGN (4);
+    __llvm_prf_names_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _bss_start = ABSOLUTE(.);
+    *(.dynsbss)
+    *(.sbss)
+    *(.sbss.*)
+    *(.gnu.linkonce.sb.*)
+    *(.scommon)
+    *(.sbss2)
+    *(.sbss2.*)
+    *(.gnu.linkonce.sb2.*)
+    *(.dynbss)
+    *(.bss)
+    *(SORT(.bss.sort.*))
+    KEEP (*(SORT(.bss.keepsort.*) .bss.keep.*))
+    *(.bss.*)
+    *(.gnu.linkonce.b.*)
+    *(COMMON)
+    *(.clib.bss)
+    *(.clib.percpu.bss)
+    *(.rtos.percpu.bss)
+    *(.rtos.bss)
+    *(.sram.bss)
+    *(.debug.bss)
+    . = ALIGN (8);
+    _bss_end = ABSOLUTE(.);
+    _end = ALIGN(0x8);
+    PROVIDE(end = ALIGN(0x8));
+    _memmap_seg_sram1_end = ALIGN(0x8);
+  } >sram1_seg :sram1_bss_phdr
+
+  _heap_sentry = 0x20fda800;
+  _memmap_mem_sram_max = ABSOLUTE(.);
+
+  .dram0.rodata : ALIGN(4)
+  {
+    _dram0_rodata_start = ABSOLUTE(.);
+    *(.dram0.rodata)
+    . = ALIGN (4);
+    _dram0_rodata_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.data : ALIGN(4)
+  {
+    _dram0_data_start = ABSOLUTE(.);
+    *(.dram0.data)
+    . = ALIGN (4);
+    _dram0_data_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dram0_bss_start = ABSOLUTE(.);
+    *(.dram0.bss)
+    *(.dram0_user.bss)
+    . = ALIGN (8);
+    _dram0_bss_end = ABSOLUTE(.);
+    _memmap_seg_dram0_0_end = ALIGN(0x8);
+  } >dram0_0_seg :dram0_0_bss_phdr
+
+  _memmap_mem_dram0_max = ABSOLUTE(.);
+
+  .dram1.rodata : ALIGN(4)
+  {
+    _dram1_rodata_start = ABSOLUTE(.);
+    *(.dram1.rodata)
+    . = ALIGN (4);
+    _dram1_rodata_end = ABSOLUTE(.);
+  } >dram1_0_seg :dram1_0_phdr
+
+  .dram1.data : ALIGN(4)
+  {
+    _dram1_data_start = ABSOLUTE(.);
+    *(.dram1.data)
+    . = ALIGN (4);
+    _dram1_data_end = ABSOLUTE(.);
+  } >dram1_0_seg :dram1_0_phdr
+
+  .dram1.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dram1_bss_start = ABSOLUTE(.);
+    *(.dram1.bss)
+    *(.dram1_user.bss)
+    . = ALIGN (8);
+    _dram1_bss_end = ABSOLUTE(.);
+    _stack_sentry = ALIGN(0x8);
+    _memmap_seg_dram1_0_end = ALIGN(0x8);
+  } >dram1_0_seg :dram1_0_bss_phdr
+
+  PROVIDE(__stack = 0xe01a7000);
+  _memmap_mem_dram1_max = ABSOLUTE(.);
+
+  .local_sram.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _local_sram_bss_start = ABSOLUTE(.);
+    *(.local_sram.bss)
+    . = ALIGN (8);
+    _local_sram_bss_end = ABSOLUTE(.);
+    _memmap_seg_local_sram_0_end = ALIGN(0x8);
+  } >local_sram_0_seg :local_sram_0_bss_phdr
+
+
+  _memmap_mem_local_sram_max = ABSOLUTE(.);
+
+  .debug  0 :  { *(.debug) }
+  .line  0 :  { *(.line) }
+  .debug_srcinfo  0 :  { *(.debug_srcinfo) }
+  .debug_sfnames  0 :  { *(.debug_sfnames) }
+  .debug_aranges  0 :  { *(.debug_aranges) }
+  .debug_pubnames  0 :  { *(.debug_pubnames) }
+  .debug_info  0 :  { *(.debug_info) }
+  .debug_abbrev  0 :  { *(.debug_abbrev) }
+  .debug_line  0 :  { *(.debug_line) }
+  .debug_frame  0 :  { *(.debug_frame) }
+  .debug_str  0 :  { *(.debug_str) }
+  .debug_loc  0 :  { *(.debug_loc) }
+  .debug_macinfo  0 :  { *(.debug_macinfo) }
+  .debug_weaknames  0 :  { *(.debug_weaknames) }
+  .debug_funcnames  0 :  { *(.debug_funcnames) }
+  .debug_typenames  0 :  { *(.debug_typenames) }
+  .debug_varnames  0 :  { *(.debug_varnames) }
+  .xt.insn 0 :
+  {
+    KEEP (*(.xt.insn))
+    KEEP (*(.gnu.linkonce.x.*))
+  }
+  .xt.prop 0 :
+  {
+    KEEP (*(.xt.prop))
+    KEEP (*(.xt.prop.*))
+    KEEP (*(.gnu.linkonce.prop.*))
+  }
+  .xt.lit 0 :
+  {
+    KEEP (*(.xt.lit))
+    KEEP (*(.xt.lit.*))
+    KEEP (*(.gnu.linkonce.p.*))
+  }
+  .debug.xt.callgraph 0 :
+  {
+    KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
+  }
+}
+

+ 443 - 0
LSP/gdbio_core0_main_stack_tcm1/ldscripts/elf32xtensa.xn

@@ -0,0 +1,443 @@
+/* This linker script generated from xt-genldscripts.tpp for LSP C:\Users\DELL\workspace\CSI_DSP_FW\LSP\min-rt_0x20_main_core0_stack_tcm1 */
+/* Linker Script for ld -n */
+MEMORY
+{
+  sram0_seg :                         	org = 0x20000000, len = 0x2000
+  sram1_seg :                         	org = 0x20002000, len = 0xFD8800
+  dram0_0_seg :                       	org = 0xE0180000, len = 0x7000
+  dram1_0_seg :                       	org = 0xE01A0000, len = 0x7000
+  local_sram_0_seg :                  	org = 0xFFA00000, len = 0x180000
+}
+
+PHDRS
+{
+  sram0_phdr PT_LOAD;
+  sram1_phdr PT_LOAD;
+  sram1_bss_phdr PT_LOAD;
+  dram0_0_phdr PT_LOAD;
+  dram0_0_bss_phdr PT_LOAD;
+  dram1_0_phdr PT_LOAD;
+  dram1_0_bss_phdr PT_LOAD;
+  local_sram_0_phdr PT_LOAD;
+  local_sram_0_bss_phdr PT_LOAD;
+}
+
+
+/*  Default entry point:  */
+ENTRY(_ResetVector)
+
+
+/*  Memory boundary addresses:  */
+_memmap_mem_sram_start = 0x20000000;
+_memmap_mem_sram_end   = 0x21000000;
+_memmap_mem_dram0_start = 0xe0180000;
+_memmap_mem_dram0_end   = 0xe01a0000;
+_memmap_mem_dram1_start = 0xe01a0000;
+_memmap_mem_dram1_end   = 0xe01c0000;
+_memmap_mem_local_sram_start = 0xffa00000;
+_memmap_mem_local_sram_end   = 0xffb80000;
+
+/*  Memory segment boundary addresses:  */
+_memmap_seg_sram0_start = 0x20000000;
+_memmap_seg_sram0_max   = 0x20002000;
+_memmap_seg_sram1_start = 0x20002000;
+_memmap_seg_sram1_max   = 0x20fda800;
+_memmap_seg_dram0_0_start = 0xe0180000;
+_memmap_seg_dram0_0_max   = 0xe0187000;
+_memmap_seg_dram1_0_start = 0xe01a0000;
+_memmap_seg_dram1_0_max   = 0xe01a7000;
+_memmap_seg_local_sram_0_start = 0xffa00000;
+_memmap_seg_local_sram_0_max   = 0xffb80000;
+
+_rom_store_table = 0;
+PROVIDE(_memmap_reset_vector = 0x20000000);
+PROVIDE(_memmap_vecbase_reset = 0x20000000);
+/* Various memory-map dependent cache attribute settings: */
+_memmap_cacheattr_wb_base = 0x10000010;
+_memmap_cacheattr_wt_base = 0x30000030;
+_memmap_cacheattr_bp_base = 0x40000040;
+_memmap_cacheattr_unused_mask = 0x0FFFFF0F;
+_memmap_cacheattr_wb_trapnull = 0x14444410;
+_memmap_cacheattr_wba_trapnull = 0x14444410;
+_memmap_cacheattr_wbna_trapnull = 0x24444420;
+_memmap_cacheattr_wt_trapnull = 0x34444430;
+_memmap_cacheattr_bp_trapnull = 0x44444440;
+_memmap_cacheattr_wb_strict = 0x10000010;
+_memmap_cacheattr_wt_strict = 0x30000030;
+_memmap_cacheattr_bp_strict = 0x40000040;
+_memmap_cacheattr_wb_allvalid = 0x14444414;
+_memmap_cacheattr_wt_allvalid = 0x34444434;
+_memmap_cacheattr_bp_allvalid = 0x44444444;
+_memmap_region_map = 0x00000082;
+PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
+
+SECTIONS
+{
+
+  .DispatchVector.text : ALIGN(4)
+  {
+    _DispatchVector_text_start = ABSOLUTE(.);
+    KEEP (*(.DispatchVector.text))
+    . = ALIGN (4);
+    _DispatchVector_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .ResetVector.text : ALIGN(4)
+  {
+    _ResetVector_text_start = ABSOLUTE(.);
+    *(.ResetVector.text)
+    . = ALIGN (4);
+    _ResetVector_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .ResetHandler.text : ALIGN(4)
+  {
+    _ResetHandler_text_start = ABSOLUTE(.);
+    *(.ResetHandler.literal .ResetHandler.text)
+    . = ALIGN (4);
+    _ResetHandler_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .DispatchHandler.text : ALIGN(4)
+  {
+    _DispatchHandler_text_start = ABSOLUTE(.);
+    *(.DispatchHandler.literal .DispatchHandler.text)
+    . = ALIGN (4);
+    _DispatchHandler_text_end = ABSOLUTE(.);
+    _memmap_seg_sram0_end = ALIGN(0x8);
+  } >sram0_seg :sram0_phdr
+
+
+  .sram.rodata : ALIGN(4)
+  {
+    _sram_rodata_start = ABSOLUTE(.);
+    *(.sram.rodata)
+    . = ALIGN (4);
+    _sram_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.rodata : ALIGN(4)
+  {
+    _clib_rodata_start = ABSOLUTE(.);
+    *(.clib.rodata)
+    . = ALIGN (4);
+    _clib_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.rodata : ALIGN(4)
+  {
+    _rtos_rodata_start = ABSOLUTE(.);
+    *(.rtos.rodata)
+    . = ALIGN (4);
+    _rtos_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rodata : ALIGN(4)
+  {
+    _rodata_start = ABSOLUTE(.);
+    *(.rodata)
+    *(SORT(.rodata.sort.*))
+    KEEP (*(SORT(.rodata.keepsort.*) .rodata.keep.*))
+    *(.rodata.*)
+    *(.gnu.linkonce.r.*)
+    *(.rodata1)
+    __XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
+    KEEP (*(.xt_except_table))
+    KEEP (*(.gcc_except_table))
+    *(.gnu.linkonce.e.*)
+    *(.gnu.version_r)
+    KEEP (*(.eh_frame))
+    /*  C++ constructor and destructor tables, properly ordered:  */
+    KEEP (*crtbegin.o(.ctors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*(.ctors))
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*(.dtors))
+    /*  C++ exception handlers table:  */
+    __XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
+    *(.xt_except_desc)
+    *(.gnu.linkonce.h.*)
+    __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
+    *(.xt_except_desc_end)
+    *(.dynamic)
+    *(.gnu.version_d)
+    . = ALIGN(4);		/* this table MUST be 4-byte aligned */
+    _bss_table_start = ABSOLUTE(.);
+    LONG(_bss_start)
+    LONG(_bss_end)
+    LONG(_dram0_bss_start)
+    LONG(_dram0_bss_end)
+    LONG(_dram1_bss_start)
+    LONG(_dram1_bss_end)
+    LONG(_local_sram_bss_start)
+    LONG(_local_sram_bss_end)
+    _bss_table_end = ABSOLUTE(.);
+    . = ALIGN (4);
+    _rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .sram.text : ALIGN(4)
+  {
+    _sram_text_start = ABSOLUTE(.);
+    *(.sram.literal .sram.text)
+    . = ALIGN (4);
+    _sram_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .text : ALIGN(4)
+  {
+    _stext = .;
+    _text_start = ABSOLUTE(.);
+    *(.entry.text)
+    *(.init.literal)
+    KEEP(*(.init))
+    *(.literal.sort.* SORT(.text.sort.*))
+    KEEP (*(.literal.keepsort.* SORT(.text.keepsort.*) .literal.keep.* .text.keep.* .literal.*personality* .text.*personality*))
+    *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
+    *(.fini.literal)
+    KEEP(*(.fini))
+    *(.gnu.version)
+    . = ALIGN (4);
+    _text_end = ABSOLUTE(.);
+    _etext = .;
+  } >sram1_seg :sram1_phdr
+
+  .clib.text : ALIGN(4)
+  {
+    _clib_text_start = ABSOLUTE(.);
+    *(.clib.literal .clib.text)
+    . = ALIGN (4);
+    _clib_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.text : ALIGN(4)
+  {
+    _rtos_text_start = ABSOLUTE(.);
+    *(.rtos.literal .rtos.text)
+    . = ALIGN (4);
+    _rtos_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.data : ALIGN(4)
+  {
+    _clib_data_start = ABSOLUTE(.);
+    *(.clib.data)
+    . = ALIGN (4);
+    _clib_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.percpu.data : ALIGN(4)
+  {
+    _clib_percpu_data_start = ABSOLUTE(.);
+    *(.clib.percpu.data)
+    . = ALIGN (4);
+    _clib_percpu_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.percpu.data : ALIGN(4)
+  {
+    _rtos_percpu_data_start = ABSOLUTE(.);
+    *(.rtos.percpu.data)
+    . = ALIGN (4);
+    _rtos_percpu_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.data : ALIGN(4)
+  {
+    _rtos_data_start = ABSOLUTE(.);
+    *(.rtos.data)
+    . = ALIGN (4);
+    _rtos_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .sram.data : ALIGN(4)
+  {
+    _sram_data_start = ABSOLUTE(.);
+    *(.sram.data)
+    . = ALIGN (4);
+    _sram_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .data : ALIGN(4)
+  {
+    _data_start = ABSOLUTE(.);
+    *(.data)
+    *(SORT(.data.sort.*))
+    KEEP (*(SORT(.data.keepsort.*) .data.keep.*))
+    *(.data.*)
+    *(.gnu.linkonce.d.*)
+    KEEP(*(.gnu.linkonce.d.*personality*))
+    *(.data1)
+    *(.sdata)
+    *(.sdata.*)
+    *(.gnu.linkonce.s.*)
+    *(.sdata2)
+    *(.sdata2.*)
+    *(.gnu.linkonce.s2.*)
+    KEEP(*(.jcr))
+    *(__llvm_prf_cnts)
+    *(__llvm_prf_data)
+    *(__llvm_prf_vnds)
+    . = ALIGN (4);
+    _data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  __llvm_prf_names : ALIGN(4)
+  {
+    __llvm_prf_names_start = ABSOLUTE(.);
+    *(__llvm_prf_names)
+    . = ALIGN (4);
+    __llvm_prf_names_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _bss_start = ABSOLUTE(.);
+    *(.dynsbss)
+    *(.sbss)
+    *(.sbss.*)
+    *(.gnu.linkonce.sb.*)
+    *(.scommon)
+    *(.sbss2)
+    *(.sbss2.*)
+    *(.gnu.linkonce.sb2.*)
+    *(.dynbss)
+    *(.bss)
+    *(SORT(.bss.sort.*))
+    KEEP (*(SORT(.bss.keepsort.*) .bss.keep.*))
+    *(.bss.*)
+    *(.gnu.linkonce.b.*)
+    *(COMMON)
+    *(.clib.bss)
+    *(.clib.percpu.bss)
+    *(.rtos.percpu.bss)
+    *(.rtos.bss)
+    *(.sram.bss)
+    *(.debug.bss)
+    . = ALIGN (8);
+    _bss_end = ABSOLUTE(.);
+    _end = ALIGN(0x8);
+    PROVIDE(end = ALIGN(0x8));
+    _memmap_seg_sram1_end = ALIGN(0x8);
+  } >sram1_seg :sram1_bss_phdr
+
+  _heap_sentry = 0x20fda800;
+  _memmap_mem_sram_max = ABSOLUTE(.);
+
+  .dram0.rodata : ALIGN(4)
+  {
+    _dram0_rodata_start = ABSOLUTE(.);
+    *(.dram0.rodata)
+    . = ALIGN (4);
+    _dram0_rodata_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.data : ALIGN(4)
+  {
+    _dram0_data_start = ABSOLUTE(.);
+    *(.dram0.data)
+    . = ALIGN (4);
+    _dram0_data_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dram0_bss_start = ABSOLUTE(.);
+    *(.dram0.bss)
+    *(.dram0_user.bss)
+    . = ALIGN (8);
+    _dram0_bss_end = ABSOLUTE(.);
+    _memmap_seg_dram0_0_end = ALIGN(0x8);
+  } >dram0_0_seg :dram0_0_bss_phdr
+
+  _memmap_mem_dram0_max = ABSOLUTE(.);
+
+  .dram1.rodata : ALIGN(4)
+  {
+    _dram1_rodata_start = ABSOLUTE(.);
+    *(.dram1.rodata)
+    . = ALIGN (4);
+    _dram1_rodata_end = ABSOLUTE(.);
+  } >dram1_0_seg :dram1_0_phdr
+
+  .dram1.data : ALIGN(4)
+  {
+    _dram1_data_start = ABSOLUTE(.);
+    *(.dram1.data)
+    . = ALIGN (4);
+    _dram1_data_end = ABSOLUTE(.);
+  } >dram1_0_seg :dram1_0_phdr
+
+  .dram1.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dram1_bss_start = ABSOLUTE(.);
+    *(.dram1.bss)
+    *(.dram1_user.bss)
+    . = ALIGN (8);
+    _dram1_bss_end = ABSOLUTE(.);
+    _stack_sentry = ALIGN(0x8);
+    _memmap_seg_dram1_0_end = ALIGN(0x8);
+  } >dram1_0_seg :dram1_0_bss_phdr
+
+  PROVIDE(__stack = 0xe01a7000);
+  _memmap_mem_dram1_max = ABSOLUTE(.);
+
+  .local_sram.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _local_sram_bss_start = ABSOLUTE(.);
+    *(.local_sram.bss)
+    . = ALIGN (8);
+    _local_sram_bss_end = ABSOLUTE(.);
+    _memmap_seg_local_sram_0_end = ALIGN(0x8);
+  } >local_sram_0_seg :local_sram_0_bss_phdr
+
+
+  _memmap_mem_local_sram_max = ABSOLUTE(.);
+
+  .debug  0 :  { *(.debug) }
+  .line  0 :  { *(.line) }
+  .debug_srcinfo  0 :  { *(.debug_srcinfo) }
+  .debug_sfnames  0 :  { *(.debug_sfnames) }
+  .debug_aranges  0 :  { *(.debug_aranges) }
+  .debug_pubnames  0 :  { *(.debug_pubnames) }
+  .debug_info  0 :  { *(.debug_info) }
+  .debug_abbrev  0 :  { *(.debug_abbrev) }
+  .debug_line  0 :  { *(.debug_line) }
+  .debug_frame  0 :  { *(.debug_frame) }
+  .debug_str  0 :  { *(.debug_str) }
+  .debug_loc  0 :  { *(.debug_loc) }
+  .debug_macinfo  0 :  { *(.debug_macinfo) }
+  .debug_weaknames  0 :  { *(.debug_weaknames) }
+  .debug_funcnames  0 :  { *(.debug_funcnames) }
+  .debug_typenames  0 :  { *(.debug_typenames) }
+  .debug_varnames  0 :  { *(.debug_varnames) }
+  .xt.insn 0 :
+  {
+    KEEP (*(.xt.insn))
+    KEEP (*(.gnu.linkonce.x.*))
+  }
+  .xt.prop 0 :
+  {
+    KEEP (*(.xt.prop))
+    KEEP (*(.xt.prop.*))
+    KEEP (*(.gnu.linkonce.prop.*))
+  }
+  .xt.lit 0 :
+  {
+    KEEP (*(.xt.lit))
+    KEEP (*(.xt.lit.*))
+    KEEP (*(.gnu.linkonce.p.*))
+  }
+  .debug.xt.callgraph 0 :
+  {
+    KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
+  }
+}
+

+ 61 - 0
LSP/gdbio_core0_main_stack_tcm1/ldscripts/elf32xtensa.xr

@@ -0,0 +1,61 @@
+/* This linker script generated from xt-genldscripts.tpp for LSP C:\Users\DELL\workspace\CSI_DSP_FW\LSP\min-rt_0x20_main_core0_stack_tcm1 */
+/* Linker Script for ld -r or ld -i */
+
+
+SECTIONS
+{
+
+  .text 0 :
+  {
+    *(.literal .text)
+  }
+
+  .bss 0 :
+  {
+    *(.dynsbss)
+    *(.sbss)
+    *(.scommon)
+    *(.dynbss)
+    *(.bss)
+    *(COMMON)
+  }
+  .debug  0 :  { *(.debug) }
+  .line  0 :  { *(.line) }
+  .debug_srcinfo  0 :  { *(.debug_srcinfo) }
+  .debug_sfnames  0 :  { *(.debug_sfnames) }
+  .debug_aranges  0 :  { *(.debug_aranges) }
+  .debug_pubnames  0 :  { *(.debug_pubnames) }
+  .debug_info  0 :  { *(.debug_info) }
+  .debug_abbrev  0 :  { *(.debug_abbrev) }
+  .debug_line  0 :  { *(.debug_line) }
+  .debug_frame  0 :  { *(.debug_frame) }
+  .debug_str  0 :  { *(.debug_str) }
+  .debug_loc  0 :  { *(.debug_loc) }
+  .debug_macinfo  0 :  { *(.debug_macinfo) }
+  .debug_weaknames  0 :  { *(.debug_weaknames) }
+  .debug_funcnames  0 :  { *(.debug_funcnames) }
+  .debug_typenames  0 :  { *(.debug_typenames) }
+  .debug_varnames  0 :  { *(.debug_varnames) }
+  .xt.insn 0 :
+  {
+    KEEP (*(.xt.insn))
+    KEEP (*(.gnu.linkonce.x.*))
+  }
+  .xt.prop 0 :
+  {
+    KEEP (*(.xt.prop))
+    KEEP (*(.xt.prop.*))
+    KEEP (*(.gnu.linkonce.prop.*))
+  }
+  .xt.lit 0 :
+  {
+    KEEP (*(.xt.lit))
+    KEEP (*(.xt.lit.*))
+    KEEP (*(.gnu.linkonce.p.*))
+  }
+  .debug.xt.callgraph 0 :
+  {
+    KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
+  }
+}
+

+ 61 - 0
LSP/gdbio_core0_main_stack_tcm1/ldscripts/elf32xtensa.xu

@@ -0,0 +1,61 @@
+/* This linker script generated from xt-genldscripts.tpp for LSP C:\Users\DELL\workspace\CSI_DSP_FW\LSP\min-rt_0x20_main_core0_stack_tcm1 */
+/* Linker Script for ld -Ur */
+
+
+SECTIONS
+{
+
+  .text 0 :
+  {
+    *(.literal .text)
+  }
+
+  .bss 0 :
+  {
+    *(.dynsbss)
+    *(.sbss)
+    *(.scommon)
+    *(.dynbss)
+    *(.bss)
+    *(COMMON)
+  }
+  .debug  0 :  { *(.debug) }
+  .line  0 :  { *(.line) }
+  .debug_srcinfo  0 :  { *(.debug_srcinfo) }
+  .debug_sfnames  0 :  { *(.debug_sfnames) }
+  .debug_aranges  0 :  { *(.debug_aranges) }
+  .debug_pubnames  0 :  { *(.debug_pubnames) }
+  .debug_info  0 :  { *(.debug_info) }
+  .debug_abbrev  0 :  { *(.debug_abbrev) }
+  .debug_line  0 :  { *(.debug_line) }
+  .debug_frame  0 :  { *(.debug_frame) }
+  .debug_str  0 :  { *(.debug_str) }
+  .debug_loc  0 :  { *(.debug_loc) }
+  .debug_macinfo  0 :  { *(.debug_macinfo) }
+  .debug_weaknames  0 :  { *(.debug_weaknames) }
+  .debug_funcnames  0 :  { *(.debug_funcnames) }
+  .debug_typenames  0 :  { *(.debug_typenames) }
+  .debug_varnames  0 :  { *(.debug_varnames) }
+  .xt.insn 0 :
+  {
+    KEEP (*(.xt.insn))
+    KEEP (*(.gnu.linkonce.x.*))
+  }
+  .xt.prop 0 :
+  {
+    KEEP (*(.xt.prop))
+    KEEP (*(.xt.prop.*))
+    KEEP (*(.gnu.linkonce.prop.*))
+  }
+  .xt.lit 0 :
+  {
+    KEEP (*(.xt.lit))
+    KEEP (*(.xt.lit.*))
+    KEEP (*(.gnu.linkonce.p.*))
+  }
+  .debug.xt.callgraph 0 :
+  {
+    KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
+  }
+}
+

BIN
LSP/gdbio_core0_main_stack_tcm1/ldscripts/libminrt.a


BIN
LSP/gdbio_core0_main_stack_tcm1/libminrt.a


+ 80 - 0
LSP/gdbio_core0_main_stack_tcm1/memmap.xmm

@@ -0,0 +1,80 @@
+//  Memory map file to generate linker scripts for programs to run on
+//  most targets (that have the OCD option); allows I/O through the host
+//  debugger when being debugged using GDB (via the Xtensa OCD daemon).
+
+// Customer ID=16470; Build=0x8e648; Copyright (c) 2004-2015 Cadence Design Systems, Inc.
+//
+// Permission is hereby granted, free of charge, to any person obtaining
+// a copy of this software and associated documentation files (the
+// "Software"), to deal in the Software without restriction, including
+// without limitation the rights to use, copy, modify, merge, publish,
+// distribute, sublicense, and/or sell copies of the Software, and to
+// permit persons to whom the Software is furnished to do so, subject to
+// the following conditions:
+//
+// The above copyright notice and this permission notice shall be included
+// in all copies or substantial portions of the Software.
+//
+// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+// EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+// IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+// CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+// TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+// SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+
+//  Place stack in local RAM:
+PLACE SECTIONS(STACK) WITH_SECTION(.dram1.bss)
+// A memory map is a sequence of memory descriptions and
+// optional parameter assignments.
+//
+// Each memory description has the following format:
+//   BEGIN <name>
+//     <addr> [,<paddr>] : <mem-type> : <mem-name> : <size> [,<psize>]
+//                       : [writable] [,executable] [,device] ;
+//     <segment>*
+//   END <name>
+//
+// where each <segment> description has the following format:
+//     <seg-name> : F|C : <start-addr> - <end-addr> [ : STACK ] [ : HEAP ]
+//                : <section-name>* ;
+//
+// Each parameter assignment is a keyword/value pair in the following format:
+//   <keyword> = <value>                (no spaces in <value>)
+// or
+//   <keyword> = "<value>"              (spaces allowed in <value>)
+//
+// The following primitives are also defined:
+//   PLACE SECTIONS( <section-name>* ) { WITH_SECTION(<section-name>)
+//                                       | IN_SEGMENT(<seg-name>) }
+//
+//   NOLOAD <section-name1> [ <section-name2> ... ]
+//
+// Please refer to the Xtensa LSP Reference Manual for more details.
+//
+VECSELECT=1
+VECRESET=0x20000000
+VECBASE= 0x20000000
+
+BEGIN sram
+0x20000000: extra_mem : sram : 0x01000000 : executable, writable ;
+ sram0 : F : 0x20000000 - 0x20001fff : .DispatchVector.text .ResetVector.text .ResetHandler.literal .ResetHandler.text .DispatchHandler.literal .DispatchHandler.text;
+ sram1 : C : 0x20002000 - 0x20ffffff :  HEAP : .sram.rodata .clib.rodata .rtos.rodata .rodata .sram.literal .literal .rtos.literal .clib.literal .sram.text .text .clib.text .rtos.text .clib.data .clib.percpu.data .rtos.percpu.data .rtos.data .sram.data .data __llvm_prf_names .clib.bss .clib.percpu.bss .rtos.percpu.bss .rtos.bss .sram.bss .bss .debug.bss;
+ END sram
+
+BEGIN dram0
+0xe0180000: dataRam : dram0 : 0x20000 : writable ;
+ dram0_0 : C : 0xe0180000 - 0xe019ffff :.dram0.rodata .dram0.data .dram0.bss .dram0_user.bss;
+END dram0
+
+BEGIN dram1
+0xe01a0000: dataRam : dram1 : 0x20000 : writable ;
+ dram1_0 : C : 0xe01a0000 - 0xe01bffff :STACK :.dram1.rodata .dram1.data .dram1.bss .dram1_user.bss;
+END dram1
+
+BEGIN local_sram
+0xffa00000: sysram : local_sram :   0x180000: writable ;
+  local_sram_0 : C : 0xffa00000 - 0xffb7ffff :.local_sram.bss ;
+ END local_sram
+
+RESERVE_SEGMENT_AREA = ".dram0.data 102400 + 0 end : .dram1.data 102400 + 0 end : .sram.data 153600 + 0 end"

+ 36 - 0
LSP/gdbio_core0_main_stack_tcm1/specs

@@ -0,0 +1,36 @@
+# Customer ID=16470; Build=0x8e648; Copyright (c) 2001-2015 Cadence Design Systems, Inc.
+#
+# Permission is hereby granted, free of charge, to any person obtaining
+# a copy of this software and associated documentation files (the
+# "Software"), to deal in the Software without restriction, including
+# without limitation the rights to use, copy, modify, merge, publish,
+# distribute, sublicense, and/or sell copies of the Software, and to
+# permit persons to whom the Software is furnished to do so, subject to
+# the following conditions:
+#
+# The above copyright notice and this permission notice shall be included
+# in all copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+# IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+# CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+# TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+# SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+
+
+# The %O suffix on the start and end files indicates that the system's
+# standard suffix for object files (e.g., ".o") should be appended.
+# The %s suffix tells the compiler driver to search for the file in the
+# list of known locations for startfiles.
+
+*startfile:
+crt1-boards%O%s crti%O%s crtbegin%O%s _sharedvectors%O%s _vectors%O%s
+
+*endfile:
+crtend%O%s crtn%O%s
+
+*lib:
+-lc -lgdbio -lc -lhandler-reset -lhandlers-board -lgdbio -lhal -lc
+

+ 444 - 0
LSP/gdbio_core0_stack_tcm1/ldscripts/elf32xtensa.x

@@ -0,0 +1,444 @@
+/* This linker script generated from xt-genldscripts.tpp for LSP C:\usr\xtensa\XtDevTools\install\builds\RI-2020.4-win32\q7_check\xtensa-elf\lib\min-rt_0x20_stack_tcm1 */
+/* Linker Script for default link */
+MEMORY
+{
+  sram0_seg :                         	org = 0x20000000, len = 0x2000
+  sram1_seg :                         	org = 0x20002000, len = 0xFFE000
+  dram0_0_seg :                       	org = 0xE0180000, len = 0x20000
+  dram1_0_seg :                       	org = 0xE01A0000, len = 0x20000
+  local_sram_0_seg :                  	org = 0xFFA00000, len = 0x180000
+}
+
+PHDRS
+{
+  sram0_phdr PT_LOAD;
+  sram1_phdr PT_LOAD;
+  sram1_bss_phdr PT_LOAD;
+  dram0_0_phdr PT_LOAD;
+  dram0_0_bss_phdr PT_LOAD;
+  dram1_0_phdr PT_LOAD;
+  dram1_0_bss_phdr PT_LOAD;
+  local_sram_0_phdr PT_LOAD;
+  local_sram_0_bss_phdr PT_LOAD;
+}
+
+
+/*  Default entry point:  */
+ENTRY(_ResetVector)
+
+
+/*  Memory boundary addresses:  */
+_memmap_mem_sram_start = 0x20000000;
+_memmap_mem_sram_end   = 0x21000000;
+_memmap_mem_dram0_start = 0xe0180000;
+_memmap_mem_dram0_end   = 0xe01a0000;
+_memmap_mem_dram1_start = 0xe01a0000;
+_memmap_mem_dram1_end   = 0xe01c0000;
+_memmap_mem_local_sram_start = 0xffa00000;
+_memmap_mem_local_sram_end   = 0xffb80000;
+
+/*  Memory segment boundary addresses:  */
+_memmap_seg_sram0_start = 0x20000000;
+_memmap_seg_sram0_max   = 0x20002000;
+_memmap_seg_sram1_start = 0x20002000;
+_memmap_seg_sram1_max   = 0x21000000;
+_memmap_seg_dram0_0_start = 0xe0180000;
+_memmap_seg_dram0_0_max   = 0xe01a0000;
+_memmap_seg_dram1_0_start = 0xe01a0000;
+_memmap_seg_dram1_0_max   = 0xe01c0000;
+_memmap_seg_local_sram_0_start = 0xffa00000;
+_memmap_seg_local_sram_0_max   = 0xffb80000;
+
+_rom_store_table = 0;
+PROVIDE(_memmap_reset_vector = 0x20000000);
+PROVIDE(_memmap_vecbase_reset = 0x20000000);
+/* Various memory-map dependent cache attribute settings: */
+_memmap_cacheattr_wb_base = 0x10000010;
+_memmap_cacheattr_wt_base = 0x30000030;
+_memmap_cacheattr_bp_base = 0x40000040;
+_memmap_cacheattr_unused_mask = 0x0FFFFF0F;
+_memmap_cacheattr_wb_trapnull = 0x14444411;
+_memmap_cacheattr_wba_trapnull = 0x14444410;
+_memmap_cacheattr_wbna_trapnull = 0x24444420;
+_memmap_cacheattr_wt_trapnull = 0x34444430;
+_memmap_cacheattr_bp_trapnull = 0x44444440;
+_memmap_cacheattr_wb_strict = 0x10000010;
+_memmap_cacheattr_wt_strict = 0x30000030;
+_memmap_cacheattr_bp_strict = 0x40000040;
+_memmap_cacheattr_wb_allvalid = 0x14444414;
+_memmap_cacheattr_wt_allvalid = 0x34444434;
+_memmap_cacheattr_bp_allvalid = 0x44444444;
+_memmap_region_map = 0x00000082;
+PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
+
+SECTIONS
+{
+
+  .DispatchVector.text : ALIGN(4)
+  {
+    _DispatchVector_text_start = ABSOLUTE(.);
+    KEEP (*(.DispatchVector.text))
+    . = ALIGN (4);
+    _DispatchVector_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .ResetVector.text : ALIGN(4)
+  {
+    _ResetVector_text_start = ABSOLUTE(.);
+    *(.ResetVector.text)
+    . = ALIGN (4);
+    _ResetVector_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .ResetHandler.text : ALIGN(4)
+  {
+    _ResetHandler_text_start = ABSOLUTE(.);
+    *(.ResetHandler.literal .ResetHandler.text)
+    . = ALIGN (4);
+    _ResetHandler_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .DispatchHandler.text : ALIGN(4)
+  {
+    _DispatchHandler_text_start = ABSOLUTE(.);
+    *(.DispatchHandler.literal .DispatchHandler.text)
+    . = ALIGN (4);
+    _DispatchHandler_text_end = ABSOLUTE(.);
+    _memmap_seg_sram0_end = ALIGN(0x8);
+  } >sram0_seg :sram0_phdr
+
+
+  .sram.rodata : ALIGN(4)
+  {
+    _sram_rodata_start = ABSOLUTE(.);
+    *(.sram.rodata)
+    . = ALIGN (4);
+    _sram_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.rodata : ALIGN(4)
+  {
+    _clib_rodata_start = ABSOLUTE(.);
+    *(.clib.rodata)
+    . = ALIGN (4);
+    _clib_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.rodata : ALIGN(4)
+  {
+    _rtos_rodata_start = ABSOLUTE(.);
+    *(.rtos.rodata)
+    . = ALIGN (4);
+    _rtos_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rodata : ALIGN(4)
+  {
+    _rodata_start = ABSOLUTE(.);
+    *(.rodata)
+    *(SORT(.rodata.sort.*))
+    KEEP (*(SORT(.rodata.keepsort.*) .rodata.keep.*))
+    *(.rodata.*)
+    *(.gnu.linkonce.r.*)
+    *(.rodata1)
+    __XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
+    KEEP (*(.xt_except_table))
+    KEEP (*(.gcc_except_table))
+    *(.gnu.linkonce.e.*)
+    *(.gnu.version_r)
+    KEEP (*(.eh_frame))
+    /*  C++ constructor and destructor tables, properly ordered:  */
+    KEEP (*crtbegin.o(.ctors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*(.ctors))
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*(.dtors))
+    /*  C++ exception handlers table:  */
+    __XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
+    *(.xt_except_desc)
+    *(.gnu.linkonce.h.*)
+    __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
+    *(.xt_except_desc_end)
+    *(.dynamic)
+    *(.gnu.version_d)
+    . = ALIGN(4);		/* this table MUST be 4-byte aligned */
+    _bss_table_start = ABSOLUTE(.);
+    LONG(_bss_start)
+    LONG(_bss_end)
+    LONG(_dram0_bss_start)
+    LONG(_dram0_bss_end)
+    LONG(_dram1_bss_start)
+    LONG(_dram1_bss_end)
+    LONG(_local_sram_bss_start)
+    LONG(_local_sram_bss_end)
+    _bss_table_end = ABSOLUTE(.);
+    . = ALIGN (4);
+    _rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .sram.text : ALIGN(4)
+  {
+    _sram_text_start = ABSOLUTE(.);
+    *(.sram.literal .sram.text)
+    . = ALIGN (4);
+    _sram_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .text : ALIGN(4)
+  {
+    _stext = .;
+    _text_start = ABSOLUTE(.);
+    *(.entry.text)
+    *(.init.literal)
+    KEEP(*(.init))
+    *(.literal.sort.* SORT(.text.sort.*))
+    KEEP (*(.literal.keepsort.* SORT(.text.keepsort.*) .literal.keep.* .text.keep.* .literal.*personality* .text.*personality*))
+    *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
+    *(.fini.literal)
+    KEEP(*(.fini))
+    *(.gnu.version)
+    . = ALIGN (4);
+    _text_end = ABSOLUTE(.);
+    _etext = .;
+  } >sram1_seg :sram1_phdr
+
+  .clib.text : ALIGN(4)
+  {
+    _clib_text_start = ABSOLUTE(.);
+    *(.clib.literal .clib.text)
+    . = ALIGN (4);
+    _clib_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.text : ALIGN(4)
+  {
+    _rtos_text_start = ABSOLUTE(.);
+    *(.rtos.literal .rtos.text)
+    . = ALIGN (4);
+    _rtos_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.data : ALIGN(4)
+  {
+    _clib_data_start = ABSOLUTE(.);
+    *(.clib.data)
+    . = ALIGN (4);
+    _clib_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.percpu.data : ALIGN(4)
+  {
+    _clib_percpu_data_start = ABSOLUTE(.);
+    *(.clib.percpu.data)
+    . = ALIGN (4);
+    _clib_percpu_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.percpu.data : ALIGN(4)
+  {
+    _rtos_percpu_data_start = ABSOLUTE(.);
+    *(.rtos.percpu.data)
+    . = ALIGN (4);
+    _rtos_percpu_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.data : ALIGN(4)
+  {
+    _rtos_data_start = ABSOLUTE(.);
+    *(.rtos.data)
+    . = ALIGN (4);
+    _rtos_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .sram.data : ALIGN(4)
+  {
+    _sram_data_start = ABSOLUTE(.);
+    *(.sram.data)
+    . = ALIGN (4);
+    _sram_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .data : ALIGN(4)
+  {
+    _data_start = ABSOLUTE(.);
+    *(.data)
+    *(SORT(.data.sort.*))
+    KEEP (*(SORT(.data.keepsort.*) .data.keep.*))
+    *(.data.*)
+    *(.gnu.linkonce.d.*)
+    KEEP(*(.gnu.linkonce.d.*personality*))
+    *(.data1)
+    *(.sdata)
+    *(.sdata.*)
+    *(.gnu.linkonce.s.*)
+    *(.sdata2)
+    *(.sdata2.*)
+    *(.gnu.linkonce.s2.*)
+    KEEP(*(.jcr))
+    *(__llvm_prf_cnts)
+    *(__llvm_prf_data)
+    *(__llvm_prf_vnds)
+    . = ALIGN (4);
+    _data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  __llvm_prf_names : ALIGN(4)
+  {
+    __llvm_prf_names_start = ABSOLUTE(.);
+    *(__llvm_prf_names)
+    . = ALIGN (4);
+    __llvm_prf_names_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _bss_start = ABSOLUTE(.);
+    *(.dynsbss)
+    *(.sbss)
+    *(.sbss.*)
+    *(.gnu.linkonce.sb.*)
+    *(.scommon)
+    *(.sbss2)
+    *(.sbss2.*)
+    *(.gnu.linkonce.sb2.*)
+    *(.dynbss)
+    *(.bss)
+    *(SORT(.bss.sort.*))
+    KEEP (*(SORT(.bss.keepsort.*) .bss.keep.*))
+    *(.bss.*)
+    *(.gnu.linkonce.b.*)
+    *(COMMON)
+    *(.clib.bss)
+    *(.clib.percpu.bss)
+    *(.rtos.percpu.bss)
+    *(.rtos.bss)
+    *(.sram.bss)
+    *(.debug.bss)
+    . = ALIGN (8);
+    _bss_end = ABSOLUTE(.);
+    _end = ALIGN(0x8);
+    PROVIDE(end = ALIGN(0x8));
+    _memmap_seg_sram1_end = ALIGN(0x8);
+  } >sram1_seg :sram1_bss_phdr
+
+  _heap_sentry = 0x21000000;
+  _memmap_mem_sram_max = ABSOLUTE(.);
+
+  .dram0.rodata : ALIGN(4)
+  {
+    _dram0_rodata_start = ABSOLUTE(.);
+    *(.dram0.rodata)
+    . = ALIGN (4);
+    _dram0_rodata_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.data : ALIGN(4)
+  {
+    _dram0_data_start = ABSOLUTE(.);
+    *(.dram0.data)
+    . = ALIGN (4);
+    _dram0_data_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dram0_bss_start = ABSOLUTE(.);
+    *(.dram0.bss)
+    *(.dram0_user.bss)
+    . = ALIGN (8);
+    _dram0_bss_end = ABSOLUTE(.);
+    _memmap_seg_dram0_0_end = ALIGN(0x8);
+  } >dram0_0_seg :dram0_0_bss_phdr
+
+  _memmap_mem_dram0_max = ABSOLUTE(.);
+
+  .dram1.rodata : ALIGN(4)
+  {
+    _dram1_rodata_start = ABSOLUTE(.);
+    *(.dram1.rodata)
+    . = ALIGN (4);
+    _dram1_rodata_end = ABSOLUTE(.);
+  } >dram1_0_seg :dram1_0_phdr
+
+  .dram1.data : ALIGN(4)
+  {
+    _dram1_data_start = ABSOLUTE(.);
+    *(.dram1.data)
+    . = ALIGN (4);
+    _dram1_data_end = ABSOLUTE(.);
+  } >dram1_0_seg :dram1_0_phdr
+
+  .dram1.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dram1_bss_start = ABSOLUTE(.);
+    *(.dram1.bss)
+    *(.dram1_user.bss)
+    . = ALIGN (8);
+    _dram1_bss_end = ABSOLUTE(.);
+    _stack_sentry = ALIGN(0x8);
+    _memmap_seg_dram1_0_end = ALIGN(0x8);
+  } >dram1_0_seg :dram1_0_bss_phdr
+
+  PROVIDE(__stack = 0xe01c0000);
+  _isb_default = 0xe01bfe10;
+  _memmap_mem_dram1_max = ABSOLUTE(.);
+
+  .local_sram.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _local_sram_bss_start = ABSOLUTE(.);
+    *(.local_sram.bss)
+    . = ALIGN (8);
+    _local_sram_bss_end = ABSOLUTE(.);
+    _memmap_seg_local_sram_0_end = ALIGN(0x8);
+  } >local_sram_0_seg :local_sram_0_bss_phdr
+
+
+  _memmap_mem_local_sram_max = ABSOLUTE(.);
+
+  .debug  0 :  { *(.debug) }
+  .line  0 :  { *(.line) }
+  .debug_srcinfo  0 :  { *(.debug_srcinfo) }
+  .debug_sfnames  0 :  { *(.debug_sfnames) }
+  .debug_aranges  0 :  { *(.debug_aranges) }
+  .debug_pubnames  0 :  { *(.debug_pubnames) }
+  .debug_info  0 :  { *(.debug_info) }
+  .debug_abbrev  0 :  { *(.debug_abbrev) }
+  .debug_line  0 :  { *(.debug_line) }
+  .debug_frame  0 :  { *(.debug_frame) }
+  .debug_str  0 :  { *(.debug_str) }
+  .debug_loc  0 :  { *(.debug_loc) }
+  .debug_macinfo  0 :  { *(.debug_macinfo) }
+  .debug_weaknames  0 :  { *(.debug_weaknames) }
+  .debug_funcnames  0 :  { *(.debug_funcnames) }
+  .debug_typenames  0 :  { *(.debug_typenames) }
+  .debug_varnames  0 :  { *(.debug_varnames) }
+  .xt.insn 0 :
+  {
+    KEEP (*(.xt.insn))
+    KEEP (*(.gnu.linkonce.x.*))
+  }
+  .xt.prop 0 :
+  {
+    KEEP (*(.xt.prop))
+    KEEP (*(.xt.prop.*))
+    KEEP (*(.gnu.linkonce.prop.*))
+  }
+  .xt.lit 0 :
+  {
+    KEEP (*(.xt.lit))
+    KEEP (*(.xt.lit.*))
+    KEEP (*(.gnu.linkonce.p.*))
+  }
+  .debug.xt.callgraph 0 :
+  {
+    KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
+  }
+}
+

+ 444 - 0
LSP/gdbio_core0_stack_tcm1/ldscripts/elf32xtensa.xbn

@@ -0,0 +1,444 @@
+/* This linker script generated from xt-genldscripts.tpp for LSP C:\usr\xtensa\XtDevTools\install\builds\RI-2020.4-win32\q7_check\xtensa-elf\lib\min-rt_0x20_stack_tcm1 */
+/* Linker Script for ld -N */
+MEMORY
+{
+  sram0_seg :                         	org = 0x20000000, len = 0x2000
+  sram1_seg :                         	org = 0x20002000, len = 0xFFE000
+  dram0_0_seg :                       	org = 0xE0180000, len = 0x20000
+  dram1_0_seg :                       	org = 0xE01A0000, len = 0x20000
+  local_sram_0_seg :                  	org = 0xFFA00000, len = 0x180000
+}
+
+PHDRS
+{
+  sram0_phdr PT_LOAD;
+  sram1_phdr PT_LOAD;
+  sram1_bss_phdr PT_LOAD;
+  dram0_0_phdr PT_LOAD;
+  dram0_0_bss_phdr PT_LOAD;
+  dram1_0_phdr PT_LOAD;
+  dram1_0_bss_phdr PT_LOAD;
+  local_sram_0_phdr PT_LOAD;
+  local_sram_0_bss_phdr PT_LOAD;
+}
+
+
+/*  Default entry point:  */
+ENTRY(_ResetVector)
+
+
+/*  Memory boundary addresses:  */
+_memmap_mem_sram_start = 0x20000000;
+_memmap_mem_sram_end   = 0x21000000;
+_memmap_mem_dram0_start = 0xe0180000;
+_memmap_mem_dram0_end   = 0xe01a0000;
+_memmap_mem_dram1_start = 0xe01a0000;
+_memmap_mem_dram1_end   = 0xe01c0000;
+_memmap_mem_local_sram_start = 0xffa00000;
+_memmap_mem_local_sram_end   = 0xffb80000;
+
+/*  Memory segment boundary addresses:  */
+_memmap_seg_sram0_start = 0x20000000;
+_memmap_seg_sram0_max   = 0x20002000;
+_memmap_seg_sram1_start = 0x20002000;
+_memmap_seg_sram1_max   = 0x21000000;
+_memmap_seg_dram0_0_start = 0xe0180000;
+_memmap_seg_dram0_0_max   = 0xe01a0000;
+_memmap_seg_dram1_0_start = 0xe01a0000;
+_memmap_seg_dram1_0_max   = 0xe01c0000;
+_memmap_seg_local_sram_0_start = 0xffa00000;
+_memmap_seg_local_sram_0_max   = 0xffb80000;
+
+_rom_store_table = 0;
+PROVIDE(_memmap_reset_vector = 0x20000000);
+PROVIDE(_memmap_vecbase_reset = 0x20000000);
+/* Various memory-map dependent cache attribute settings: */
+_memmap_cacheattr_wb_base = 0x10000010;
+_memmap_cacheattr_wt_base = 0x30000030;
+_memmap_cacheattr_bp_base = 0x40000040;
+_memmap_cacheattr_unused_mask = 0x0FFFFF0F;
+_memmap_cacheattr_wb_trapnull = 0x14444410;
+_memmap_cacheattr_wba_trapnull = 0x14444410;
+_memmap_cacheattr_wbna_trapnull = 0x24444420;
+_memmap_cacheattr_wt_trapnull = 0x34444430;
+_memmap_cacheattr_bp_trapnull = 0x44444440;
+_memmap_cacheattr_wb_strict = 0x10000010;
+_memmap_cacheattr_wt_strict = 0x30000030;
+_memmap_cacheattr_bp_strict = 0x40000040;
+_memmap_cacheattr_wb_allvalid = 0x14444414;
+_memmap_cacheattr_wt_allvalid = 0x34444434;
+_memmap_cacheattr_bp_allvalid = 0x44444444;
+_memmap_region_map = 0x00000082;
+PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
+
+SECTIONS
+{
+
+  .DispatchVector.text : ALIGN(4)
+  {
+    _DispatchVector_text_start = ABSOLUTE(.);
+    KEEP (*(.DispatchVector.text))
+    . = ALIGN (4);
+    _DispatchVector_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .ResetVector.text : ALIGN(4)
+  {
+    _ResetVector_text_start = ABSOLUTE(.);
+    *(.ResetVector.text)
+    . = ALIGN (4);
+    _ResetVector_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .ResetHandler.text : ALIGN(4)
+  {
+    _ResetHandler_text_start = ABSOLUTE(.);
+    *(.ResetHandler.literal .ResetHandler.text)
+    . = ALIGN (4);
+    _ResetHandler_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .DispatchHandler.text : ALIGN(4)
+  {
+    _DispatchHandler_text_start = ABSOLUTE(.);
+    *(.DispatchHandler.literal .DispatchHandler.text)
+    . = ALIGN (4);
+    _DispatchHandler_text_end = ABSOLUTE(.);
+    _memmap_seg_sram0_end = ALIGN(0x8);
+  } >sram0_seg :sram0_phdr
+
+
+  .sram.rodata : ALIGN(4)
+  {
+    _sram_rodata_start = ABSOLUTE(.);
+    *(.sram.rodata)
+    . = ALIGN (4);
+    _sram_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.rodata : ALIGN(4)
+  {
+    _clib_rodata_start = ABSOLUTE(.);
+    *(.clib.rodata)
+    . = ALIGN (4);
+    _clib_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.rodata : ALIGN(4)
+  {
+    _rtos_rodata_start = ABSOLUTE(.);
+    *(.rtos.rodata)
+    . = ALIGN (4);
+    _rtos_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rodata : ALIGN(4)
+  {
+    _rodata_start = ABSOLUTE(.);
+    *(.rodata)
+    *(SORT(.rodata.sort.*))
+    KEEP (*(SORT(.rodata.keepsort.*) .rodata.keep.*))
+    *(.rodata.*)
+    *(.gnu.linkonce.r.*)
+    *(.rodata1)
+    __XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
+    KEEP (*(.xt_except_table))
+    KEEP (*(.gcc_except_table))
+    *(.gnu.linkonce.e.*)
+    *(.gnu.version_r)
+    KEEP (*(.eh_frame))
+    /*  C++ constructor and destructor tables, properly ordered:  */
+    KEEP (*crtbegin.o(.ctors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*(.ctors))
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*(.dtors))
+    /*  C++ exception handlers table:  */
+    __XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
+    *(.xt_except_desc)
+    *(.gnu.linkonce.h.*)
+    __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
+    *(.xt_except_desc_end)
+    *(.dynamic)
+    *(.gnu.version_d)
+    . = ALIGN(4);		/* this table MUST be 4-byte aligned */
+    _bss_table_start = ABSOLUTE(.);
+    LONG(_bss_start)
+    LONG(_bss_end)
+    LONG(_dram0_bss_start)
+    LONG(_dram0_bss_end)
+    LONG(_dram1_bss_start)
+    LONG(_dram1_bss_end)
+    LONG(_local_sram_bss_start)
+    LONG(_local_sram_bss_end)
+    _bss_table_end = ABSOLUTE(.);
+    . = ALIGN (4);
+    _rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .sram.text : ALIGN(4)
+  {
+    _sram_text_start = ABSOLUTE(.);
+    *(.sram.literal .sram.text)
+    . = ALIGN (4);
+    _sram_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .text : ALIGN(4)
+  {
+    _stext = .;
+    _text_start = ABSOLUTE(.);
+    *(.entry.text)
+    *(.init.literal)
+    KEEP(*(.init))
+    *(.literal.sort.* SORT(.text.sort.*))
+    KEEP (*(.literal.keepsort.* SORT(.text.keepsort.*) .literal.keep.* .text.keep.* .literal.*personality* .text.*personality*))
+    *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
+    *(.fini.literal)
+    KEEP(*(.fini))
+    *(.gnu.version)
+    . = ALIGN (4);
+    _text_end = ABSOLUTE(.);
+    _etext = .;
+  } >sram1_seg :sram1_phdr
+
+  .clib.text : ALIGN(4)
+  {
+    _clib_text_start = ABSOLUTE(.);
+    *(.clib.literal .clib.text)
+    . = ALIGN (4);
+    _clib_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.text : ALIGN(4)
+  {
+    _rtos_text_start = ABSOLUTE(.);
+    *(.rtos.literal .rtos.text)
+    . = ALIGN (4);
+    _rtos_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.data : ALIGN(4)
+  {
+    _clib_data_start = ABSOLUTE(.);
+    *(.clib.data)
+    . = ALIGN (4);
+    _clib_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.percpu.data : ALIGN(4)
+  {
+    _clib_percpu_data_start = ABSOLUTE(.);
+    *(.clib.percpu.data)
+    . = ALIGN (4);
+    _clib_percpu_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.percpu.data : ALIGN(4)
+  {
+    _rtos_percpu_data_start = ABSOLUTE(.);
+    *(.rtos.percpu.data)
+    . = ALIGN (4);
+    _rtos_percpu_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.data : ALIGN(4)
+  {
+    _rtos_data_start = ABSOLUTE(.);
+    *(.rtos.data)
+    . = ALIGN (4);
+    _rtos_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .sram.data : ALIGN(4)
+  {
+    _sram_data_start = ABSOLUTE(.);
+    *(.sram.data)
+    . = ALIGN (4);
+    _sram_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .data : ALIGN(4)
+  {
+    _data_start = ABSOLUTE(.);
+    *(.data)
+    *(SORT(.data.sort.*))
+    KEEP (*(SORT(.data.keepsort.*) .data.keep.*))
+    *(.data.*)
+    *(.gnu.linkonce.d.*)
+    KEEP(*(.gnu.linkonce.d.*personality*))
+    *(.data1)
+    *(.sdata)
+    *(.sdata.*)
+    *(.gnu.linkonce.s.*)
+    *(.sdata2)
+    *(.sdata2.*)
+    *(.gnu.linkonce.s2.*)
+    KEEP(*(.jcr))
+    *(__llvm_prf_cnts)
+    *(__llvm_prf_data)
+    *(__llvm_prf_vnds)
+    . = ALIGN (4);
+    _data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  __llvm_prf_names : ALIGN(4)
+  {
+    __llvm_prf_names_start = ABSOLUTE(.);
+    *(__llvm_prf_names)
+    . = ALIGN (4);
+    __llvm_prf_names_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _bss_start = ABSOLUTE(.);
+    *(.dynsbss)
+    *(.sbss)
+    *(.sbss.*)
+    *(.gnu.linkonce.sb.*)
+    *(.scommon)
+    *(.sbss2)
+    *(.sbss2.*)
+    *(.gnu.linkonce.sb2.*)
+    *(.dynbss)
+    *(.bss)
+    *(SORT(.bss.sort.*))
+    KEEP (*(SORT(.bss.keepsort.*) .bss.keep.*))
+    *(.bss.*)
+    *(.gnu.linkonce.b.*)
+    *(COMMON)
+    *(.clib.bss)
+    *(.clib.percpu.bss)
+    *(.rtos.percpu.bss)
+    *(.rtos.bss)
+    *(.sram.bss)
+    *(.debug.bss)
+    . = ALIGN (8);
+    _bss_end = ABSOLUTE(.);
+    _end = ALIGN(0x8);
+    PROVIDE(end = ALIGN(0x8));
+    _memmap_seg_sram1_end = ALIGN(0x8);
+  } >sram1_seg :sram1_bss_phdr
+
+  _heap_sentry = 0x21000000;
+  _memmap_mem_sram_max = ABSOLUTE(.);
+
+  .dram0.rodata : ALIGN(4)
+  {
+    _dram0_rodata_start = ABSOLUTE(.);
+    *(.dram0.rodata)
+    . = ALIGN (4);
+    _dram0_rodata_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.data : ALIGN(4)
+  {
+    _dram0_data_start = ABSOLUTE(.);
+    *(.dram0.data)
+    . = ALIGN (4);
+    _dram0_data_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dram0_bss_start = ABSOLUTE(.);
+    *(.dram0.bss)
+    *(.dram0_user.bss)
+    . = ALIGN (8);
+    _dram0_bss_end = ABSOLUTE(.);
+    _memmap_seg_dram0_0_end = ALIGN(0x8);
+  } >dram0_0_seg :dram0_0_bss_phdr
+
+  _memmap_mem_dram0_max = ABSOLUTE(.);
+
+  .dram1.rodata : ALIGN(4)
+  {
+    _dram1_rodata_start = ABSOLUTE(.);
+    *(.dram1.rodata)
+    . = ALIGN (4);
+    _dram1_rodata_end = ABSOLUTE(.);
+  } >dram1_0_seg :dram1_0_phdr
+
+  .dram1.data : ALIGN(4)
+  {
+    _dram1_data_start = ABSOLUTE(.);
+    *(.dram1.data)
+    . = ALIGN (4);
+    _dram1_data_end = ABSOLUTE(.);
+  } >dram1_0_seg :dram1_0_phdr
+
+  .dram1.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dram1_bss_start = ABSOLUTE(.);
+    *(.dram1.bss)
+    *(.dram1_user.bss)
+    . = ALIGN (8);
+    _dram1_bss_end = ABSOLUTE(.);
+    _stack_sentry = ALIGN(0x8);
+    _memmap_seg_dram1_0_end = ALIGN(0x8);
+  } >dram1_0_seg :dram1_0_bss_phdr
+
+  PROVIDE(__stack = 0xe01c0000);
+  _isb_default = 0xe01bfe10;
+  _memmap_mem_dram1_max = ABSOLUTE(.);
+
+  .local_sram.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _local_sram_bss_start = ABSOLUTE(.);
+    *(.local_sram.bss)
+    . = ALIGN (8);
+    _local_sram_bss_end = ABSOLUTE(.);
+    _memmap_seg_local_sram_0_end = ALIGN(0x8);
+  } >local_sram_0_seg :local_sram_0_bss_phdr
+
+
+  _memmap_mem_local_sram_max = ABSOLUTE(.);
+
+  .debug  0 :  { *(.debug) }
+  .line  0 :  { *(.line) }
+  .debug_srcinfo  0 :  { *(.debug_srcinfo) }
+  .debug_sfnames  0 :  { *(.debug_sfnames) }
+  .debug_aranges  0 :  { *(.debug_aranges) }
+  .debug_pubnames  0 :  { *(.debug_pubnames) }
+  .debug_info  0 :  { *(.debug_info) }
+  .debug_abbrev  0 :  { *(.debug_abbrev) }
+  .debug_line  0 :  { *(.debug_line) }
+  .debug_frame  0 :  { *(.debug_frame) }
+  .debug_str  0 :  { *(.debug_str) }
+  .debug_loc  0 :  { *(.debug_loc) }
+  .debug_macinfo  0 :  { *(.debug_macinfo) }
+  .debug_weaknames  0 :  { *(.debug_weaknames) }
+  .debug_funcnames  0 :  { *(.debug_funcnames) }
+  .debug_typenames  0 :  { *(.debug_typenames) }
+  .debug_varnames  0 :  { *(.debug_varnames) }
+  .xt.insn 0 :
+  {
+    KEEP (*(.xt.insn))
+    KEEP (*(.gnu.linkonce.x.*))
+  }
+  .xt.prop 0 :
+  {
+    KEEP (*(.xt.prop))
+    KEEP (*(.xt.prop.*))
+    KEEP (*(.gnu.linkonce.prop.*))
+  }
+  .xt.lit 0 :
+  {
+    KEEP (*(.xt.lit))
+    KEEP (*(.xt.lit.*))
+    KEEP (*(.gnu.linkonce.p.*))
+  }
+  .debug.xt.callgraph 0 :
+  {
+    KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
+  }
+}
+

+ 444 - 0
LSP/gdbio_core0_stack_tcm1/ldscripts/elf32xtensa.xn

@@ -0,0 +1,444 @@
+/* This linker script generated from xt-genldscripts.tpp for LSP C:\usr\xtensa\XtDevTools\install\builds\RI-2020.4-win32\q7_check\xtensa-elf\lib\min-rt_0x20_stack_tcm1 */
+/* Linker Script for ld -n */
+MEMORY
+{
+  sram0_seg :                         	org = 0x20000000, len = 0x2000
+  sram1_seg :                         	org = 0x20002000, len = 0xFFE000
+  dram0_0_seg :                       	org = 0xE0180000, len = 0x20000
+  dram1_0_seg :                       	org = 0xE01A0000, len = 0x20000
+  local_sram_0_seg :                  	org = 0xFFA00000, len = 0x180000
+}
+
+PHDRS
+{
+  sram0_phdr PT_LOAD;
+  sram1_phdr PT_LOAD;
+  sram1_bss_phdr PT_LOAD;
+  dram0_0_phdr PT_LOAD;
+  dram0_0_bss_phdr PT_LOAD;
+  dram1_0_phdr PT_LOAD;
+  dram1_0_bss_phdr PT_LOAD;
+  local_sram_0_phdr PT_LOAD;
+  local_sram_0_bss_phdr PT_LOAD;
+}
+
+
+/*  Default entry point:  */
+ENTRY(_ResetVector)
+
+
+/*  Memory boundary addresses:  */
+_memmap_mem_sram_start = 0x20000000;
+_memmap_mem_sram_end   = 0x21000000;
+_memmap_mem_dram0_start = 0xe0180000;
+_memmap_mem_dram0_end   = 0xe01a0000;
+_memmap_mem_dram1_start = 0xe01a0000;
+_memmap_mem_dram1_end   = 0xe01c0000;
+_memmap_mem_local_sram_start = 0xffa00000;
+_memmap_mem_local_sram_end   = 0xffb80000;
+
+/*  Memory segment boundary addresses:  */
+_memmap_seg_sram0_start = 0x20000000;
+_memmap_seg_sram0_max   = 0x20002000;
+_memmap_seg_sram1_start = 0x20002000;
+_memmap_seg_sram1_max   = 0x21000000;
+_memmap_seg_dram0_0_start = 0xe0180000;
+_memmap_seg_dram0_0_max   = 0xe01a0000;
+_memmap_seg_dram1_0_start = 0xe01a0000;
+_memmap_seg_dram1_0_max   = 0xe01c0000;
+_memmap_seg_local_sram_0_start = 0xffa00000;
+_memmap_seg_local_sram_0_max   = 0xffb80000;
+
+_rom_store_table = 0;
+PROVIDE(_memmap_reset_vector = 0x20000000);
+PROVIDE(_memmap_vecbase_reset = 0x20000000);
+/* Various memory-map dependent cache attribute settings: */
+_memmap_cacheattr_wb_base = 0x10000010;
+_memmap_cacheattr_wt_base = 0x30000030;
+_memmap_cacheattr_bp_base = 0x40000040;
+_memmap_cacheattr_unused_mask = 0x0FFFFF0F;
+_memmap_cacheattr_wb_trapnull = 0x14444410;
+_memmap_cacheattr_wba_trapnull = 0x14444410;
+_memmap_cacheattr_wbna_trapnull = 0x24444420;
+_memmap_cacheattr_wt_trapnull = 0x34444430;
+_memmap_cacheattr_bp_trapnull = 0x44444440;
+_memmap_cacheattr_wb_strict = 0x10000010;
+_memmap_cacheattr_wt_strict = 0x30000030;
+_memmap_cacheattr_bp_strict = 0x40000040;
+_memmap_cacheattr_wb_allvalid = 0x14444414;
+_memmap_cacheattr_wt_allvalid = 0x34444434;
+_memmap_cacheattr_bp_allvalid = 0x44444444;
+_memmap_region_map = 0x00000082;
+PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
+
+SECTIONS
+{
+
+  .DispatchVector.text : ALIGN(4)
+  {
+    _DispatchVector_text_start = ABSOLUTE(.);
+    KEEP (*(.DispatchVector.text))
+    . = ALIGN (4);
+    _DispatchVector_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .ResetVector.text : ALIGN(4)
+  {
+    _ResetVector_text_start = ABSOLUTE(.);
+    *(.ResetVector.text)
+    . = ALIGN (4);
+    _ResetVector_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .ResetHandler.text : ALIGN(4)
+  {
+    _ResetHandler_text_start = ABSOLUTE(.);
+    *(.ResetHandler.literal .ResetHandler.text)
+    . = ALIGN (4);
+    _ResetHandler_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .DispatchHandler.text : ALIGN(4)
+  {
+    _DispatchHandler_text_start = ABSOLUTE(.);
+    *(.DispatchHandler.literal .DispatchHandler.text)
+    . = ALIGN (4);
+    _DispatchHandler_text_end = ABSOLUTE(.);
+    _memmap_seg_sram0_end = ALIGN(0x8);
+  } >sram0_seg :sram0_phdr
+
+
+  .sram.rodata : ALIGN(4)
+  {
+    _sram_rodata_start = ABSOLUTE(.);
+    *(.sram.rodata)
+    . = ALIGN (4);
+    _sram_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.rodata : ALIGN(4)
+  {
+    _clib_rodata_start = ABSOLUTE(.);
+    *(.clib.rodata)
+    . = ALIGN (4);
+    _clib_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.rodata : ALIGN(4)
+  {
+    _rtos_rodata_start = ABSOLUTE(.);
+    *(.rtos.rodata)
+    . = ALIGN (4);
+    _rtos_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rodata : ALIGN(4)
+  {
+    _rodata_start = ABSOLUTE(.);
+    *(.rodata)
+    *(SORT(.rodata.sort.*))
+    KEEP (*(SORT(.rodata.keepsort.*) .rodata.keep.*))
+    *(.rodata.*)
+    *(.gnu.linkonce.r.*)
+    *(.rodata1)
+    __XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
+    KEEP (*(.xt_except_table))
+    KEEP (*(.gcc_except_table))
+    *(.gnu.linkonce.e.*)
+    *(.gnu.version_r)
+    KEEP (*(.eh_frame))
+    /*  C++ constructor and destructor tables, properly ordered:  */
+    KEEP (*crtbegin.o(.ctors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*(.ctors))
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*(.dtors))
+    /*  C++ exception handlers table:  */
+    __XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
+    *(.xt_except_desc)
+    *(.gnu.linkonce.h.*)
+    __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
+    *(.xt_except_desc_end)
+    *(.dynamic)
+    *(.gnu.version_d)
+    . = ALIGN(4);		/* this table MUST be 4-byte aligned */
+    _bss_table_start = ABSOLUTE(.);
+    LONG(_bss_start)
+    LONG(_bss_end)
+    LONG(_dram0_bss_start)
+    LONG(_dram0_bss_end)
+    LONG(_dram1_bss_start)
+    LONG(_dram1_bss_end)
+    LONG(_local_sram_bss_start)
+    LONG(_local_sram_bss_end)
+    _bss_table_end = ABSOLUTE(.);
+    . = ALIGN (4);
+    _rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .sram.text : ALIGN(4)
+  {
+    _sram_text_start = ABSOLUTE(.);
+    *(.sram.literal .sram.text)
+    . = ALIGN (4);
+    _sram_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .text : ALIGN(4)
+  {
+    _stext = .;
+    _text_start = ABSOLUTE(.);
+    *(.entry.text)
+    *(.init.literal)
+    KEEP(*(.init))
+    *(.literal.sort.* SORT(.text.sort.*))
+    KEEP (*(.literal.keepsort.* SORT(.text.keepsort.*) .literal.keep.* .text.keep.* .literal.*personality* .text.*personality*))
+    *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
+    *(.fini.literal)
+    KEEP(*(.fini))
+    *(.gnu.version)
+    . = ALIGN (4);
+    _text_end = ABSOLUTE(.);
+    _etext = .;
+  } >sram1_seg :sram1_phdr
+
+  .clib.text : ALIGN(4)
+  {
+    _clib_text_start = ABSOLUTE(.);
+    *(.clib.literal .clib.text)
+    . = ALIGN (4);
+    _clib_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.text : ALIGN(4)
+  {
+    _rtos_text_start = ABSOLUTE(.);
+    *(.rtos.literal .rtos.text)
+    . = ALIGN (4);
+    _rtos_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.data : ALIGN(4)
+  {
+    _clib_data_start = ABSOLUTE(.);
+    *(.clib.data)
+    . = ALIGN (4);
+    _clib_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.percpu.data : ALIGN(4)
+  {
+    _clib_percpu_data_start = ABSOLUTE(.);
+    *(.clib.percpu.data)
+    . = ALIGN (4);
+    _clib_percpu_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.percpu.data : ALIGN(4)
+  {
+    _rtos_percpu_data_start = ABSOLUTE(.);
+    *(.rtos.percpu.data)
+    . = ALIGN (4);
+    _rtos_percpu_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.data : ALIGN(4)
+  {
+    _rtos_data_start = ABSOLUTE(.);
+    *(.rtos.data)
+    . = ALIGN (4);
+    _rtos_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .sram.data : ALIGN(4)
+  {
+    _sram_data_start = ABSOLUTE(.);
+    *(.sram.data)
+    . = ALIGN (4);
+    _sram_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .data : ALIGN(4)
+  {
+    _data_start = ABSOLUTE(.);
+    *(.data)
+    *(SORT(.data.sort.*))
+    KEEP (*(SORT(.data.keepsort.*) .data.keep.*))
+    *(.data.*)
+    *(.gnu.linkonce.d.*)
+    KEEP(*(.gnu.linkonce.d.*personality*))
+    *(.data1)
+    *(.sdata)
+    *(.sdata.*)
+    *(.gnu.linkonce.s.*)
+    *(.sdata2)
+    *(.sdata2.*)
+    *(.gnu.linkonce.s2.*)
+    KEEP(*(.jcr))
+    *(__llvm_prf_cnts)
+    *(__llvm_prf_data)
+    *(__llvm_prf_vnds)
+    . = ALIGN (4);
+    _data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  __llvm_prf_names : ALIGN(4)
+  {
+    __llvm_prf_names_start = ABSOLUTE(.);
+    *(__llvm_prf_names)
+    . = ALIGN (4);
+    __llvm_prf_names_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _bss_start = ABSOLUTE(.);
+    *(.dynsbss)
+    *(.sbss)
+    *(.sbss.*)
+    *(.gnu.linkonce.sb.*)
+    *(.scommon)
+    *(.sbss2)
+    *(.sbss2.*)
+    *(.gnu.linkonce.sb2.*)
+    *(.dynbss)
+    *(.bss)
+    *(SORT(.bss.sort.*))
+    KEEP (*(SORT(.bss.keepsort.*) .bss.keep.*))
+    *(.bss.*)
+    *(.gnu.linkonce.b.*)
+    *(COMMON)
+    *(.clib.bss)
+    *(.clib.percpu.bss)
+    *(.rtos.percpu.bss)
+    *(.rtos.bss)
+    *(.sram.bss)
+    *(.debug.bss)
+    . = ALIGN (8);
+    _bss_end = ABSOLUTE(.);
+    _end = ALIGN(0x8);
+    PROVIDE(end = ALIGN(0x8));
+    _memmap_seg_sram1_end = ALIGN(0x8);
+  } >sram1_seg :sram1_bss_phdr
+
+  _heap_sentry = 0x21000000;
+  _memmap_mem_sram_max = ABSOLUTE(.);
+
+  .dram0.rodata : ALIGN(4)
+  {
+    _dram0_rodata_start = ABSOLUTE(.);
+    *(.dram0.rodata)
+    . = ALIGN (4);
+    _dram0_rodata_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.data : ALIGN(4)
+  {
+    _dram0_data_start = ABSOLUTE(.);
+    *(.dram0.data)
+    . = ALIGN (4);
+    _dram0_data_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dram0_bss_start = ABSOLUTE(.);
+    *(.dram0.bss)
+    *(.dram0_user.bss)
+    . = ALIGN (8);
+    _dram0_bss_end = ABSOLUTE(.);
+    _memmap_seg_dram0_0_end = ALIGN(0x8);
+  } >dram0_0_seg :dram0_0_bss_phdr
+
+  _memmap_mem_dram0_max = ABSOLUTE(.);
+
+  .dram1.rodata : ALIGN(4)
+  {
+    _dram1_rodata_start = ABSOLUTE(.);
+    *(.dram1.rodata)
+    . = ALIGN (4);
+    _dram1_rodata_end = ABSOLUTE(.);
+  } >dram1_0_seg :dram1_0_phdr
+
+  .dram1.data : ALIGN(4)
+  {
+    _dram1_data_start = ABSOLUTE(.);
+    *(.dram1.data)
+    . = ALIGN (4);
+    _dram1_data_end = ABSOLUTE(.);
+  } >dram1_0_seg :dram1_0_phdr
+
+  .dram1.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dram1_bss_start = ABSOLUTE(.);
+    *(.dram1.bss)
+    *(.dram1_user.bss)
+    . = ALIGN (8);
+    _dram1_bss_end = ABSOLUTE(.);
+    _stack_sentry = ALIGN(0x8);
+    _memmap_seg_dram1_0_end = ALIGN(0x8);
+  } >dram1_0_seg :dram1_0_bss_phdr
+
+  PROVIDE(__stack = 0xe01c0000);
+  _isb_default = 0xe01bfe10;
+  _memmap_mem_dram1_max = ABSOLUTE(.);
+
+  .local_sram.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _local_sram_bss_start = ABSOLUTE(.);
+    *(.local_sram.bss)
+    . = ALIGN (8);
+    _local_sram_bss_end = ABSOLUTE(.);
+    _memmap_seg_local_sram_0_end = ALIGN(0x8);
+  } >local_sram_0_seg :local_sram_0_bss_phdr
+
+
+  _memmap_mem_local_sram_max = ABSOLUTE(.);
+
+  .debug  0 :  { *(.debug) }
+  .line  0 :  { *(.line) }
+  .debug_srcinfo  0 :  { *(.debug_srcinfo) }
+  .debug_sfnames  0 :  { *(.debug_sfnames) }
+  .debug_aranges  0 :  { *(.debug_aranges) }
+  .debug_pubnames  0 :  { *(.debug_pubnames) }
+  .debug_info  0 :  { *(.debug_info) }
+  .debug_abbrev  0 :  { *(.debug_abbrev) }
+  .debug_line  0 :  { *(.debug_line) }
+  .debug_frame  0 :  { *(.debug_frame) }
+  .debug_str  0 :  { *(.debug_str) }
+  .debug_loc  0 :  { *(.debug_loc) }
+  .debug_macinfo  0 :  { *(.debug_macinfo) }
+  .debug_weaknames  0 :  { *(.debug_weaknames) }
+  .debug_funcnames  0 :  { *(.debug_funcnames) }
+  .debug_typenames  0 :  { *(.debug_typenames) }
+  .debug_varnames  0 :  { *(.debug_varnames) }
+  .xt.insn 0 :
+  {
+    KEEP (*(.xt.insn))
+    KEEP (*(.gnu.linkonce.x.*))
+  }
+  .xt.prop 0 :
+  {
+    KEEP (*(.xt.prop))
+    KEEP (*(.xt.prop.*))
+    KEEP (*(.gnu.linkonce.prop.*))
+  }
+  .xt.lit 0 :
+  {
+    KEEP (*(.xt.lit))
+    KEEP (*(.xt.lit.*))
+    KEEP (*(.gnu.linkonce.p.*))
+  }
+  .debug.xt.callgraph 0 :
+  {
+    KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
+  }
+}
+

+ 61 - 0
LSP/gdbio_core0_stack_tcm1/ldscripts/elf32xtensa.xr

@@ -0,0 +1,61 @@
+/* This linker script generated from xt-genldscripts.tpp for LSP C:\usr\xtensa\XtDevTools\install\builds\RI-2020.4-win32\q7_check\xtensa-elf\lib\min-rt_0x20_stack_tcm1 */
+/* Linker Script for ld -r or ld -i */
+
+
+SECTIONS
+{
+
+  .text 0 :
+  {
+    *(.literal .text)
+  }
+
+  .bss 0 :
+  {
+    *(.dynsbss)
+    *(.sbss)
+    *(.scommon)
+    *(.dynbss)
+    *(.bss)
+    *(COMMON)
+  }
+  .debug  0 :  { *(.debug) }
+  .line  0 :  { *(.line) }
+  .debug_srcinfo  0 :  { *(.debug_srcinfo) }
+  .debug_sfnames  0 :  { *(.debug_sfnames) }
+  .debug_aranges  0 :  { *(.debug_aranges) }
+  .debug_pubnames  0 :  { *(.debug_pubnames) }
+  .debug_info  0 :  { *(.debug_info) }
+  .debug_abbrev  0 :  { *(.debug_abbrev) }
+  .debug_line  0 :  { *(.debug_line) }
+  .debug_frame  0 :  { *(.debug_frame) }
+  .debug_str  0 :  { *(.debug_str) }
+  .debug_loc  0 :  { *(.debug_loc) }
+  .debug_macinfo  0 :  { *(.debug_macinfo) }
+  .debug_weaknames  0 :  { *(.debug_weaknames) }
+  .debug_funcnames  0 :  { *(.debug_funcnames) }
+  .debug_typenames  0 :  { *(.debug_typenames) }
+  .debug_varnames  0 :  { *(.debug_varnames) }
+  .xt.insn 0 :
+  {
+    KEEP (*(.xt.insn))
+    KEEP (*(.gnu.linkonce.x.*))
+  }
+  .xt.prop 0 :
+  {
+    KEEP (*(.xt.prop))
+    KEEP (*(.xt.prop.*))
+    KEEP (*(.gnu.linkonce.prop.*))
+  }
+  .xt.lit 0 :
+  {
+    KEEP (*(.xt.lit))
+    KEEP (*(.xt.lit.*))
+    KEEP (*(.gnu.linkonce.p.*))
+  }
+  .debug.xt.callgraph 0 :
+  {
+    KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
+  }
+}
+

+ 61 - 0
LSP/gdbio_core0_stack_tcm1/ldscripts/elf32xtensa.xu

@@ -0,0 +1,61 @@
+/* This linker script generated from xt-genldscripts.tpp for LSP C:\usr\xtensa\XtDevTools\install\builds\RI-2020.4-win32\q7_check\xtensa-elf\lib\min-rt_0x20_stack_tcm1 */
+/* Linker Script for ld -Ur */
+
+
+SECTIONS
+{
+
+  .text 0 :
+  {
+    *(.literal .text)
+  }
+
+  .bss 0 :
+  {
+    *(.dynsbss)
+    *(.sbss)
+    *(.scommon)
+    *(.dynbss)
+    *(.bss)
+    *(COMMON)
+  }
+  .debug  0 :  { *(.debug) }
+  .line  0 :  { *(.line) }
+  .debug_srcinfo  0 :  { *(.debug_srcinfo) }
+  .debug_sfnames  0 :  { *(.debug_sfnames) }
+  .debug_aranges  0 :  { *(.debug_aranges) }
+  .debug_pubnames  0 :  { *(.debug_pubnames) }
+  .debug_info  0 :  { *(.debug_info) }
+  .debug_abbrev  0 :  { *(.debug_abbrev) }
+  .debug_line  0 :  { *(.debug_line) }
+  .debug_frame  0 :  { *(.debug_frame) }
+  .debug_str  0 :  { *(.debug_str) }
+  .debug_loc  0 :  { *(.debug_loc) }
+  .debug_macinfo  0 :  { *(.debug_macinfo) }
+  .debug_weaknames  0 :  { *(.debug_weaknames) }
+  .debug_funcnames  0 :  { *(.debug_funcnames) }
+  .debug_typenames  0 :  { *(.debug_typenames) }
+  .debug_varnames  0 :  { *(.debug_varnames) }
+  .xt.insn 0 :
+  {
+    KEEP (*(.xt.insn))
+    KEEP (*(.gnu.linkonce.x.*))
+  }
+  .xt.prop 0 :
+  {
+    KEEP (*(.xt.prop))
+    KEEP (*(.xt.prop.*))
+    KEEP (*(.gnu.linkonce.prop.*))
+  }
+  .xt.lit 0 :
+  {
+    KEEP (*(.xt.lit))
+    KEEP (*(.xt.lit.*))
+    KEEP (*(.gnu.linkonce.p.*))
+  }
+  .debug.xt.callgraph 0 :
+  {
+    KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
+  }
+}
+

BIN
LSP/gdbio_core0_stack_tcm1/ldscripts/libminrt.a


BIN
LSP/gdbio_core0_stack_tcm1/libminrt.a


+ 79 - 0
LSP/gdbio_core0_stack_tcm1/memmap.xmm

@@ -0,0 +1,79 @@
+//  Memory map file to generate linker scripts for programs to run on
+//  most targets (that have the OCD option); allows I/O through the host
+//  debugger when being debugged using GDB (via the Xtensa OCD daemon).
+
+// Customer ID=16470; Build=0x8e648; Copyright (c) 2004-2015 Cadence Design Systems, Inc.
+//
+// Permission is hereby granted, free of charge, to any person obtaining
+// a copy of this software and associated documentation files (the
+// "Software"), to deal in the Software without restriction, including
+// without limitation the rights to use, copy, modify, merge, publish,
+// distribute, sublicense, and/or sell copies of the Software, and to
+// permit persons to whom the Software is furnished to do so, subject to
+// the following conditions:
+//
+// The above copyright notice and this permission notice shall be included
+// in all copies or substantial portions of the Software.
+//
+// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+// EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+// IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+// CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+// TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+// SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+
+//  Place stack in local RAM:
+PLACE SECTIONS(STACK) WITH_SECTION(.dram1.bss)
+// A memory map is a sequence of memory descriptions and
+// optional parameter assignments.
+//
+// Each memory description has the following format:
+//   BEGIN <name>
+//     <addr> [,<paddr>] : <mem-type> : <mem-name> : <size> [,<psize>]
+//                       : [writable] [,executable] [,device] ;
+//     <segment>*
+//   END <name>
+//
+// where each <segment> description has the following format:
+//     <seg-name> : F|C : <start-addr> - <end-addr> [ : STACK ] [ : HEAP ]
+//                : <section-name>* ;
+//
+// Each parameter assignment is a keyword/value pair in the following format:
+//   <keyword> = <value>                (no spaces in <value>)
+// or
+//   <keyword> = "<value>"              (spaces allowed in <value>)
+//
+// The following primitives are also defined:
+//   PLACE SECTIONS( <section-name>* ) { WITH_SECTION(<section-name>)
+//                                       | IN_SEGMENT(<seg-name>) }
+//
+//   NOLOAD <section-name1> [ <section-name2> ... ]
+//
+// Please refer to the Xtensa LSP Reference Manual for more details.
+//
+VECSELECT=1
+VECRESET=0x20000000
+VECBASE= 0x20000000
+
+BEGIN sram
+0x20000000: extra_mem : sram : 0x01000000 : executable, writable ;
+ sram0 : F : 0x20000000 - 0x20001fff : .DispatchVector.text .ResetVector.text .ResetHandler.literal .ResetHandler.text .DispatchHandler.literal .DispatchHandler.text;
+ sram1 : C : 0x20002000 - 0x20ffffff :  HEAP : .sram.rodata .clib.rodata .rtos.rodata .rodata .sram.literal .literal .rtos.literal .clib.literal .sram.text .text .clib.text .rtos.text .clib.data .clib.percpu.data .rtos.percpu.data .rtos.data .sram.data .data __llvm_prf_names .clib.bss .clib.percpu.bss .rtos.percpu.bss .rtos.bss .sram.bss .bss .debug.bss;
+ END sram
+
+BEGIN dram0
+0xe0180000: dataRam : dram0 : 0x20000 : writable ;
+ dram0_0 : C : 0xe0180000 - 0xe019ffff :.dram0.rodata .dram0.data .dram0.bss .dram0_user.bss;
+END dram0
+
+BEGIN dram1
+0xe01a0000: dataRam : dram1 : 0x20000 : writable ;
+ dram1_0 : C : 0xe01a0000 - 0xe01bffff :STACK :.dram1.rodata .dram1.data .dram1.bss .dram1_user.bss;
+END dram1
+
+BEGIN local_sram
+0xffa00000: sysram : local_sram :   0x180000: writable ;
+  local_sram_0 : C : 0xffa00000 - 0xffb7ffff :.local_sram.bss ;
+ END local_sram
+

+ 36 - 0
LSP/gdbio_core0_stack_tcm1/specs

@@ -0,0 +1,36 @@
+# Customer ID=16470; Build=0x8e648; Copyright (c) 2001-2015 Cadence Design Systems, Inc.
+#
+# Permission is hereby granted, free of charge, to any person obtaining
+# a copy of this software and associated documentation files (the
+# "Software"), to deal in the Software without restriction, including
+# without limitation the rights to use, copy, modify, merge, publish,
+# distribute, sublicense, and/or sell copies of the Software, and to
+# permit persons to whom the Software is furnished to do so, subject to
+# the following conditions:
+#
+# The above copyright notice and this permission notice shall be included
+# in all copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+# IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+# CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+# TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+# SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+
+
+# The %O suffix on the start and end files indicates that the system's
+# standard suffix for object files (e.g., ".o") should be appended.
+# The %s suffix tells the compiler driver to search for the file in the
+# list of known locations for startfiles.
+
+*startfile:
+crt1-boards%O%s crti%O%s crtbegin%O%s _sharedvectors%O%s _vectors%O%s
+
+*endfile:
+crtend%O%s crtn%O%s
+
+*lib:
+-lc -lgdbio -lc -lhandler-reset -lhandlers-board -lgdbio -lhal -lc
+

+ 443 - 0
LSP/gdbio_core1_main_stact_tcm1/ldscripts/elf32xtensa.x

@@ -0,0 +1,443 @@
+/* This linker script generated from xt-genldscripts.tpp for LSP C:\Users\DELL\workspace\CSI_DSP_FW\LSP\min-rt_core1_main_stact_tcm1 */
+/* Linker Script for default link */
+MEMORY
+{
+  sram0_seg :                         	org = 0x24000000, len = 0x2000
+  sram1_seg :                         	org = 0x24002000, len = 0xFD8800
+  dram0_0_seg :                       	org = 0xE0180000, len = 0x7000
+  dram1_0_seg :                       	org = 0xE01A0000, len = 0x7000
+  local_sram_0_seg :                  	org = 0xFFA00000, len = 0x180000
+}
+
+PHDRS
+{
+  sram0_phdr PT_LOAD;
+  sram1_phdr PT_LOAD;
+  sram1_bss_phdr PT_LOAD;
+  dram0_0_phdr PT_LOAD;
+  dram0_0_bss_phdr PT_LOAD;
+  dram1_0_phdr PT_LOAD;
+  dram1_0_bss_phdr PT_LOAD;
+  local_sram_0_phdr PT_LOAD;
+  local_sram_0_bss_phdr PT_LOAD;
+}
+
+
+/*  Default entry point:  */
+ENTRY(_ResetVector)
+
+
+/*  Memory boundary addresses:  */
+_memmap_mem_sram_start = 0x24000000;
+_memmap_mem_sram_end   = 0x25000000;
+_memmap_mem_dram0_start = 0xe0180000;
+_memmap_mem_dram0_end   = 0xe01a0000;
+_memmap_mem_dram1_start = 0xe01a0000;
+_memmap_mem_dram1_end   = 0xe01c0000;
+_memmap_mem_local_sram_start = 0xffa00000;
+_memmap_mem_local_sram_end   = 0xffb80000;
+
+/*  Memory segment boundary addresses:  */
+_memmap_seg_sram0_start = 0x24000000;
+_memmap_seg_sram0_max   = 0x24002000;
+_memmap_seg_sram1_start = 0x24002000;
+_memmap_seg_sram1_max   = 0x24fda800;
+_memmap_seg_dram0_0_start = 0xe0180000;
+_memmap_seg_dram0_0_max   = 0xe0187000;
+_memmap_seg_dram1_0_start = 0xe01a0000;
+_memmap_seg_dram1_0_max   = 0xe01a7000;
+_memmap_seg_local_sram_0_start = 0xffa00000;
+_memmap_seg_local_sram_0_max   = 0xffb80000;
+
+_rom_store_table = 0;
+PROVIDE(_memmap_reset_vector = 0x24000000);
+PROVIDE(_memmap_vecbase_reset = 0x24000000);
+/* Various memory-map dependent cache attribute settings: */
+_memmap_cacheattr_wb_base = 0x10000010;
+_memmap_cacheattr_wt_base = 0x30000030;
+_memmap_cacheattr_bp_base = 0x40000040;
+_memmap_cacheattr_unused_mask = 0x0FFFFF0F;
+_memmap_cacheattr_wb_trapnull = 0x14444411;
+_memmap_cacheattr_wba_trapnull = 0x14444410;
+_memmap_cacheattr_wbna_trapnull = 0x24444420;
+_memmap_cacheattr_wt_trapnull = 0x34444430;
+_memmap_cacheattr_bp_trapnull = 0x44444440;
+_memmap_cacheattr_wb_strict = 0x10000010;
+_memmap_cacheattr_wt_strict = 0x30000030;
+_memmap_cacheattr_bp_strict = 0x40000040;
+_memmap_cacheattr_wb_allvalid = 0x14444414;
+_memmap_cacheattr_wt_allvalid = 0x34444434;
+_memmap_cacheattr_bp_allvalid = 0x44444444;
+_memmap_region_map = 0x00000082;
+PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
+
+SECTIONS
+{
+
+  .DispatchVector.text : ALIGN(4)
+  {
+    _DispatchVector_text_start = ABSOLUTE(.);
+    KEEP (*(.DispatchVector.text))
+    . = ALIGN (4);
+    _DispatchVector_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .ResetVector.text : ALIGN(4)
+  {
+    _ResetVector_text_start = ABSOLUTE(.);
+    *(.ResetVector.text)
+    . = ALIGN (4);
+    _ResetVector_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .ResetHandler.text : ALIGN(4)
+  {
+    _ResetHandler_text_start = ABSOLUTE(.);
+    *(.ResetHandler.literal .ResetHandler.text)
+    . = ALIGN (4);
+    _ResetHandler_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .DispatchHandler.text : ALIGN(4)
+  {
+    _DispatchHandler_text_start = ABSOLUTE(.);
+    *(.DispatchHandler.literal .DispatchHandler.text)
+    . = ALIGN (4);
+    _DispatchHandler_text_end = ABSOLUTE(.);
+    _memmap_seg_sram0_end = ALIGN(0x8);
+  } >sram0_seg :sram0_phdr
+
+
+  .sram.rodata : ALIGN(4)
+  {
+    _sram_rodata_start = ABSOLUTE(.);
+    *(.sram.rodata)
+    . = ALIGN (4);
+    _sram_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.rodata : ALIGN(4)
+  {
+    _clib_rodata_start = ABSOLUTE(.);
+    *(.clib.rodata)
+    . = ALIGN (4);
+    _clib_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.rodata : ALIGN(4)
+  {
+    _rtos_rodata_start = ABSOLUTE(.);
+    *(.rtos.rodata)
+    . = ALIGN (4);
+    _rtos_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rodata : ALIGN(4)
+  {
+    _rodata_start = ABSOLUTE(.);
+    *(.rodata)
+    *(SORT(.rodata.sort.*))
+    KEEP (*(SORT(.rodata.keepsort.*) .rodata.keep.*))
+    *(.rodata.*)
+    *(.gnu.linkonce.r.*)
+    *(.rodata1)
+    __XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
+    KEEP (*(.xt_except_table))
+    KEEP (*(.gcc_except_table))
+    *(.gnu.linkonce.e.*)
+    *(.gnu.version_r)
+    KEEP (*(.eh_frame))
+    /*  C++ constructor and destructor tables, properly ordered:  */
+    KEEP (*crtbegin.o(.ctors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*(.ctors))
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*(.dtors))
+    /*  C++ exception handlers table:  */
+    __XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
+    *(.xt_except_desc)
+    *(.gnu.linkonce.h.*)
+    __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
+    *(.xt_except_desc_end)
+    *(.dynamic)
+    *(.gnu.version_d)
+    . = ALIGN(4);		/* this table MUST be 4-byte aligned */
+    _bss_table_start = ABSOLUTE(.);
+    LONG(_bss_start)
+    LONG(_bss_end)
+    LONG(_dram0_bss_start)
+    LONG(_dram0_bss_end)
+    LONG(_dram1_bss_start)
+    LONG(_dram1_bss_end)
+    LONG(_local_sram_bss_start)
+    LONG(_local_sram_bss_end)
+    _bss_table_end = ABSOLUTE(.);
+    . = ALIGN (4);
+    _rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .sram.text : ALIGN(4)
+  {
+    _sram_text_start = ABSOLUTE(.);
+    *(.sram.literal .sram.text)
+    . = ALIGN (4);
+    _sram_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .text : ALIGN(4)
+  {
+    _stext = .;
+    _text_start = ABSOLUTE(.);
+    *(.entry.text)
+    *(.init.literal)
+    KEEP(*(.init))
+    *(.literal.sort.* SORT(.text.sort.*))
+    KEEP (*(.literal.keepsort.* SORT(.text.keepsort.*) .literal.keep.* .text.keep.* .literal.*personality* .text.*personality*))
+    *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
+    *(.fini.literal)
+    KEEP(*(.fini))
+    *(.gnu.version)
+    . = ALIGN (4);
+    _text_end = ABSOLUTE(.);
+    _etext = .;
+  } >sram1_seg :sram1_phdr
+
+  .clib.text : ALIGN(4)
+  {
+    _clib_text_start = ABSOLUTE(.);
+    *(.clib.literal .clib.text)
+    . = ALIGN (4);
+    _clib_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.text : ALIGN(4)
+  {
+    _rtos_text_start = ABSOLUTE(.);
+    *(.rtos.literal .rtos.text)
+    . = ALIGN (4);
+    _rtos_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.data : ALIGN(4)
+  {
+    _clib_data_start = ABSOLUTE(.);
+    *(.clib.data)
+    . = ALIGN (4);
+    _clib_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.percpu.data : ALIGN(4)
+  {
+    _clib_percpu_data_start = ABSOLUTE(.);
+    *(.clib.percpu.data)
+    . = ALIGN (4);
+    _clib_percpu_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.percpu.data : ALIGN(4)
+  {
+    _rtos_percpu_data_start = ABSOLUTE(.);
+    *(.rtos.percpu.data)
+    . = ALIGN (4);
+    _rtos_percpu_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.data : ALIGN(4)
+  {
+    _rtos_data_start = ABSOLUTE(.);
+    *(.rtos.data)
+    . = ALIGN (4);
+    _rtos_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .sram.data : ALIGN(4)
+  {
+    _sram_data_start = ABSOLUTE(.);
+    *(.sram.data)
+    . = ALIGN (4);
+    _sram_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .data : ALIGN(4)
+  {
+    _data_start = ABSOLUTE(.);
+    *(.data)
+    *(SORT(.data.sort.*))
+    KEEP (*(SORT(.data.keepsort.*) .data.keep.*))
+    *(.data.*)
+    *(.gnu.linkonce.d.*)
+    KEEP(*(.gnu.linkonce.d.*personality*))
+    *(.data1)
+    *(.sdata)
+    *(.sdata.*)
+    *(.gnu.linkonce.s.*)
+    *(.sdata2)
+    *(.sdata2.*)
+    *(.gnu.linkonce.s2.*)
+    KEEP(*(.jcr))
+    *(__llvm_prf_cnts)
+    *(__llvm_prf_data)
+    *(__llvm_prf_vnds)
+    . = ALIGN (4);
+    _data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  __llvm_prf_names : ALIGN(4)
+  {
+    __llvm_prf_names_start = ABSOLUTE(.);
+    *(__llvm_prf_names)
+    . = ALIGN (4);
+    __llvm_prf_names_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _bss_start = ABSOLUTE(.);
+    *(.dynsbss)
+    *(.sbss)
+    *(.sbss.*)
+    *(.gnu.linkonce.sb.*)
+    *(.scommon)
+    *(.sbss2)
+    *(.sbss2.*)
+    *(.gnu.linkonce.sb2.*)
+    *(.dynbss)
+    *(.bss)
+    *(SORT(.bss.sort.*))
+    KEEP (*(SORT(.bss.keepsort.*) .bss.keep.*))
+    *(.bss.*)
+    *(.gnu.linkonce.b.*)
+    *(COMMON)
+    *(.clib.bss)
+    *(.clib.percpu.bss)
+    *(.rtos.percpu.bss)
+    *(.rtos.bss)
+    *(.sram.bss)
+    *(.debug.bss)
+    . = ALIGN (8);
+    _bss_end = ABSOLUTE(.);
+    _end = ALIGN(0x8);
+    PROVIDE(end = ALIGN(0x8));
+    _memmap_seg_sram1_end = ALIGN(0x8);
+  } >sram1_seg :sram1_bss_phdr
+
+  _heap_sentry = 0x24fda800;
+  _memmap_mem_sram_max = ABSOLUTE(.);
+
+  .dram0.rodata : ALIGN(4)
+  {
+    _dram0_rodata_start = ABSOLUTE(.);
+    *(.dram0.rodata)
+    . = ALIGN (4);
+    _dram0_rodata_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.data : ALIGN(4)
+  {
+    _dram0_data_start = ABSOLUTE(.);
+    *(.dram0.data)
+    . = ALIGN (4);
+    _dram0_data_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dram0_bss_start = ABSOLUTE(.);
+    *(.dram0.bss)
+    *(.dram0_user.bss)
+    . = ALIGN (8);
+    _dram0_bss_end = ABSOLUTE(.);
+    _memmap_seg_dram0_0_end = ALIGN(0x8);
+  } >dram0_0_seg :dram0_0_bss_phdr
+
+  _memmap_mem_dram0_max = ABSOLUTE(.);
+
+  .dram1.rodata : ALIGN(4)
+  {
+    _dram1_rodata_start = ABSOLUTE(.);
+    *(.dram1.rodata)
+    . = ALIGN (4);
+    _dram1_rodata_end = ABSOLUTE(.);
+  } >dram1_0_seg :dram1_0_phdr
+
+  .dram1.data : ALIGN(4)
+  {
+    _dram1_data_start = ABSOLUTE(.);
+    *(.dram1.data)
+    . = ALIGN (4);
+    _dram1_data_end = ABSOLUTE(.);
+  } >dram1_0_seg :dram1_0_phdr
+
+  .dram1.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dram1_bss_start = ABSOLUTE(.);
+    *(.dram1.bss)
+    *(.dram1_user.bss)
+    . = ALIGN (8);
+    _dram1_bss_end = ABSOLUTE(.);
+    _stack_sentry = ALIGN(0x8);
+    _memmap_seg_dram1_0_end = ALIGN(0x8);
+  } >dram1_0_seg :dram1_0_bss_phdr
+
+  PROVIDE(__stack = 0xe01a7000);
+  _memmap_mem_dram1_max = ABSOLUTE(.);
+
+  .local_sram.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _local_sram_bss_start = ABSOLUTE(.);
+    *(.local_sram.bss)
+    . = ALIGN (8);
+    _local_sram_bss_end = ABSOLUTE(.);
+    _memmap_seg_local_sram_0_end = ALIGN(0x8);
+  } >local_sram_0_seg :local_sram_0_bss_phdr
+
+
+  _memmap_mem_local_sram_max = ABSOLUTE(.);
+
+  .debug  0 :  { *(.debug) }
+  .line  0 :  { *(.line) }
+  .debug_srcinfo  0 :  { *(.debug_srcinfo) }
+  .debug_sfnames  0 :  { *(.debug_sfnames) }
+  .debug_aranges  0 :  { *(.debug_aranges) }
+  .debug_pubnames  0 :  { *(.debug_pubnames) }
+  .debug_info  0 :  { *(.debug_info) }
+  .debug_abbrev  0 :  { *(.debug_abbrev) }
+  .debug_line  0 :  { *(.debug_line) }
+  .debug_frame  0 :  { *(.debug_frame) }
+  .debug_str  0 :  { *(.debug_str) }
+  .debug_loc  0 :  { *(.debug_loc) }
+  .debug_macinfo  0 :  { *(.debug_macinfo) }
+  .debug_weaknames  0 :  { *(.debug_weaknames) }
+  .debug_funcnames  0 :  { *(.debug_funcnames) }
+  .debug_typenames  0 :  { *(.debug_typenames) }
+  .debug_varnames  0 :  { *(.debug_varnames) }
+  .xt.insn 0 :
+  {
+    KEEP (*(.xt.insn))
+    KEEP (*(.gnu.linkonce.x.*))
+  }
+  .xt.prop 0 :
+  {
+    KEEP (*(.xt.prop))
+    KEEP (*(.xt.prop.*))
+    KEEP (*(.gnu.linkonce.prop.*))
+  }
+  .xt.lit 0 :
+  {
+    KEEP (*(.xt.lit))
+    KEEP (*(.xt.lit.*))
+    KEEP (*(.gnu.linkonce.p.*))
+  }
+  .debug.xt.callgraph 0 :
+  {
+    KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
+  }
+}
+

+ 443 - 0
LSP/gdbio_core1_main_stact_tcm1/ldscripts/elf32xtensa.xbn

@@ -0,0 +1,443 @@
+/* This linker script generated from xt-genldscripts.tpp for LSP C:\Users\DELL\workspace\CSI_DSP_FW\LSP\min-rt_core1_main_stact_tcm1 */
+/* Linker Script for ld -N */
+MEMORY
+{
+  sram0_seg :                         	org = 0x24000000, len = 0x2000
+  sram1_seg :                         	org = 0x24002000, len = 0xFD8800
+  dram0_0_seg :                       	org = 0xE0180000, len = 0x7000
+  dram1_0_seg :                       	org = 0xE01A0000, len = 0x7000
+  local_sram_0_seg :                  	org = 0xFFA00000, len = 0x180000
+}
+
+PHDRS
+{
+  sram0_phdr PT_LOAD;
+  sram1_phdr PT_LOAD;
+  sram1_bss_phdr PT_LOAD;
+  dram0_0_phdr PT_LOAD;
+  dram0_0_bss_phdr PT_LOAD;
+  dram1_0_phdr PT_LOAD;
+  dram1_0_bss_phdr PT_LOAD;
+  local_sram_0_phdr PT_LOAD;
+  local_sram_0_bss_phdr PT_LOAD;
+}
+
+
+/*  Default entry point:  */
+ENTRY(_ResetVector)
+
+
+/*  Memory boundary addresses:  */
+_memmap_mem_sram_start = 0x24000000;
+_memmap_mem_sram_end   = 0x25000000;
+_memmap_mem_dram0_start = 0xe0180000;
+_memmap_mem_dram0_end   = 0xe01a0000;
+_memmap_mem_dram1_start = 0xe01a0000;
+_memmap_mem_dram1_end   = 0xe01c0000;
+_memmap_mem_local_sram_start = 0xffa00000;
+_memmap_mem_local_sram_end   = 0xffb80000;
+
+/*  Memory segment boundary addresses:  */
+_memmap_seg_sram0_start = 0x24000000;
+_memmap_seg_sram0_max   = 0x24002000;
+_memmap_seg_sram1_start = 0x24002000;
+_memmap_seg_sram1_max   = 0x24fda800;
+_memmap_seg_dram0_0_start = 0xe0180000;
+_memmap_seg_dram0_0_max   = 0xe0187000;
+_memmap_seg_dram1_0_start = 0xe01a0000;
+_memmap_seg_dram1_0_max   = 0xe01a7000;
+_memmap_seg_local_sram_0_start = 0xffa00000;
+_memmap_seg_local_sram_0_max   = 0xffb80000;
+
+_rom_store_table = 0;
+PROVIDE(_memmap_reset_vector = 0x24000000);
+PROVIDE(_memmap_vecbase_reset = 0x24000000);
+/* Various memory-map dependent cache attribute settings: */
+_memmap_cacheattr_wb_base = 0x10000010;
+_memmap_cacheattr_wt_base = 0x30000030;
+_memmap_cacheattr_bp_base = 0x40000040;
+_memmap_cacheattr_unused_mask = 0x0FFFFF0F;
+_memmap_cacheattr_wb_trapnull = 0x14444410;
+_memmap_cacheattr_wba_trapnull = 0x14444410;
+_memmap_cacheattr_wbna_trapnull = 0x24444420;
+_memmap_cacheattr_wt_trapnull = 0x34444430;
+_memmap_cacheattr_bp_trapnull = 0x44444440;
+_memmap_cacheattr_wb_strict = 0x10000010;
+_memmap_cacheattr_wt_strict = 0x30000030;
+_memmap_cacheattr_bp_strict = 0x40000040;
+_memmap_cacheattr_wb_allvalid = 0x14444414;
+_memmap_cacheattr_wt_allvalid = 0x34444434;
+_memmap_cacheattr_bp_allvalid = 0x44444444;
+_memmap_region_map = 0x00000082;
+PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
+
+SECTIONS
+{
+
+  .DispatchVector.text : ALIGN(4)
+  {
+    _DispatchVector_text_start = ABSOLUTE(.);
+    KEEP (*(.DispatchVector.text))
+    . = ALIGN (4);
+    _DispatchVector_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .ResetVector.text : ALIGN(4)
+  {
+    _ResetVector_text_start = ABSOLUTE(.);
+    *(.ResetVector.text)
+    . = ALIGN (4);
+    _ResetVector_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .ResetHandler.text : ALIGN(4)
+  {
+    _ResetHandler_text_start = ABSOLUTE(.);
+    *(.ResetHandler.literal .ResetHandler.text)
+    . = ALIGN (4);
+    _ResetHandler_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .DispatchHandler.text : ALIGN(4)
+  {
+    _DispatchHandler_text_start = ABSOLUTE(.);
+    *(.DispatchHandler.literal .DispatchHandler.text)
+    . = ALIGN (4);
+    _DispatchHandler_text_end = ABSOLUTE(.);
+    _memmap_seg_sram0_end = ALIGN(0x8);
+  } >sram0_seg :sram0_phdr
+
+
+  .sram.rodata : ALIGN(4)
+  {
+    _sram_rodata_start = ABSOLUTE(.);
+    *(.sram.rodata)
+    . = ALIGN (4);
+    _sram_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.rodata : ALIGN(4)
+  {
+    _clib_rodata_start = ABSOLUTE(.);
+    *(.clib.rodata)
+    . = ALIGN (4);
+    _clib_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.rodata : ALIGN(4)
+  {
+    _rtos_rodata_start = ABSOLUTE(.);
+    *(.rtos.rodata)
+    . = ALIGN (4);
+    _rtos_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rodata : ALIGN(4)
+  {
+    _rodata_start = ABSOLUTE(.);
+    *(.rodata)
+    *(SORT(.rodata.sort.*))
+    KEEP (*(SORT(.rodata.keepsort.*) .rodata.keep.*))
+    *(.rodata.*)
+    *(.gnu.linkonce.r.*)
+    *(.rodata1)
+    __XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
+    KEEP (*(.xt_except_table))
+    KEEP (*(.gcc_except_table))
+    *(.gnu.linkonce.e.*)
+    *(.gnu.version_r)
+    KEEP (*(.eh_frame))
+    /*  C++ constructor and destructor tables, properly ordered:  */
+    KEEP (*crtbegin.o(.ctors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*(.ctors))
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*(.dtors))
+    /*  C++ exception handlers table:  */
+    __XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
+    *(.xt_except_desc)
+    *(.gnu.linkonce.h.*)
+    __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
+    *(.xt_except_desc_end)
+    *(.dynamic)
+    *(.gnu.version_d)
+    . = ALIGN(4);		/* this table MUST be 4-byte aligned */
+    _bss_table_start = ABSOLUTE(.);
+    LONG(_bss_start)
+    LONG(_bss_end)
+    LONG(_dram0_bss_start)
+    LONG(_dram0_bss_end)
+    LONG(_dram1_bss_start)
+    LONG(_dram1_bss_end)
+    LONG(_local_sram_bss_start)
+    LONG(_local_sram_bss_end)
+    _bss_table_end = ABSOLUTE(.);
+    . = ALIGN (4);
+    _rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .sram.text : ALIGN(4)
+  {
+    _sram_text_start = ABSOLUTE(.);
+    *(.sram.literal .sram.text)
+    . = ALIGN (4);
+    _sram_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .text : ALIGN(4)
+  {
+    _stext = .;
+    _text_start = ABSOLUTE(.);
+    *(.entry.text)
+    *(.init.literal)
+    KEEP(*(.init))
+    *(.literal.sort.* SORT(.text.sort.*))
+    KEEP (*(.literal.keepsort.* SORT(.text.keepsort.*) .literal.keep.* .text.keep.* .literal.*personality* .text.*personality*))
+    *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
+    *(.fini.literal)
+    KEEP(*(.fini))
+    *(.gnu.version)
+    . = ALIGN (4);
+    _text_end = ABSOLUTE(.);
+    _etext = .;
+  } >sram1_seg :sram1_phdr
+
+  .clib.text : ALIGN(4)
+  {
+    _clib_text_start = ABSOLUTE(.);
+    *(.clib.literal .clib.text)
+    . = ALIGN (4);
+    _clib_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.text : ALIGN(4)
+  {
+    _rtos_text_start = ABSOLUTE(.);
+    *(.rtos.literal .rtos.text)
+    . = ALIGN (4);
+    _rtos_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.data : ALIGN(4)
+  {
+    _clib_data_start = ABSOLUTE(.);
+    *(.clib.data)
+    . = ALIGN (4);
+    _clib_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.percpu.data : ALIGN(4)
+  {
+    _clib_percpu_data_start = ABSOLUTE(.);
+    *(.clib.percpu.data)
+    . = ALIGN (4);
+    _clib_percpu_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.percpu.data : ALIGN(4)
+  {
+    _rtos_percpu_data_start = ABSOLUTE(.);
+    *(.rtos.percpu.data)
+    . = ALIGN (4);
+    _rtos_percpu_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.data : ALIGN(4)
+  {
+    _rtos_data_start = ABSOLUTE(.);
+    *(.rtos.data)
+    . = ALIGN (4);
+    _rtos_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .sram.data : ALIGN(4)
+  {
+    _sram_data_start = ABSOLUTE(.);
+    *(.sram.data)
+    . = ALIGN (4);
+    _sram_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .data : ALIGN(4)
+  {
+    _data_start = ABSOLUTE(.);
+    *(.data)
+    *(SORT(.data.sort.*))
+    KEEP (*(SORT(.data.keepsort.*) .data.keep.*))
+    *(.data.*)
+    *(.gnu.linkonce.d.*)
+    KEEP(*(.gnu.linkonce.d.*personality*))
+    *(.data1)
+    *(.sdata)
+    *(.sdata.*)
+    *(.gnu.linkonce.s.*)
+    *(.sdata2)
+    *(.sdata2.*)
+    *(.gnu.linkonce.s2.*)
+    KEEP(*(.jcr))
+    *(__llvm_prf_cnts)
+    *(__llvm_prf_data)
+    *(__llvm_prf_vnds)
+    . = ALIGN (4);
+    _data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  __llvm_prf_names : ALIGN(4)
+  {
+    __llvm_prf_names_start = ABSOLUTE(.);
+    *(__llvm_prf_names)
+    . = ALIGN (4);
+    __llvm_prf_names_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _bss_start = ABSOLUTE(.);
+    *(.dynsbss)
+    *(.sbss)
+    *(.sbss.*)
+    *(.gnu.linkonce.sb.*)
+    *(.scommon)
+    *(.sbss2)
+    *(.sbss2.*)
+    *(.gnu.linkonce.sb2.*)
+    *(.dynbss)
+    *(.bss)
+    *(SORT(.bss.sort.*))
+    KEEP (*(SORT(.bss.keepsort.*) .bss.keep.*))
+    *(.bss.*)
+    *(.gnu.linkonce.b.*)
+    *(COMMON)
+    *(.clib.bss)
+    *(.clib.percpu.bss)
+    *(.rtos.percpu.bss)
+    *(.rtos.bss)
+    *(.sram.bss)
+    *(.debug.bss)
+    . = ALIGN (8);
+    _bss_end = ABSOLUTE(.);
+    _end = ALIGN(0x8);
+    PROVIDE(end = ALIGN(0x8));
+    _memmap_seg_sram1_end = ALIGN(0x8);
+  } >sram1_seg :sram1_bss_phdr
+
+  _heap_sentry = 0x24fda800;
+  _memmap_mem_sram_max = ABSOLUTE(.);
+
+  .dram0.rodata : ALIGN(4)
+  {
+    _dram0_rodata_start = ABSOLUTE(.);
+    *(.dram0.rodata)
+    . = ALIGN (4);
+    _dram0_rodata_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.data : ALIGN(4)
+  {
+    _dram0_data_start = ABSOLUTE(.);
+    *(.dram0.data)
+    . = ALIGN (4);
+    _dram0_data_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dram0_bss_start = ABSOLUTE(.);
+    *(.dram0.bss)
+    *(.dram0_user.bss)
+    . = ALIGN (8);
+    _dram0_bss_end = ABSOLUTE(.);
+    _memmap_seg_dram0_0_end = ALIGN(0x8);
+  } >dram0_0_seg :dram0_0_bss_phdr
+
+  _memmap_mem_dram0_max = ABSOLUTE(.);
+
+  .dram1.rodata : ALIGN(4)
+  {
+    _dram1_rodata_start = ABSOLUTE(.);
+    *(.dram1.rodata)
+    . = ALIGN (4);
+    _dram1_rodata_end = ABSOLUTE(.);
+  } >dram1_0_seg :dram1_0_phdr
+
+  .dram1.data : ALIGN(4)
+  {
+    _dram1_data_start = ABSOLUTE(.);
+    *(.dram1.data)
+    . = ALIGN (4);
+    _dram1_data_end = ABSOLUTE(.);
+  } >dram1_0_seg :dram1_0_phdr
+
+  .dram1.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dram1_bss_start = ABSOLUTE(.);
+    *(.dram1.bss)
+    *(.dram1_user.bss)
+    . = ALIGN (8);
+    _dram1_bss_end = ABSOLUTE(.);
+    _stack_sentry = ALIGN(0x8);
+    _memmap_seg_dram1_0_end = ALIGN(0x8);
+  } >dram1_0_seg :dram1_0_bss_phdr
+
+  PROVIDE(__stack = 0xe01a7000);
+  _memmap_mem_dram1_max = ABSOLUTE(.);
+
+  .local_sram.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _local_sram_bss_start = ABSOLUTE(.);
+    *(.local_sram.bss)
+    . = ALIGN (8);
+    _local_sram_bss_end = ABSOLUTE(.);
+    _memmap_seg_local_sram_0_end = ALIGN(0x8);
+  } >local_sram_0_seg :local_sram_0_bss_phdr
+
+
+  _memmap_mem_local_sram_max = ABSOLUTE(.);
+
+  .debug  0 :  { *(.debug) }
+  .line  0 :  { *(.line) }
+  .debug_srcinfo  0 :  { *(.debug_srcinfo) }
+  .debug_sfnames  0 :  { *(.debug_sfnames) }
+  .debug_aranges  0 :  { *(.debug_aranges) }
+  .debug_pubnames  0 :  { *(.debug_pubnames) }
+  .debug_info  0 :  { *(.debug_info) }
+  .debug_abbrev  0 :  { *(.debug_abbrev) }
+  .debug_line  0 :  { *(.debug_line) }
+  .debug_frame  0 :  { *(.debug_frame) }
+  .debug_str  0 :  { *(.debug_str) }
+  .debug_loc  0 :  { *(.debug_loc) }
+  .debug_macinfo  0 :  { *(.debug_macinfo) }
+  .debug_weaknames  0 :  { *(.debug_weaknames) }
+  .debug_funcnames  0 :  { *(.debug_funcnames) }
+  .debug_typenames  0 :  { *(.debug_typenames) }
+  .debug_varnames  0 :  { *(.debug_varnames) }
+  .xt.insn 0 :
+  {
+    KEEP (*(.xt.insn))
+    KEEP (*(.gnu.linkonce.x.*))
+  }
+  .xt.prop 0 :
+  {
+    KEEP (*(.xt.prop))
+    KEEP (*(.xt.prop.*))
+    KEEP (*(.gnu.linkonce.prop.*))
+  }
+  .xt.lit 0 :
+  {
+    KEEP (*(.xt.lit))
+    KEEP (*(.xt.lit.*))
+    KEEP (*(.gnu.linkonce.p.*))
+  }
+  .debug.xt.callgraph 0 :
+  {
+    KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
+  }
+}
+

+ 443 - 0
LSP/gdbio_core1_main_stact_tcm1/ldscripts/elf32xtensa.xn

@@ -0,0 +1,443 @@
+/* This linker script generated from xt-genldscripts.tpp for LSP C:\Users\DELL\workspace\CSI_DSP_FW\LSP\min-rt_core1_main_stact_tcm1 */
+/* Linker Script for ld -n */
+MEMORY
+{
+  sram0_seg :                         	org = 0x24000000, len = 0x2000
+  sram1_seg :                         	org = 0x24002000, len = 0xFD8800
+  dram0_0_seg :                       	org = 0xE0180000, len = 0x7000
+  dram1_0_seg :                       	org = 0xE01A0000, len = 0x7000
+  local_sram_0_seg :                  	org = 0xFFA00000, len = 0x180000
+}
+
+PHDRS
+{
+  sram0_phdr PT_LOAD;
+  sram1_phdr PT_LOAD;
+  sram1_bss_phdr PT_LOAD;
+  dram0_0_phdr PT_LOAD;
+  dram0_0_bss_phdr PT_LOAD;
+  dram1_0_phdr PT_LOAD;
+  dram1_0_bss_phdr PT_LOAD;
+  local_sram_0_phdr PT_LOAD;
+  local_sram_0_bss_phdr PT_LOAD;
+}
+
+
+/*  Default entry point:  */
+ENTRY(_ResetVector)
+
+
+/*  Memory boundary addresses:  */
+_memmap_mem_sram_start = 0x24000000;
+_memmap_mem_sram_end   = 0x25000000;
+_memmap_mem_dram0_start = 0xe0180000;
+_memmap_mem_dram0_end   = 0xe01a0000;
+_memmap_mem_dram1_start = 0xe01a0000;
+_memmap_mem_dram1_end   = 0xe01c0000;
+_memmap_mem_local_sram_start = 0xffa00000;
+_memmap_mem_local_sram_end   = 0xffb80000;
+
+/*  Memory segment boundary addresses:  */
+_memmap_seg_sram0_start = 0x24000000;
+_memmap_seg_sram0_max   = 0x24002000;
+_memmap_seg_sram1_start = 0x24002000;
+_memmap_seg_sram1_max   = 0x24fda800;
+_memmap_seg_dram0_0_start = 0xe0180000;
+_memmap_seg_dram0_0_max   = 0xe0187000;
+_memmap_seg_dram1_0_start = 0xe01a0000;
+_memmap_seg_dram1_0_max   = 0xe01a7000;
+_memmap_seg_local_sram_0_start = 0xffa00000;
+_memmap_seg_local_sram_0_max   = 0xffb80000;
+
+_rom_store_table = 0;
+PROVIDE(_memmap_reset_vector = 0x24000000);
+PROVIDE(_memmap_vecbase_reset = 0x24000000);
+/* Various memory-map dependent cache attribute settings: */
+_memmap_cacheattr_wb_base = 0x10000010;
+_memmap_cacheattr_wt_base = 0x30000030;
+_memmap_cacheattr_bp_base = 0x40000040;
+_memmap_cacheattr_unused_mask = 0x0FFFFF0F;
+_memmap_cacheattr_wb_trapnull = 0x14444410;
+_memmap_cacheattr_wba_trapnull = 0x14444410;
+_memmap_cacheattr_wbna_trapnull = 0x24444420;
+_memmap_cacheattr_wt_trapnull = 0x34444430;
+_memmap_cacheattr_bp_trapnull = 0x44444440;
+_memmap_cacheattr_wb_strict = 0x10000010;
+_memmap_cacheattr_wt_strict = 0x30000030;
+_memmap_cacheattr_bp_strict = 0x40000040;
+_memmap_cacheattr_wb_allvalid = 0x14444414;
+_memmap_cacheattr_wt_allvalid = 0x34444434;
+_memmap_cacheattr_bp_allvalid = 0x44444444;
+_memmap_region_map = 0x00000082;
+PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
+
+SECTIONS
+{
+
+  .DispatchVector.text : ALIGN(4)
+  {
+    _DispatchVector_text_start = ABSOLUTE(.);
+    KEEP (*(.DispatchVector.text))
+    . = ALIGN (4);
+    _DispatchVector_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .ResetVector.text : ALIGN(4)
+  {
+    _ResetVector_text_start = ABSOLUTE(.);
+    *(.ResetVector.text)
+    . = ALIGN (4);
+    _ResetVector_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .ResetHandler.text : ALIGN(4)
+  {
+    _ResetHandler_text_start = ABSOLUTE(.);
+    *(.ResetHandler.literal .ResetHandler.text)
+    . = ALIGN (4);
+    _ResetHandler_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .DispatchHandler.text : ALIGN(4)
+  {
+    _DispatchHandler_text_start = ABSOLUTE(.);
+    *(.DispatchHandler.literal .DispatchHandler.text)
+    . = ALIGN (4);
+    _DispatchHandler_text_end = ABSOLUTE(.);
+    _memmap_seg_sram0_end = ALIGN(0x8);
+  } >sram0_seg :sram0_phdr
+
+
+  .sram.rodata : ALIGN(4)
+  {
+    _sram_rodata_start = ABSOLUTE(.);
+    *(.sram.rodata)
+    . = ALIGN (4);
+    _sram_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.rodata : ALIGN(4)
+  {
+    _clib_rodata_start = ABSOLUTE(.);
+    *(.clib.rodata)
+    . = ALIGN (4);
+    _clib_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.rodata : ALIGN(4)
+  {
+    _rtos_rodata_start = ABSOLUTE(.);
+    *(.rtos.rodata)
+    . = ALIGN (4);
+    _rtos_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rodata : ALIGN(4)
+  {
+    _rodata_start = ABSOLUTE(.);
+    *(.rodata)
+    *(SORT(.rodata.sort.*))
+    KEEP (*(SORT(.rodata.keepsort.*) .rodata.keep.*))
+    *(.rodata.*)
+    *(.gnu.linkonce.r.*)
+    *(.rodata1)
+    __XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
+    KEEP (*(.xt_except_table))
+    KEEP (*(.gcc_except_table))
+    *(.gnu.linkonce.e.*)
+    *(.gnu.version_r)
+    KEEP (*(.eh_frame))
+    /*  C++ constructor and destructor tables, properly ordered:  */
+    KEEP (*crtbegin.o(.ctors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*(.ctors))
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*(.dtors))
+    /*  C++ exception handlers table:  */
+    __XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
+    *(.xt_except_desc)
+    *(.gnu.linkonce.h.*)
+    __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
+    *(.xt_except_desc_end)
+    *(.dynamic)
+    *(.gnu.version_d)
+    . = ALIGN(4);		/* this table MUST be 4-byte aligned */
+    _bss_table_start = ABSOLUTE(.);
+    LONG(_bss_start)
+    LONG(_bss_end)
+    LONG(_dram0_bss_start)
+    LONG(_dram0_bss_end)
+    LONG(_dram1_bss_start)
+    LONG(_dram1_bss_end)
+    LONG(_local_sram_bss_start)
+    LONG(_local_sram_bss_end)
+    _bss_table_end = ABSOLUTE(.);
+    . = ALIGN (4);
+    _rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .sram.text : ALIGN(4)
+  {
+    _sram_text_start = ABSOLUTE(.);
+    *(.sram.literal .sram.text)
+    . = ALIGN (4);
+    _sram_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .text : ALIGN(4)
+  {
+    _stext = .;
+    _text_start = ABSOLUTE(.);
+    *(.entry.text)
+    *(.init.literal)
+    KEEP(*(.init))
+    *(.literal.sort.* SORT(.text.sort.*))
+    KEEP (*(.literal.keepsort.* SORT(.text.keepsort.*) .literal.keep.* .text.keep.* .literal.*personality* .text.*personality*))
+    *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
+    *(.fini.literal)
+    KEEP(*(.fini))
+    *(.gnu.version)
+    . = ALIGN (4);
+    _text_end = ABSOLUTE(.);
+    _etext = .;
+  } >sram1_seg :sram1_phdr
+
+  .clib.text : ALIGN(4)
+  {
+    _clib_text_start = ABSOLUTE(.);
+    *(.clib.literal .clib.text)
+    . = ALIGN (4);
+    _clib_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.text : ALIGN(4)
+  {
+    _rtos_text_start = ABSOLUTE(.);
+    *(.rtos.literal .rtos.text)
+    . = ALIGN (4);
+    _rtos_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.data : ALIGN(4)
+  {
+    _clib_data_start = ABSOLUTE(.);
+    *(.clib.data)
+    . = ALIGN (4);
+    _clib_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.percpu.data : ALIGN(4)
+  {
+    _clib_percpu_data_start = ABSOLUTE(.);
+    *(.clib.percpu.data)
+    . = ALIGN (4);
+    _clib_percpu_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.percpu.data : ALIGN(4)
+  {
+    _rtos_percpu_data_start = ABSOLUTE(.);
+    *(.rtos.percpu.data)
+    . = ALIGN (4);
+    _rtos_percpu_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.data : ALIGN(4)
+  {
+    _rtos_data_start = ABSOLUTE(.);
+    *(.rtos.data)
+    . = ALIGN (4);
+    _rtos_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .sram.data : ALIGN(4)
+  {
+    _sram_data_start = ABSOLUTE(.);
+    *(.sram.data)
+    . = ALIGN (4);
+    _sram_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .data : ALIGN(4)
+  {
+    _data_start = ABSOLUTE(.);
+    *(.data)
+    *(SORT(.data.sort.*))
+    KEEP (*(SORT(.data.keepsort.*) .data.keep.*))
+    *(.data.*)
+    *(.gnu.linkonce.d.*)
+    KEEP(*(.gnu.linkonce.d.*personality*))
+    *(.data1)
+    *(.sdata)
+    *(.sdata.*)
+    *(.gnu.linkonce.s.*)
+    *(.sdata2)
+    *(.sdata2.*)
+    *(.gnu.linkonce.s2.*)
+    KEEP(*(.jcr))
+    *(__llvm_prf_cnts)
+    *(__llvm_prf_data)
+    *(__llvm_prf_vnds)
+    . = ALIGN (4);
+    _data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  __llvm_prf_names : ALIGN(4)
+  {
+    __llvm_prf_names_start = ABSOLUTE(.);
+    *(__llvm_prf_names)
+    . = ALIGN (4);
+    __llvm_prf_names_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _bss_start = ABSOLUTE(.);
+    *(.dynsbss)
+    *(.sbss)
+    *(.sbss.*)
+    *(.gnu.linkonce.sb.*)
+    *(.scommon)
+    *(.sbss2)
+    *(.sbss2.*)
+    *(.gnu.linkonce.sb2.*)
+    *(.dynbss)
+    *(.bss)
+    *(SORT(.bss.sort.*))
+    KEEP (*(SORT(.bss.keepsort.*) .bss.keep.*))
+    *(.bss.*)
+    *(.gnu.linkonce.b.*)
+    *(COMMON)
+    *(.clib.bss)
+    *(.clib.percpu.bss)
+    *(.rtos.percpu.bss)
+    *(.rtos.bss)
+    *(.sram.bss)
+    *(.debug.bss)
+    . = ALIGN (8);
+    _bss_end = ABSOLUTE(.);
+    _end = ALIGN(0x8);
+    PROVIDE(end = ALIGN(0x8));
+    _memmap_seg_sram1_end = ALIGN(0x8);
+  } >sram1_seg :sram1_bss_phdr
+
+  _heap_sentry = 0x24fda800;
+  _memmap_mem_sram_max = ABSOLUTE(.);
+
+  .dram0.rodata : ALIGN(4)
+  {
+    _dram0_rodata_start = ABSOLUTE(.);
+    *(.dram0.rodata)
+    . = ALIGN (4);
+    _dram0_rodata_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.data : ALIGN(4)
+  {
+    _dram0_data_start = ABSOLUTE(.);
+    *(.dram0.data)
+    . = ALIGN (4);
+    _dram0_data_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dram0_bss_start = ABSOLUTE(.);
+    *(.dram0.bss)
+    *(.dram0_user.bss)
+    . = ALIGN (8);
+    _dram0_bss_end = ABSOLUTE(.);
+    _memmap_seg_dram0_0_end = ALIGN(0x8);
+  } >dram0_0_seg :dram0_0_bss_phdr
+
+  _memmap_mem_dram0_max = ABSOLUTE(.);
+
+  .dram1.rodata : ALIGN(4)
+  {
+    _dram1_rodata_start = ABSOLUTE(.);
+    *(.dram1.rodata)
+    . = ALIGN (4);
+    _dram1_rodata_end = ABSOLUTE(.);
+  } >dram1_0_seg :dram1_0_phdr
+
+  .dram1.data : ALIGN(4)
+  {
+    _dram1_data_start = ABSOLUTE(.);
+    *(.dram1.data)
+    . = ALIGN (4);
+    _dram1_data_end = ABSOLUTE(.);
+  } >dram1_0_seg :dram1_0_phdr
+
+  .dram1.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dram1_bss_start = ABSOLUTE(.);
+    *(.dram1.bss)
+    *(.dram1_user.bss)
+    . = ALIGN (8);
+    _dram1_bss_end = ABSOLUTE(.);
+    _stack_sentry = ALIGN(0x8);
+    _memmap_seg_dram1_0_end = ALIGN(0x8);
+  } >dram1_0_seg :dram1_0_bss_phdr
+
+  PROVIDE(__stack = 0xe01a7000);
+  _memmap_mem_dram1_max = ABSOLUTE(.);
+
+  .local_sram.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _local_sram_bss_start = ABSOLUTE(.);
+    *(.local_sram.bss)
+    . = ALIGN (8);
+    _local_sram_bss_end = ABSOLUTE(.);
+    _memmap_seg_local_sram_0_end = ALIGN(0x8);
+  } >local_sram_0_seg :local_sram_0_bss_phdr
+
+
+  _memmap_mem_local_sram_max = ABSOLUTE(.);
+
+  .debug  0 :  { *(.debug) }
+  .line  0 :  { *(.line) }
+  .debug_srcinfo  0 :  { *(.debug_srcinfo) }
+  .debug_sfnames  0 :  { *(.debug_sfnames) }
+  .debug_aranges  0 :  { *(.debug_aranges) }
+  .debug_pubnames  0 :  { *(.debug_pubnames) }
+  .debug_info  0 :  { *(.debug_info) }
+  .debug_abbrev  0 :  { *(.debug_abbrev) }
+  .debug_line  0 :  { *(.debug_line) }
+  .debug_frame  0 :  { *(.debug_frame) }
+  .debug_str  0 :  { *(.debug_str) }
+  .debug_loc  0 :  { *(.debug_loc) }
+  .debug_macinfo  0 :  { *(.debug_macinfo) }
+  .debug_weaknames  0 :  { *(.debug_weaknames) }
+  .debug_funcnames  0 :  { *(.debug_funcnames) }
+  .debug_typenames  0 :  { *(.debug_typenames) }
+  .debug_varnames  0 :  { *(.debug_varnames) }
+  .xt.insn 0 :
+  {
+    KEEP (*(.xt.insn))
+    KEEP (*(.gnu.linkonce.x.*))
+  }
+  .xt.prop 0 :
+  {
+    KEEP (*(.xt.prop))
+    KEEP (*(.xt.prop.*))
+    KEEP (*(.gnu.linkonce.prop.*))
+  }
+  .xt.lit 0 :
+  {
+    KEEP (*(.xt.lit))
+    KEEP (*(.xt.lit.*))
+    KEEP (*(.gnu.linkonce.p.*))
+  }
+  .debug.xt.callgraph 0 :
+  {
+    KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
+  }
+}
+

+ 61 - 0
LSP/gdbio_core1_main_stact_tcm1/ldscripts/elf32xtensa.xr

@@ -0,0 +1,61 @@
+/* This linker script generated from xt-genldscripts.tpp for LSP C:\Users\DELL\workspace\CSI_DSP_FW\LSP\min-rt_core1_main_stact_tcm1 */
+/* Linker Script for ld -r or ld -i */
+
+
+SECTIONS
+{
+
+  .text 0 :
+  {
+    *(.literal .text)
+  }
+
+  .bss 0 :
+  {
+    *(.dynsbss)
+    *(.sbss)
+    *(.scommon)
+    *(.dynbss)
+    *(.bss)
+    *(COMMON)
+  }
+  .debug  0 :  { *(.debug) }
+  .line  0 :  { *(.line) }
+  .debug_srcinfo  0 :  { *(.debug_srcinfo) }
+  .debug_sfnames  0 :  { *(.debug_sfnames) }
+  .debug_aranges  0 :  { *(.debug_aranges) }
+  .debug_pubnames  0 :  { *(.debug_pubnames) }
+  .debug_info  0 :  { *(.debug_info) }
+  .debug_abbrev  0 :  { *(.debug_abbrev) }
+  .debug_line  0 :  { *(.debug_line) }
+  .debug_frame  0 :  { *(.debug_frame) }
+  .debug_str  0 :  { *(.debug_str) }
+  .debug_loc  0 :  { *(.debug_loc) }
+  .debug_macinfo  0 :  { *(.debug_macinfo) }
+  .debug_weaknames  0 :  { *(.debug_weaknames) }
+  .debug_funcnames  0 :  { *(.debug_funcnames) }
+  .debug_typenames  0 :  { *(.debug_typenames) }
+  .debug_varnames  0 :  { *(.debug_varnames) }
+  .xt.insn 0 :
+  {
+    KEEP (*(.xt.insn))
+    KEEP (*(.gnu.linkonce.x.*))
+  }
+  .xt.prop 0 :
+  {
+    KEEP (*(.xt.prop))
+    KEEP (*(.xt.prop.*))
+    KEEP (*(.gnu.linkonce.prop.*))
+  }
+  .xt.lit 0 :
+  {
+    KEEP (*(.xt.lit))
+    KEEP (*(.xt.lit.*))
+    KEEP (*(.gnu.linkonce.p.*))
+  }
+  .debug.xt.callgraph 0 :
+  {
+    KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
+  }
+}
+

+ 61 - 0
LSP/gdbio_core1_main_stact_tcm1/ldscripts/elf32xtensa.xu

@@ -0,0 +1,61 @@
+/* This linker script generated from xt-genldscripts.tpp for LSP C:\Users\DELL\workspace\CSI_DSP_FW\LSP\min-rt_core1_main_stact_tcm1 */
+/* Linker Script for ld -Ur */
+
+
+SECTIONS
+{
+
+  .text 0 :
+  {
+    *(.literal .text)
+  }
+
+  .bss 0 :
+  {
+    *(.dynsbss)
+    *(.sbss)
+    *(.scommon)
+    *(.dynbss)
+    *(.bss)
+    *(COMMON)
+  }
+  .debug  0 :  { *(.debug) }
+  .line  0 :  { *(.line) }
+  .debug_srcinfo  0 :  { *(.debug_srcinfo) }
+  .debug_sfnames  0 :  { *(.debug_sfnames) }
+  .debug_aranges  0 :  { *(.debug_aranges) }
+  .debug_pubnames  0 :  { *(.debug_pubnames) }
+  .debug_info  0 :  { *(.debug_info) }
+  .debug_abbrev  0 :  { *(.debug_abbrev) }
+  .debug_line  0 :  { *(.debug_line) }
+  .debug_frame  0 :  { *(.debug_frame) }
+  .debug_str  0 :  { *(.debug_str) }
+  .debug_loc  0 :  { *(.debug_loc) }
+  .debug_macinfo  0 :  { *(.debug_macinfo) }
+  .debug_weaknames  0 :  { *(.debug_weaknames) }
+  .debug_funcnames  0 :  { *(.debug_funcnames) }
+  .debug_typenames  0 :  { *(.debug_typenames) }
+  .debug_varnames  0 :  { *(.debug_varnames) }
+  .xt.insn 0 :
+  {
+    KEEP (*(.xt.insn))
+    KEEP (*(.gnu.linkonce.x.*))
+  }
+  .xt.prop 0 :
+  {
+    KEEP (*(.xt.prop))
+    KEEP (*(.xt.prop.*))
+    KEEP (*(.gnu.linkonce.prop.*))
+  }
+  .xt.lit 0 :
+  {
+    KEEP (*(.xt.lit))
+    KEEP (*(.xt.lit.*))
+    KEEP (*(.gnu.linkonce.p.*))
+  }
+  .debug.xt.callgraph 0 :
+  {
+    KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
+  }
+}
+

+ 78 - 0
LSP/gdbio_core1_main_stact_tcm1/memmap.xmm

@@ -0,0 +1,78 @@
+//  Memory map file to generate linker scripts for programs without board I/O.
+
+// Customer ID=16470; Build=0x8e648; Copyright (c) 2004-2015 Cadence Design Systems, Inc.
+//
+// Permission is hereby granted, free of charge, to any person obtaining
+// a copy of this software and associated documentation files (the
+// "Software"), to deal in the Software without restriction, including
+// without limitation the rights to use, copy, modify, merge, publish,
+// distribute, sublicense, and/or sell copies of the Software, and to
+// permit persons to whom the Software is furnished to do so, subject to
+// the following conditions:
+//
+// The above copyright notice and this permission notice shall be included
+// in all copies or substantial portions of the Software.
+//
+// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+// EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+// IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+// CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+// TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+// SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+
+//  Place stack in local RAM:
+PLACE SECTIONS(STACK) WITH_SECTION(.dram1.bss)
+// A memory map is a sequence of memory descriptions and
+// optional parameter assignments.
+//
+// Each memory description has the following format:
+//   BEGIN <name>
+//     <addr> [,<paddr>] : <mem-type> : <mem-name> : <size> [,<psize>]
+//                       : [writable] [,executable] [,device] ;
+//     <segment>*
+//   END <name>
+//
+// where each <segment> description has the following format:
+//     <seg-name> : F|C : <start-addr> - <end-addr> [ : STACK ] [ : HEAP ]
+//                : <section-name>* ;
+//
+// Each parameter assignment is a keyword/value pair in the following format:
+//   <keyword> = <value>                (no spaces in <value>)
+// or
+//   <keyword> = "<value>"              (spaces allowed in <value>)
+//
+// The following primitives are also defined:
+//   PLACE SECTIONS( <section-name>* ) { WITH_SECTION(<section-name>)
+//                                       | IN_SEGMENT(<seg-name>) }
+//
+//   NOLOAD <section-name1> [ <section-name2> ... ]
+//
+// Please refer to the Xtensa LSP Reference Manual for more details.
+//
+VECSELECT=1
+VECRESET=0x24000000
+VECBASE= 0x24000000
+
+BEGIN sram
+0x24000000: extra_mem : sram : 0x01000000 : executable, writable ;
+ sram0 : F : 0x24000000 - 0x24001fff : .DispatchVector.text .ResetVector.text .ResetHandler.literal .ResetHandler.text .DispatchHandler.literal .DispatchHandler.text;
+ sram1 : C : 0x24002000 - 0x24ffffff :  HEAP : .sram.rodata .clib.rodata .rtos.rodata .rodata .sram.literal .literal .rtos.literal .clib.literal .sram.text .text .clib.text .rtos.text .clib.data .clib.percpu.data .rtos.percpu.data .rtos.data .sram.data .data __llvm_prf_names .clib.bss .clib.percpu.bss .rtos.percpu.bss .rtos.bss .sram.bss .bss .debug.bss;
+ END sram
+
+BEGIN dram0
+0xe0180000: dataRam : dram0 : 0x20000 : writable ;
+ dram0_0 : C : 0xe0180000 - 0xe019ffff :.dram0.rodata .dram0.data .dram0.bss .dram0_user.bss;
+END dram0
+
+BEGIN dram1
+0xe01a0000: dataRam : dram1 : 0x20000 : writable ;
+ dram1_0 : C : 0xe01a0000 - 0xe01bffff :STACK :.dram1.rodata .dram1.data .dram1.bss .dram1_user.bss;
+END dram1
+
+BEGIN local_sram
+0xffa00000: sysram : local_sram :   0x180000: writable ;
+  local_sram_0 : C : 0xffa00000 - 0xffb7ffff :.local_sram.bss ;
+ END local_sram
+
+RESERVE_SEGMENT_AREA = ".dram0.data 102400 + 0 end : .dram1.data 102400 + 0 end : .sram.data 153600 + 0 end"

+ 36 - 0
LSP/gdbio_core1_main_stact_tcm1/specs

@@ -0,0 +1,36 @@
+# Customer ID=16470; Build=0x8e648; Copyright (c) 2001-2015 Cadence Design Systems, Inc.
+#
+# Permission is hereby granted, free of charge, to any person obtaining
+# a copy of this software and associated documentation files (the
+# "Software"), to deal in the Software without restriction, including
+# without limitation the rights to use, copy, modify, merge, publish,
+# distribute, sublicense, and/or sell copies of the Software, and to
+# permit persons to whom the Software is furnished to do so, subject to
+# the following conditions:
+#
+# The above copyright notice and this permission notice shall be included
+# in all copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+# IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+# CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+# TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+# SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+
+
+# The %O suffix on the start and end files indicates that the system's
+# standard suffix for object files (e.g., ".o") should be appended.
+# The %s suffix tells the compiler driver to search for the file in the
+# list of known locations for startfiles.
+
+*startfile:
+crt1-boards%O%s crti%O%s crtbegin%O%s _sharedvectors%O%s _vectors%O%s
+
+*endfile:
+crtend%O%s crtn%O%s
+
+*lib:
+-lc -lgloss -lc -lhandler-reset -lhandlers-board -lhal -lc
+

+ 444 - 0
LSP/gdbio_core1_stact_tcm1/ldscripts/elf32xtensa.x

@@ -0,0 +1,444 @@
+/* This linker script generated from xt-genldscripts.tpp for LSP C:\usr\xtensa\XtDevTools\install\builds\RI-2020.4-win32\q7_check\xtensa-elf\lib\min-rt_0x24_stact_tcm1 */
+/* Linker Script for default link */
+MEMORY
+{
+  sram0_seg :                         	org = 0x24000000, len = 0x2000
+  sram1_seg :                         	org = 0x24002000, len = 0xFFE000
+  dram0_0_seg :                       	org = 0xE0180000, len = 0x20000
+  dram1_0_seg :                       	org = 0xE01A0000, len = 0x20000
+  local_sram_0_seg :                  	org = 0xFFA00000, len = 0x180000
+}
+
+PHDRS
+{
+  sram0_phdr PT_LOAD;
+  sram1_phdr PT_LOAD;
+  sram1_bss_phdr PT_LOAD;
+  dram0_0_phdr PT_LOAD;
+  dram0_0_bss_phdr PT_LOAD;
+  dram1_0_phdr PT_LOAD;
+  dram1_0_bss_phdr PT_LOAD;
+  local_sram_0_phdr PT_LOAD;
+  local_sram_0_bss_phdr PT_LOAD;
+}
+
+
+/*  Default entry point:  */
+ENTRY(_ResetVector)
+
+
+/*  Memory boundary addresses:  */
+_memmap_mem_sram_start = 0x24000000;
+_memmap_mem_sram_end   = 0x25000000;
+_memmap_mem_dram0_start = 0xe0180000;
+_memmap_mem_dram0_end   = 0xe01a0000;
+_memmap_mem_dram1_start = 0xe01a0000;
+_memmap_mem_dram1_end   = 0xe01c0000;
+_memmap_mem_local_sram_start = 0xffa00000;
+_memmap_mem_local_sram_end   = 0xffb80000;
+
+/*  Memory segment boundary addresses:  */
+_memmap_seg_sram0_start = 0x24000000;
+_memmap_seg_sram0_max   = 0x24002000;
+_memmap_seg_sram1_start = 0x24002000;
+_memmap_seg_sram1_max   = 0x25000000;
+_memmap_seg_dram0_0_start = 0xe0180000;
+_memmap_seg_dram0_0_max   = 0xe01a0000;
+_memmap_seg_dram1_0_start = 0xe01a0000;
+_memmap_seg_dram1_0_max   = 0xe01c0000;
+_memmap_seg_local_sram_0_start = 0xffa00000;
+_memmap_seg_local_sram_0_max   = 0xffb80000;
+
+_rom_store_table = 0;
+PROVIDE(_memmap_reset_vector = 0x24000000);
+PROVIDE(_memmap_vecbase_reset = 0x24000000);
+/* Various memory-map dependent cache attribute settings: */
+_memmap_cacheattr_wb_base = 0x10000010;
+_memmap_cacheattr_wt_base = 0x30000030;
+_memmap_cacheattr_bp_base = 0x40000040;
+_memmap_cacheattr_unused_mask = 0x0FFFFF0F;
+_memmap_cacheattr_wb_trapnull = 0x14444411;
+_memmap_cacheattr_wba_trapnull = 0x14444410;
+_memmap_cacheattr_wbna_trapnull = 0x24444420;
+_memmap_cacheattr_wt_trapnull = 0x34444430;
+_memmap_cacheattr_bp_trapnull = 0x44444440;
+_memmap_cacheattr_wb_strict = 0x10000010;
+_memmap_cacheattr_wt_strict = 0x30000030;
+_memmap_cacheattr_bp_strict = 0x40000040;
+_memmap_cacheattr_wb_allvalid = 0x14444414;
+_memmap_cacheattr_wt_allvalid = 0x34444434;
+_memmap_cacheattr_bp_allvalid = 0x44444444;
+_memmap_region_map = 0x00000082;
+PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
+
+SECTIONS
+{
+
+  .DispatchVector.text : ALIGN(4)
+  {
+    _DispatchVector_text_start = ABSOLUTE(.);
+    KEEP (*(.DispatchVector.text))
+    . = ALIGN (4);
+    _DispatchVector_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .ResetVector.text : ALIGN(4)
+  {
+    _ResetVector_text_start = ABSOLUTE(.);
+    *(.ResetVector.text)
+    . = ALIGN (4);
+    _ResetVector_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .ResetHandler.text : ALIGN(4)
+  {
+    _ResetHandler_text_start = ABSOLUTE(.);
+    *(.ResetHandler.literal .ResetHandler.text)
+    . = ALIGN (4);
+    _ResetHandler_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .DispatchHandler.text : ALIGN(4)
+  {
+    _DispatchHandler_text_start = ABSOLUTE(.);
+    *(.DispatchHandler.literal .DispatchHandler.text)
+    . = ALIGN (4);
+    _DispatchHandler_text_end = ABSOLUTE(.);
+    _memmap_seg_sram0_end = ALIGN(0x8);
+  } >sram0_seg :sram0_phdr
+
+
+  .sram.rodata : ALIGN(4)
+  {
+    _sram_rodata_start = ABSOLUTE(.);
+    *(.sram.rodata)
+    . = ALIGN (4);
+    _sram_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.rodata : ALIGN(4)
+  {
+    _clib_rodata_start = ABSOLUTE(.);
+    *(.clib.rodata)
+    . = ALIGN (4);
+    _clib_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.rodata : ALIGN(4)
+  {
+    _rtos_rodata_start = ABSOLUTE(.);
+    *(.rtos.rodata)
+    . = ALIGN (4);
+    _rtos_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rodata : ALIGN(4)
+  {
+    _rodata_start = ABSOLUTE(.);
+    *(.rodata)
+    *(SORT(.rodata.sort.*))
+    KEEP (*(SORT(.rodata.keepsort.*) .rodata.keep.*))
+    *(.rodata.*)
+    *(.gnu.linkonce.r.*)
+    *(.rodata1)
+    __XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
+    KEEP (*(.xt_except_table))
+    KEEP (*(.gcc_except_table))
+    *(.gnu.linkonce.e.*)
+    *(.gnu.version_r)
+    KEEP (*(.eh_frame))
+    /*  C++ constructor and destructor tables, properly ordered:  */
+    KEEP (*crtbegin.o(.ctors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*(.ctors))
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*(.dtors))
+    /*  C++ exception handlers table:  */
+    __XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
+    *(.xt_except_desc)
+    *(.gnu.linkonce.h.*)
+    __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
+    *(.xt_except_desc_end)
+    *(.dynamic)
+    *(.gnu.version_d)
+    . = ALIGN(4);		/* this table MUST be 4-byte aligned */
+    _bss_table_start = ABSOLUTE(.);
+    LONG(_bss_start)
+    LONG(_bss_end)
+    LONG(_dram0_bss_start)
+    LONG(_dram0_bss_end)
+    LONG(_dram1_bss_start)
+    LONG(_dram1_bss_end)
+    LONG(_local_sram_bss_start)
+    LONG(_local_sram_bss_end)
+    _bss_table_end = ABSOLUTE(.);
+    . = ALIGN (4);
+    _rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .sram.text : ALIGN(4)
+  {
+    _sram_text_start = ABSOLUTE(.);
+    *(.sram.literal .sram.text)
+    . = ALIGN (4);
+    _sram_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .text : ALIGN(4)
+  {
+    _stext = .;
+    _text_start = ABSOLUTE(.);
+    *(.entry.text)
+    *(.init.literal)
+    KEEP(*(.init))
+    *(.literal.sort.* SORT(.text.sort.*))
+    KEEP (*(.literal.keepsort.* SORT(.text.keepsort.*) .literal.keep.* .text.keep.* .literal.*personality* .text.*personality*))
+    *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
+    *(.fini.literal)
+    KEEP(*(.fini))
+    *(.gnu.version)
+    . = ALIGN (4);
+    _text_end = ABSOLUTE(.);
+    _etext = .;
+  } >sram1_seg :sram1_phdr
+
+  .clib.text : ALIGN(4)
+  {
+    _clib_text_start = ABSOLUTE(.);
+    *(.clib.literal .clib.text)
+    . = ALIGN (4);
+    _clib_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.text : ALIGN(4)
+  {
+    _rtos_text_start = ABSOLUTE(.);
+    *(.rtos.literal .rtos.text)
+    . = ALIGN (4);
+    _rtos_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.data : ALIGN(4)
+  {
+    _clib_data_start = ABSOLUTE(.);
+    *(.clib.data)
+    . = ALIGN (4);
+    _clib_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.percpu.data : ALIGN(4)
+  {
+    _clib_percpu_data_start = ABSOLUTE(.);
+    *(.clib.percpu.data)
+    . = ALIGN (4);
+    _clib_percpu_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.percpu.data : ALIGN(4)
+  {
+    _rtos_percpu_data_start = ABSOLUTE(.);
+    *(.rtos.percpu.data)
+    . = ALIGN (4);
+    _rtos_percpu_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.data : ALIGN(4)
+  {
+    _rtos_data_start = ABSOLUTE(.);
+    *(.rtos.data)
+    . = ALIGN (4);
+    _rtos_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .sram.data : ALIGN(4)
+  {
+    _sram_data_start = ABSOLUTE(.);
+    *(.sram.data)
+    . = ALIGN (4);
+    _sram_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .data : ALIGN(4)
+  {
+    _data_start = ABSOLUTE(.);
+    *(.data)
+    *(SORT(.data.sort.*))
+    KEEP (*(SORT(.data.keepsort.*) .data.keep.*))
+    *(.data.*)
+    *(.gnu.linkonce.d.*)
+    KEEP(*(.gnu.linkonce.d.*personality*))
+    *(.data1)
+    *(.sdata)
+    *(.sdata.*)
+    *(.gnu.linkonce.s.*)
+    *(.sdata2)
+    *(.sdata2.*)
+    *(.gnu.linkonce.s2.*)
+    KEEP(*(.jcr))
+    *(__llvm_prf_cnts)
+    *(__llvm_prf_data)
+    *(__llvm_prf_vnds)
+    . = ALIGN (4);
+    _data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  __llvm_prf_names : ALIGN(4)
+  {
+    __llvm_prf_names_start = ABSOLUTE(.);
+    *(__llvm_prf_names)
+    . = ALIGN (4);
+    __llvm_prf_names_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _bss_start = ABSOLUTE(.);
+    *(.dynsbss)
+    *(.sbss)
+    *(.sbss.*)
+    *(.gnu.linkonce.sb.*)
+    *(.scommon)
+    *(.sbss2)
+    *(.sbss2.*)
+    *(.gnu.linkonce.sb2.*)
+    *(.dynbss)
+    *(.bss)
+    *(SORT(.bss.sort.*))
+    KEEP (*(SORT(.bss.keepsort.*) .bss.keep.*))
+    *(.bss.*)
+    *(.gnu.linkonce.b.*)
+    *(COMMON)
+    *(.clib.bss)
+    *(.clib.percpu.bss)
+    *(.rtos.percpu.bss)
+    *(.rtos.bss)
+    *(.sram.bss)
+    *(.debug.bss)
+    . = ALIGN (8);
+    _bss_end = ABSOLUTE(.);
+    _end = ALIGN(0x8);
+    PROVIDE(end = ALIGN(0x8));
+    _memmap_seg_sram1_end = ALIGN(0x8);
+  } >sram1_seg :sram1_bss_phdr
+
+  _heap_sentry = 0x25000000;
+  _memmap_mem_sram_max = ABSOLUTE(.);
+
+  .dram0.rodata : ALIGN(4)
+  {
+    _dram0_rodata_start = ABSOLUTE(.);
+    *(.dram0.rodata)
+    . = ALIGN (4);
+    _dram0_rodata_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.data : ALIGN(4)
+  {
+    _dram0_data_start = ABSOLUTE(.);
+    *(.dram0.data)
+    . = ALIGN (4);
+    _dram0_data_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dram0_bss_start = ABSOLUTE(.);
+    *(.dram0.bss)
+    *(.dram0_user.bss)
+    . = ALIGN (8);
+    _dram0_bss_end = ABSOLUTE(.);
+    _memmap_seg_dram0_0_end = ALIGN(0x8);
+  } >dram0_0_seg :dram0_0_bss_phdr
+
+  _memmap_mem_dram0_max = ABSOLUTE(.);
+
+  .dram1.rodata : ALIGN(4)
+  {
+    _dram1_rodata_start = ABSOLUTE(.);
+    *(.dram1.rodata)
+    . = ALIGN (4);
+    _dram1_rodata_end = ABSOLUTE(.);
+  } >dram1_0_seg :dram1_0_phdr
+
+  .dram1.data : ALIGN(4)
+  {
+    _dram1_data_start = ABSOLUTE(.);
+    *(.dram1.data)
+    . = ALIGN (4);
+    _dram1_data_end = ABSOLUTE(.);
+  } >dram1_0_seg :dram1_0_phdr
+
+  .dram1.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dram1_bss_start = ABSOLUTE(.);
+    *(.dram1.bss)
+    *(.dram1_user.bss)
+    . = ALIGN (8);
+    _dram1_bss_end = ABSOLUTE(.);
+    _stack_sentry = ALIGN(0x8);
+    _memmap_seg_dram1_0_end = ALIGN(0x8);
+  } >dram1_0_seg :dram1_0_bss_phdr
+
+  PROVIDE(__stack = 0xe01c0000);
+  _isb_default = 0xe01bfe10;
+  _memmap_mem_dram1_max = ABSOLUTE(.);
+
+  .local_sram.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _local_sram_bss_start = ABSOLUTE(.);
+    *(.local_sram.bss)
+    . = ALIGN (8);
+    _local_sram_bss_end = ABSOLUTE(.);
+    _memmap_seg_local_sram_0_end = ALIGN(0x8);
+  } >local_sram_0_seg :local_sram_0_bss_phdr
+
+
+  _memmap_mem_local_sram_max = ABSOLUTE(.);
+
+  .debug  0 :  { *(.debug) }
+  .line  0 :  { *(.line) }
+  .debug_srcinfo  0 :  { *(.debug_srcinfo) }
+  .debug_sfnames  0 :  { *(.debug_sfnames) }
+  .debug_aranges  0 :  { *(.debug_aranges) }
+  .debug_pubnames  0 :  { *(.debug_pubnames) }
+  .debug_info  0 :  { *(.debug_info) }
+  .debug_abbrev  0 :  { *(.debug_abbrev) }
+  .debug_line  0 :  { *(.debug_line) }
+  .debug_frame  0 :  { *(.debug_frame) }
+  .debug_str  0 :  { *(.debug_str) }
+  .debug_loc  0 :  { *(.debug_loc) }
+  .debug_macinfo  0 :  { *(.debug_macinfo) }
+  .debug_weaknames  0 :  { *(.debug_weaknames) }
+  .debug_funcnames  0 :  { *(.debug_funcnames) }
+  .debug_typenames  0 :  { *(.debug_typenames) }
+  .debug_varnames  0 :  { *(.debug_varnames) }
+  .xt.insn 0 :
+  {
+    KEEP (*(.xt.insn))
+    KEEP (*(.gnu.linkonce.x.*))
+  }
+  .xt.prop 0 :
+  {
+    KEEP (*(.xt.prop))
+    KEEP (*(.xt.prop.*))
+    KEEP (*(.gnu.linkonce.prop.*))
+  }
+  .xt.lit 0 :
+  {
+    KEEP (*(.xt.lit))
+    KEEP (*(.xt.lit.*))
+    KEEP (*(.gnu.linkonce.p.*))
+  }
+  .debug.xt.callgraph 0 :
+  {
+    KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
+  }
+}
+

+ 444 - 0
LSP/gdbio_core1_stact_tcm1/ldscripts/elf32xtensa.xbn

@@ -0,0 +1,444 @@
+/* This linker script generated from xt-genldscripts.tpp for LSP C:\usr\xtensa\XtDevTools\install\builds\RI-2020.4-win32\q7_check\xtensa-elf\lib\min-rt_0x24_stact_tcm1 */
+/* Linker Script for ld -N */
+MEMORY
+{
+  sram0_seg :                         	org = 0x24000000, len = 0x2000
+  sram1_seg :                         	org = 0x24002000, len = 0xFFE000
+  dram0_0_seg :                       	org = 0xE0180000, len = 0x20000
+  dram1_0_seg :                       	org = 0xE01A0000, len = 0x20000
+  local_sram_0_seg :                  	org = 0xFFA00000, len = 0x180000
+}
+
+PHDRS
+{
+  sram0_phdr PT_LOAD;
+  sram1_phdr PT_LOAD;
+  sram1_bss_phdr PT_LOAD;
+  dram0_0_phdr PT_LOAD;
+  dram0_0_bss_phdr PT_LOAD;
+  dram1_0_phdr PT_LOAD;
+  dram1_0_bss_phdr PT_LOAD;
+  local_sram_0_phdr PT_LOAD;
+  local_sram_0_bss_phdr PT_LOAD;
+}
+
+
+/*  Default entry point:  */
+ENTRY(_ResetVector)
+
+
+/*  Memory boundary addresses:  */
+_memmap_mem_sram_start = 0x24000000;
+_memmap_mem_sram_end   = 0x25000000;
+_memmap_mem_dram0_start = 0xe0180000;
+_memmap_mem_dram0_end   = 0xe01a0000;
+_memmap_mem_dram1_start = 0xe01a0000;
+_memmap_mem_dram1_end   = 0xe01c0000;
+_memmap_mem_local_sram_start = 0xffa00000;
+_memmap_mem_local_sram_end   = 0xffb80000;
+
+/*  Memory segment boundary addresses:  */
+_memmap_seg_sram0_start = 0x24000000;
+_memmap_seg_sram0_max   = 0x24002000;
+_memmap_seg_sram1_start = 0x24002000;
+_memmap_seg_sram1_max   = 0x25000000;
+_memmap_seg_dram0_0_start = 0xe0180000;
+_memmap_seg_dram0_0_max   = 0xe01a0000;
+_memmap_seg_dram1_0_start = 0xe01a0000;
+_memmap_seg_dram1_0_max   = 0xe01c0000;
+_memmap_seg_local_sram_0_start = 0xffa00000;
+_memmap_seg_local_sram_0_max   = 0xffb80000;
+
+_rom_store_table = 0;
+PROVIDE(_memmap_reset_vector = 0x24000000);
+PROVIDE(_memmap_vecbase_reset = 0x24000000);
+/* Various memory-map dependent cache attribute settings: */
+_memmap_cacheattr_wb_base = 0x10000010;
+_memmap_cacheattr_wt_base = 0x30000030;
+_memmap_cacheattr_bp_base = 0x40000040;
+_memmap_cacheattr_unused_mask = 0x0FFFFF0F;
+_memmap_cacheattr_wb_trapnull = 0x14444410;
+_memmap_cacheattr_wba_trapnull = 0x14444410;
+_memmap_cacheattr_wbna_trapnull = 0x24444420;
+_memmap_cacheattr_wt_trapnull = 0x34444430;
+_memmap_cacheattr_bp_trapnull = 0x44444440;
+_memmap_cacheattr_wb_strict = 0x10000010;
+_memmap_cacheattr_wt_strict = 0x30000030;
+_memmap_cacheattr_bp_strict = 0x40000040;
+_memmap_cacheattr_wb_allvalid = 0x14444414;
+_memmap_cacheattr_wt_allvalid = 0x34444434;
+_memmap_cacheattr_bp_allvalid = 0x44444444;
+_memmap_region_map = 0x00000082;
+PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
+
+SECTIONS
+{
+
+  .DispatchVector.text : ALIGN(4)
+  {
+    _DispatchVector_text_start = ABSOLUTE(.);
+    KEEP (*(.DispatchVector.text))
+    . = ALIGN (4);
+    _DispatchVector_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .ResetVector.text : ALIGN(4)
+  {
+    _ResetVector_text_start = ABSOLUTE(.);
+    *(.ResetVector.text)
+    . = ALIGN (4);
+    _ResetVector_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .ResetHandler.text : ALIGN(4)
+  {
+    _ResetHandler_text_start = ABSOLUTE(.);
+    *(.ResetHandler.literal .ResetHandler.text)
+    . = ALIGN (4);
+    _ResetHandler_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .DispatchHandler.text : ALIGN(4)
+  {
+    _DispatchHandler_text_start = ABSOLUTE(.);
+    *(.DispatchHandler.literal .DispatchHandler.text)
+    . = ALIGN (4);
+    _DispatchHandler_text_end = ABSOLUTE(.);
+    _memmap_seg_sram0_end = ALIGN(0x8);
+  } >sram0_seg :sram0_phdr
+
+
+  .sram.rodata : ALIGN(4)
+  {
+    _sram_rodata_start = ABSOLUTE(.);
+    *(.sram.rodata)
+    . = ALIGN (4);
+    _sram_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.rodata : ALIGN(4)
+  {
+    _clib_rodata_start = ABSOLUTE(.);
+    *(.clib.rodata)
+    . = ALIGN (4);
+    _clib_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.rodata : ALIGN(4)
+  {
+    _rtos_rodata_start = ABSOLUTE(.);
+    *(.rtos.rodata)
+    . = ALIGN (4);
+    _rtos_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rodata : ALIGN(4)
+  {
+    _rodata_start = ABSOLUTE(.);
+    *(.rodata)
+    *(SORT(.rodata.sort.*))
+    KEEP (*(SORT(.rodata.keepsort.*) .rodata.keep.*))
+    *(.rodata.*)
+    *(.gnu.linkonce.r.*)
+    *(.rodata1)
+    __XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
+    KEEP (*(.xt_except_table))
+    KEEP (*(.gcc_except_table))
+    *(.gnu.linkonce.e.*)
+    *(.gnu.version_r)
+    KEEP (*(.eh_frame))
+    /*  C++ constructor and destructor tables, properly ordered:  */
+    KEEP (*crtbegin.o(.ctors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*(.ctors))
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*(.dtors))
+    /*  C++ exception handlers table:  */
+    __XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
+    *(.xt_except_desc)
+    *(.gnu.linkonce.h.*)
+    __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
+    *(.xt_except_desc_end)
+    *(.dynamic)
+    *(.gnu.version_d)
+    . = ALIGN(4);		/* this table MUST be 4-byte aligned */
+    _bss_table_start = ABSOLUTE(.);
+    LONG(_bss_start)
+    LONG(_bss_end)
+    LONG(_dram0_bss_start)
+    LONG(_dram0_bss_end)
+    LONG(_dram1_bss_start)
+    LONG(_dram1_bss_end)
+    LONG(_local_sram_bss_start)
+    LONG(_local_sram_bss_end)
+    _bss_table_end = ABSOLUTE(.);
+    . = ALIGN (4);
+    _rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .sram.text : ALIGN(4)
+  {
+    _sram_text_start = ABSOLUTE(.);
+    *(.sram.literal .sram.text)
+    . = ALIGN (4);
+    _sram_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .text : ALIGN(4)
+  {
+    _stext = .;
+    _text_start = ABSOLUTE(.);
+    *(.entry.text)
+    *(.init.literal)
+    KEEP(*(.init))
+    *(.literal.sort.* SORT(.text.sort.*))
+    KEEP (*(.literal.keepsort.* SORT(.text.keepsort.*) .literal.keep.* .text.keep.* .literal.*personality* .text.*personality*))
+    *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
+    *(.fini.literal)
+    KEEP(*(.fini))
+    *(.gnu.version)
+    . = ALIGN (4);
+    _text_end = ABSOLUTE(.);
+    _etext = .;
+  } >sram1_seg :sram1_phdr
+
+  .clib.text : ALIGN(4)
+  {
+    _clib_text_start = ABSOLUTE(.);
+    *(.clib.literal .clib.text)
+    . = ALIGN (4);
+    _clib_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.text : ALIGN(4)
+  {
+    _rtos_text_start = ABSOLUTE(.);
+    *(.rtos.literal .rtos.text)
+    . = ALIGN (4);
+    _rtos_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.data : ALIGN(4)
+  {
+    _clib_data_start = ABSOLUTE(.);
+    *(.clib.data)
+    . = ALIGN (4);
+    _clib_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.percpu.data : ALIGN(4)
+  {
+    _clib_percpu_data_start = ABSOLUTE(.);
+    *(.clib.percpu.data)
+    . = ALIGN (4);
+    _clib_percpu_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.percpu.data : ALIGN(4)
+  {
+    _rtos_percpu_data_start = ABSOLUTE(.);
+    *(.rtos.percpu.data)
+    . = ALIGN (4);
+    _rtos_percpu_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.data : ALIGN(4)
+  {
+    _rtos_data_start = ABSOLUTE(.);
+    *(.rtos.data)
+    . = ALIGN (4);
+    _rtos_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .sram.data : ALIGN(4)
+  {
+    _sram_data_start = ABSOLUTE(.);
+    *(.sram.data)
+    . = ALIGN (4);
+    _sram_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .data : ALIGN(4)
+  {
+    _data_start = ABSOLUTE(.);
+    *(.data)
+    *(SORT(.data.sort.*))
+    KEEP (*(SORT(.data.keepsort.*) .data.keep.*))
+    *(.data.*)
+    *(.gnu.linkonce.d.*)
+    KEEP(*(.gnu.linkonce.d.*personality*))
+    *(.data1)
+    *(.sdata)
+    *(.sdata.*)
+    *(.gnu.linkonce.s.*)
+    *(.sdata2)
+    *(.sdata2.*)
+    *(.gnu.linkonce.s2.*)
+    KEEP(*(.jcr))
+    *(__llvm_prf_cnts)
+    *(__llvm_prf_data)
+    *(__llvm_prf_vnds)
+    . = ALIGN (4);
+    _data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  __llvm_prf_names : ALIGN(4)
+  {
+    __llvm_prf_names_start = ABSOLUTE(.);
+    *(__llvm_prf_names)
+    . = ALIGN (4);
+    __llvm_prf_names_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _bss_start = ABSOLUTE(.);
+    *(.dynsbss)
+    *(.sbss)
+    *(.sbss.*)
+    *(.gnu.linkonce.sb.*)
+    *(.scommon)
+    *(.sbss2)
+    *(.sbss2.*)
+    *(.gnu.linkonce.sb2.*)
+    *(.dynbss)
+    *(.bss)
+    *(SORT(.bss.sort.*))
+    KEEP (*(SORT(.bss.keepsort.*) .bss.keep.*))
+    *(.bss.*)
+    *(.gnu.linkonce.b.*)
+    *(COMMON)
+    *(.clib.bss)
+    *(.clib.percpu.bss)
+    *(.rtos.percpu.bss)
+    *(.rtos.bss)
+    *(.sram.bss)
+    *(.debug.bss)
+    . = ALIGN (8);
+    _bss_end = ABSOLUTE(.);
+    _end = ALIGN(0x8);
+    PROVIDE(end = ALIGN(0x8));
+    _memmap_seg_sram1_end = ALIGN(0x8);
+  } >sram1_seg :sram1_bss_phdr
+
+  _heap_sentry = 0x25000000;
+  _memmap_mem_sram_max = ABSOLUTE(.);
+
+  .dram0.rodata : ALIGN(4)
+  {
+    _dram0_rodata_start = ABSOLUTE(.);
+    *(.dram0.rodata)
+    . = ALIGN (4);
+    _dram0_rodata_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.data : ALIGN(4)
+  {
+    _dram0_data_start = ABSOLUTE(.);
+    *(.dram0.data)
+    . = ALIGN (4);
+    _dram0_data_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dram0_bss_start = ABSOLUTE(.);
+    *(.dram0.bss)
+    *(.dram0_user.bss)
+    . = ALIGN (8);
+    _dram0_bss_end = ABSOLUTE(.);
+    _memmap_seg_dram0_0_end = ALIGN(0x8);
+  } >dram0_0_seg :dram0_0_bss_phdr
+
+  _memmap_mem_dram0_max = ABSOLUTE(.);
+
+  .dram1.rodata : ALIGN(4)
+  {
+    _dram1_rodata_start = ABSOLUTE(.);
+    *(.dram1.rodata)
+    . = ALIGN (4);
+    _dram1_rodata_end = ABSOLUTE(.);
+  } >dram1_0_seg :dram1_0_phdr
+
+  .dram1.data : ALIGN(4)
+  {
+    _dram1_data_start = ABSOLUTE(.);
+    *(.dram1.data)
+    . = ALIGN (4);
+    _dram1_data_end = ABSOLUTE(.);
+  } >dram1_0_seg :dram1_0_phdr
+
+  .dram1.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dram1_bss_start = ABSOLUTE(.);
+    *(.dram1.bss)
+    *(.dram1_user.bss)
+    . = ALIGN (8);
+    _dram1_bss_end = ABSOLUTE(.);
+    _stack_sentry = ALIGN(0x8);
+    _memmap_seg_dram1_0_end = ALIGN(0x8);
+  } >dram1_0_seg :dram1_0_bss_phdr
+
+  PROVIDE(__stack = 0xe01c0000);
+  _isb_default = 0xe01bfe10;
+  _memmap_mem_dram1_max = ABSOLUTE(.);
+
+  .local_sram.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _local_sram_bss_start = ABSOLUTE(.);
+    *(.local_sram.bss)
+    . = ALIGN (8);
+    _local_sram_bss_end = ABSOLUTE(.);
+    _memmap_seg_local_sram_0_end = ALIGN(0x8);
+  } >local_sram_0_seg :local_sram_0_bss_phdr
+
+
+  _memmap_mem_local_sram_max = ABSOLUTE(.);
+
+  .debug  0 :  { *(.debug) }
+  .line  0 :  { *(.line) }
+  .debug_srcinfo  0 :  { *(.debug_srcinfo) }
+  .debug_sfnames  0 :  { *(.debug_sfnames) }
+  .debug_aranges  0 :  { *(.debug_aranges) }
+  .debug_pubnames  0 :  { *(.debug_pubnames) }
+  .debug_info  0 :  { *(.debug_info) }
+  .debug_abbrev  0 :  { *(.debug_abbrev) }
+  .debug_line  0 :  { *(.debug_line) }
+  .debug_frame  0 :  { *(.debug_frame) }
+  .debug_str  0 :  { *(.debug_str) }
+  .debug_loc  0 :  { *(.debug_loc) }
+  .debug_macinfo  0 :  { *(.debug_macinfo) }
+  .debug_weaknames  0 :  { *(.debug_weaknames) }
+  .debug_funcnames  0 :  { *(.debug_funcnames) }
+  .debug_typenames  0 :  { *(.debug_typenames) }
+  .debug_varnames  0 :  { *(.debug_varnames) }
+  .xt.insn 0 :
+  {
+    KEEP (*(.xt.insn))
+    KEEP (*(.gnu.linkonce.x.*))
+  }
+  .xt.prop 0 :
+  {
+    KEEP (*(.xt.prop))
+    KEEP (*(.xt.prop.*))
+    KEEP (*(.gnu.linkonce.prop.*))
+  }
+  .xt.lit 0 :
+  {
+    KEEP (*(.xt.lit))
+    KEEP (*(.xt.lit.*))
+    KEEP (*(.gnu.linkonce.p.*))
+  }
+  .debug.xt.callgraph 0 :
+  {
+    KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
+  }
+}
+

+ 444 - 0
LSP/gdbio_core1_stact_tcm1/ldscripts/elf32xtensa.xn

@@ -0,0 +1,444 @@
+/* This linker script generated from xt-genldscripts.tpp for LSP C:\usr\xtensa\XtDevTools\install\builds\RI-2020.4-win32\q7_check\xtensa-elf\lib\min-rt_0x24_stact_tcm1 */
+/* Linker Script for ld -n */
+MEMORY
+{
+  sram0_seg :                         	org = 0x24000000, len = 0x2000
+  sram1_seg :                         	org = 0x24002000, len = 0xFFE000
+  dram0_0_seg :                       	org = 0xE0180000, len = 0x20000
+  dram1_0_seg :                       	org = 0xE01A0000, len = 0x20000
+  local_sram_0_seg :                  	org = 0xFFA00000, len = 0x180000
+}
+
+PHDRS
+{
+  sram0_phdr PT_LOAD;
+  sram1_phdr PT_LOAD;
+  sram1_bss_phdr PT_LOAD;
+  dram0_0_phdr PT_LOAD;
+  dram0_0_bss_phdr PT_LOAD;
+  dram1_0_phdr PT_LOAD;
+  dram1_0_bss_phdr PT_LOAD;
+  local_sram_0_phdr PT_LOAD;
+  local_sram_0_bss_phdr PT_LOAD;
+}
+
+
+/*  Default entry point:  */
+ENTRY(_ResetVector)
+
+
+/*  Memory boundary addresses:  */
+_memmap_mem_sram_start = 0x24000000;
+_memmap_mem_sram_end   = 0x25000000;
+_memmap_mem_dram0_start = 0xe0180000;
+_memmap_mem_dram0_end   = 0xe01a0000;
+_memmap_mem_dram1_start = 0xe01a0000;
+_memmap_mem_dram1_end   = 0xe01c0000;
+_memmap_mem_local_sram_start = 0xffa00000;
+_memmap_mem_local_sram_end   = 0xffb80000;
+
+/*  Memory segment boundary addresses:  */
+_memmap_seg_sram0_start = 0x24000000;
+_memmap_seg_sram0_max   = 0x24002000;
+_memmap_seg_sram1_start = 0x24002000;
+_memmap_seg_sram1_max   = 0x25000000;
+_memmap_seg_dram0_0_start = 0xe0180000;
+_memmap_seg_dram0_0_max   = 0xe01a0000;
+_memmap_seg_dram1_0_start = 0xe01a0000;
+_memmap_seg_dram1_0_max   = 0xe01c0000;
+_memmap_seg_local_sram_0_start = 0xffa00000;
+_memmap_seg_local_sram_0_max   = 0xffb80000;
+
+_rom_store_table = 0;
+PROVIDE(_memmap_reset_vector = 0x24000000);
+PROVIDE(_memmap_vecbase_reset = 0x24000000);
+/* Various memory-map dependent cache attribute settings: */
+_memmap_cacheattr_wb_base = 0x10000010;
+_memmap_cacheattr_wt_base = 0x30000030;
+_memmap_cacheattr_bp_base = 0x40000040;
+_memmap_cacheattr_unused_mask = 0x0FFFFF0F;
+_memmap_cacheattr_wb_trapnull = 0x14444410;
+_memmap_cacheattr_wba_trapnull = 0x14444410;
+_memmap_cacheattr_wbna_trapnull = 0x24444420;
+_memmap_cacheattr_wt_trapnull = 0x34444430;
+_memmap_cacheattr_bp_trapnull = 0x44444440;
+_memmap_cacheattr_wb_strict = 0x10000010;
+_memmap_cacheattr_wt_strict = 0x30000030;
+_memmap_cacheattr_bp_strict = 0x40000040;
+_memmap_cacheattr_wb_allvalid = 0x14444414;
+_memmap_cacheattr_wt_allvalid = 0x34444434;
+_memmap_cacheattr_bp_allvalid = 0x44444444;
+_memmap_region_map = 0x00000082;
+PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
+
+SECTIONS
+{
+
+  .DispatchVector.text : ALIGN(4)
+  {
+    _DispatchVector_text_start = ABSOLUTE(.);
+    KEEP (*(.DispatchVector.text))
+    . = ALIGN (4);
+    _DispatchVector_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .ResetVector.text : ALIGN(4)
+  {
+    _ResetVector_text_start = ABSOLUTE(.);
+    *(.ResetVector.text)
+    . = ALIGN (4);
+    _ResetVector_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .ResetHandler.text : ALIGN(4)
+  {
+    _ResetHandler_text_start = ABSOLUTE(.);
+    *(.ResetHandler.literal .ResetHandler.text)
+    . = ALIGN (4);
+    _ResetHandler_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .DispatchHandler.text : ALIGN(4)
+  {
+    _DispatchHandler_text_start = ABSOLUTE(.);
+    *(.DispatchHandler.literal .DispatchHandler.text)
+    . = ALIGN (4);
+    _DispatchHandler_text_end = ABSOLUTE(.);
+    _memmap_seg_sram0_end = ALIGN(0x8);
+  } >sram0_seg :sram0_phdr
+
+
+  .sram.rodata : ALIGN(4)
+  {
+    _sram_rodata_start = ABSOLUTE(.);
+    *(.sram.rodata)
+    . = ALIGN (4);
+    _sram_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.rodata : ALIGN(4)
+  {
+    _clib_rodata_start = ABSOLUTE(.);
+    *(.clib.rodata)
+    . = ALIGN (4);
+    _clib_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.rodata : ALIGN(4)
+  {
+    _rtos_rodata_start = ABSOLUTE(.);
+    *(.rtos.rodata)
+    . = ALIGN (4);
+    _rtos_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rodata : ALIGN(4)
+  {
+    _rodata_start = ABSOLUTE(.);
+    *(.rodata)
+    *(SORT(.rodata.sort.*))
+    KEEP (*(SORT(.rodata.keepsort.*) .rodata.keep.*))
+    *(.rodata.*)
+    *(.gnu.linkonce.r.*)
+    *(.rodata1)
+    __XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
+    KEEP (*(.xt_except_table))
+    KEEP (*(.gcc_except_table))
+    *(.gnu.linkonce.e.*)
+    *(.gnu.version_r)
+    KEEP (*(.eh_frame))
+    /*  C++ constructor and destructor tables, properly ordered:  */
+    KEEP (*crtbegin.o(.ctors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*(.ctors))
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*(.dtors))
+    /*  C++ exception handlers table:  */
+    __XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
+    *(.xt_except_desc)
+    *(.gnu.linkonce.h.*)
+    __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
+    *(.xt_except_desc_end)
+    *(.dynamic)
+    *(.gnu.version_d)
+    . = ALIGN(4);		/* this table MUST be 4-byte aligned */
+    _bss_table_start = ABSOLUTE(.);
+    LONG(_bss_start)
+    LONG(_bss_end)
+    LONG(_dram0_bss_start)
+    LONG(_dram0_bss_end)
+    LONG(_dram1_bss_start)
+    LONG(_dram1_bss_end)
+    LONG(_local_sram_bss_start)
+    LONG(_local_sram_bss_end)
+    _bss_table_end = ABSOLUTE(.);
+    . = ALIGN (4);
+    _rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .sram.text : ALIGN(4)
+  {
+    _sram_text_start = ABSOLUTE(.);
+    *(.sram.literal .sram.text)
+    . = ALIGN (4);
+    _sram_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .text : ALIGN(4)
+  {
+    _stext = .;
+    _text_start = ABSOLUTE(.);
+    *(.entry.text)
+    *(.init.literal)
+    KEEP(*(.init))
+    *(.literal.sort.* SORT(.text.sort.*))
+    KEEP (*(.literal.keepsort.* SORT(.text.keepsort.*) .literal.keep.* .text.keep.* .literal.*personality* .text.*personality*))
+    *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
+    *(.fini.literal)
+    KEEP(*(.fini))
+    *(.gnu.version)
+    . = ALIGN (4);
+    _text_end = ABSOLUTE(.);
+    _etext = .;
+  } >sram1_seg :sram1_phdr
+
+  .clib.text : ALIGN(4)
+  {
+    _clib_text_start = ABSOLUTE(.);
+    *(.clib.literal .clib.text)
+    . = ALIGN (4);
+    _clib_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.text : ALIGN(4)
+  {
+    _rtos_text_start = ABSOLUTE(.);
+    *(.rtos.literal .rtos.text)
+    . = ALIGN (4);
+    _rtos_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.data : ALIGN(4)
+  {
+    _clib_data_start = ABSOLUTE(.);
+    *(.clib.data)
+    . = ALIGN (4);
+    _clib_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.percpu.data : ALIGN(4)
+  {
+    _clib_percpu_data_start = ABSOLUTE(.);
+    *(.clib.percpu.data)
+    . = ALIGN (4);
+    _clib_percpu_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.percpu.data : ALIGN(4)
+  {
+    _rtos_percpu_data_start = ABSOLUTE(.);
+    *(.rtos.percpu.data)
+    . = ALIGN (4);
+    _rtos_percpu_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.data : ALIGN(4)
+  {
+    _rtos_data_start = ABSOLUTE(.);
+    *(.rtos.data)
+    . = ALIGN (4);
+    _rtos_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .sram.data : ALIGN(4)
+  {
+    _sram_data_start = ABSOLUTE(.);
+    *(.sram.data)
+    . = ALIGN (4);
+    _sram_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .data : ALIGN(4)
+  {
+    _data_start = ABSOLUTE(.);
+    *(.data)
+    *(SORT(.data.sort.*))
+    KEEP (*(SORT(.data.keepsort.*) .data.keep.*))
+    *(.data.*)
+    *(.gnu.linkonce.d.*)
+    KEEP(*(.gnu.linkonce.d.*personality*))
+    *(.data1)
+    *(.sdata)
+    *(.sdata.*)
+    *(.gnu.linkonce.s.*)
+    *(.sdata2)
+    *(.sdata2.*)
+    *(.gnu.linkonce.s2.*)
+    KEEP(*(.jcr))
+    *(__llvm_prf_cnts)
+    *(__llvm_prf_data)
+    *(__llvm_prf_vnds)
+    . = ALIGN (4);
+    _data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  __llvm_prf_names : ALIGN(4)
+  {
+    __llvm_prf_names_start = ABSOLUTE(.);
+    *(__llvm_prf_names)
+    . = ALIGN (4);
+    __llvm_prf_names_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _bss_start = ABSOLUTE(.);
+    *(.dynsbss)
+    *(.sbss)
+    *(.sbss.*)
+    *(.gnu.linkonce.sb.*)
+    *(.scommon)
+    *(.sbss2)
+    *(.sbss2.*)
+    *(.gnu.linkonce.sb2.*)
+    *(.dynbss)
+    *(.bss)
+    *(SORT(.bss.sort.*))
+    KEEP (*(SORT(.bss.keepsort.*) .bss.keep.*))
+    *(.bss.*)
+    *(.gnu.linkonce.b.*)
+    *(COMMON)
+    *(.clib.bss)
+    *(.clib.percpu.bss)
+    *(.rtos.percpu.bss)
+    *(.rtos.bss)
+    *(.sram.bss)
+    *(.debug.bss)
+    . = ALIGN (8);
+    _bss_end = ABSOLUTE(.);
+    _end = ALIGN(0x8);
+    PROVIDE(end = ALIGN(0x8));
+    _memmap_seg_sram1_end = ALIGN(0x8);
+  } >sram1_seg :sram1_bss_phdr
+
+  _heap_sentry = 0x25000000;
+  _memmap_mem_sram_max = ABSOLUTE(.);
+
+  .dram0.rodata : ALIGN(4)
+  {
+    _dram0_rodata_start = ABSOLUTE(.);
+    *(.dram0.rodata)
+    . = ALIGN (4);
+    _dram0_rodata_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.data : ALIGN(4)
+  {
+    _dram0_data_start = ABSOLUTE(.);
+    *(.dram0.data)
+    . = ALIGN (4);
+    _dram0_data_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dram0_bss_start = ABSOLUTE(.);
+    *(.dram0.bss)
+    *(.dram0_user.bss)
+    . = ALIGN (8);
+    _dram0_bss_end = ABSOLUTE(.);
+    _memmap_seg_dram0_0_end = ALIGN(0x8);
+  } >dram0_0_seg :dram0_0_bss_phdr
+
+  _memmap_mem_dram0_max = ABSOLUTE(.);
+
+  .dram1.rodata : ALIGN(4)
+  {
+    _dram1_rodata_start = ABSOLUTE(.);
+    *(.dram1.rodata)
+    . = ALIGN (4);
+    _dram1_rodata_end = ABSOLUTE(.);
+  } >dram1_0_seg :dram1_0_phdr
+
+  .dram1.data : ALIGN(4)
+  {
+    _dram1_data_start = ABSOLUTE(.);
+    *(.dram1.data)
+    . = ALIGN (4);
+    _dram1_data_end = ABSOLUTE(.);
+  } >dram1_0_seg :dram1_0_phdr
+
+  .dram1.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dram1_bss_start = ABSOLUTE(.);
+    *(.dram1.bss)
+    *(.dram1_user.bss)
+    . = ALIGN (8);
+    _dram1_bss_end = ABSOLUTE(.);
+    _stack_sentry = ALIGN(0x8);
+    _memmap_seg_dram1_0_end = ALIGN(0x8);
+  } >dram1_0_seg :dram1_0_bss_phdr
+
+  PROVIDE(__stack = 0xe01c0000);
+  _isb_default = 0xe01bfe10;
+  _memmap_mem_dram1_max = ABSOLUTE(.);
+
+  .local_sram.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _local_sram_bss_start = ABSOLUTE(.);
+    *(.local_sram.bss)
+    . = ALIGN (8);
+    _local_sram_bss_end = ABSOLUTE(.);
+    _memmap_seg_local_sram_0_end = ALIGN(0x8);
+  } >local_sram_0_seg :local_sram_0_bss_phdr
+
+
+  _memmap_mem_local_sram_max = ABSOLUTE(.);
+
+  .debug  0 :  { *(.debug) }
+  .line  0 :  { *(.line) }
+  .debug_srcinfo  0 :  { *(.debug_srcinfo) }
+  .debug_sfnames  0 :  { *(.debug_sfnames) }
+  .debug_aranges  0 :  { *(.debug_aranges) }
+  .debug_pubnames  0 :  { *(.debug_pubnames) }
+  .debug_info  0 :  { *(.debug_info) }
+  .debug_abbrev  0 :  { *(.debug_abbrev) }
+  .debug_line  0 :  { *(.debug_line) }
+  .debug_frame  0 :  { *(.debug_frame) }
+  .debug_str  0 :  { *(.debug_str) }
+  .debug_loc  0 :  { *(.debug_loc) }
+  .debug_macinfo  0 :  { *(.debug_macinfo) }
+  .debug_weaknames  0 :  { *(.debug_weaknames) }
+  .debug_funcnames  0 :  { *(.debug_funcnames) }
+  .debug_typenames  0 :  { *(.debug_typenames) }
+  .debug_varnames  0 :  { *(.debug_varnames) }
+  .xt.insn 0 :
+  {
+    KEEP (*(.xt.insn))
+    KEEP (*(.gnu.linkonce.x.*))
+  }
+  .xt.prop 0 :
+  {
+    KEEP (*(.xt.prop))
+    KEEP (*(.xt.prop.*))
+    KEEP (*(.gnu.linkonce.prop.*))
+  }
+  .xt.lit 0 :
+  {
+    KEEP (*(.xt.lit))
+    KEEP (*(.xt.lit.*))
+    KEEP (*(.gnu.linkonce.p.*))
+  }
+  .debug.xt.callgraph 0 :
+  {
+    KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
+  }
+}
+

+ 61 - 0
LSP/gdbio_core1_stact_tcm1/ldscripts/elf32xtensa.xr

@@ -0,0 +1,61 @@
+/* This linker script generated from xt-genldscripts.tpp for LSP C:\usr\xtensa\XtDevTools\install\builds\RI-2020.4-win32\q7_check\xtensa-elf\lib\min-rt_0x24_stact_tcm1 */
+/* Linker Script for ld -r or ld -i */
+
+
+SECTIONS
+{
+
+  .text 0 :
+  {
+    *(.literal .text)
+  }
+
+  .bss 0 :
+  {
+    *(.dynsbss)
+    *(.sbss)
+    *(.scommon)
+    *(.dynbss)
+    *(.bss)
+    *(COMMON)
+  }
+  .debug  0 :  { *(.debug) }
+  .line  0 :  { *(.line) }
+  .debug_srcinfo  0 :  { *(.debug_srcinfo) }
+  .debug_sfnames  0 :  { *(.debug_sfnames) }
+  .debug_aranges  0 :  { *(.debug_aranges) }
+  .debug_pubnames  0 :  { *(.debug_pubnames) }
+  .debug_info  0 :  { *(.debug_info) }
+  .debug_abbrev  0 :  { *(.debug_abbrev) }
+  .debug_line  0 :  { *(.debug_line) }
+  .debug_frame  0 :  { *(.debug_frame) }
+  .debug_str  0 :  { *(.debug_str) }
+  .debug_loc  0 :  { *(.debug_loc) }
+  .debug_macinfo  0 :  { *(.debug_macinfo) }
+  .debug_weaknames  0 :  { *(.debug_weaknames) }
+  .debug_funcnames  0 :  { *(.debug_funcnames) }
+  .debug_typenames  0 :  { *(.debug_typenames) }
+  .debug_varnames  0 :  { *(.debug_varnames) }
+  .xt.insn 0 :
+  {
+    KEEP (*(.xt.insn))
+    KEEP (*(.gnu.linkonce.x.*))
+  }
+  .xt.prop 0 :
+  {
+    KEEP (*(.xt.prop))
+    KEEP (*(.xt.prop.*))
+    KEEP (*(.gnu.linkonce.prop.*))
+  }
+  .xt.lit 0 :
+  {
+    KEEP (*(.xt.lit))
+    KEEP (*(.xt.lit.*))
+    KEEP (*(.gnu.linkonce.p.*))
+  }
+  .debug.xt.callgraph 0 :
+  {
+    KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
+  }
+}
+

+ 61 - 0
LSP/gdbio_core1_stact_tcm1/ldscripts/elf32xtensa.xu

@@ -0,0 +1,61 @@
+/* This linker script generated from xt-genldscripts.tpp for LSP C:\usr\xtensa\XtDevTools\install\builds\RI-2020.4-win32\q7_check\xtensa-elf\lib\min-rt_0x24_stact_tcm1 */
+/* Linker Script for ld -Ur */
+
+
+SECTIONS
+{
+
+  .text 0 :
+  {
+    *(.literal .text)
+  }
+
+  .bss 0 :
+  {
+    *(.dynsbss)
+    *(.sbss)
+    *(.scommon)
+    *(.dynbss)
+    *(.bss)
+    *(COMMON)
+  }
+  .debug  0 :  { *(.debug) }
+  .line  0 :  { *(.line) }
+  .debug_srcinfo  0 :  { *(.debug_srcinfo) }
+  .debug_sfnames  0 :  { *(.debug_sfnames) }
+  .debug_aranges  0 :  { *(.debug_aranges) }
+  .debug_pubnames  0 :  { *(.debug_pubnames) }
+  .debug_info  0 :  { *(.debug_info) }
+  .debug_abbrev  0 :  { *(.debug_abbrev) }
+  .debug_line  0 :  { *(.debug_line) }
+  .debug_frame  0 :  { *(.debug_frame) }
+  .debug_str  0 :  { *(.debug_str) }
+  .debug_loc  0 :  { *(.debug_loc) }
+  .debug_macinfo  0 :  { *(.debug_macinfo) }
+  .debug_weaknames  0 :  { *(.debug_weaknames) }
+  .debug_funcnames  0 :  { *(.debug_funcnames) }
+  .debug_typenames  0 :  { *(.debug_typenames) }
+  .debug_varnames  0 :  { *(.debug_varnames) }
+  .xt.insn 0 :
+  {
+    KEEP (*(.xt.insn))
+    KEEP (*(.gnu.linkonce.x.*))
+  }
+  .xt.prop 0 :
+  {
+    KEEP (*(.xt.prop))
+    KEEP (*(.xt.prop.*))
+    KEEP (*(.gnu.linkonce.prop.*))
+  }
+  .xt.lit 0 :
+  {
+    KEEP (*(.xt.lit))
+    KEEP (*(.xt.lit.*))
+    KEEP (*(.gnu.linkonce.p.*))
+  }
+  .debug.xt.callgraph 0 :
+  {
+    KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
+  }
+}
+

+ 79 - 0
LSP/gdbio_core1_stact_tcm1/memmap.xmm

@@ -0,0 +1,79 @@
+//  Memory map file to generate linker scripts for programs to run on
+//  most targets (that have the OCD option); allows I/O through the host
+//  debugger when being debugged using GDB (via the Xtensa OCD daemon).
+
+// Customer ID=16470; Build=0x8e648; Copyright (c) 2004-2015 Cadence Design Systems, Inc.
+//
+// Permission is hereby granted, free of charge, to any person obtaining
+// a copy of this software and associated documentation files (the
+// "Software"), to deal in the Software without restriction, including
+// without limitation the rights to use, copy, modify, merge, publish,
+// distribute, sublicense, and/or sell copies of the Software, and to
+// permit persons to whom the Software is furnished to do so, subject to
+// the following conditions:
+//
+// The above copyright notice and this permission notice shall be included
+// in all copies or substantial portions of the Software.
+//
+// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+// EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+// IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+// CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+// TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+// SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+
+//  Place stack in local RAM:
+PLACE SECTIONS(STACK) WITH_SECTION(.dram1.bss)
+// A memory map is a sequence of memory descriptions and
+// optional parameter assignments.
+//
+// Each memory description has the following format:
+//   BEGIN <name>
+//     <addr> [,<paddr>] : <mem-type> : <mem-name> : <size> [,<psize>]
+//                       : [writable] [,executable] [,device] ;
+//     <segment>*
+//   END <name>
+//
+// where each <segment> description has the following format:
+//     <seg-name> : F|C : <start-addr> - <end-addr> [ : STACK ] [ : HEAP ]
+//                : <section-name>* ;
+//
+// Each parameter assignment is a keyword/value pair in the following format:
+//   <keyword> = <value>                (no spaces in <value>)
+// or
+//   <keyword> = "<value>"              (spaces allowed in <value>)
+//
+// The following primitives are also defined:
+//   PLACE SECTIONS( <section-name>* ) { WITH_SECTION(<section-name>)
+//                                       | IN_SEGMENT(<seg-name>) }
+//
+//   NOLOAD <section-name1> [ <section-name2> ... ]
+//
+// Please refer to the Xtensa LSP Reference Manual for more details.
+//
+VECSELECT=1
+VECRESET=0x24000000
+VECBASE= 0x24000000
+
+BEGIN sram
+0x24000000: extra_mem : sram : 0x01000000 : executable, writable ;
+ sram0 : F : 0x24000000 - 0x24001fff : .DispatchVector.text .ResetVector.text .ResetHandler.literal .ResetHandler.text .DispatchHandler.literal .DispatchHandler.text;
+ sram1 : C : 0x24002000 - 0x24ffffff :  HEAP : .sram.rodata .clib.rodata .rtos.rodata .rodata .sram.literal .literal .rtos.literal .clib.literal .sram.text .text .clib.text .rtos.text .clib.data .clib.percpu.data .rtos.percpu.data .rtos.data .sram.data .data __llvm_prf_names .clib.bss .clib.percpu.bss .rtos.percpu.bss .rtos.bss .sram.bss .bss .debug.bss;
+ END sram
+
+BEGIN dram0
+0xe0180000: dataRam : dram0 : 0x20000 : writable ;
+ dram0_0 : C : 0xe0180000 - 0xe019ffff :.dram0.rodata .dram0.data .dram0.bss .dram0_user.bss;
+END dram0
+
+BEGIN dram1
+0xe01a0000: dataRam : dram1 : 0x20000 : writable ;
+ dram1_0 : C : 0xe01a0000 - 0xe01bffff :STACK :.dram1.rodata .dram1.data .dram1.bss .dram1_user.bss;
+END dram1
+
+BEGIN local_sram
+0xffa00000: sysram : local_sram :   0x180000: writable ;
+  local_sram_0 : C : 0xffa00000 - 0xffb7ffff :.local_sram.bss ;
+ END local_sram
+

+ 36 - 0
LSP/gdbio_core1_stact_tcm1/specs

@@ -0,0 +1,36 @@
+# Customer ID=16470; Build=0x8e648; Copyright (c) 2001-2015 Cadence Design Systems, Inc.
+#
+# Permission is hereby granted, free of charge, to any person obtaining
+# a copy of this software and associated documentation files (the
+# "Software"), to deal in the Software without restriction, including
+# without limitation the rights to use, copy, modify, merge, publish,
+# distribute, sublicense, and/or sell copies of the Software, and to
+# permit persons to whom the Software is furnished to do so, subject to
+# the following conditions:
+#
+# The above copyright notice and this permission notice shall be included
+# in all copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+# IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+# CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+# TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+# SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+
+
+# The %O suffix on the start and end files indicates that the system's
+# standard suffix for object files (e.g., ".o") should be appended.
+# The %s suffix tells the compiler driver to search for the file in the
+# list of known locations for startfiles.
+
+*startfile:
+crt1-boards%O%s crti%O%s crtbegin%O%s _sharedvectors%O%s _vectors%O%s
+
+*endfile:
+crtend%O%s crtn%O%s
+
+*lib:
+-lc -lgdbio -lc -lhandler-reset -lhandlers-board -lgdbio -lhal -lc
+

+ 528 - 0
LSP/min-rt_core0_lib0_stack_tcm1/ldscripts/elf32xtensa.x

@@ -0,0 +1,528 @@
+/* This linker script generated from xt-genldscripts.tpp for LSP C:\Users\DELL\workspace\CSI_DSP_FW\LSP\min-rt_core0_lib0_stack_tcm1 */
+/* Linker Script for default link */
+MEMORY
+{
+  sram0_seg :                         	org = 0x20000000, len = 0x1000
+  sram1_seg :                         	org = 0x20001000, len = 0x1FF000
+  sram2_seg :                         	org = 0x20200000, len = 0x40000
+  sram3_seg :                         	org = 0x20240000, len = 0x40000
+  dram0_0_seg :                       	org = 0xE0182800, len = 0x1D800
+  dram1_0_seg :                       	org = 0xE01A2800, len = 0x1D800
+  local_sram_0_seg :                  	org = 0xFFA00000, len = 0x180000
+}
+
+PHDRS
+{
+  sram0_phdr PT_LOAD;
+  sram1_phdr PT_LOAD;
+  sram1_bss_phdr PT_LOAD;
+  sram2_phdr PT_LOAD;
+  sram2_bss_phdr PT_LOAD;
+  sram3_phdr PT_LOAD;
+  sram3_bss_phdr PT_LOAD;
+  dram0_0_phdr PT_LOAD;
+  dram0_0_bss_phdr PT_LOAD;
+  dram1_0_phdr PT_LOAD;
+  dram1_0_bss_phdr PT_LOAD;
+  local_sram_0_phdr PT_LOAD;
+  local_sram_0_bss_phdr PT_LOAD;
+}
+
+
+/*  Default entry point:  */
+ENTRY(_libinit)
+
+
+/*  Memory boundary addresses:  */
+_memmap_mem_sram_start = 0x20000000;
+_memmap_mem_sram_end   = 0x20280000;
+_memmap_mem_dram0_start = 0xe0180000;
+_memmap_mem_dram0_end   = 0xe01a0000;
+_memmap_mem_dram1_start = 0xe01a0000;
+_memmap_mem_dram1_end   = 0xe01c0000;
+_memmap_mem_local_sram_start = 0xffa00000;
+_memmap_mem_local_sram_end   = 0xffb80000;
+
+/*  Memory segment boundary addresses:  */
+_memmap_seg_sram0_start = 0x20000000;
+_memmap_seg_sram0_max   = 0x20001000;
+_memmap_seg_sram1_start = 0x20001000;
+_memmap_seg_sram1_max   = 0x20200000;
+_memmap_seg_sram2_start = 0x20200000;
+_memmap_seg_sram2_max   = 0x20240000;
+_memmap_seg_sram3_start = 0x20240000;
+_memmap_seg_sram3_max   = 0x20280000;
+_memmap_seg_dram0_0_start = 0xe0182800;
+_memmap_seg_dram0_0_max   = 0xe01a0000;
+_memmap_seg_dram1_0_start = 0xe01a2800;
+_memmap_seg_dram1_0_max   = 0xe01c0000;
+_memmap_seg_local_sram_0_start = 0xffa00000;
+_memmap_seg_local_sram_0_max   = 0xffb80000;
+
+_rom_store_table = 0;
+PROVIDE(_memmap_reset_vector = 0x20000000);
+PROVIDE(_memmap_vecbase_reset = 0x20000000);
+/* Various memory-map dependent cache attribute settings: */
+_memmap_cacheattr_wb_base = 0x10000010;
+_memmap_cacheattr_wt_base = 0x30000030;
+_memmap_cacheattr_bp_base = 0x40000040;
+_memmap_cacheattr_unused_mask = 0x0FFFFF0F;
+_memmap_cacheattr_wb_trapnull = 0x14444411;
+_memmap_cacheattr_wba_trapnull = 0x14444410;
+_memmap_cacheattr_wbna_trapnull = 0x24444420;
+_memmap_cacheattr_wt_trapnull = 0x34444430;
+_memmap_cacheattr_bp_trapnull = 0x44444440;
+_memmap_cacheattr_wb_strict = 0x10000010;
+_memmap_cacheattr_wt_strict = 0x30000030;
+_memmap_cacheattr_bp_strict = 0x40000040;
+_memmap_cacheattr_wb_allvalid = 0x14444414;
+_memmap_cacheattr_wt_allvalid = 0x34444434;
+_memmap_cacheattr_bp_allvalid = 0x44444444;
+_memmap_region_map = 0x00000082;
+PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
+
+SECTIONS
+{
+
+  .DispatchVector.text : ALIGN(4)
+  {
+    _DispatchVector_text_start = ABSOLUTE(.);
+    KEEP (*(.DispatchVector.text))
+    . = ALIGN (4);
+    _DispatchVector_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .ResetVector.text : ALIGN(4)
+  {
+    _ResetVector_text_start = ABSOLUTE(.);
+    *(.ResetVector.text)
+    . = ALIGN (4);
+    _ResetVector_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .ResetHandler.text : ALIGN(4)
+  {
+    _ResetHandler_text_start = ABSOLUTE(.);
+    *(.ResetHandler.literal .ResetHandler.text)
+    . = ALIGN (4);
+    _ResetHandler_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .DispatchHandler.text : ALIGN(4)
+  {
+    _DispatchHandler_text_start = ABSOLUTE(.);
+    *(.DispatchHandler.literal .DispatchHandler.text)
+    . = ALIGN (4);
+    _DispatchHandler_text_end = ABSOLUTE(.);
+    _memmap_seg_sram0_end = ALIGN(0x8);
+  } >sram0_seg :sram0_phdr
+
+
+  .sram.rodata : ALIGN(4)
+  {
+    _sram_rodata_start = ABSOLUTE(.);
+    *(.sram.rodata)
+    . = ALIGN (4);
+    _sram_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.rodata : ALIGN(4)
+  {
+    _clib_rodata_start = ABSOLUTE(.);
+    *(.clib.rodata)
+    . = ALIGN (4);
+    _clib_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.rodata : ALIGN(4)
+  {
+    _rtos_rodata_start = ABSOLUTE(.);
+    *(.rtos.rodata)
+    . = ALIGN (4);
+    _rtos_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .sram.text : ALIGN(4)
+  {
+    _sram_text_start = ABSOLUTE(.);
+    *(.sram.literal .sram.text)
+    . = ALIGN (4);
+    _sram_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.text : ALIGN(4)
+  {
+    _clib_text_start = ABSOLUTE(.);
+    *(.clib.literal .clib.text)
+    . = ALIGN (4);
+    _clib_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.text : ALIGN(4)
+  {
+    _rtos_text_start = ABSOLUTE(.);
+    *(.rtos.literal .rtos.text)
+    . = ALIGN (4);
+    _rtos_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.data : ALIGN(4)
+  {
+    _clib_data_start = ABSOLUTE(.);
+    *(.clib.data)
+    . = ALIGN (4);
+    _clib_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.percpu.data : ALIGN(4)
+  {
+    _clib_percpu_data_start = ABSOLUTE(.);
+    *(.clib.percpu.data)
+    . = ALIGN (4);
+    _clib_percpu_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.percpu.data : ALIGN(4)
+  {
+    _rtos_percpu_data_start = ABSOLUTE(.);
+    *(.rtos.percpu.data)
+    . = ALIGN (4);
+    _rtos_percpu_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.data : ALIGN(4)
+  {
+    _rtos_data_start = ABSOLUTE(.);
+    *(.rtos.data)
+    . = ALIGN (4);
+    _rtos_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .sram.data : ALIGN(4)
+  {
+    _sram_data_start = ABSOLUTE(.);
+    *(.sram.data)
+    . = ALIGN (4);
+    _sram_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  __llvm_prf_names : ALIGN(4)
+  {
+    __llvm_prf_names_start = ABSOLUTE(.);
+    *(__llvm_prf_names)
+    . = ALIGN (4);
+    __llvm_prf_names_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _clib_bss_start = ABSOLUTE(.);
+    *(.clib.bss)
+    *(.clib.percpu.bss)
+    *(.rtos.percpu.bss)
+    *(.rtos.bss)
+    *(.sram.bss)
+    *(.debug.bss)
+    . = ALIGN (8);
+    _clib_bss_end = ABSOLUTE(.);
+    _end = ALIGN(0x8);
+    PROVIDE(end = ALIGN(0x8));
+    _memmap_seg_sram1_end = ALIGN(0x8);
+  } >sram1_seg :sram1_bss_phdr
+
+  _heap_sentry = 0x20200000;
+
+  .sram2.rodata : ALIGN(4)
+  {
+    _sram2_rodata_start = ABSOLUTE(.);
+    *(.sram2.rodata)
+    . = ALIGN (4);
+    _sram2_rodata_end = ABSOLUTE(.);
+  } >sram2_seg :sram2_phdr
+
+  .rodata : ALIGN(4)
+  {
+    _rodata_start = ABSOLUTE(.);
+    *(.rodata)
+    *(SORT(.rodata.sort.*))
+    KEEP (*(SORT(.rodata.keepsort.*) .rodata.keep.*))
+    *(.rodata.*)
+    *(.gnu.linkonce.r.*)
+    *(.rodata1)
+    __XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
+    KEEP (*(.xt_except_table))
+    KEEP (*(.gcc_except_table))
+    *(.gnu.linkonce.e.*)
+    *(.gnu.version_r)
+    KEEP (*(.eh_frame))
+    /*  C++ constructor and destructor tables, properly ordered:  */
+    KEEP (*crtbegin.o(.ctors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*(.ctors))
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*(.dtors))
+    /*  C++ exception handlers table:  */
+    __XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
+    *(.xt_except_desc)
+    *(.gnu.linkonce.h.*)
+    __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
+    *(.xt_except_desc_end)
+    *(.dynamic)
+    *(.gnu.version_d)
+    . = ALIGN(4);		/* this table MUST be 4-byte aligned */
+    _bss_table_start = ABSOLUTE(.);
+    LONG(_clib_bss_start)
+    LONG(_clib_bss_end)
+    LONG(_bss_start)
+    LONG(_bss_end)
+    LONG(_sram3_bss_start)
+    LONG(_sram3_bss_end)
+    LONG(_dram0_bss_start)
+    LONG(_dram0_bss_end)
+    LONG(_dram1_bss_start)
+    LONG(_dram1_bss_end)
+    LONG(_local_sram_bss_start)
+    LONG(_local_sram_bss_end)
+    _bss_table_end = ABSOLUTE(.);
+    . = ALIGN (4);
+    _rodata_end = ABSOLUTE(.);
+  } >sram2_seg :sram2_phdr
+
+  .sram2.text : ALIGN(4)
+  {
+    _sram2_text_start = ABSOLUTE(.);
+    *(.sram2.literal .sram2.text)
+    . = ALIGN (4);
+    _sram2_text_end = ABSOLUTE(.);
+  } >sram2_seg :sram2_phdr
+
+  .text : ALIGN(4)
+  {
+    _stext = .;
+    _text_start = ABSOLUTE(.);
+    *(.entry.text)
+    *(.init.literal)
+    KEEP(*(.init))
+    *(.literal.sort.* SORT(.text.sort.*))
+    KEEP (*(.literal.keepsort.* SORT(.text.keepsort.*) .literal.keep.* .text.keep.* .literal.*personality* .text.*personality*))
+    *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
+    *(.fini.literal)
+    KEEP(*(.fini))
+    *(.gnu.version)
+    . = ALIGN (4);
+    _text_end = ABSOLUTE(.);
+    _etext = .;
+  } >sram2_seg :sram2_phdr
+
+  .sram2.data : ALIGN(4)
+  {
+    _sram2_data_start = ABSOLUTE(.);
+    *(.sram2.data)
+    . = ALIGN (4);
+    _sram2_data_end = ABSOLUTE(.);
+  } >sram2_seg :sram2_phdr
+
+  .data : ALIGN(4)
+  {
+    _data_start = ABSOLUTE(.);
+    *(.data)
+    *(SORT(.data.sort.*))
+    KEEP (*(SORT(.data.keepsort.*) .data.keep.*))
+    *(.data.*)
+    *(.gnu.linkonce.d.*)
+    KEEP(*(.gnu.linkonce.d.*personality*))
+    *(.data1)
+    *(.sdata)
+    *(.sdata.*)
+    *(.gnu.linkonce.s.*)
+    *(.sdata2)
+    *(.sdata2.*)
+    *(.gnu.linkonce.s2.*)
+    KEEP(*(.jcr))
+    *(__llvm_prf_cnts)
+    *(__llvm_prf_data)
+    *(__llvm_prf_vnds)
+    . = ALIGN (4);
+    _data_end = ABSOLUTE(.);
+  } >sram2_seg :sram2_phdr
+
+  .bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _bss_start = ABSOLUTE(.);
+    *(.dynsbss)
+    *(.sbss)
+    *(.sbss.*)
+    *(.gnu.linkonce.sb.*)
+    *(.scommon)
+    *(.sbss2)
+    *(.sbss2.*)
+    *(.gnu.linkonce.sb2.*)
+    *(.dynbss)
+    *(.bss)
+    *(SORT(.bss.sort.*))
+    KEEP (*(SORT(.bss.keepsort.*) .bss.keep.*))
+    *(.bss.*)
+    *(.gnu.linkonce.b.*)
+    *(COMMON)
+    *(.sram2.bss)
+    . = ALIGN (8);
+    _bss_end = ABSOLUTE(.);
+    _memmap_seg_sram2_end = ALIGN(0x8);
+  } >sram2_seg :sram2_bss_phdr
+
+
+  .sram3.rodata : ALIGN(4)
+  {
+    _sram3_rodata_start = ABSOLUTE(.);
+    *(.sram3.rodata)
+    . = ALIGN (4);
+    _sram3_rodata_end = ABSOLUTE(.);
+  } >sram3_seg :sram3_phdr
+
+  .sram3.text : ALIGN(4)
+  {
+    _sram3_text_start = ABSOLUTE(.);
+    *(.sram3.literal .sram3.text)
+    . = ALIGN (4);
+    _sram3_text_end = ABSOLUTE(.);
+  } >sram3_seg :sram3_phdr
+
+  .sram3.data : ALIGN(4)
+  {
+    _sram3_data_start = ABSOLUTE(.);
+    *(.sram3.data)
+    . = ALIGN (4);
+    _sram3_data_end = ABSOLUTE(.);
+  } >sram3_seg :sram3_phdr
+
+  .sram3.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _sram3_bss_start = ABSOLUTE(.);
+    *(.sram3.bss)
+    . = ALIGN (8);
+    _sram3_bss_end = ABSOLUTE(.);
+    _memmap_seg_sram3_end = ALIGN(0x8);
+  } >sram3_seg :sram3_bss_phdr
+
+  _memmap_mem_sram_max = ABSOLUTE(.);
+
+  .dram0.rodata : ALIGN(4)
+  {
+    _dram0_rodata_start = ABSOLUTE(.);
+    *(.dram0.rodata)
+    . = ALIGN (4);
+    _dram0_rodata_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.data : ALIGN(4)
+  {
+    _dram0_data_start = ABSOLUTE(.);
+    *(.dram0.data)
+    . = ALIGN (4);
+    _dram0_data_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dram0_bss_start = ABSOLUTE(.);
+    *(.dram0.bss)
+    *(.dram0_user.bss)
+    . = ALIGN (8);
+    _dram0_bss_end = ABSOLUTE(.);
+    _memmap_seg_dram0_0_end = ALIGN(0x8);
+  } >dram0_0_seg :dram0_0_bss_phdr
+
+  _memmap_mem_dram0_max = ABSOLUTE(.);
+
+  .dram1.rodata : ALIGN(4)
+  {
+    _dram1_rodata_start = ABSOLUTE(.);
+    *(.dram1.rodata)
+    . = ALIGN (4);
+    _dram1_rodata_end = ABSOLUTE(.);
+  } >dram1_0_seg :dram1_0_phdr
+
+  .dram1.data : ALIGN(4)
+  {
+    _dram1_data_start = ABSOLUTE(.);
+    *(.dram1.data)
+    . = ALIGN (4);
+    _dram1_data_end = ABSOLUTE(.);
+  } >dram1_0_seg :dram1_0_phdr
+
+  .dram1.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dram1_bss_start = ABSOLUTE(.);
+    *(.dram1.bss)
+    *(.dram1_user.bss)
+    . = ALIGN (8);
+    _dram1_bss_end = ABSOLUTE(.);
+    _stack_sentry = ALIGN(0x8);
+    _memmap_seg_dram1_0_end = ALIGN(0x8);
+  } >dram1_0_seg :dram1_0_bss_phdr
+
+  PROVIDE(__stack = 0xe01c0000);
+  _isb_default = 0xe01bfe10;
+  _memmap_mem_dram1_max = ABSOLUTE(.);
+
+  .local_sram.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _local_sram_bss_start = ABSOLUTE(.);
+    *(.local_sram.bss)
+    . = ALIGN (8);
+    _local_sram_bss_end = ABSOLUTE(.);
+    _memmap_seg_local_sram_0_end = ALIGN(0x8);
+  } >local_sram_0_seg :local_sram_0_bss_phdr
+
+
+  _memmap_mem_local_sram_max = ABSOLUTE(.);
+
+  .debug  0 :  { *(.debug) }
+  .line  0 :  { *(.line) }
+  .debug_srcinfo  0 :  { *(.debug_srcinfo) }
+  .debug_sfnames  0 :  { *(.debug_sfnames) }
+  .debug_aranges  0 :  { *(.debug_aranges) }
+  .debug_pubnames  0 :  { *(.debug_pubnames) }
+  .debug_info  0 :  { *(.debug_info) }
+  .debug_abbrev  0 :  { *(.debug_abbrev) }
+  .debug_line  0 :  { *(.debug_line) }
+  .debug_frame  0 :  { *(.debug_frame) }
+  .debug_str  0 :  { *(.debug_str) }
+  .debug_loc  0 :  { *(.debug_loc) }
+  .debug_macinfo  0 :  { *(.debug_macinfo) }
+  .debug_weaknames  0 :  { *(.debug_weaknames) }
+  .debug_funcnames  0 :  { *(.debug_funcnames) }
+  .debug_typenames  0 :  { *(.debug_typenames) }
+  .debug_varnames  0 :  { *(.debug_varnames) }
+  .xt.insn 0 :
+  {
+    KEEP (*(.xt.insn))
+    KEEP (*(.gnu.linkonce.x.*))
+  }
+  .xt.prop 0 :
+  {
+    KEEP (*(.xt.prop))
+    KEEP (*(.xt.prop.*))
+    KEEP (*(.gnu.linkonce.prop.*))
+  }
+  .xt.lit 0 :
+  {
+    KEEP (*(.xt.lit))
+    KEEP (*(.xt.lit.*))
+    KEEP (*(.gnu.linkonce.p.*))
+  }
+  .debug.xt.callgraph 0 :
+  {
+    KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
+  }
+}
+

+ 528 - 0
LSP/min-rt_core0_lib0_stack_tcm1/ldscripts/elf32xtensa.xbn

@@ -0,0 +1,528 @@
+/* This linker script generated from xt-genldscripts.tpp for LSP C:\Users\DELL\workspace\CSI_DSP_FW\LSP\min-rt_core0_lib0_stack_tcm1 */
+/* Linker Script for ld -N */
+MEMORY
+{
+  sram0_seg :                         	org = 0x20000000, len = 0x1000
+  sram1_seg :                         	org = 0x20001000, len = 0x1FF000
+  sram2_seg :                         	org = 0x20200000, len = 0x40000
+  sram3_seg :                         	org = 0x20240000, len = 0x40000
+  dram0_0_seg :                       	org = 0xE0182800, len = 0x1D800
+  dram1_0_seg :                       	org = 0xE01A2800, len = 0x1D800
+  local_sram_0_seg :                  	org = 0xFFA00000, len = 0x180000
+}
+
+PHDRS
+{
+  sram0_phdr PT_LOAD;
+  sram1_phdr PT_LOAD;
+  sram1_bss_phdr PT_LOAD;
+  sram2_phdr PT_LOAD;
+  sram2_bss_phdr PT_LOAD;
+  sram3_phdr PT_LOAD;
+  sram3_bss_phdr PT_LOAD;
+  dram0_0_phdr PT_LOAD;
+  dram0_0_bss_phdr PT_LOAD;
+  dram1_0_phdr PT_LOAD;
+  dram1_0_bss_phdr PT_LOAD;
+  local_sram_0_phdr PT_LOAD;
+  local_sram_0_bss_phdr PT_LOAD;
+}
+
+
+/*  Default entry point:  */
+ENTRY(_libinit)
+
+
+/*  Memory boundary addresses:  */
+_memmap_mem_sram_start = 0x20000000;
+_memmap_mem_sram_end   = 0x20280000;
+_memmap_mem_dram0_start = 0xe0180000;
+_memmap_mem_dram0_end   = 0xe01a0000;
+_memmap_mem_dram1_start = 0xe01a0000;
+_memmap_mem_dram1_end   = 0xe01c0000;
+_memmap_mem_local_sram_start = 0xffa00000;
+_memmap_mem_local_sram_end   = 0xffb80000;
+
+/*  Memory segment boundary addresses:  */
+_memmap_seg_sram0_start = 0x20000000;
+_memmap_seg_sram0_max   = 0x20001000;
+_memmap_seg_sram1_start = 0x20001000;
+_memmap_seg_sram1_max   = 0x20200000;
+_memmap_seg_sram2_start = 0x20200000;
+_memmap_seg_sram2_max   = 0x20240000;
+_memmap_seg_sram3_start = 0x20240000;
+_memmap_seg_sram3_max   = 0x20280000;
+_memmap_seg_dram0_0_start = 0xe0182800;
+_memmap_seg_dram0_0_max   = 0xe01a0000;
+_memmap_seg_dram1_0_start = 0xe01a2800;
+_memmap_seg_dram1_0_max   = 0xe01c0000;
+_memmap_seg_local_sram_0_start = 0xffa00000;
+_memmap_seg_local_sram_0_max   = 0xffb80000;
+
+_rom_store_table = 0;
+PROVIDE(_memmap_reset_vector = 0x20000000);
+PROVIDE(_memmap_vecbase_reset = 0x20000000);
+/* Various memory-map dependent cache attribute settings: */
+_memmap_cacheattr_wb_base = 0x10000010;
+_memmap_cacheattr_wt_base = 0x30000030;
+_memmap_cacheattr_bp_base = 0x40000040;
+_memmap_cacheattr_unused_mask = 0x0FFFFF0F;
+_memmap_cacheattr_wb_trapnull = 0x14444410;
+_memmap_cacheattr_wba_trapnull = 0x14444410;
+_memmap_cacheattr_wbna_trapnull = 0x24444420;
+_memmap_cacheattr_wt_trapnull = 0x34444430;
+_memmap_cacheattr_bp_trapnull = 0x44444440;
+_memmap_cacheattr_wb_strict = 0x10000010;
+_memmap_cacheattr_wt_strict = 0x30000030;
+_memmap_cacheattr_bp_strict = 0x40000040;
+_memmap_cacheattr_wb_allvalid = 0x14444414;
+_memmap_cacheattr_wt_allvalid = 0x34444434;
+_memmap_cacheattr_bp_allvalid = 0x44444444;
+_memmap_region_map = 0x00000082;
+PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
+
+SECTIONS
+{
+
+  .DispatchVector.text : ALIGN(4)
+  {
+    _DispatchVector_text_start = ABSOLUTE(.);
+    KEEP (*(.DispatchVector.text))
+    . = ALIGN (4);
+    _DispatchVector_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .ResetVector.text : ALIGN(4)
+  {
+    _ResetVector_text_start = ABSOLUTE(.);
+    *(.ResetVector.text)
+    . = ALIGN (4);
+    _ResetVector_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .ResetHandler.text : ALIGN(4)
+  {
+    _ResetHandler_text_start = ABSOLUTE(.);
+    *(.ResetHandler.literal .ResetHandler.text)
+    . = ALIGN (4);
+    _ResetHandler_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .DispatchHandler.text : ALIGN(4)
+  {
+    _DispatchHandler_text_start = ABSOLUTE(.);
+    *(.DispatchHandler.literal .DispatchHandler.text)
+    . = ALIGN (4);
+    _DispatchHandler_text_end = ABSOLUTE(.);
+    _memmap_seg_sram0_end = ALIGN(0x8);
+  } >sram0_seg :sram0_phdr
+
+
+  .sram.rodata : ALIGN(4)
+  {
+    _sram_rodata_start = ABSOLUTE(.);
+    *(.sram.rodata)
+    . = ALIGN (4);
+    _sram_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.rodata : ALIGN(4)
+  {
+    _clib_rodata_start = ABSOLUTE(.);
+    *(.clib.rodata)
+    . = ALIGN (4);
+    _clib_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.rodata : ALIGN(4)
+  {
+    _rtos_rodata_start = ABSOLUTE(.);
+    *(.rtos.rodata)
+    . = ALIGN (4);
+    _rtos_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .sram.text : ALIGN(4)
+  {
+    _sram_text_start = ABSOLUTE(.);
+    *(.sram.literal .sram.text)
+    . = ALIGN (4);
+    _sram_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.text : ALIGN(4)
+  {
+    _clib_text_start = ABSOLUTE(.);
+    *(.clib.literal .clib.text)
+    . = ALIGN (4);
+    _clib_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.text : ALIGN(4)
+  {
+    _rtos_text_start = ABSOLUTE(.);
+    *(.rtos.literal .rtos.text)
+    . = ALIGN (4);
+    _rtos_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.data : ALIGN(4)
+  {
+    _clib_data_start = ABSOLUTE(.);
+    *(.clib.data)
+    . = ALIGN (4);
+    _clib_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.percpu.data : ALIGN(4)
+  {
+    _clib_percpu_data_start = ABSOLUTE(.);
+    *(.clib.percpu.data)
+    . = ALIGN (4);
+    _clib_percpu_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.percpu.data : ALIGN(4)
+  {
+    _rtos_percpu_data_start = ABSOLUTE(.);
+    *(.rtos.percpu.data)
+    . = ALIGN (4);
+    _rtos_percpu_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.data : ALIGN(4)
+  {
+    _rtos_data_start = ABSOLUTE(.);
+    *(.rtos.data)
+    . = ALIGN (4);
+    _rtos_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .sram.data : ALIGN(4)
+  {
+    _sram_data_start = ABSOLUTE(.);
+    *(.sram.data)
+    . = ALIGN (4);
+    _sram_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  __llvm_prf_names : ALIGN(4)
+  {
+    __llvm_prf_names_start = ABSOLUTE(.);
+    *(__llvm_prf_names)
+    . = ALIGN (4);
+    __llvm_prf_names_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _clib_bss_start = ABSOLUTE(.);
+    *(.clib.bss)
+    *(.clib.percpu.bss)
+    *(.rtos.percpu.bss)
+    *(.rtos.bss)
+    *(.sram.bss)
+    *(.debug.bss)
+    . = ALIGN (8);
+    _clib_bss_end = ABSOLUTE(.);
+    _end = ALIGN(0x8);
+    PROVIDE(end = ALIGN(0x8));
+    _memmap_seg_sram1_end = ALIGN(0x8);
+  } >sram1_seg :sram1_bss_phdr
+
+  _heap_sentry = 0x20200000;
+
+  .sram2.rodata : ALIGN(4)
+  {
+    _sram2_rodata_start = ABSOLUTE(.);
+    *(.sram2.rodata)
+    . = ALIGN (4);
+    _sram2_rodata_end = ABSOLUTE(.);
+  } >sram2_seg :sram2_phdr
+
+  .rodata : ALIGN(4)
+  {
+    _rodata_start = ABSOLUTE(.);
+    *(.rodata)
+    *(SORT(.rodata.sort.*))
+    KEEP (*(SORT(.rodata.keepsort.*) .rodata.keep.*))
+    *(.rodata.*)
+    *(.gnu.linkonce.r.*)
+    *(.rodata1)
+    __XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
+    KEEP (*(.xt_except_table))
+    KEEP (*(.gcc_except_table))
+    *(.gnu.linkonce.e.*)
+    *(.gnu.version_r)
+    KEEP (*(.eh_frame))
+    /*  C++ constructor and destructor tables, properly ordered:  */
+    KEEP (*crtbegin.o(.ctors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*(.ctors))
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*(.dtors))
+    /*  C++ exception handlers table:  */
+    __XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
+    *(.xt_except_desc)
+    *(.gnu.linkonce.h.*)
+    __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
+    *(.xt_except_desc_end)
+    *(.dynamic)
+    *(.gnu.version_d)
+    . = ALIGN(4);		/* this table MUST be 4-byte aligned */
+    _bss_table_start = ABSOLUTE(.);
+    LONG(_clib_bss_start)
+    LONG(_clib_bss_end)
+    LONG(_bss_start)
+    LONG(_bss_end)
+    LONG(_sram3_bss_start)
+    LONG(_sram3_bss_end)
+    LONG(_dram0_bss_start)
+    LONG(_dram0_bss_end)
+    LONG(_dram1_bss_start)
+    LONG(_dram1_bss_end)
+    LONG(_local_sram_bss_start)
+    LONG(_local_sram_bss_end)
+    _bss_table_end = ABSOLUTE(.);
+    . = ALIGN (4);
+    _rodata_end = ABSOLUTE(.);
+  } >sram2_seg :sram2_phdr
+
+  .sram2.text : ALIGN(4)
+  {
+    _sram2_text_start = ABSOLUTE(.);
+    *(.sram2.literal .sram2.text)
+    . = ALIGN (4);
+    _sram2_text_end = ABSOLUTE(.);
+  } >sram2_seg :sram2_phdr
+
+  .text : ALIGN(4)
+  {
+    _stext = .;
+    _text_start = ABSOLUTE(.);
+    *(.entry.text)
+    *(.init.literal)
+    KEEP(*(.init))
+    *(.literal.sort.* SORT(.text.sort.*))
+    KEEP (*(.literal.keepsort.* SORT(.text.keepsort.*) .literal.keep.* .text.keep.* .literal.*personality* .text.*personality*))
+    *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
+    *(.fini.literal)
+    KEEP(*(.fini))
+    *(.gnu.version)
+    . = ALIGN (4);
+    _text_end = ABSOLUTE(.);
+    _etext = .;
+  } >sram2_seg :sram2_phdr
+
+  .sram2.data : ALIGN(4)
+  {
+    _sram2_data_start = ABSOLUTE(.);
+    *(.sram2.data)
+    . = ALIGN (4);
+    _sram2_data_end = ABSOLUTE(.);
+  } >sram2_seg :sram2_phdr
+
+  .data : ALIGN(4)
+  {
+    _data_start = ABSOLUTE(.);
+    *(.data)
+    *(SORT(.data.sort.*))
+    KEEP (*(SORT(.data.keepsort.*) .data.keep.*))
+    *(.data.*)
+    *(.gnu.linkonce.d.*)
+    KEEP(*(.gnu.linkonce.d.*personality*))
+    *(.data1)
+    *(.sdata)
+    *(.sdata.*)
+    *(.gnu.linkonce.s.*)
+    *(.sdata2)
+    *(.sdata2.*)
+    *(.gnu.linkonce.s2.*)
+    KEEP(*(.jcr))
+    *(__llvm_prf_cnts)
+    *(__llvm_prf_data)
+    *(__llvm_prf_vnds)
+    . = ALIGN (4);
+    _data_end = ABSOLUTE(.);
+  } >sram2_seg :sram2_phdr
+
+  .bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _bss_start = ABSOLUTE(.);
+    *(.dynsbss)
+    *(.sbss)
+    *(.sbss.*)
+    *(.gnu.linkonce.sb.*)
+    *(.scommon)
+    *(.sbss2)
+    *(.sbss2.*)
+    *(.gnu.linkonce.sb2.*)
+    *(.dynbss)
+    *(.bss)
+    *(SORT(.bss.sort.*))
+    KEEP (*(SORT(.bss.keepsort.*) .bss.keep.*))
+    *(.bss.*)
+    *(.gnu.linkonce.b.*)
+    *(COMMON)
+    *(.sram2.bss)
+    . = ALIGN (8);
+    _bss_end = ABSOLUTE(.);
+    _memmap_seg_sram2_end = ALIGN(0x8);
+  } >sram2_seg :sram2_bss_phdr
+
+
+  .sram3.rodata : ALIGN(4)
+  {
+    _sram3_rodata_start = ABSOLUTE(.);
+    *(.sram3.rodata)
+    . = ALIGN (4);
+    _sram3_rodata_end = ABSOLUTE(.);
+  } >sram3_seg :sram3_phdr
+
+  .sram3.text : ALIGN(4)
+  {
+    _sram3_text_start = ABSOLUTE(.);
+    *(.sram3.literal .sram3.text)
+    . = ALIGN (4);
+    _sram3_text_end = ABSOLUTE(.);
+  } >sram3_seg :sram3_phdr
+
+  .sram3.data : ALIGN(4)
+  {
+    _sram3_data_start = ABSOLUTE(.);
+    *(.sram3.data)
+    . = ALIGN (4);
+    _sram3_data_end = ABSOLUTE(.);
+  } >sram3_seg :sram3_phdr
+
+  .sram3.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _sram3_bss_start = ABSOLUTE(.);
+    *(.sram3.bss)
+    . = ALIGN (8);
+    _sram3_bss_end = ABSOLUTE(.);
+    _memmap_seg_sram3_end = ALIGN(0x8);
+  } >sram3_seg :sram3_bss_phdr
+
+  _memmap_mem_sram_max = ABSOLUTE(.);
+
+  .dram0.rodata : ALIGN(4)
+  {
+    _dram0_rodata_start = ABSOLUTE(.);
+    *(.dram0.rodata)
+    . = ALIGN (4);
+    _dram0_rodata_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.data : ALIGN(4)
+  {
+    _dram0_data_start = ABSOLUTE(.);
+    *(.dram0.data)
+    . = ALIGN (4);
+    _dram0_data_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dram0_bss_start = ABSOLUTE(.);
+    *(.dram0.bss)
+    *(.dram0_user.bss)
+    . = ALIGN (8);
+    _dram0_bss_end = ABSOLUTE(.);
+    _memmap_seg_dram0_0_end = ALIGN(0x8);
+  } >dram0_0_seg :dram0_0_bss_phdr
+
+  _memmap_mem_dram0_max = ABSOLUTE(.);
+
+  .dram1.rodata : ALIGN(4)
+  {
+    _dram1_rodata_start = ABSOLUTE(.);
+    *(.dram1.rodata)
+    . = ALIGN (4);
+    _dram1_rodata_end = ABSOLUTE(.);
+  } >dram1_0_seg :dram1_0_phdr
+
+  .dram1.data : ALIGN(4)
+  {
+    _dram1_data_start = ABSOLUTE(.);
+    *(.dram1.data)
+    . = ALIGN (4);
+    _dram1_data_end = ABSOLUTE(.);
+  } >dram1_0_seg :dram1_0_phdr
+
+  .dram1.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dram1_bss_start = ABSOLUTE(.);
+    *(.dram1.bss)
+    *(.dram1_user.bss)
+    . = ALIGN (8);
+    _dram1_bss_end = ABSOLUTE(.);
+    _stack_sentry = ALIGN(0x8);
+    _memmap_seg_dram1_0_end = ALIGN(0x8);
+  } >dram1_0_seg :dram1_0_bss_phdr
+
+  PROVIDE(__stack = 0xe01c0000);
+  _isb_default = 0xe01bfe10;
+  _memmap_mem_dram1_max = ABSOLUTE(.);
+
+  .local_sram.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _local_sram_bss_start = ABSOLUTE(.);
+    *(.local_sram.bss)
+    . = ALIGN (8);
+    _local_sram_bss_end = ABSOLUTE(.);
+    _memmap_seg_local_sram_0_end = ALIGN(0x8);
+  } >local_sram_0_seg :local_sram_0_bss_phdr
+
+
+  _memmap_mem_local_sram_max = ABSOLUTE(.);
+
+  .debug  0 :  { *(.debug) }
+  .line  0 :  { *(.line) }
+  .debug_srcinfo  0 :  { *(.debug_srcinfo) }
+  .debug_sfnames  0 :  { *(.debug_sfnames) }
+  .debug_aranges  0 :  { *(.debug_aranges) }
+  .debug_pubnames  0 :  { *(.debug_pubnames) }
+  .debug_info  0 :  { *(.debug_info) }
+  .debug_abbrev  0 :  { *(.debug_abbrev) }
+  .debug_line  0 :  { *(.debug_line) }
+  .debug_frame  0 :  { *(.debug_frame) }
+  .debug_str  0 :  { *(.debug_str) }
+  .debug_loc  0 :  { *(.debug_loc) }
+  .debug_macinfo  0 :  { *(.debug_macinfo) }
+  .debug_weaknames  0 :  { *(.debug_weaknames) }
+  .debug_funcnames  0 :  { *(.debug_funcnames) }
+  .debug_typenames  0 :  { *(.debug_typenames) }
+  .debug_varnames  0 :  { *(.debug_varnames) }
+  .xt.insn 0 :
+  {
+    KEEP (*(.xt.insn))
+    KEEP (*(.gnu.linkonce.x.*))
+  }
+  .xt.prop 0 :
+  {
+    KEEP (*(.xt.prop))
+    KEEP (*(.xt.prop.*))
+    KEEP (*(.gnu.linkonce.prop.*))
+  }
+  .xt.lit 0 :
+  {
+    KEEP (*(.xt.lit))
+    KEEP (*(.xt.lit.*))
+    KEEP (*(.gnu.linkonce.p.*))
+  }
+  .debug.xt.callgraph 0 :
+  {
+    KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
+  }
+}
+

+ 528 - 0
LSP/min-rt_core0_lib0_stack_tcm1/ldscripts/elf32xtensa.xn

@@ -0,0 +1,528 @@
+/* This linker script generated from xt-genldscripts.tpp for LSP C:\Users\DELL\workspace\CSI_DSP_FW\LSP\min-rt_core0_lib0_stack_tcm1 */
+/* Linker Script for ld -n */
+MEMORY
+{
+  sram0_seg :                         	org = 0x20000000, len = 0x1000
+  sram1_seg :                         	org = 0x20001000, len = 0x1FF000
+  sram2_seg :                         	org = 0x20200000, len = 0x40000
+  sram3_seg :                         	org = 0x20240000, len = 0x40000
+  dram0_0_seg :                       	org = 0xE0182800, len = 0x1D800
+  dram1_0_seg :                       	org = 0xE01A2800, len = 0x1D800
+  local_sram_0_seg :                  	org = 0xFFA00000, len = 0x180000
+}
+
+PHDRS
+{
+  sram0_phdr PT_LOAD;
+  sram1_phdr PT_LOAD;
+  sram1_bss_phdr PT_LOAD;
+  sram2_phdr PT_LOAD;
+  sram2_bss_phdr PT_LOAD;
+  sram3_phdr PT_LOAD;
+  sram3_bss_phdr PT_LOAD;
+  dram0_0_phdr PT_LOAD;
+  dram0_0_bss_phdr PT_LOAD;
+  dram1_0_phdr PT_LOAD;
+  dram1_0_bss_phdr PT_LOAD;
+  local_sram_0_phdr PT_LOAD;
+  local_sram_0_bss_phdr PT_LOAD;
+}
+
+
+/*  Default entry point:  */
+ENTRY(_libinit)
+
+
+/*  Memory boundary addresses:  */
+_memmap_mem_sram_start = 0x20000000;
+_memmap_mem_sram_end   = 0x20280000;
+_memmap_mem_dram0_start = 0xe0180000;
+_memmap_mem_dram0_end   = 0xe01a0000;
+_memmap_mem_dram1_start = 0xe01a0000;
+_memmap_mem_dram1_end   = 0xe01c0000;
+_memmap_mem_local_sram_start = 0xffa00000;
+_memmap_mem_local_sram_end   = 0xffb80000;
+
+/*  Memory segment boundary addresses:  */
+_memmap_seg_sram0_start = 0x20000000;
+_memmap_seg_sram0_max   = 0x20001000;
+_memmap_seg_sram1_start = 0x20001000;
+_memmap_seg_sram1_max   = 0x20200000;
+_memmap_seg_sram2_start = 0x20200000;
+_memmap_seg_sram2_max   = 0x20240000;
+_memmap_seg_sram3_start = 0x20240000;
+_memmap_seg_sram3_max   = 0x20280000;
+_memmap_seg_dram0_0_start = 0xe0182800;
+_memmap_seg_dram0_0_max   = 0xe01a0000;
+_memmap_seg_dram1_0_start = 0xe01a2800;
+_memmap_seg_dram1_0_max   = 0xe01c0000;
+_memmap_seg_local_sram_0_start = 0xffa00000;
+_memmap_seg_local_sram_0_max   = 0xffb80000;
+
+_rom_store_table = 0;
+PROVIDE(_memmap_reset_vector = 0x20000000);
+PROVIDE(_memmap_vecbase_reset = 0x20000000);
+/* Various memory-map dependent cache attribute settings: */
+_memmap_cacheattr_wb_base = 0x10000010;
+_memmap_cacheattr_wt_base = 0x30000030;
+_memmap_cacheattr_bp_base = 0x40000040;
+_memmap_cacheattr_unused_mask = 0x0FFFFF0F;
+_memmap_cacheattr_wb_trapnull = 0x14444410;
+_memmap_cacheattr_wba_trapnull = 0x14444410;
+_memmap_cacheattr_wbna_trapnull = 0x24444420;
+_memmap_cacheattr_wt_trapnull = 0x34444430;
+_memmap_cacheattr_bp_trapnull = 0x44444440;
+_memmap_cacheattr_wb_strict = 0x10000010;
+_memmap_cacheattr_wt_strict = 0x30000030;
+_memmap_cacheattr_bp_strict = 0x40000040;
+_memmap_cacheattr_wb_allvalid = 0x14444414;
+_memmap_cacheattr_wt_allvalid = 0x34444434;
+_memmap_cacheattr_bp_allvalid = 0x44444444;
+_memmap_region_map = 0x00000082;
+PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
+
+SECTIONS
+{
+
+  .DispatchVector.text : ALIGN(4)
+  {
+    _DispatchVector_text_start = ABSOLUTE(.);
+    KEEP (*(.DispatchVector.text))
+    . = ALIGN (4);
+    _DispatchVector_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .ResetVector.text : ALIGN(4)
+  {
+    _ResetVector_text_start = ABSOLUTE(.);
+    *(.ResetVector.text)
+    . = ALIGN (4);
+    _ResetVector_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .ResetHandler.text : ALIGN(4)
+  {
+    _ResetHandler_text_start = ABSOLUTE(.);
+    *(.ResetHandler.literal .ResetHandler.text)
+    . = ALIGN (4);
+    _ResetHandler_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .DispatchHandler.text : ALIGN(4)
+  {
+    _DispatchHandler_text_start = ABSOLUTE(.);
+    *(.DispatchHandler.literal .DispatchHandler.text)
+    . = ALIGN (4);
+    _DispatchHandler_text_end = ABSOLUTE(.);
+    _memmap_seg_sram0_end = ALIGN(0x8);
+  } >sram0_seg :sram0_phdr
+
+
+  .sram.rodata : ALIGN(4)
+  {
+    _sram_rodata_start = ABSOLUTE(.);
+    *(.sram.rodata)
+    . = ALIGN (4);
+    _sram_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.rodata : ALIGN(4)
+  {
+    _clib_rodata_start = ABSOLUTE(.);
+    *(.clib.rodata)
+    . = ALIGN (4);
+    _clib_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.rodata : ALIGN(4)
+  {
+    _rtos_rodata_start = ABSOLUTE(.);
+    *(.rtos.rodata)
+    . = ALIGN (4);
+    _rtos_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .sram.text : ALIGN(4)
+  {
+    _sram_text_start = ABSOLUTE(.);
+    *(.sram.literal .sram.text)
+    . = ALIGN (4);
+    _sram_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.text : ALIGN(4)
+  {
+    _clib_text_start = ABSOLUTE(.);
+    *(.clib.literal .clib.text)
+    . = ALIGN (4);
+    _clib_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.text : ALIGN(4)
+  {
+    _rtos_text_start = ABSOLUTE(.);
+    *(.rtos.literal .rtos.text)
+    . = ALIGN (4);
+    _rtos_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.data : ALIGN(4)
+  {
+    _clib_data_start = ABSOLUTE(.);
+    *(.clib.data)
+    . = ALIGN (4);
+    _clib_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.percpu.data : ALIGN(4)
+  {
+    _clib_percpu_data_start = ABSOLUTE(.);
+    *(.clib.percpu.data)
+    . = ALIGN (4);
+    _clib_percpu_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.percpu.data : ALIGN(4)
+  {
+    _rtos_percpu_data_start = ABSOLUTE(.);
+    *(.rtos.percpu.data)
+    . = ALIGN (4);
+    _rtos_percpu_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.data : ALIGN(4)
+  {
+    _rtos_data_start = ABSOLUTE(.);
+    *(.rtos.data)
+    . = ALIGN (4);
+    _rtos_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .sram.data : ALIGN(4)
+  {
+    _sram_data_start = ABSOLUTE(.);
+    *(.sram.data)
+    . = ALIGN (4);
+    _sram_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  __llvm_prf_names : ALIGN(4)
+  {
+    __llvm_prf_names_start = ABSOLUTE(.);
+    *(__llvm_prf_names)
+    . = ALIGN (4);
+    __llvm_prf_names_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _clib_bss_start = ABSOLUTE(.);
+    *(.clib.bss)
+    *(.clib.percpu.bss)
+    *(.rtos.percpu.bss)
+    *(.rtos.bss)
+    *(.sram.bss)
+    *(.debug.bss)
+    . = ALIGN (8);
+    _clib_bss_end = ABSOLUTE(.);
+    _end = ALIGN(0x8);
+    PROVIDE(end = ALIGN(0x8));
+    _memmap_seg_sram1_end = ALIGN(0x8);
+  } >sram1_seg :sram1_bss_phdr
+
+  _heap_sentry = 0x20200000;
+
+  .sram2.rodata : ALIGN(4)
+  {
+    _sram2_rodata_start = ABSOLUTE(.);
+    *(.sram2.rodata)
+    . = ALIGN (4);
+    _sram2_rodata_end = ABSOLUTE(.);
+  } >sram2_seg :sram2_phdr
+
+  .rodata : ALIGN(4)
+  {
+    _rodata_start = ABSOLUTE(.);
+    *(.rodata)
+    *(SORT(.rodata.sort.*))
+    KEEP (*(SORT(.rodata.keepsort.*) .rodata.keep.*))
+    *(.rodata.*)
+    *(.gnu.linkonce.r.*)
+    *(.rodata1)
+    __XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
+    KEEP (*(.xt_except_table))
+    KEEP (*(.gcc_except_table))
+    *(.gnu.linkonce.e.*)
+    *(.gnu.version_r)
+    KEEP (*(.eh_frame))
+    /*  C++ constructor and destructor tables, properly ordered:  */
+    KEEP (*crtbegin.o(.ctors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*(.ctors))
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*(.dtors))
+    /*  C++ exception handlers table:  */
+    __XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
+    *(.xt_except_desc)
+    *(.gnu.linkonce.h.*)
+    __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
+    *(.xt_except_desc_end)
+    *(.dynamic)
+    *(.gnu.version_d)
+    . = ALIGN(4);		/* this table MUST be 4-byte aligned */
+    _bss_table_start = ABSOLUTE(.);
+    LONG(_clib_bss_start)
+    LONG(_clib_bss_end)
+    LONG(_bss_start)
+    LONG(_bss_end)
+    LONG(_sram3_bss_start)
+    LONG(_sram3_bss_end)
+    LONG(_dram0_bss_start)
+    LONG(_dram0_bss_end)
+    LONG(_dram1_bss_start)
+    LONG(_dram1_bss_end)
+    LONG(_local_sram_bss_start)
+    LONG(_local_sram_bss_end)
+    _bss_table_end = ABSOLUTE(.);
+    . = ALIGN (4);
+    _rodata_end = ABSOLUTE(.);
+  } >sram2_seg :sram2_phdr
+
+  .sram2.text : ALIGN(4)
+  {
+    _sram2_text_start = ABSOLUTE(.);
+    *(.sram2.literal .sram2.text)
+    . = ALIGN (4);
+    _sram2_text_end = ABSOLUTE(.);
+  } >sram2_seg :sram2_phdr
+
+  .text : ALIGN(4)
+  {
+    _stext = .;
+    _text_start = ABSOLUTE(.);
+    *(.entry.text)
+    *(.init.literal)
+    KEEP(*(.init))
+    *(.literal.sort.* SORT(.text.sort.*))
+    KEEP (*(.literal.keepsort.* SORT(.text.keepsort.*) .literal.keep.* .text.keep.* .literal.*personality* .text.*personality*))
+    *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
+    *(.fini.literal)
+    KEEP(*(.fini))
+    *(.gnu.version)
+    . = ALIGN (4);
+    _text_end = ABSOLUTE(.);
+    _etext = .;
+  } >sram2_seg :sram2_phdr
+
+  .sram2.data : ALIGN(4)
+  {
+    _sram2_data_start = ABSOLUTE(.);
+    *(.sram2.data)
+    . = ALIGN (4);
+    _sram2_data_end = ABSOLUTE(.);
+  } >sram2_seg :sram2_phdr
+
+  .data : ALIGN(4)
+  {
+    _data_start = ABSOLUTE(.);
+    *(.data)
+    *(SORT(.data.sort.*))
+    KEEP (*(SORT(.data.keepsort.*) .data.keep.*))
+    *(.data.*)
+    *(.gnu.linkonce.d.*)
+    KEEP(*(.gnu.linkonce.d.*personality*))
+    *(.data1)
+    *(.sdata)
+    *(.sdata.*)
+    *(.gnu.linkonce.s.*)
+    *(.sdata2)
+    *(.sdata2.*)
+    *(.gnu.linkonce.s2.*)
+    KEEP(*(.jcr))
+    *(__llvm_prf_cnts)
+    *(__llvm_prf_data)
+    *(__llvm_prf_vnds)
+    . = ALIGN (4);
+    _data_end = ABSOLUTE(.);
+  } >sram2_seg :sram2_phdr
+
+  .bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _bss_start = ABSOLUTE(.);
+    *(.dynsbss)
+    *(.sbss)
+    *(.sbss.*)
+    *(.gnu.linkonce.sb.*)
+    *(.scommon)
+    *(.sbss2)
+    *(.sbss2.*)
+    *(.gnu.linkonce.sb2.*)
+    *(.dynbss)
+    *(.bss)
+    *(SORT(.bss.sort.*))
+    KEEP (*(SORT(.bss.keepsort.*) .bss.keep.*))
+    *(.bss.*)
+    *(.gnu.linkonce.b.*)
+    *(COMMON)
+    *(.sram2.bss)
+    . = ALIGN (8);
+    _bss_end = ABSOLUTE(.);
+    _memmap_seg_sram2_end = ALIGN(0x8);
+  } >sram2_seg :sram2_bss_phdr
+
+
+  .sram3.rodata : ALIGN(4)
+  {
+    _sram3_rodata_start = ABSOLUTE(.);
+    *(.sram3.rodata)
+    . = ALIGN (4);
+    _sram3_rodata_end = ABSOLUTE(.);
+  } >sram3_seg :sram3_phdr
+
+  .sram3.text : ALIGN(4)
+  {
+    _sram3_text_start = ABSOLUTE(.);
+    *(.sram3.literal .sram3.text)
+    . = ALIGN (4);
+    _sram3_text_end = ABSOLUTE(.);
+  } >sram3_seg :sram3_phdr
+
+  .sram3.data : ALIGN(4)
+  {
+    _sram3_data_start = ABSOLUTE(.);
+    *(.sram3.data)
+    . = ALIGN (4);
+    _sram3_data_end = ABSOLUTE(.);
+  } >sram3_seg :sram3_phdr
+
+  .sram3.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _sram3_bss_start = ABSOLUTE(.);
+    *(.sram3.bss)
+    . = ALIGN (8);
+    _sram3_bss_end = ABSOLUTE(.);
+    _memmap_seg_sram3_end = ALIGN(0x8);
+  } >sram3_seg :sram3_bss_phdr
+
+  _memmap_mem_sram_max = ABSOLUTE(.);
+
+  .dram0.rodata : ALIGN(4)
+  {
+    _dram0_rodata_start = ABSOLUTE(.);
+    *(.dram0.rodata)
+    . = ALIGN (4);
+    _dram0_rodata_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.data : ALIGN(4)
+  {
+    _dram0_data_start = ABSOLUTE(.);
+    *(.dram0.data)
+    . = ALIGN (4);
+    _dram0_data_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dram0_bss_start = ABSOLUTE(.);
+    *(.dram0.bss)
+    *(.dram0_user.bss)
+    . = ALIGN (8);
+    _dram0_bss_end = ABSOLUTE(.);
+    _memmap_seg_dram0_0_end = ALIGN(0x8);
+  } >dram0_0_seg :dram0_0_bss_phdr
+
+  _memmap_mem_dram0_max = ABSOLUTE(.);
+
+  .dram1.rodata : ALIGN(4)
+  {
+    _dram1_rodata_start = ABSOLUTE(.);
+    *(.dram1.rodata)
+    . = ALIGN (4);
+    _dram1_rodata_end = ABSOLUTE(.);
+  } >dram1_0_seg :dram1_0_phdr
+
+  .dram1.data : ALIGN(4)
+  {
+    _dram1_data_start = ABSOLUTE(.);
+    *(.dram1.data)
+    . = ALIGN (4);
+    _dram1_data_end = ABSOLUTE(.);
+  } >dram1_0_seg :dram1_0_phdr
+
+  .dram1.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dram1_bss_start = ABSOLUTE(.);
+    *(.dram1.bss)
+    *(.dram1_user.bss)
+    . = ALIGN (8);
+    _dram1_bss_end = ABSOLUTE(.);
+    _stack_sentry = ALIGN(0x8);
+    _memmap_seg_dram1_0_end = ALIGN(0x8);
+  } >dram1_0_seg :dram1_0_bss_phdr
+
+  PROVIDE(__stack = 0xe01c0000);
+  _isb_default = 0xe01bfe10;
+  _memmap_mem_dram1_max = ABSOLUTE(.);
+
+  .local_sram.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _local_sram_bss_start = ABSOLUTE(.);
+    *(.local_sram.bss)
+    . = ALIGN (8);
+    _local_sram_bss_end = ABSOLUTE(.);
+    _memmap_seg_local_sram_0_end = ALIGN(0x8);
+  } >local_sram_0_seg :local_sram_0_bss_phdr
+
+
+  _memmap_mem_local_sram_max = ABSOLUTE(.);
+
+  .debug  0 :  { *(.debug) }
+  .line  0 :  { *(.line) }
+  .debug_srcinfo  0 :  { *(.debug_srcinfo) }
+  .debug_sfnames  0 :  { *(.debug_sfnames) }
+  .debug_aranges  0 :  { *(.debug_aranges) }
+  .debug_pubnames  0 :  { *(.debug_pubnames) }
+  .debug_info  0 :  { *(.debug_info) }
+  .debug_abbrev  0 :  { *(.debug_abbrev) }
+  .debug_line  0 :  { *(.debug_line) }
+  .debug_frame  0 :  { *(.debug_frame) }
+  .debug_str  0 :  { *(.debug_str) }
+  .debug_loc  0 :  { *(.debug_loc) }
+  .debug_macinfo  0 :  { *(.debug_macinfo) }
+  .debug_weaknames  0 :  { *(.debug_weaknames) }
+  .debug_funcnames  0 :  { *(.debug_funcnames) }
+  .debug_typenames  0 :  { *(.debug_typenames) }
+  .debug_varnames  0 :  { *(.debug_varnames) }
+  .xt.insn 0 :
+  {
+    KEEP (*(.xt.insn))
+    KEEP (*(.gnu.linkonce.x.*))
+  }
+  .xt.prop 0 :
+  {
+    KEEP (*(.xt.prop))
+    KEEP (*(.xt.prop.*))
+    KEEP (*(.gnu.linkonce.prop.*))
+  }
+  .xt.lit 0 :
+  {
+    KEEP (*(.xt.lit))
+    KEEP (*(.xt.lit.*))
+    KEEP (*(.gnu.linkonce.p.*))
+  }
+  .debug.xt.callgraph 0 :
+  {
+    KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
+  }
+}
+

+ 61 - 0
LSP/min-rt_core0_lib0_stack_tcm1/ldscripts/elf32xtensa.xr

@@ -0,0 +1,61 @@
+/* This linker script generated from xt-genldscripts.tpp for LSP C:\Users\DELL\workspace\CSI_DSP_FW\LSP\min-rt_core0_lib0_stack_tcm1 */
+/* Linker Script for ld -r or ld -i */
+
+
+SECTIONS
+{
+
+  .text 0 :
+  {
+    *(.literal .text)
+  }
+
+  .bss 0 :
+  {
+    *(.dynsbss)
+    *(.sbss)
+    *(.scommon)
+    *(.dynbss)
+    *(.bss)
+    *(COMMON)
+  }
+  .debug  0 :  { *(.debug) }
+  .line  0 :  { *(.line) }
+  .debug_srcinfo  0 :  { *(.debug_srcinfo) }
+  .debug_sfnames  0 :  { *(.debug_sfnames) }
+  .debug_aranges  0 :  { *(.debug_aranges) }
+  .debug_pubnames  0 :  { *(.debug_pubnames) }
+  .debug_info  0 :  { *(.debug_info) }
+  .debug_abbrev  0 :  { *(.debug_abbrev) }
+  .debug_line  0 :  { *(.debug_line) }
+  .debug_frame  0 :  { *(.debug_frame) }
+  .debug_str  0 :  { *(.debug_str) }
+  .debug_loc  0 :  { *(.debug_loc) }
+  .debug_macinfo  0 :  { *(.debug_macinfo) }
+  .debug_weaknames  0 :  { *(.debug_weaknames) }
+  .debug_funcnames  0 :  { *(.debug_funcnames) }
+  .debug_typenames  0 :  { *(.debug_typenames) }
+  .debug_varnames  0 :  { *(.debug_varnames) }
+  .xt.insn 0 :
+  {
+    KEEP (*(.xt.insn))
+    KEEP (*(.gnu.linkonce.x.*))
+  }
+  .xt.prop 0 :
+  {
+    KEEP (*(.xt.prop))
+    KEEP (*(.xt.prop.*))
+    KEEP (*(.gnu.linkonce.prop.*))
+  }
+  .xt.lit 0 :
+  {
+    KEEP (*(.xt.lit))
+    KEEP (*(.xt.lit.*))
+    KEEP (*(.gnu.linkonce.p.*))
+  }
+  .debug.xt.callgraph 0 :
+  {
+    KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
+  }
+}
+

+ 61 - 0
LSP/min-rt_core0_lib0_stack_tcm1/ldscripts/elf32xtensa.xu

@@ -0,0 +1,61 @@
+/* This linker script generated from xt-genldscripts.tpp for LSP C:\Users\DELL\workspace\CSI_DSP_FW\LSP\min-rt_core0_lib0_stack_tcm1 */
+/* Linker Script for ld -Ur */
+
+
+SECTIONS
+{
+
+  .text 0 :
+  {
+    *(.literal .text)
+  }
+
+  .bss 0 :
+  {
+    *(.dynsbss)
+    *(.sbss)
+    *(.scommon)
+    *(.dynbss)
+    *(.bss)
+    *(COMMON)
+  }
+  .debug  0 :  { *(.debug) }
+  .line  0 :  { *(.line) }
+  .debug_srcinfo  0 :  { *(.debug_srcinfo) }
+  .debug_sfnames  0 :  { *(.debug_sfnames) }
+  .debug_aranges  0 :  { *(.debug_aranges) }
+  .debug_pubnames  0 :  { *(.debug_pubnames) }
+  .debug_info  0 :  { *(.debug_info) }
+  .debug_abbrev  0 :  { *(.debug_abbrev) }
+  .debug_line  0 :  { *(.debug_line) }
+  .debug_frame  0 :  { *(.debug_frame) }
+  .debug_str  0 :  { *(.debug_str) }
+  .debug_loc  0 :  { *(.debug_loc) }
+  .debug_macinfo  0 :  { *(.debug_macinfo) }
+  .debug_weaknames  0 :  { *(.debug_weaknames) }
+  .debug_funcnames  0 :  { *(.debug_funcnames) }
+  .debug_typenames  0 :  { *(.debug_typenames) }
+  .debug_varnames  0 :  { *(.debug_varnames) }
+  .xt.insn 0 :
+  {
+    KEEP (*(.xt.insn))
+    KEEP (*(.gnu.linkonce.x.*))
+  }
+  .xt.prop 0 :
+  {
+    KEEP (*(.xt.prop))
+    KEEP (*(.xt.prop.*))
+    KEEP (*(.gnu.linkonce.prop.*))
+  }
+  .xt.lit 0 :
+  {
+    KEEP (*(.xt.lit))
+    KEEP (*(.xt.lit.*))
+    KEEP (*(.gnu.linkonce.p.*))
+  }
+  .debug.xt.callgraph 0 :
+  {
+    KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
+  }
+}
+

BIN
LSP/min-rt_core0_lib0_stack_tcm1/ldscripts/libminrt.a


BIN
LSP/min-rt_core0_lib0_stack_tcm1/libminrt.a


+ 81 - 0
LSP/min-rt_core0_lib0_stack_tcm1/memmap.xmm

@@ -0,0 +1,81 @@
+//  Memory map file to generate linker scripts for programs without board I/O.
+
+// Customer ID=16470; Build=0x8e648; Copyright (c) 2004-2015 Cadence Design Systems, Inc.
+//
+// Permission is hereby granted, free of charge, to any person obtaining
+// a copy of this software and associated documentation files (the
+// "Software"), to deal in the Software without restriction, including
+// without limitation the rights to use, copy, modify, merge, publish,
+// distribute, sublicense, and/or sell copies of the Software, and to
+// permit persons to whom the Software is furnished to do so, subject to
+// the following conditions:
+//
+// The above copyright notice and this permission notice shall be included
+// in all copies or substantial portions of the Software.
+//
+// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+// EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+// IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+// CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+// TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+// SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+
+//  Place stack in local RAM:
+PLACE SECTIONS(STACK) WITH_SECTION(.dram1.bss)
+// A memory map is a sequence of memory descriptions and
+// optional parameter assignments.
+//
+// Each memory description has the following format:
+//   BEGIN <name>
+//     <addr> [,<paddr>] : <mem-type> : <mem-name> : <size> [,<psize>]
+//                       : [writable] [,executable] [,device] ;
+//     <segment>*
+//   END <name>
+//
+// where each <segment> description has the following format:
+//     <seg-name> : F|C : <start-addr> - <end-addr> [ : STACK ] [ : HEAP ]
+//                : <section-name>* ;
+//
+// Each parameter assignment is a keyword/value pair in the following format:
+//   <keyword> = <value>                (no spaces in <value>)
+// or
+//   <keyword> = "<value>"              (spaces allowed in <value>)
+//
+// The following primitives are also defined:
+//   PLACE SECTIONS( <section-name>* ) { WITH_SECTION(<section-name>)
+//                                       | IN_SEGMENT(<seg-name>) }
+//
+//   NOLOAD <section-name1> [ <section-name2> ... ]
+//
+// Please refer to the Xtensa LSP Reference Manual for more details.
+//
+VECSELECT=1
+VECRESET=0x20000000
+VECBASE= 0x20000000
+
+BEGIN sram
+0x20000000: extra_mem : sram : 0x00280000 : executable, writable ;
+ sram0 : F : 0x20000000 - 0x20000fff : .DispatchVector.text .ResetVector.text .ResetHandler.literal .ResetHandler.text .DispatchHandler.literal .DispatchHandler.text;
+ sram1 : C : 0x20001000 - 0x201fffff :  HEAP : .sram.rodata .clib.rodata .rtos.rodata .sram.literal  .rtos.literal .clib.literal .sram.text .clib.text .rtos.text .clib.data .clib.percpu.data .rtos.percpu.data .rtos.data .sram.data  __llvm_prf_names .clib.bss .clib.percpu.bss .rtos.percpu.bss .rtos.bss .sram.bss  .debug.bss;
+ sram2 : C : 0x20200000 - 0x2023ffff : .sram2.rodata .rodata .sram2.literal .literal .sram2.text .text .sram2.data .data .sram2.bss .bss;
+ sram3 : C : 0x20240000 - 0x2027ffff : .sram3.rodata .sram3.literal .sram3.text .sram3.data .sram3.bss;
+ END sram
+
+BEGIN dram0
+0xe0180000: dataRam : dram0 : 0x20000 : writable ;
+ dram0_0 : C : 0xe0180000 - 0xe019ffff :.dram0.rodata .dram0.data .dram0.bss .dram0_user.bss;
+END dram0
+
+BEGIN dram1
+0xe01a0000: dataRam : dram1 : 0x20000 : writable ;
+ dram1_0 : C : 0xe01a0000 - 0xe01bffff :STACK :.dram1.rodata .dram1.data .dram1.bss .dram1_user.bss;
+END dram1
+
+BEGIN local_sram
+0xffa00000: sysram : local_sram :   0x180000: writable ;
+  local_sram_0 : C : 0xffa00000 - 0xffb7ffff :.local_sram.bss ;
+ END local_sram
+
+ENTRY = _libinit
+USE_SEGMENT_AREA = ".dram0.data 120832 + 0 end : .dram1.data 120832 + 0 end : .sram2.data 262144 + 0 end"

+ 35 - 0
LSP/min-rt_core0_lib0_stack_tcm1/specs

@@ -0,0 +1,35 @@
+# Customer ID=16470; Build=0x8e648; Copyright (c) 2001-2015 Cadence Design Systems, Inc.
+#
+# Permission is hereby granted, free of charge, to any person obtaining
+# a copy of this software and associated documentation files (the
+# "Software"), to deal in the Software without restriction, including
+# without limitation the rights to use, copy, modify, merge, publish,
+# distribute, sublicense, and/or sell copies of the Software, and to
+# permit persons to whom the Software is furnished to do so, subject to
+# the following conditions:
+#
+# The above copyright notice and this permission notice shall be included
+# in all copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+# IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+# CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+# TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+# SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+
+
+# The %O suffix on the start and end files indicates that the system's
+# standard suffix for object files (e.g., ".o") should be appended.
+# The %s suffix tells the compiler driver to search for the file in the
+# list of known locations for startfiles.
+
+*startfile:
+crti%O%s crtbegin%O%s
+*endfile:
+crtend%O%s crtn%O%s
+
+*lib:
+
+

+ 528 - 0
LSP/min-rt_core0_lib1_stack_tcm1/ldscripts/elf32xtensa.x

@@ -0,0 +1,528 @@
+/* This linker script generated from xt-genldscripts.tpp for LSP C:\Users\DELL\workspace\CSI_DSP_FW\LSP\min-rt_core0_lib1_stack_tcm1 */
+/* Linker Script for default link */
+MEMORY
+{
+  sram0_seg :                         	org = 0x20000000, len = 0x1000
+  sram1_seg :                         	org = 0x20001000, len = 0x1FF000
+  sram2_seg :                         	org = 0x20200000, len = 0x40000
+  sram3_seg :                         	org = 0x20240000, len = 0x40000
+  dram0_0_seg :                       	org = 0xE0182800, len = 0x1D800
+  dram1_0_seg :                       	org = 0xE01A2800, len = 0x1D800
+  local_sram_0_seg :                  	org = 0xFFA00000, len = 0x180000
+}
+
+PHDRS
+{
+  sram0_phdr PT_LOAD;
+  sram1_phdr PT_LOAD;
+  sram1_bss_phdr PT_LOAD;
+  sram2_phdr PT_LOAD;
+  sram2_bss_phdr PT_LOAD;
+  sram3_phdr PT_LOAD;
+  sram3_bss_phdr PT_LOAD;
+  dram0_0_phdr PT_LOAD;
+  dram0_0_bss_phdr PT_LOAD;
+  dram1_0_phdr PT_LOAD;
+  dram1_0_bss_phdr PT_LOAD;
+  local_sram_0_phdr PT_LOAD;
+  local_sram_0_bss_phdr PT_LOAD;
+}
+
+
+/*  Default entry point:  */
+ENTRY(_libinit)
+
+
+/*  Memory boundary addresses:  */
+_memmap_mem_sram_start = 0x20000000;
+_memmap_mem_sram_end   = 0x20280000;
+_memmap_mem_dram0_start = 0xe0180000;
+_memmap_mem_dram0_end   = 0xe01a0000;
+_memmap_mem_dram1_start = 0xe01a0000;
+_memmap_mem_dram1_end   = 0xe01c0000;
+_memmap_mem_local_sram_start = 0xffa00000;
+_memmap_mem_local_sram_end   = 0xffb80000;
+
+/*  Memory segment boundary addresses:  */
+_memmap_seg_sram0_start = 0x20000000;
+_memmap_seg_sram0_max   = 0x20001000;
+_memmap_seg_sram1_start = 0x20001000;
+_memmap_seg_sram1_max   = 0x20200000;
+_memmap_seg_sram2_start = 0x20200000;
+_memmap_seg_sram2_max   = 0x20240000;
+_memmap_seg_sram3_start = 0x20240000;
+_memmap_seg_sram3_max   = 0x20280000;
+_memmap_seg_dram0_0_start = 0xe0182800;
+_memmap_seg_dram0_0_max   = 0xe01a0000;
+_memmap_seg_dram1_0_start = 0xe01a2800;
+_memmap_seg_dram1_0_max   = 0xe01c0000;
+_memmap_seg_local_sram_0_start = 0xffa00000;
+_memmap_seg_local_sram_0_max   = 0xffb80000;
+
+_rom_store_table = 0;
+PROVIDE(_memmap_reset_vector = 0x20000000);
+PROVIDE(_memmap_vecbase_reset = 0x20000000);
+/* Various memory-map dependent cache attribute settings: */
+_memmap_cacheattr_wb_base = 0x10000010;
+_memmap_cacheattr_wt_base = 0x30000030;
+_memmap_cacheattr_bp_base = 0x40000040;
+_memmap_cacheattr_unused_mask = 0x0FFFFF0F;
+_memmap_cacheattr_wb_trapnull = 0x14444411;
+_memmap_cacheattr_wba_trapnull = 0x14444410;
+_memmap_cacheattr_wbna_trapnull = 0x24444420;
+_memmap_cacheattr_wt_trapnull = 0x34444430;
+_memmap_cacheattr_bp_trapnull = 0x44444440;
+_memmap_cacheattr_wb_strict = 0x10000010;
+_memmap_cacheattr_wt_strict = 0x30000030;
+_memmap_cacheattr_bp_strict = 0x40000040;
+_memmap_cacheattr_wb_allvalid = 0x14444414;
+_memmap_cacheattr_wt_allvalid = 0x34444434;
+_memmap_cacheattr_bp_allvalid = 0x44444444;
+_memmap_region_map = 0x00000082;
+PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
+
+SECTIONS
+{
+
+  .DispatchVector.text : ALIGN(4)
+  {
+    _DispatchVector_text_start = ABSOLUTE(.);
+    KEEP (*(.DispatchVector.text))
+    . = ALIGN (4);
+    _DispatchVector_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .ResetVector.text : ALIGN(4)
+  {
+    _ResetVector_text_start = ABSOLUTE(.);
+    *(.ResetVector.text)
+    . = ALIGN (4);
+    _ResetVector_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .ResetHandler.text : ALIGN(4)
+  {
+    _ResetHandler_text_start = ABSOLUTE(.);
+    *(.ResetHandler.literal .ResetHandler.text)
+    . = ALIGN (4);
+    _ResetHandler_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .DispatchHandler.text : ALIGN(4)
+  {
+    _DispatchHandler_text_start = ABSOLUTE(.);
+    *(.DispatchHandler.literal .DispatchHandler.text)
+    . = ALIGN (4);
+    _DispatchHandler_text_end = ABSOLUTE(.);
+    _memmap_seg_sram0_end = ALIGN(0x8);
+  } >sram0_seg :sram0_phdr
+
+
+  .sram.rodata : ALIGN(4)
+  {
+    _sram_rodata_start = ABSOLUTE(.);
+    *(.sram.rodata)
+    . = ALIGN (4);
+    _sram_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.rodata : ALIGN(4)
+  {
+    _clib_rodata_start = ABSOLUTE(.);
+    *(.clib.rodata)
+    . = ALIGN (4);
+    _clib_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.rodata : ALIGN(4)
+  {
+    _rtos_rodata_start = ABSOLUTE(.);
+    *(.rtos.rodata)
+    . = ALIGN (4);
+    _rtos_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .sram.text : ALIGN(4)
+  {
+    _sram_text_start = ABSOLUTE(.);
+    *(.sram.literal .sram.text)
+    . = ALIGN (4);
+    _sram_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.text : ALIGN(4)
+  {
+    _clib_text_start = ABSOLUTE(.);
+    *(.clib.literal .clib.text)
+    . = ALIGN (4);
+    _clib_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.text : ALIGN(4)
+  {
+    _rtos_text_start = ABSOLUTE(.);
+    *(.rtos.literal .rtos.text)
+    . = ALIGN (4);
+    _rtos_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.data : ALIGN(4)
+  {
+    _clib_data_start = ABSOLUTE(.);
+    *(.clib.data)
+    . = ALIGN (4);
+    _clib_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.percpu.data : ALIGN(4)
+  {
+    _clib_percpu_data_start = ABSOLUTE(.);
+    *(.clib.percpu.data)
+    . = ALIGN (4);
+    _clib_percpu_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.percpu.data : ALIGN(4)
+  {
+    _rtos_percpu_data_start = ABSOLUTE(.);
+    *(.rtos.percpu.data)
+    . = ALIGN (4);
+    _rtos_percpu_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.data : ALIGN(4)
+  {
+    _rtos_data_start = ABSOLUTE(.);
+    *(.rtos.data)
+    . = ALIGN (4);
+    _rtos_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .sram.data : ALIGN(4)
+  {
+    _sram_data_start = ABSOLUTE(.);
+    *(.sram.data)
+    . = ALIGN (4);
+    _sram_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  __llvm_prf_names : ALIGN(4)
+  {
+    __llvm_prf_names_start = ABSOLUTE(.);
+    *(__llvm_prf_names)
+    . = ALIGN (4);
+    __llvm_prf_names_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _clib_bss_start = ABSOLUTE(.);
+    *(.clib.bss)
+    *(.clib.percpu.bss)
+    *(.rtos.percpu.bss)
+    *(.rtos.bss)
+    *(.sram.bss)
+    *(.debug.bss)
+    . = ALIGN (8);
+    _clib_bss_end = ABSOLUTE(.);
+    _end = ALIGN(0x8);
+    PROVIDE(end = ALIGN(0x8));
+    _memmap_seg_sram1_end = ALIGN(0x8);
+  } >sram1_seg :sram1_bss_phdr
+
+  _heap_sentry = 0x20200000;
+
+  .sram2.rodata : ALIGN(4)
+  {
+    _sram2_rodata_start = ABSOLUTE(.);
+    *(.sram2.rodata)
+    . = ALIGN (4);
+    _sram2_rodata_end = ABSOLUTE(.);
+  } >sram2_seg :sram2_phdr
+
+  .sram2.text : ALIGN(4)
+  {
+    _sram2_text_start = ABSOLUTE(.);
+    *(.sram2.literal .sram2.text)
+    . = ALIGN (4);
+    _sram2_text_end = ABSOLUTE(.);
+  } >sram2_seg :sram2_phdr
+
+  .sram2.data : ALIGN(4)
+  {
+    _sram2_data_start = ABSOLUTE(.);
+    *(.sram2.data)
+    . = ALIGN (4);
+    _sram2_data_end = ABSOLUTE(.);
+  } >sram2_seg :sram2_phdr
+
+  .sram2.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _sram2_bss_start = ABSOLUTE(.);
+    *(.sram2.bss)
+    . = ALIGN (8);
+    _sram2_bss_end = ABSOLUTE(.);
+    _memmap_seg_sram2_end = ALIGN(0x8);
+  } >sram2_seg :sram2_bss_phdr
+
+
+  .sram3.rodata : ALIGN(4)
+  {
+    _sram3_rodata_start = ABSOLUTE(.);
+    *(.sram3.rodata)
+    . = ALIGN (4);
+    _sram3_rodata_end = ABSOLUTE(.);
+  } >sram3_seg :sram3_phdr
+
+  .rodata : ALIGN(4)
+  {
+    _rodata_start = ABSOLUTE(.);
+    *(.rodata)
+    *(SORT(.rodata.sort.*))
+    KEEP (*(SORT(.rodata.keepsort.*) .rodata.keep.*))
+    *(.rodata.*)
+    *(.gnu.linkonce.r.*)
+    *(.rodata1)
+    __XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
+    KEEP (*(.xt_except_table))
+    KEEP (*(.gcc_except_table))
+    *(.gnu.linkonce.e.*)
+    *(.gnu.version_r)
+    KEEP (*(.eh_frame))
+    /*  C++ constructor and destructor tables, properly ordered:  */
+    KEEP (*crtbegin.o(.ctors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*(.ctors))
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*(.dtors))
+    /*  C++ exception handlers table:  */
+    __XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
+    *(.xt_except_desc)
+    *(.gnu.linkonce.h.*)
+    __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
+    *(.xt_except_desc_end)
+    *(.dynamic)
+    *(.gnu.version_d)
+    . = ALIGN(4);		/* this table MUST be 4-byte aligned */
+    _bss_table_start = ABSOLUTE(.);
+    LONG(_clib_bss_start)
+    LONG(_clib_bss_end)
+    LONG(_sram2_bss_start)
+    LONG(_sram2_bss_end)
+    LONG(_bss_start)
+    LONG(_bss_end)
+    LONG(_dram0_bss_start)
+    LONG(_dram0_bss_end)
+    LONG(_dram1_bss_start)
+    LONG(_dram1_bss_end)
+    LONG(_local_sram_bss_start)
+    LONG(_local_sram_bss_end)
+    _bss_table_end = ABSOLUTE(.);
+    . = ALIGN (4);
+    _rodata_end = ABSOLUTE(.);
+  } >sram3_seg :sram3_phdr
+
+  .sram3.text : ALIGN(4)
+  {
+    _sram3_text_start = ABSOLUTE(.);
+    *(.sram3.literal .sram3.text)
+    . = ALIGN (4);
+    _sram3_text_end = ABSOLUTE(.);
+  } >sram3_seg :sram3_phdr
+
+  .text : ALIGN(4)
+  {
+    _stext = .;
+    _text_start = ABSOLUTE(.);
+    *(.entry.text)
+    *(.init.literal)
+    KEEP(*(.init))
+    *(.literal.sort.* SORT(.text.sort.*))
+    KEEP (*(.literal.keepsort.* SORT(.text.keepsort.*) .literal.keep.* .text.keep.* .literal.*personality* .text.*personality*))
+    *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
+    *(.fini.literal)
+    KEEP(*(.fini))
+    *(.gnu.version)
+    . = ALIGN (4);
+    _text_end = ABSOLUTE(.);
+    _etext = .;
+  } >sram3_seg :sram3_phdr
+
+  .sram3.data : ALIGN(4)
+  {
+    _sram3_data_start = ABSOLUTE(.);
+    *(.sram3.data)
+    . = ALIGN (4);
+    _sram3_data_end = ABSOLUTE(.);
+  } >sram3_seg :sram3_phdr
+
+  .data : ALIGN(4)
+  {
+    _data_start = ABSOLUTE(.);
+    *(.data)
+    *(SORT(.data.sort.*))
+    KEEP (*(SORT(.data.keepsort.*) .data.keep.*))
+    *(.data.*)
+    *(.gnu.linkonce.d.*)
+    KEEP(*(.gnu.linkonce.d.*personality*))
+    *(.data1)
+    *(.sdata)
+    *(.sdata.*)
+    *(.gnu.linkonce.s.*)
+    *(.sdata2)
+    *(.sdata2.*)
+    *(.gnu.linkonce.s2.*)
+    KEEP(*(.jcr))
+    *(__llvm_prf_cnts)
+    *(__llvm_prf_data)
+    *(__llvm_prf_vnds)
+    . = ALIGN (4);
+    _data_end = ABSOLUTE(.);
+  } >sram3_seg :sram3_phdr
+
+  .bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _bss_start = ABSOLUTE(.);
+    *(.dynsbss)
+    *(.sbss)
+    *(.sbss.*)
+    *(.gnu.linkonce.sb.*)
+    *(.scommon)
+    *(.sbss2)
+    *(.sbss2.*)
+    *(.gnu.linkonce.sb2.*)
+    *(.dynbss)
+    *(.bss)
+    *(SORT(.bss.sort.*))
+    KEEP (*(SORT(.bss.keepsort.*) .bss.keep.*))
+    *(.bss.*)
+    *(.gnu.linkonce.b.*)
+    *(COMMON)
+    *(.sram3.bss)
+    . = ALIGN (8);
+    _bss_end = ABSOLUTE(.);
+    _memmap_seg_sram3_end = ALIGN(0x8);
+  } >sram3_seg :sram3_bss_phdr
+
+  _memmap_mem_sram_max = ABSOLUTE(.);
+
+  .dram0.rodata : ALIGN(4)
+  {
+    _dram0_rodata_start = ABSOLUTE(.);
+    *(.dram0.rodata)
+    . = ALIGN (4);
+    _dram0_rodata_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.data : ALIGN(4)
+  {
+    _dram0_data_start = ABSOLUTE(.);
+    *(.dram0.data)
+    . = ALIGN (4);
+    _dram0_data_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dram0_bss_start = ABSOLUTE(.);
+    *(.dram0.bss)
+    *(.dram0_user.bss)
+    . = ALIGN (8);
+    _dram0_bss_end = ABSOLUTE(.);
+    _memmap_seg_dram0_0_end = ALIGN(0x8);
+  } >dram0_0_seg :dram0_0_bss_phdr
+
+  _memmap_mem_dram0_max = ABSOLUTE(.);
+
+  .dram1.rodata : ALIGN(4)
+  {
+    _dram1_rodata_start = ABSOLUTE(.);
+    *(.dram1.rodata)
+    . = ALIGN (4);
+    _dram1_rodata_end = ABSOLUTE(.);
+  } >dram1_0_seg :dram1_0_phdr
+
+  .dram1.data : ALIGN(4)
+  {
+    _dram1_data_start = ABSOLUTE(.);
+    *(.dram1.data)
+    . = ALIGN (4);
+    _dram1_data_end = ABSOLUTE(.);
+  } >dram1_0_seg :dram1_0_phdr
+
+  .dram1.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dram1_bss_start = ABSOLUTE(.);
+    *(.dram1.bss)
+    *(.dram1_user.bss)
+    . = ALIGN (8);
+    _dram1_bss_end = ABSOLUTE(.);
+    _stack_sentry = ALIGN(0x8);
+    _memmap_seg_dram1_0_end = ALIGN(0x8);
+  } >dram1_0_seg :dram1_0_bss_phdr
+
+  PROVIDE(__stack = 0xe01c0000);
+  _isb_default = 0xe01bfe10;
+  _memmap_mem_dram1_max = ABSOLUTE(.);
+
+  .local_sram.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _local_sram_bss_start = ABSOLUTE(.);
+    *(.local_sram.bss)
+    . = ALIGN (8);
+    _local_sram_bss_end = ABSOLUTE(.);
+    _memmap_seg_local_sram_0_end = ALIGN(0x8);
+  } >local_sram_0_seg :local_sram_0_bss_phdr
+
+
+  _memmap_mem_local_sram_max = ABSOLUTE(.);
+
+  .debug  0 :  { *(.debug) }
+  .line  0 :  { *(.line) }
+  .debug_srcinfo  0 :  { *(.debug_srcinfo) }
+  .debug_sfnames  0 :  { *(.debug_sfnames) }
+  .debug_aranges  0 :  { *(.debug_aranges) }
+  .debug_pubnames  0 :  { *(.debug_pubnames) }
+  .debug_info  0 :  { *(.debug_info) }
+  .debug_abbrev  0 :  { *(.debug_abbrev) }
+  .debug_line  0 :  { *(.debug_line) }
+  .debug_frame  0 :  { *(.debug_frame) }
+  .debug_str  0 :  { *(.debug_str) }
+  .debug_loc  0 :  { *(.debug_loc) }
+  .debug_macinfo  0 :  { *(.debug_macinfo) }
+  .debug_weaknames  0 :  { *(.debug_weaknames) }
+  .debug_funcnames  0 :  { *(.debug_funcnames) }
+  .debug_typenames  0 :  { *(.debug_typenames) }
+  .debug_varnames  0 :  { *(.debug_varnames) }
+  .xt.insn 0 :
+  {
+    KEEP (*(.xt.insn))
+    KEEP (*(.gnu.linkonce.x.*))
+  }
+  .xt.prop 0 :
+  {
+    KEEP (*(.xt.prop))
+    KEEP (*(.xt.prop.*))
+    KEEP (*(.gnu.linkonce.prop.*))
+  }
+  .xt.lit 0 :
+  {
+    KEEP (*(.xt.lit))
+    KEEP (*(.xt.lit.*))
+    KEEP (*(.gnu.linkonce.p.*))
+  }
+  .debug.xt.callgraph 0 :
+  {
+    KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
+  }
+}
+

+ 528 - 0
LSP/min-rt_core0_lib1_stack_tcm1/ldscripts/elf32xtensa.xbn

@@ -0,0 +1,528 @@
+/* This linker script generated from xt-genldscripts.tpp for LSP C:\Users\DELL\workspace\CSI_DSP_FW\LSP\min-rt_core0_lib1_stack_tcm1 */
+/* Linker Script for ld -N */
+MEMORY
+{
+  sram0_seg :                         	org = 0x20000000, len = 0x1000
+  sram1_seg :                         	org = 0x20001000, len = 0x1FF000
+  sram2_seg :                         	org = 0x20200000, len = 0x40000
+  sram3_seg :                         	org = 0x20240000, len = 0x40000
+  dram0_0_seg :                       	org = 0xE0182800, len = 0x1D800
+  dram1_0_seg :                       	org = 0xE01A2800, len = 0x1D800
+  local_sram_0_seg :                  	org = 0xFFA00000, len = 0x180000
+}
+
+PHDRS
+{
+  sram0_phdr PT_LOAD;
+  sram1_phdr PT_LOAD;
+  sram1_bss_phdr PT_LOAD;
+  sram2_phdr PT_LOAD;
+  sram2_bss_phdr PT_LOAD;
+  sram3_phdr PT_LOAD;
+  sram3_bss_phdr PT_LOAD;
+  dram0_0_phdr PT_LOAD;
+  dram0_0_bss_phdr PT_LOAD;
+  dram1_0_phdr PT_LOAD;
+  dram1_0_bss_phdr PT_LOAD;
+  local_sram_0_phdr PT_LOAD;
+  local_sram_0_bss_phdr PT_LOAD;
+}
+
+
+/*  Default entry point:  */
+ENTRY(_libinit)
+
+
+/*  Memory boundary addresses:  */
+_memmap_mem_sram_start = 0x20000000;
+_memmap_mem_sram_end   = 0x20280000;
+_memmap_mem_dram0_start = 0xe0180000;
+_memmap_mem_dram0_end   = 0xe01a0000;
+_memmap_mem_dram1_start = 0xe01a0000;
+_memmap_mem_dram1_end   = 0xe01c0000;
+_memmap_mem_local_sram_start = 0xffa00000;
+_memmap_mem_local_sram_end   = 0xffb80000;
+
+/*  Memory segment boundary addresses:  */
+_memmap_seg_sram0_start = 0x20000000;
+_memmap_seg_sram0_max   = 0x20001000;
+_memmap_seg_sram1_start = 0x20001000;
+_memmap_seg_sram1_max   = 0x20200000;
+_memmap_seg_sram2_start = 0x20200000;
+_memmap_seg_sram2_max   = 0x20240000;
+_memmap_seg_sram3_start = 0x20240000;
+_memmap_seg_sram3_max   = 0x20280000;
+_memmap_seg_dram0_0_start = 0xe0182800;
+_memmap_seg_dram0_0_max   = 0xe01a0000;
+_memmap_seg_dram1_0_start = 0xe01a2800;
+_memmap_seg_dram1_0_max   = 0xe01c0000;
+_memmap_seg_local_sram_0_start = 0xffa00000;
+_memmap_seg_local_sram_0_max   = 0xffb80000;
+
+_rom_store_table = 0;
+PROVIDE(_memmap_reset_vector = 0x20000000);
+PROVIDE(_memmap_vecbase_reset = 0x20000000);
+/* Various memory-map dependent cache attribute settings: */
+_memmap_cacheattr_wb_base = 0x10000010;
+_memmap_cacheattr_wt_base = 0x30000030;
+_memmap_cacheattr_bp_base = 0x40000040;
+_memmap_cacheattr_unused_mask = 0x0FFFFF0F;
+_memmap_cacheattr_wb_trapnull = 0x14444410;
+_memmap_cacheattr_wba_trapnull = 0x14444410;
+_memmap_cacheattr_wbna_trapnull = 0x24444420;
+_memmap_cacheattr_wt_trapnull = 0x34444430;
+_memmap_cacheattr_bp_trapnull = 0x44444440;
+_memmap_cacheattr_wb_strict = 0x10000010;
+_memmap_cacheattr_wt_strict = 0x30000030;
+_memmap_cacheattr_bp_strict = 0x40000040;
+_memmap_cacheattr_wb_allvalid = 0x14444414;
+_memmap_cacheattr_wt_allvalid = 0x34444434;
+_memmap_cacheattr_bp_allvalid = 0x44444444;
+_memmap_region_map = 0x00000082;
+PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
+
+SECTIONS
+{
+
+  .DispatchVector.text : ALIGN(4)
+  {
+    _DispatchVector_text_start = ABSOLUTE(.);
+    KEEP (*(.DispatchVector.text))
+    . = ALIGN (4);
+    _DispatchVector_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .ResetVector.text : ALIGN(4)
+  {
+    _ResetVector_text_start = ABSOLUTE(.);
+    *(.ResetVector.text)
+    . = ALIGN (4);
+    _ResetVector_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .ResetHandler.text : ALIGN(4)
+  {
+    _ResetHandler_text_start = ABSOLUTE(.);
+    *(.ResetHandler.literal .ResetHandler.text)
+    . = ALIGN (4);
+    _ResetHandler_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .DispatchHandler.text : ALIGN(4)
+  {
+    _DispatchHandler_text_start = ABSOLUTE(.);
+    *(.DispatchHandler.literal .DispatchHandler.text)
+    . = ALIGN (4);
+    _DispatchHandler_text_end = ABSOLUTE(.);
+    _memmap_seg_sram0_end = ALIGN(0x8);
+  } >sram0_seg :sram0_phdr
+
+
+  .sram.rodata : ALIGN(4)
+  {
+    _sram_rodata_start = ABSOLUTE(.);
+    *(.sram.rodata)
+    . = ALIGN (4);
+    _sram_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.rodata : ALIGN(4)
+  {
+    _clib_rodata_start = ABSOLUTE(.);
+    *(.clib.rodata)
+    . = ALIGN (4);
+    _clib_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.rodata : ALIGN(4)
+  {
+    _rtos_rodata_start = ABSOLUTE(.);
+    *(.rtos.rodata)
+    . = ALIGN (4);
+    _rtos_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .sram.text : ALIGN(4)
+  {
+    _sram_text_start = ABSOLUTE(.);
+    *(.sram.literal .sram.text)
+    . = ALIGN (4);
+    _sram_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.text : ALIGN(4)
+  {
+    _clib_text_start = ABSOLUTE(.);
+    *(.clib.literal .clib.text)
+    . = ALIGN (4);
+    _clib_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.text : ALIGN(4)
+  {
+    _rtos_text_start = ABSOLUTE(.);
+    *(.rtos.literal .rtos.text)
+    . = ALIGN (4);
+    _rtos_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.data : ALIGN(4)
+  {
+    _clib_data_start = ABSOLUTE(.);
+    *(.clib.data)
+    . = ALIGN (4);
+    _clib_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.percpu.data : ALIGN(4)
+  {
+    _clib_percpu_data_start = ABSOLUTE(.);
+    *(.clib.percpu.data)
+    . = ALIGN (4);
+    _clib_percpu_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.percpu.data : ALIGN(4)
+  {
+    _rtos_percpu_data_start = ABSOLUTE(.);
+    *(.rtos.percpu.data)
+    . = ALIGN (4);
+    _rtos_percpu_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.data : ALIGN(4)
+  {
+    _rtos_data_start = ABSOLUTE(.);
+    *(.rtos.data)
+    . = ALIGN (4);
+    _rtos_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .sram.data : ALIGN(4)
+  {
+    _sram_data_start = ABSOLUTE(.);
+    *(.sram.data)
+    . = ALIGN (4);
+    _sram_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  __llvm_prf_names : ALIGN(4)
+  {
+    __llvm_prf_names_start = ABSOLUTE(.);
+    *(__llvm_prf_names)
+    . = ALIGN (4);
+    __llvm_prf_names_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _clib_bss_start = ABSOLUTE(.);
+    *(.clib.bss)
+    *(.clib.percpu.bss)
+    *(.rtos.percpu.bss)
+    *(.rtos.bss)
+    *(.sram.bss)
+    *(.debug.bss)
+    . = ALIGN (8);
+    _clib_bss_end = ABSOLUTE(.);
+    _end = ALIGN(0x8);
+    PROVIDE(end = ALIGN(0x8));
+    _memmap_seg_sram1_end = ALIGN(0x8);
+  } >sram1_seg :sram1_bss_phdr
+
+  _heap_sentry = 0x20200000;
+
+  .sram2.rodata : ALIGN(4)
+  {
+    _sram2_rodata_start = ABSOLUTE(.);
+    *(.sram2.rodata)
+    . = ALIGN (4);
+    _sram2_rodata_end = ABSOLUTE(.);
+  } >sram2_seg :sram2_phdr
+
+  .sram2.text : ALIGN(4)
+  {
+    _sram2_text_start = ABSOLUTE(.);
+    *(.sram2.literal .sram2.text)
+    . = ALIGN (4);
+    _sram2_text_end = ABSOLUTE(.);
+  } >sram2_seg :sram2_phdr
+
+  .sram2.data : ALIGN(4)
+  {
+    _sram2_data_start = ABSOLUTE(.);
+    *(.sram2.data)
+    . = ALIGN (4);
+    _sram2_data_end = ABSOLUTE(.);
+  } >sram2_seg :sram2_phdr
+
+  .sram2.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _sram2_bss_start = ABSOLUTE(.);
+    *(.sram2.bss)
+    . = ALIGN (8);
+    _sram2_bss_end = ABSOLUTE(.);
+    _memmap_seg_sram2_end = ALIGN(0x8);
+  } >sram2_seg :sram2_bss_phdr
+
+
+  .sram3.rodata : ALIGN(4)
+  {
+    _sram3_rodata_start = ABSOLUTE(.);
+    *(.sram3.rodata)
+    . = ALIGN (4);
+    _sram3_rodata_end = ABSOLUTE(.);
+  } >sram3_seg :sram3_phdr
+
+  .rodata : ALIGN(4)
+  {
+    _rodata_start = ABSOLUTE(.);
+    *(.rodata)
+    *(SORT(.rodata.sort.*))
+    KEEP (*(SORT(.rodata.keepsort.*) .rodata.keep.*))
+    *(.rodata.*)
+    *(.gnu.linkonce.r.*)
+    *(.rodata1)
+    __XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
+    KEEP (*(.xt_except_table))
+    KEEP (*(.gcc_except_table))
+    *(.gnu.linkonce.e.*)
+    *(.gnu.version_r)
+    KEEP (*(.eh_frame))
+    /*  C++ constructor and destructor tables, properly ordered:  */
+    KEEP (*crtbegin.o(.ctors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*(.ctors))
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*(.dtors))
+    /*  C++ exception handlers table:  */
+    __XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
+    *(.xt_except_desc)
+    *(.gnu.linkonce.h.*)
+    __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
+    *(.xt_except_desc_end)
+    *(.dynamic)
+    *(.gnu.version_d)
+    . = ALIGN(4);		/* this table MUST be 4-byte aligned */
+    _bss_table_start = ABSOLUTE(.);
+    LONG(_clib_bss_start)
+    LONG(_clib_bss_end)
+    LONG(_sram2_bss_start)
+    LONG(_sram2_bss_end)
+    LONG(_bss_start)
+    LONG(_bss_end)
+    LONG(_dram0_bss_start)
+    LONG(_dram0_bss_end)
+    LONG(_dram1_bss_start)
+    LONG(_dram1_bss_end)
+    LONG(_local_sram_bss_start)
+    LONG(_local_sram_bss_end)
+    _bss_table_end = ABSOLUTE(.);
+    . = ALIGN (4);
+    _rodata_end = ABSOLUTE(.);
+  } >sram3_seg :sram3_phdr
+
+  .sram3.text : ALIGN(4)
+  {
+    _sram3_text_start = ABSOLUTE(.);
+    *(.sram3.literal .sram3.text)
+    . = ALIGN (4);
+    _sram3_text_end = ABSOLUTE(.);
+  } >sram3_seg :sram3_phdr
+
+  .text : ALIGN(4)
+  {
+    _stext = .;
+    _text_start = ABSOLUTE(.);
+    *(.entry.text)
+    *(.init.literal)
+    KEEP(*(.init))
+    *(.literal.sort.* SORT(.text.sort.*))
+    KEEP (*(.literal.keepsort.* SORT(.text.keepsort.*) .literal.keep.* .text.keep.* .literal.*personality* .text.*personality*))
+    *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
+    *(.fini.literal)
+    KEEP(*(.fini))
+    *(.gnu.version)
+    . = ALIGN (4);
+    _text_end = ABSOLUTE(.);
+    _etext = .;
+  } >sram3_seg :sram3_phdr
+
+  .sram3.data : ALIGN(4)
+  {
+    _sram3_data_start = ABSOLUTE(.);
+    *(.sram3.data)
+    . = ALIGN (4);
+    _sram3_data_end = ABSOLUTE(.);
+  } >sram3_seg :sram3_phdr
+
+  .data : ALIGN(4)
+  {
+    _data_start = ABSOLUTE(.);
+    *(.data)
+    *(SORT(.data.sort.*))
+    KEEP (*(SORT(.data.keepsort.*) .data.keep.*))
+    *(.data.*)
+    *(.gnu.linkonce.d.*)
+    KEEP(*(.gnu.linkonce.d.*personality*))
+    *(.data1)
+    *(.sdata)
+    *(.sdata.*)
+    *(.gnu.linkonce.s.*)
+    *(.sdata2)
+    *(.sdata2.*)
+    *(.gnu.linkonce.s2.*)
+    KEEP(*(.jcr))
+    *(__llvm_prf_cnts)
+    *(__llvm_prf_data)
+    *(__llvm_prf_vnds)
+    . = ALIGN (4);
+    _data_end = ABSOLUTE(.);
+  } >sram3_seg :sram3_phdr
+
+  .bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _bss_start = ABSOLUTE(.);
+    *(.dynsbss)
+    *(.sbss)
+    *(.sbss.*)
+    *(.gnu.linkonce.sb.*)
+    *(.scommon)
+    *(.sbss2)
+    *(.sbss2.*)
+    *(.gnu.linkonce.sb2.*)
+    *(.dynbss)
+    *(.bss)
+    *(SORT(.bss.sort.*))
+    KEEP (*(SORT(.bss.keepsort.*) .bss.keep.*))
+    *(.bss.*)
+    *(.gnu.linkonce.b.*)
+    *(COMMON)
+    *(.sram3.bss)
+    . = ALIGN (8);
+    _bss_end = ABSOLUTE(.);
+    _memmap_seg_sram3_end = ALIGN(0x8);
+  } >sram3_seg :sram3_bss_phdr
+
+  _memmap_mem_sram_max = ABSOLUTE(.);
+
+  .dram0.rodata : ALIGN(4)
+  {
+    _dram0_rodata_start = ABSOLUTE(.);
+    *(.dram0.rodata)
+    . = ALIGN (4);
+    _dram0_rodata_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.data : ALIGN(4)
+  {
+    _dram0_data_start = ABSOLUTE(.);
+    *(.dram0.data)
+    . = ALIGN (4);
+    _dram0_data_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dram0_bss_start = ABSOLUTE(.);
+    *(.dram0.bss)
+    *(.dram0_user.bss)
+    . = ALIGN (8);
+    _dram0_bss_end = ABSOLUTE(.);
+    _memmap_seg_dram0_0_end = ALIGN(0x8);
+  } >dram0_0_seg :dram0_0_bss_phdr
+
+  _memmap_mem_dram0_max = ABSOLUTE(.);
+
+  .dram1.rodata : ALIGN(4)
+  {
+    _dram1_rodata_start = ABSOLUTE(.);
+    *(.dram1.rodata)
+    . = ALIGN (4);
+    _dram1_rodata_end = ABSOLUTE(.);
+  } >dram1_0_seg :dram1_0_phdr
+
+  .dram1.data : ALIGN(4)
+  {
+    _dram1_data_start = ABSOLUTE(.);
+    *(.dram1.data)
+    . = ALIGN (4);
+    _dram1_data_end = ABSOLUTE(.);
+  } >dram1_0_seg :dram1_0_phdr
+
+  .dram1.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dram1_bss_start = ABSOLUTE(.);
+    *(.dram1.bss)
+    *(.dram1_user.bss)
+    . = ALIGN (8);
+    _dram1_bss_end = ABSOLUTE(.);
+    _stack_sentry = ALIGN(0x8);
+    _memmap_seg_dram1_0_end = ALIGN(0x8);
+  } >dram1_0_seg :dram1_0_bss_phdr
+
+  PROVIDE(__stack = 0xe01c0000);
+  _isb_default = 0xe01bfe10;
+  _memmap_mem_dram1_max = ABSOLUTE(.);
+
+  .local_sram.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _local_sram_bss_start = ABSOLUTE(.);
+    *(.local_sram.bss)
+    . = ALIGN (8);
+    _local_sram_bss_end = ABSOLUTE(.);
+    _memmap_seg_local_sram_0_end = ALIGN(0x8);
+  } >local_sram_0_seg :local_sram_0_bss_phdr
+
+
+  _memmap_mem_local_sram_max = ABSOLUTE(.);
+
+  .debug  0 :  { *(.debug) }
+  .line  0 :  { *(.line) }
+  .debug_srcinfo  0 :  { *(.debug_srcinfo) }
+  .debug_sfnames  0 :  { *(.debug_sfnames) }
+  .debug_aranges  0 :  { *(.debug_aranges) }
+  .debug_pubnames  0 :  { *(.debug_pubnames) }
+  .debug_info  0 :  { *(.debug_info) }
+  .debug_abbrev  0 :  { *(.debug_abbrev) }
+  .debug_line  0 :  { *(.debug_line) }
+  .debug_frame  0 :  { *(.debug_frame) }
+  .debug_str  0 :  { *(.debug_str) }
+  .debug_loc  0 :  { *(.debug_loc) }
+  .debug_macinfo  0 :  { *(.debug_macinfo) }
+  .debug_weaknames  0 :  { *(.debug_weaknames) }
+  .debug_funcnames  0 :  { *(.debug_funcnames) }
+  .debug_typenames  0 :  { *(.debug_typenames) }
+  .debug_varnames  0 :  { *(.debug_varnames) }
+  .xt.insn 0 :
+  {
+    KEEP (*(.xt.insn))
+    KEEP (*(.gnu.linkonce.x.*))
+  }
+  .xt.prop 0 :
+  {
+    KEEP (*(.xt.prop))
+    KEEP (*(.xt.prop.*))
+    KEEP (*(.gnu.linkonce.prop.*))
+  }
+  .xt.lit 0 :
+  {
+    KEEP (*(.xt.lit))
+    KEEP (*(.xt.lit.*))
+    KEEP (*(.gnu.linkonce.p.*))
+  }
+  .debug.xt.callgraph 0 :
+  {
+    KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
+  }
+}
+

+ 528 - 0
LSP/min-rt_core0_lib1_stack_tcm1/ldscripts/elf32xtensa.xn

@@ -0,0 +1,528 @@
+/* This linker script generated from xt-genldscripts.tpp for LSP C:\Users\DELL\workspace\CSI_DSP_FW\LSP\min-rt_core0_lib1_stack_tcm1 */
+/* Linker Script for ld -n */
+MEMORY
+{
+  sram0_seg :                         	org = 0x20000000, len = 0x1000
+  sram1_seg :                         	org = 0x20001000, len = 0x1FF000
+  sram2_seg :                         	org = 0x20200000, len = 0x40000
+  sram3_seg :                         	org = 0x20240000, len = 0x40000
+  dram0_0_seg :                       	org = 0xE0182800, len = 0x1D800
+  dram1_0_seg :                       	org = 0xE01A2800, len = 0x1D800
+  local_sram_0_seg :                  	org = 0xFFA00000, len = 0x180000
+}
+
+PHDRS
+{
+  sram0_phdr PT_LOAD;
+  sram1_phdr PT_LOAD;
+  sram1_bss_phdr PT_LOAD;
+  sram2_phdr PT_LOAD;
+  sram2_bss_phdr PT_LOAD;
+  sram3_phdr PT_LOAD;
+  sram3_bss_phdr PT_LOAD;
+  dram0_0_phdr PT_LOAD;
+  dram0_0_bss_phdr PT_LOAD;
+  dram1_0_phdr PT_LOAD;
+  dram1_0_bss_phdr PT_LOAD;
+  local_sram_0_phdr PT_LOAD;
+  local_sram_0_bss_phdr PT_LOAD;
+}
+
+
+/*  Default entry point:  */
+ENTRY(_libinit)
+
+
+/*  Memory boundary addresses:  */
+_memmap_mem_sram_start = 0x20000000;
+_memmap_mem_sram_end   = 0x20280000;
+_memmap_mem_dram0_start = 0xe0180000;
+_memmap_mem_dram0_end   = 0xe01a0000;
+_memmap_mem_dram1_start = 0xe01a0000;
+_memmap_mem_dram1_end   = 0xe01c0000;
+_memmap_mem_local_sram_start = 0xffa00000;
+_memmap_mem_local_sram_end   = 0xffb80000;
+
+/*  Memory segment boundary addresses:  */
+_memmap_seg_sram0_start = 0x20000000;
+_memmap_seg_sram0_max   = 0x20001000;
+_memmap_seg_sram1_start = 0x20001000;
+_memmap_seg_sram1_max   = 0x20200000;
+_memmap_seg_sram2_start = 0x20200000;
+_memmap_seg_sram2_max   = 0x20240000;
+_memmap_seg_sram3_start = 0x20240000;
+_memmap_seg_sram3_max   = 0x20280000;
+_memmap_seg_dram0_0_start = 0xe0182800;
+_memmap_seg_dram0_0_max   = 0xe01a0000;
+_memmap_seg_dram1_0_start = 0xe01a2800;
+_memmap_seg_dram1_0_max   = 0xe01c0000;
+_memmap_seg_local_sram_0_start = 0xffa00000;
+_memmap_seg_local_sram_0_max   = 0xffb80000;
+
+_rom_store_table = 0;
+PROVIDE(_memmap_reset_vector = 0x20000000);
+PROVIDE(_memmap_vecbase_reset = 0x20000000);
+/* Various memory-map dependent cache attribute settings: */
+_memmap_cacheattr_wb_base = 0x10000010;
+_memmap_cacheattr_wt_base = 0x30000030;
+_memmap_cacheattr_bp_base = 0x40000040;
+_memmap_cacheattr_unused_mask = 0x0FFFFF0F;
+_memmap_cacheattr_wb_trapnull = 0x14444410;
+_memmap_cacheattr_wba_trapnull = 0x14444410;
+_memmap_cacheattr_wbna_trapnull = 0x24444420;
+_memmap_cacheattr_wt_trapnull = 0x34444430;
+_memmap_cacheattr_bp_trapnull = 0x44444440;
+_memmap_cacheattr_wb_strict = 0x10000010;
+_memmap_cacheattr_wt_strict = 0x30000030;
+_memmap_cacheattr_bp_strict = 0x40000040;
+_memmap_cacheattr_wb_allvalid = 0x14444414;
+_memmap_cacheattr_wt_allvalid = 0x34444434;
+_memmap_cacheattr_bp_allvalid = 0x44444444;
+_memmap_region_map = 0x00000082;
+PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
+
+SECTIONS
+{
+
+  .DispatchVector.text : ALIGN(4)
+  {
+    _DispatchVector_text_start = ABSOLUTE(.);
+    KEEP (*(.DispatchVector.text))
+    . = ALIGN (4);
+    _DispatchVector_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .ResetVector.text : ALIGN(4)
+  {
+    _ResetVector_text_start = ABSOLUTE(.);
+    *(.ResetVector.text)
+    . = ALIGN (4);
+    _ResetVector_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .ResetHandler.text : ALIGN(4)
+  {
+    _ResetHandler_text_start = ABSOLUTE(.);
+    *(.ResetHandler.literal .ResetHandler.text)
+    . = ALIGN (4);
+    _ResetHandler_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .DispatchHandler.text : ALIGN(4)
+  {
+    _DispatchHandler_text_start = ABSOLUTE(.);
+    *(.DispatchHandler.literal .DispatchHandler.text)
+    . = ALIGN (4);
+    _DispatchHandler_text_end = ABSOLUTE(.);
+    _memmap_seg_sram0_end = ALIGN(0x8);
+  } >sram0_seg :sram0_phdr
+
+
+  .sram.rodata : ALIGN(4)
+  {
+    _sram_rodata_start = ABSOLUTE(.);
+    *(.sram.rodata)
+    . = ALIGN (4);
+    _sram_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.rodata : ALIGN(4)
+  {
+    _clib_rodata_start = ABSOLUTE(.);
+    *(.clib.rodata)
+    . = ALIGN (4);
+    _clib_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.rodata : ALIGN(4)
+  {
+    _rtos_rodata_start = ABSOLUTE(.);
+    *(.rtos.rodata)
+    . = ALIGN (4);
+    _rtos_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .sram.text : ALIGN(4)
+  {
+    _sram_text_start = ABSOLUTE(.);
+    *(.sram.literal .sram.text)
+    . = ALIGN (4);
+    _sram_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.text : ALIGN(4)
+  {
+    _clib_text_start = ABSOLUTE(.);
+    *(.clib.literal .clib.text)
+    . = ALIGN (4);
+    _clib_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.text : ALIGN(4)
+  {
+    _rtos_text_start = ABSOLUTE(.);
+    *(.rtos.literal .rtos.text)
+    . = ALIGN (4);
+    _rtos_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.data : ALIGN(4)
+  {
+    _clib_data_start = ABSOLUTE(.);
+    *(.clib.data)
+    . = ALIGN (4);
+    _clib_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.percpu.data : ALIGN(4)
+  {
+    _clib_percpu_data_start = ABSOLUTE(.);
+    *(.clib.percpu.data)
+    . = ALIGN (4);
+    _clib_percpu_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.percpu.data : ALIGN(4)
+  {
+    _rtos_percpu_data_start = ABSOLUTE(.);
+    *(.rtos.percpu.data)
+    . = ALIGN (4);
+    _rtos_percpu_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.data : ALIGN(4)
+  {
+    _rtos_data_start = ABSOLUTE(.);
+    *(.rtos.data)
+    . = ALIGN (4);
+    _rtos_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .sram.data : ALIGN(4)
+  {
+    _sram_data_start = ABSOLUTE(.);
+    *(.sram.data)
+    . = ALIGN (4);
+    _sram_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  __llvm_prf_names : ALIGN(4)
+  {
+    __llvm_prf_names_start = ABSOLUTE(.);
+    *(__llvm_prf_names)
+    . = ALIGN (4);
+    __llvm_prf_names_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _clib_bss_start = ABSOLUTE(.);
+    *(.clib.bss)
+    *(.clib.percpu.bss)
+    *(.rtos.percpu.bss)
+    *(.rtos.bss)
+    *(.sram.bss)
+    *(.debug.bss)
+    . = ALIGN (8);
+    _clib_bss_end = ABSOLUTE(.);
+    _end = ALIGN(0x8);
+    PROVIDE(end = ALIGN(0x8));
+    _memmap_seg_sram1_end = ALIGN(0x8);
+  } >sram1_seg :sram1_bss_phdr
+
+  _heap_sentry = 0x20200000;
+
+  .sram2.rodata : ALIGN(4)
+  {
+    _sram2_rodata_start = ABSOLUTE(.);
+    *(.sram2.rodata)
+    . = ALIGN (4);
+    _sram2_rodata_end = ABSOLUTE(.);
+  } >sram2_seg :sram2_phdr
+
+  .sram2.text : ALIGN(4)
+  {
+    _sram2_text_start = ABSOLUTE(.);
+    *(.sram2.literal .sram2.text)
+    . = ALIGN (4);
+    _sram2_text_end = ABSOLUTE(.);
+  } >sram2_seg :sram2_phdr
+
+  .sram2.data : ALIGN(4)
+  {
+    _sram2_data_start = ABSOLUTE(.);
+    *(.sram2.data)
+    . = ALIGN (4);
+    _sram2_data_end = ABSOLUTE(.);
+  } >sram2_seg :sram2_phdr
+
+  .sram2.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _sram2_bss_start = ABSOLUTE(.);
+    *(.sram2.bss)
+    . = ALIGN (8);
+    _sram2_bss_end = ABSOLUTE(.);
+    _memmap_seg_sram2_end = ALIGN(0x8);
+  } >sram2_seg :sram2_bss_phdr
+
+
+  .sram3.rodata : ALIGN(4)
+  {
+    _sram3_rodata_start = ABSOLUTE(.);
+    *(.sram3.rodata)
+    . = ALIGN (4);
+    _sram3_rodata_end = ABSOLUTE(.);
+  } >sram3_seg :sram3_phdr
+
+  .rodata : ALIGN(4)
+  {
+    _rodata_start = ABSOLUTE(.);
+    *(.rodata)
+    *(SORT(.rodata.sort.*))
+    KEEP (*(SORT(.rodata.keepsort.*) .rodata.keep.*))
+    *(.rodata.*)
+    *(.gnu.linkonce.r.*)
+    *(.rodata1)
+    __XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
+    KEEP (*(.xt_except_table))
+    KEEP (*(.gcc_except_table))
+    *(.gnu.linkonce.e.*)
+    *(.gnu.version_r)
+    KEEP (*(.eh_frame))
+    /*  C++ constructor and destructor tables, properly ordered:  */
+    KEEP (*crtbegin.o(.ctors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*(.ctors))
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*(.dtors))
+    /*  C++ exception handlers table:  */
+    __XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
+    *(.xt_except_desc)
+    *(.gnu.linkonce.h.*)
+    __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
+    *(.xt_except_desc_end)
+    *(.dynamic)
+    *(.gnu.version_d)
+    . = ALIGN(4);		/* this table MUST be 4-byte aligned */
+    _bss_table_start = ABSOLUTE(.);
+    LONG(_clib_bss_start)
+    LONG(_clib_bss_end)
+    LONG(_sram2_bss_start)
+    LONG(_sram2_bss_end)
+    LONG(_bss_start)
+    LONG(_bss_end)
+    LONG(_dram0_bss_start)
+    LONG(_dram0_bss_end)
+    LONG(_dram1_bss_start)
+    LONG(_dram1_bss_end)
+    LONG(_local_sram_bss_start)
+    LONG(_local_sram_bss_end)
+    _bss_table_end = ABSOLUTE(.);
+    . = ALIGN (4);
+    _rodata_end = ABSOLUTE(.);
+  } >sram3_seg :sram3_phdr
+
+  .sram3.text : ALIGN(4)
+  {
+    _sram3_text_start = ABSOLUTE(.);
+    *(.sram3.literal .sram3.text)
+    . = ALIGN (4);
+    _sram3_text_end = ABSOLUTE(.);
+  } >sram3_seg :sram3_phdr
+
+  .text : ALIGN(4)
+  {
+    _stext = .;
+    _text_start = ABSOLUTE(.);
+    *(.entry.text)
+    *(.init.literal)
+    KEEP(*(.init))
+    *(.literal.sort.* SORT(.text.sort.*))
+    KEEP (*(.literal.keepsort.* SORT(.text.keepsort.*) .literal.keep.* .text.keep.* .literal.*personality* .text.*personality*))
+    *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
+    *(.fini.literal)
+    KEEP(*(.fini))
+    *(.gnu.version)
+    . = ALIGN (4);
+    _text_end = ABSOLUTE(.);
+    _etext = .;
+  } >sram3_seg :sram3_phdr
+
+  .sram3.data : ALIGN(4)
+  {
+    _sram3_data_start = ABSOLUTE(.);
+    *(.sram3.data)
+    . = ALIGN (4);
+    _sram3_data_end = ABSOLUTE(.);
+  } >sram3_seg :sram3_phdr
+
+  .data : ALIGN(4)
+  {
+    _data_start = ABSOLUTE(.);
+    *(.data)
+    *(SORT(.data.sort.*))
+    KEEP (*(SORT(.data.keepsort.*) .data.keep.*))
+    *(.data.*)
+    *(.gnu.linkonce.d.*)
+    KEEP(*(.gnu.linkonce.d.*personality*))
+    *(.data1)
+    *(.sdata)
+    *(.sdata.*)
+    *(.gnu.linkonce.s.*)
+    *(.sdata2)
+    *(.sdata2.*)
+    *(.gnu.linkonce.s2.*)
+    KEEP(*(.jcr))
+    *(__llvm_prf_cnts)
+    *(__llvm_prf_data)
+    *(__llvm_prf_vnds)
+    . = ALIGN (4);
+    _data_end = ABSOLUTE(.);
+  } >sram3_seg :sram3_phdr
+
+  .bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _bss_start = ABSOLUTE(.);
+    *(.dynsbss)
+    *(.sbss)
+    *(.sbss.*)
+    *(.gnu.linkonce.sb.*)
+    *(.scommon)
+    *(.sbss2)
+    *(.sbss2.*)
+    *(.gnu.linkonce.sb2.*)
+    *(.dynbss)
+    *(.bss)
+    *(SORT(.bss.sort.*))
+    KEEP (*(SORT(.bss.keepsort.*) .bss.keep.*))
+    *(.bss.*)
+    *(.gnu.linkonce.b.*)
+    *(COMMON)
+    *(.sram3.bss)
+    . = ALIGN (8);
+    _bss_end = ABSOLUTE(.);
+    _memmap_seg_sram3_end = ALIGN(0x8);
+  } >sram3_seg :sram3_bss_phdr
+
+  _memmap_mem_sram_max = ABSOLUTE(.);
+
+  .dram0.rodata : ALIGN(4)
+  {
+    _dram0_rodata_start = ABSOLUTE(.);
+    *(.dram0.rodata)
+    . = ALIGN (4);
+    _dram0_rodata_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.data : ALIGN(4)
+  {
+    _dram0_data_start = ABSOLUTE(.);
+    *(.dram0.data)
+    . = ALIGN (4);
+    _dram0_data_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dram0_bss_start = ABSOLUTE(.);
+    *(.dram0.bss)
+    *(.dram0_user.bss)
+    . = ALIGN (8);
+    _dram0_bss_end = ABSOLUTE(.);
+    _memmap_seg_dram0_0_end = ALIGN(0x8);
+  } >dram0_0_seg :dram0_0_bss_phdr
+
+  _memmap_mem_dram0_max = ABSOLUTE(.);
+
+  .dram1.rodata : ALIGN(4)
+  {
+    _dram1_rodata_start = ABSOLUTE(.);
+    *(.dram1.rodata)
+    . = ALIGN (4);
+    _dram1_rodata_end = ABSOLUTE(.);
+  } >dram1_0_seg :dram1_0_phdr
+
+  .dram1.data : ALIGN(4)
+  {
+    _dram1_data_start = ABSOLUTE(.);
+    *(.dram1.data)
+    . = ALIGN (4);
+    _dram1_data_end = ABSOLUTE(.);
+  } >dram1_0_seg :dram1_0_phdr
+
+  .dram1.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dram1_bss_start = ABSOLUTE(.);
+    *(.dram1.bss)
+    *(.dram1_user.bss)
+    . = ALIGN (8);
+    _dram1_bss_end = ABSOLUTE(.);
+    _stack_sentry = ALIGN(0x8);
+    _memmap_seg_dram1_0_end = ALIGN(0x8);
+  } >dram1_0_seg :dram1_0_bss_phdr
+
+  PROVIDE(__stack = 0xe01c0000);
+  _isb_default = 0xe01bfe10;
+  _memmap_mem_dram1_max = ABSOLUTE(.);
+
+  .local_sram.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _local_sram_bss_start = ABSOLUTE(.);
+    *(.local_sram.bss)
+    . = ALIGN (8);
+    _local_sram_bss_end = ABSOLUTE(.);
+    _memmap_seg_local_sram_0_end = ALIGN(0x8);
+  } >local_sram_0_seg :local_sram_0_bss_phdr
+
+
+  _memmap_mem_local_sram_max = ABSOLUTE(.);
+
+  .debug  0 :  { *(.debug) }
+  .line  0 :  { *(.line) }
+  .debug_srcinfo  0 :  { *(.debug_srcinfo) }
+  .debug_sfnames  0 :  { *(.debug_sfnames) }
+  .debug_aranges  0 :  { *(.debug_aranges) }
+  .debug_pubnames  0 :  { *(.debug_pubnames) }
+  .debug_info  0 :  { *(.debug_info) }
+  .debug_abbrev  0 :  { *(.debug_abbrev) }
+  .debug_line  0 :  { *(.debug_line) }
+  .debug_frame  0 :  { *(.debug_frame) }
+  .debug_str  0 :  { *(.debug_str) }
+  .debug_loc  0 :  { *(.debug_loc) }
+  .debug_macinfo  0 :  { *(.debug_macinfo) }
+  .debug_weaknames  0 :  { *(.debug_weaknames) }
+  .debug_funcnames  0 :  { *(.debug_funcnames) }
+  .debug_typenames  0 :  { *(.debug_typenames) }
+  .debug_varnames  0 :  { *(.debug_varnames) }
+  .xt.insn 0 :
+  {
+    KEEP (*(.xt.insn))
+    KEEP (*(.gnu.linkonce.x.*))
+  }
+  .xt.prop 0 :
+  {
+    KEEP (*(.xt.prop))
+    KEEP (*(.xt.prop.*))
+    KEEP (*(.gnu.linkonce.prop.*))
+  }
+  .xt.lit 0 :
+  {
+    KEEP (*(.xt.lit))
+    KEEP (*(.xt.lit.*))
+    KEEP (*(.gnu.linkonce.p.*))
+  }
+  .debug.xt.callgraph 0 :
+  {
+    KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
+  }
+}
+

+ 61 - 0
LSP/min-rt_core0_lib1_stack_tcm1/ldscripts/elf32xtensa.xr

@@ -0,0 +1,61 @@
+/* This linker script generated from xt-genldscripts.tpp for LSP C:\Users\DELL\workspace\CSI_DSP_FW\LSP\min-rt_core0_lib1_stack_tcm1 */
+/* Linker Script for ld -r or ld -i */
+
+
+SECTIONS
+{
+
+  .text 0 :
+  {
+    *(.literal .text)
+  }
+
+  .bss 0 :
+  {
+    *(.dynsbss)
+    *(.sbss)
+    *(.scommon)
+    *(.dynbss)
+    *(.bss)
+    *(COMMON)
+  }
+  .debug  0 :  { *(.debug) }
+  .line  0 :  { *(.line) }
+  .debug_srcinfo  0 :  { *(.debug_srcinfo) }
+  .debug_sfnames  0 :  { *(.debug_sfnames) }
+  .debug_aranges  0 :  { *(.debug_aranges) }
+  .debug_pubnames  0 :  { *(.debug_pubnames) }
+  .debug_info  0 :  { *(.debug_info) }
+  .debug_abbrev  0 :  { *(.debug_abbrev) }
+  .debug_line  0 :  { *(.debug_line) }
+  .debug_frame  0 :  { *(.debug_frame) }
+  .debug_str  0 :  { *(.debug_str) }
+  .debug_loc  0 :  { *(.debug_loc) }
+  .debug_macinfo  0 :  { *(.debug_macinfo) }
+  .debug_weaknames  0 :  { *(.debug_weaknames) }
+  .debug_funcnames  0 :  { *(.debug_funcnames) }
+  .debug_typenames  0 :  { *(.debug_typenames) }
+  .debug_varnames  0 :  { *(.debug_varnames) }
+  .xt.insn 0 :
+  {
+    KEEP (*(.xt.insn))
+    KEEP (*(.gnu.linkonce.x.*))
+  }
+  .xt.prop 0 :
+  {
+    KEEP (*(.xt.prop))
+    KEEP (*(.xt.prop.*))
+    KEEP (*(.gnu.linkonce.prop.*))
+  }
+  .xt.lit 0 :
+  {
+    KEEP (*(.xt.lit))
+    KEEP (*(.xt.lit.*))
+    KEEP (*(.gnu.linkonce.p.*))
+  }
+  .debug.xt.callgraph 0 :
+  {
+    KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
+  }
+}
+

+ 61 - 0
LSP/min-rt_core0_lib1_stack_tcm1/ldscripts/elf32xtensa.xu

@@ -0,0 +1,61 @@
+/* This linker script generated from xt-genldscripts.tpp for LSP C:\Users\DELL\workspace\CSI_DSP_FW\LSP\min-rt_core0_lib1_stack_tcm1 */
+/* Linker Script for ld -Ur */
+
+
+SECTIONS
+{
+
+  .text 0 :
+  {
+    *(.literal .text)
+  }
+
+  .bss 0 :
+  {
+    *(.dynsbss)
+    *(.sbss)
+    *(.scommon)
+    *(.dynbss)
+    *(.bss)
+    *(COMMON)
+  }
+  .debug  0 :  { *(.debug) }
+  .line  0 :  { *(.line) }
+  .debug_srcinfo  0 :  { *(.debug_srcinfo) }
+  .debug_sfnames  0 :  { *(.debug_sfnames) }
+  .debug_aranges  0 :  { *(.debug_aranges) }
+  .debug_pubnames  0 :  { *(.debug_pubnames) }
+  .debug_info  0 :  { *(.debug_info) }
+  .debug_abbrev  0 :  { *(.debug_abbrev) }
+  .debug_line  0 :  { *(.debug_line) }
+  .debug_frame  0 :  { *(.debug_frame) }
+  .debug_str  0 :  { *(.debug_str) }
+  .debug_loc  0 :  { *(.debug_loc) }
+  .debug_macinfo  0 :  { *(.debug_macinfo) }
+  .debug_weaknames  0 :  { *(.debug_weaknames) }
+  .debug_funcnames  0 :  { *(.debug_funcnames) }
+  .debug_typenames  0 :  { *(.debug_typenames) }
+  .debug_varnames  0 :  { *(.debug_varnames) }
+  .xt.insn 0 :
+  {
+    KEEP (*(.xt.insn))
+    KEEP (*(.gnu.linkonce.x.*))
+  }
+  .xt.prop 0 :
+  {
+    KEEP (*(.xt.prop))
+    KEEP (*(.xt.prop.*))
+    KEEP (*(.gnu.linkonce.prop.*))
+  }
+  .xt.lit 0 :
+  {
+    KEEP (*(.xt.lit))
+    KEEP (*(.xt.lit.*))
+    KEEP (*(.gnu.linkonce.p.*))
+  }
+  .debug.xt.callgraph 0 :
+  {
+    KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
+  }
+}
+

BIN
LSP/min-rt_core0_lib1_stack_tcm1/ldscripts/libminrt.a


BIN
LSP/min-rt_core0_lib1_stack_tcm1/libminrt.a


+ 81 - 0
LSP/min-rt_core0_lib1_stack_tcm1/memmap.xmm

@@ -0,0 +1,81 @@
+//  Memory map file to generate linker scripts for programs without board I/O.
+
+// Customer ID=16470; Build=0x8e648; Copyright (c) 2004-2015 Cadence Design Systems, Inc.
+//
+// Permission is hereby granted, free of charge, to any person obtaining
+// a copy of this software and associated documentation files (the
+// "Software"), to deal in the Software without restriction, including
+// without limitation the rights to use, copy, modify, merge, publish,
+// distribute, sublicense, and/or sell copies of the Software, and to
+// permit persons to whom the Software is furnished to do so, subject to
+// the following conditions:
+//
+// The above copyright notice and this permission notice shall be included
+// in all copies or substantial portions of the Software.
+//
+// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+// EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+// IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+// CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+// TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+// SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+
+//  Place stack in local RAM:
+PLACE SECTIONS(STACK) WITH_SECTION(.dram1.bss)
+// A memory map is a sequence of memory descriptions and
+// optional parameter assignments.
+//
+// Each memory description has the following format:
+//   BEGIN <name>
+//     <addr> [,<paddr>] : <mem-type> : <mem-name> : <size> [,<psize>]
+//                       : [writable] [,executable] [,device] ;
+//     <segment>*
+//   END <name>
+//
+// where each <segment> description has the following format:
+//     <seg-name> : F|C : <start-addr> - <end-addr> [ : STACK ] [ : HEAP ]
+//                : <section-name>* ;
+//
+// Each parameter assignment is a keyword/value pair in the following format:
+//   <keyword> = <value>                (no spaces in <value>)
+// or
+//   <keyword> = "<value>"              (spaces allowed in <value>)
+//
+// The following primitives are also defined:
+//   PLACE SECTIONS( <section-name>* ) { WITH_SECTION(<section-name>)
+//                                       | IN_SEGMENT(<seg-name>) }
+//
+//   NOLOAD <section-name1> [ <section-name2> ... ]
+//
+// Please refer to the Xtensa LSP Reference Manual for more details.
+//
+VECSELECT=1
+VECRESET=0x20000000
+VECBASE= 0x20000000
+
+BEGIN sram
+0x20000000: extra_mem : sram : 0x00280000 : executable, writable ;
+ sram0 : F : 0x20000000 - 0x20000fff : .DispatchVector.text .ResetVector.text .ResetHandler.literal .ResetHandler.text .DispatchHandler.literal .DispatchHandler.text;
+ sram1 : C : 0x20001000 - 0x201fffff :  HEAP : .sram.rodata .clib.rodata .rtos.rodata .sram.literal .rtos.literal .clib.literal .sram.text .clib.text .rtos.text .clib.data .clib.percpu.data .rtos.percpu.data .rtos.data .sram.data __llvm_prf_names .clib.bss .clib.percpu.bss .rtos.percpu.bss .rtos.bss .sram.bss .debug.bss;
+ sram2 : C : 0x20200000 - 0x2023ffff : .sram2.rodata .sram2.literal .sram2.text .sram2.data .sram2.bss;
+ sram3 : C : 0x20240000 - 0x2027ffff : .sram3.rodata .rodata .sram3.literal .literal .sram3.text .text .sram3.data .data .sram3.bss .bss;
+ END sram
+
+BEGIN dram0
+0xe0180000: dataRam : dram0 : 0x20000 : writable ;
+ dram0_0 : C : 0xe0180000 - 0xe019ffff :.dram0.rodata .dram0.data .dram0.bss .dram0_user.bss;
+END dram0
+
+BEGIN dram1
+0xe01a0000: dataRam : dram1 : 0x20000 : writable ;
+ dram1_0 : C : 0xe01a0000 - 0xe01bffff :STACK :.dram1.rodata .dram1.data .dram1.bss .dram1_user.bss;
+END dram1
+
+BEGIN local_sram
+0xffa00000: sysram : local_sram :   0x180000: writable ;
+  local_sram_0 : C : 0xffa00000 - 0xffb7ffff :.local_sram.bss ;
+ END local_sram
+
+ENTRY = _libinit
+USE_SEGMENT_AREA = ".dram0.data 120832 + 0 end : .dram1.data 120832 + 0 end : .sram3.data 262144 + 0 end"

+ 35 - 0
LSP/min-rt_core0_lib1_stack_tcm1/specs

@@ -0,0 +1,35 @@
+# Customer ID=16470; Build=0x8e648; Copyright (c) 2001-2015 Cadence Design Systems, Inc.
+#
+# Permission is hereby granted, free of charge, to any person obtaining
+# a copy of this software and associated documentation files (the
+# "Software"), to deal in the Software without restriction, including
+# without limitation the rights to use, copy, modify, merge, publish,
+# distribute, sublicense, and/or sell copies of the Software, and to
+# permit persons to whom the Software is furnished to do so, subject to
+# the following conditions:
+#
+# The above copyright notice and this permission notice shall be included
+# in all copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+# IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+# CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+# TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+# SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+
+
+# The %O suffix on the start and end files indicates that the system's
+# standard suffix for object files (e.g., ".o") should be appended.
+# The %s suffix tells the compiler driver to search for the file in the
+# list of known locations for startfiles.
+
+*startfile:
+crti%O%s crtbegin%O%s
+*endfile:
+crtend%O%s crtn%O%s
+
+*lib:
+
+

+ 523 - 0
LSP/min-rt_core0_main_stack_tcm1/ldscripts/elf32xtensa.x

@@ -0,0 +1,523 @@
+/* This linker script generated from xt-genldscripts.tpp for LSP C:\Users\DELL\workspace\CSI_DSP_FW\LSP\min-rt_core0_main_stack_tcm1 */
+/* Linker Script for default link */
+MEMORY
+{
+  sram0_seg :                         	org = 0x20000000, len = 0x1000
+  sram1_seg :                         	org = 0x20001000, len = 0x1FF000
+  sram2_seg :                         	org = 0x20200000, len = 0x0
+  sram3_seg :                         	org = 0x20240000, len = 0x0
+  dram0_0_seg :                       	org = 0xE0180000, len = 0x2800
+  dram1_0_seg :                       	org = 0xE01A0000, len = 0x2800
+  local_sram_0_seg :                  	org = 0xFFA00000, len = 0x180000
+}
+
+PHDRS
+{
+  sram0_phdr PT_LOAD;
+  sram1_phdr PT_LOAD;
+  sram1_bss_phdr PT_LOAD;
+  sram2_phdr PT_LOAD;
+  sram2_bss_phdr PT_LOAD;
+  sram3_phdr PT_LOAD;
+  sram3_bss_phdr PT_LOAD;
+  dram0_0_phdr PT_LOAD;
+  dram0_0_bss_phdr PT_LOAD;
+  dram1_0_phdr PT_LOAD;
+  dram1_0_bss_phdr PT_LOAD;
+  local_sram_0_phdr PT_LOAD;
+  local_sram_0_bss_phdr PT_LOAD;
+}
+
+
+/*  Default entry point:  */
+ENTRY(_ResetVector)
+
+
+/*  Memory boundary addresses:  */
+_memmap_mem_sram_start = 0x20000000;
+_memmap_mem_sram_end   = 0x20280000;
+_memmap_mem_dram0_start = 0xe0180000;
+_memmap_mem_dram0_end   = 0xe01a0000;
+_memmap_mem_dram1_start = 0xe01a0000;
+_memmap_mem_dram1_end   = 0xe01c0000;
+_memmap_mem_local_sram_start = 0xffa00000;
+_memmap_mem_local_sram_end   = 0xffb80000;
+
+/*  Memory segment boundary addresses:  */
+_memmap_seg_sram0_start = 0x20000000;
+_memmap_seg_sram0_max   = 0x20001000;
+_memmap_seg_sram1_start = 0x20001000;
+_memmap_seg_sram1_max   = 0x20200000;
+_memmap_seg_dram0_0_start = 0xe0180000;
+_memmap_seg_dram0_0_max   = 0xe0182800;
+_memmap_seg_dram1_0_start = 0xe01a0000;
+_memmap_seg_dram1_0_max   = 0xe01a2800;
+_memmap_seg_local_sram_0_start = 0xffa00000;
+_memmap_seg_local_sram_0_max   = 0xffb80000;
+
+_rom_store_table = 0;
+PROVIDE(_memmap_reset_vector = 0x20000000);
+PROVIDE(_memmap_vecbase_reset = 0x20000000);
+/* Various memory-map dependent cache attribute settings: */
+_memmap_cacheattr_wb_base = 0x10000010;
+_memmap_cacheattr_wt_base = 0x30000030;
+_memmap_cacheattr_bp_base = 0x40000040;
+_memmap_cacheattr_unused_mask = 0x0FFFFF0F;
+_memmap_cacheattr_wb_trapnull = 0x14444411;
+_memmap_cacheattr_wba_trapnull = 0x14444410;
+_memmap_cacheattr_wbna_trapnull = 0x24444420;
+_memmap_cacheattr_wt_trapnull = 0x34444430;
+_memmap_cacheattr_bp_trapnull = 0x44444440;
+_memmap_cacheattr_wb_strict = 0x10000010;
+_memmap_cacheattr_wt_strict = 0x30000030;
+_memmap_cacheattr_bp_strict = 0x40000040;
+_memmap_cacheattr_wb_allvalid = 0x14444414;
+_memmap_cacheattr_wt_allvalid = 0x34444434;
+_memmap_cacheattr_bp_allvalid = 0x44444444;
+_memmap_region_map = 0x00000082;
+PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
+
+SECTIONS
+{
+
+  .DispatchVector.text : ALIGN(4)
+  {
+    _DispatchVector_text_start = ABSOLUTE(.);
+    KEEP (*(.DispatchVector.text))
+    . = ALIGN (4);
+    _DispatchVector_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .ResetVector.text : ALIGN(4)
+  {
+    _ResetVector_text_start = ABSOLUTE(.);
+    *(.ResetVector.text)
+    . = ALIGN (4);
+    _ResetVector_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .ResetHandler.text : ALIGN(4)
+  {
+    _ResetHandler_text_start = ABSOLUTE(.);
+    *(.ResetHandler.literal .ResetHandler.text)
+    . = ALIGN (4);
+    _ResetHandler_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .DispatchHandler.text : ALIGN(4)
+  {
+    _DispatchHandler_text_start = ABSOLUTE(.);
+    *(.DispatchHandler.literal .DispatchHandler.text)
+    . = ALIGN (4);
+    _DispatchHandler_text_end = ABSOLUTE(.);
+    _memmap_seg_sram0_end = ALIGN(0x8);
+  } >sram0_seg :sram0_phdr
+
+
+  .sram.rodata : ALIGN(4)
+  {
+    _sram_rodata_start = ABSOLUTE(.);
+    *(.sram.rodata)
+    . = ALIGN (4);
+    _sram_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.rodata : ALIGN(4)
+  {
+    _clib_rodata_start = ABSOLUTE(.);
+    *(.clib.rodata)
+    . = ALIGN (4);
+    _clib_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.rodata : ALIGN(4)
+  {
+    _rtos_rodata_start = ABSOLUTE(.);
+    *(.rtos.rodata)
+    . = ALIGN (4);
+    _rtos_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rodata : ALIGN(4)
+  {
+    _rodata_start = ABSOLUTE(.);
+    *(.rodata)
+    *(SORT(.rodata.sort.*))
+    KEEP (*(SORT(.rodata.keepsort.*) .rodata.keep.*))
+    *(.rodata.*)
+    *(.gnu.linkonce.r.*)
+    *(.rodata1)
+    __XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
+    KEEP (*(.xt_except_table))
+    KEEP (*(.gcc_except_table))
+    *(.gnu.linkonce.e.*)
+    *(.gnu.version_r)
+    KEEP (*(.eh_frame))
+    /*  C++ constructor and destructor tables, properly ordered:  */
+    KEEP (*crtbegin.o(.ctors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*(.ctors))
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*(.dtors))
+    /*  C++ exception handlers table:  */
+    __XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
+    *(.xt_except_desc)
+    *(.gnu.linkonce.h.*)
+    __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
+    *(.xt_except_desc_end)
+    *(.dynamic)
+    *(.gnu.version_d)
+    . = ALIGN(4);		/* this table MUST be 4-byte aligned */
+    _bss_table_start = ABSOLUTE(.);
+    LONG(_bss_start)
+    LONG(_bss_end)
+    LONG(_sram2_bss_start)
+    LONG(_sram2_bss_end)
+    LONG(_sram3_bss_start)
+    LONG(_sram3_bss_end)
+    LONG(_dram0_bss_start)
+    LONG(_dram0_bss_end)
+    LONG(_dram1_bss_start)
+    LONG(_dram1_bss_end)
+    LONG(_local_sram_bss_start)
+    LONG(_local_sram_bss_end)
+    _bss_table_end = ABSOLUTE(.);
+    . = ALIGN (4);
+    _rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .sram.text : ALIGN(4)
+  {
+    _sram_text_start = ABSOLUTE(.);
+    *(.sram.literal .sram.text)
+    . = ALIGN (4);
+    _sram_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .text : ALIGN(4)
+  {
+    _stext = .;
+    _text_start = ABSOLUTE(.);
+    *(.entry.text)
+    *(.init.literal)
+    KEEP(*(.init))
+    *(.literal.sort.* SORT(.text.sort.*))
+    KEEP (*(.literal.keepsort.* SORT(.text.keepsort.*) .literal.keep.* .text.keep.* .literal.*personality* .text.*personality*))
+    *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
+    *(.fini.literal)
+    KEEP(*(.fini))
+    *(.gnu.version)
+    . = ALIGN (4);
+    _text_end = ABSOLUTE(.);
+    _etext = .;
+  } >sram1_seg :sram1_phdr
+
+  .clib.text : ALIGN(4)
+  {
+    _clib_text_start = ABSOLUTE(.);
+    *(.clib.literal .clib.text)
+    . = ALIGN (4);
+    _clib_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.text : ALIGN(4)
+  {
+    _rtos_text_start = ABSOLUTE(.);
+    *(.rtos.literal .rtos.text)
+    . = ALIGN (4);
+    _rtos_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.data : ALIGN(4)
+  {
+    _clib_data_start = ABSOLUTE(.);
+    *(.clib.data)
+    . = ALIGN (4);
+    _clib_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.percpu.data : ALIGN(4)
+  {
+    _clib_percpu_data_start = ABSOLUTE(.);
+    *(.clib.percpu.data)
+    . = ALIGN (4);
+    _clib_percpu_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.percpu.data : ALIGN(4)
+  {
+    _rtos_percpu_data_start = ABSOLUTE(.);
+    *(.rtos.percpu.data)
+    . = ALIGN (4);
+    _rtos_percpu_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.data : ALIGN(4)
+  {
+    _rtos_data_start = ABSOLUTE(.);
+    *(.rtos.data)
+    . = ALIGN (4);
+    _rtos_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .sram.data : ALIGN(4)
+  {
+    _sram_data_start = ABSOLUTE(.);
+    *(.sram.data)
+    . = ALIGN (4);
+    _sram_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .data : ALIGN(4)
+  {
+    _data_start = ABSOLUTE(.);
+    *(.data)
+    *(SORT(.data.sort.*))
+    KEEP (*(SORT(.data.keepsort.*) .data.keep.*))
+    *(.data.*)
+    *(.gnu.linkonce.d.*)
+    KEEP(*(.gnu.linkonce.d.*personality*))
+    *(.data1)
+    *(.sdata)
+    *(.sdata.*)
+    *(.gnu.linkonce.s.*)
+    *(.sdata2)
+    *(.sdata2.*)
+    *(.gnu.linkonce.s2.*)
+    KEEP(*(.jcr))
+    *(__llvm_prf_cnts)
+    *(__llvm_prf_data)
+    *(__llvm_prf_vnds)
+    . = ALIGN (4);
+    _data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  __llvm_prf_names : ALIGN(4)
+  {
+    __llvm_prf_names_start = ABSOLUTE(.);
+    *(__llvm_prf_names)
+    . = ALIGN (4);
+    __llvm_prf_names_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _bss_start = ABSOLUTE(.);
+    *(.dynsbss)
+    *(.sbss)
+    *(.sbss.*)
+    *(.gnu.linkonce.sb.*)
+    *(.scommon)
+    *(.sbss2)
+    *(.sbss2.*)
+    *(.gnu.linkonce.sb2.*)
+    *(.dynbss)
+    *(.bss)
+    *(SORT(.bss.sort.*))
+    KEEP (*(SORT(.bss.keepsort.*) .bss.keep.*))
+    *(.bss.*)
+    *(.gnu.linkonce.b.*)
+    *(COMMON)
+    *(.clib.bss)
+    *(.clib.percpu.bss)
+    *(.rtos.percpu.bss)
+    *(.rtos.bss)
+    *(.sram.bss)
+    *(.debug.bss)
+    . = ALIGN (8);
+    _bss_end = ABSOLUTE(.);
+    _end = ALIGN(0x8);
+    PROVIDE(end = ALIGN(0x8));
+    _memmap_seg_sram1_end = ALIGN(0x8);
+  } >sram1_seg :sram1_bss_phdr
+
+  _heap_sentry = 0x20200000;
+
+  .sram2.rodata : ALIGN(4)
+  {
+    _sram2_rodata_start = ABSOLUTE(.);
+    *(.sram2.rodata)
+    . = ALIGN (4);
+    _sram2_rodata_end = ABSOLUTE(.);
+  } >sram2_seg :sram2_phdr
+
+  .sram2.text : ALIGN(4)
+  {
+    _sram2_text_start = ABSOLUTE(.);
+    *(.sram2.literal .sram2.text)
+    . = ALIGN (4);
+    _sram2_text_end = ABSOLUTE(.);
+  } >sram2_seg :sram2_phdr
+
+  .sram2.data : ALIGN(4)
+  {
+    _sram2_data_start = ABSOLUTE(.);
+    *(.sram2.data)
+    . = ALIGN (4);
+    _sram2_data_end = ABSOLUTE(.);
+  } >sram2_seg :sram2_phdr
+
+  .sram2.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _sram2_bss_start = ABSOLUTE(.);
+    *(.sram2.bss)
+    . = ALIGN (8);
+    _sram2_bss_end = ABSOLUTE(.);
+    _memmap_seg_sram2_end = ALIGN(0x8);
+  } >sram2_seg :sram2_bss_phdr
+
+
+  .sram3.rodata : ALIGN(4)
+  {
+    _sram3_rodata_start = ABSOLUTE(.);
+    *(.sram3.rodata)
+    . = ALIGN (4);
+    _sram3_rodata_end = ABSOLUTE(.);
+  } >sram3_seg :sram3_phdr
+
+  .sram3.text : ALIGN(4)
+  {
+    _sram3_text_start = ABSOLUTE(.);
+    *(.sram3.literal .sram3.text)
+    . = ALIGN (4);
+    _sram3_text_end = ABSOLUTE(.);
+  } >sram3_seg :sram3_phdr
+
+  .sram3.data : ALIGN(4)
+  {
+    _sram3_data_start = ABSOLUTE(.);
+    *(.sram3.data)
+    . = ALIGN (4);
+    _sram3_data_end = ABSOLUTE(.);
+  } >sram3_seg :sram3_phdr
+
+  .sram3.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _sram3_bss_start = ABSOLUTE(.);
+    *(.sram3.bss)
+    . = ALIGN (8);
+    _sram3_bss_end = ABSOLUTE(.);
+    _memmap_seg_sram3_end = ALIGN(0x8);
+  } >sram3_seg :sram3_bss_phdr
+
+  _memmap_mem_sram_max = ABSOLUTE(.);
+
+  .dram0.rodata : ALIGN(4)
+  {
+    _dram0_rodata_start = ABSOLUTE(.);
+    *(.dram0.rodata)
+    . = ALIGN (4);
+    _dram0_rodata_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.data : ALIGN(4)
+  {
+    _dram0_data_start = ABSOLUTE(.);
+    *(.dram0.data)
+    . = ALIGN (4);
+    _dram0_data_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dram0_bss_start = ABSOLUTE(.);
+    *(.dram0.bss)
+    *(.dram0_user.bss)
+    . = ALIGN (8);
+    _dram0_bss_end = ABSOLUTE(.);
+    _memmap_seg_dram0_0_end = ALIGN(0x8);
+  } >dram0_0_seg :dram0_0_bss_phdr
+
+  _memmap_mem_dram0_max = ABSOLUTE(.);
+
+  .dram1.rodata : ALIGN(4)
+  {
+    _dram1_rodata_start = ABSOLUTE(.);
+    *(.dram1.rodata)
+    . = ALIGN (4);
+    _dram1_rodata_end = ABSOLUTE(.);
+  } >dram1_0_seg :dram1_0_phdr
+
+  .dram1.data : ALIGN(4)
+  {
+    _dram1_data_start = ABSOLUTE(.);
+    *(.dram1.data)
+    . = ALIGN (4);
+    _dram1_data_end = ABSOLUTE(.);
+  } >dram1_0_seg :dram1_0_phdr
+
+  .dram1.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dram1_bss_start = ABSOLUTE(.);
+    *(.dram1.bss)
+    *(.dram1_user.bss)
+    . = ALIGN (8);
+    _dram1_bss_end = ABSOLUTE(.);
+    _stack_sentry = ALIGN(0x8);
+    _memmap_seg_dram1_0_end = ALIGN(0x8);
+  } >dram1_0_seg :dram1_0_bss_phdr
+
+  PROVIDE(__stack = 0xe01a2800);
+  _memmap_mem_dram1_max = ABSOLUTE(.);
+
+  .local_sram.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _local_sram_bss_start = ABSOLUTE(.);
+    *(.local_sram.bss)
+    . = ALIGN (8);
+    _local_sram_bss_end = ABSOLUTE(.);
+    _memmap_seg_local_sram_0_end = ALIGN(0x8);
+  } >local_sram_0_seg :local_sram_0_bss_phdr
+
+
+  _memmap_mem_local_sram_max = ABSOLUTE(.);
+
+  .debug  0 :  { *(.debug) }
+  .line  0 :  { *(.line) }
+  .debug_srcinfo  0 :  { *(.debug_srcinfo) }
+  .debug_sfnames  0 :  { *(.debug_sfnames) }
+  .debug_aranges  0 :  { *(.debug_aranges) }
+  .debug_pubnames  0 :  { *(.debug_pubnames) }
+  .debug_info  0 :  { *(.debug_info) }
+  .debug_abbrev  0 :  { *(.debug_abbrev) }
+  .debug_line  0 :  { *(.debug_line) }
+  .debug_frame  0 :  { *(.debug_frame) }
+  .debug_str  0 :  { *(.debug_str) }
+  .debug_loc  0 :  { *(.debug_loc) }
+  .debug_macinfo  0 :  { *(.debug_macinfo) }
+  .debug_weaknames  0 :  { *(.debug_weaknames) }
+  .debug_funcnames  0 :  { *(.debug_funcnames) }
+  .debug_typenames  0 :  { *(.debug_typenames) }
+  .debug_varnames  0 :  { *(.debug_varnames) }
+  .xt.insn 0 :
+  {
+    KEEP (*(.xt.insn))
+    KEEP (*(.gnu.linkonce.x.*))
+  }
+  .xt.prop 0 :
+  {
+    KEEP (*(.xt.prop))
+    KEEP (*(.xt.prop.*))
+    KEEP (*(.gnu.linkonce.prop.*))
+  }
+  .xt.lit 0 :
+  {
+    KEEP (*(.xt.lit))
+    KEEP (*(.xt.lit.*))
+    KEEP (*(.gnu.linkonce.p.*))
+  }
+  .debug.xt.callgraph 0 :
+  {
+    KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
+  }
+}
+

+ 523 - 0
LSP/min-rt_core0_main_stack_tcm1/ldscripts/elf32xtensa.xbn

@@ -0,0 +1,523 @@
+/* This linker script generated from xt-genldscripts.tpp for LSP C:\Users\DELL\workspace\CSI_DSP_FW\LSP\min-rt_core0_main_stack_tcm1 */
+/* Linker Script for ld -N */
+MEMORY
+{
+  sram0_seg :                         	org = 0x20000000, len = 0x1000
+  sram1_seg :                         	org = 0x20001000, len = 0x1FF000
+  sram2_seg :                         	org = 0x20200000, len = 0x0
+  sram3_seg :                         	org = 0x20240000, len = 0x0
+  dram0_0_seg :                       	org = 0xE0180000, len = 0x2800
+  dram1_0_seg :                       	org = 0xE01A0000, len = 0x2800
+  local_sram_0_seg :                  	org = 0xFFA00000, len = 0x180000
+}
+
+PHDRS
+{
+  sram0_phdr PT_LOAD;
+  sram1_phdr PT_LOAD;
+  sram1_bss_phdr PT_LOAD;
+  sram2_phdr PT_LOAD;
+  sram2_bss_phdr PT_LOAD;
+  sram3_phdr PT_LOAD;
+  sram3_bss_phdr PT_LOAD;
+  dram0_0_phdr PT_LOAD;
+  dram0_0_bss_phdr PT_LOAD;
+  dram1_0_phdr PT_LOAD;
+  dram1_0_bss_phdr PT_LOAD;
+  local_sram_0_phdr PT_LOAD;
+  local_sram_0_bss_phdr PT_LOAD;
+}
+
+
+/*  Default entry point:  */
+ENTRY(_ResetVector)
+
+
+/*  Memory boundary addresses:  */
+_memmap_mem_sram_start = 0x20000000;
+_memmap_mem_sram_end   = 0x20280000;
+_memmap_mem_dram0_start = 0xe0180000;
+_memmap_mem_dram0_end   = 0xe01a0000;
+_memmap_mem_dram1_start = 0xe01a0000;
+_memmap_mem_dram1_end   = 0xe01c0000;
+_memmap_mem_local_sram_start = 0xffa00000;
+_memmap_mem_local_sram_end   = 0xffb80000;
+
+/*  Memory segment boundary addresses:  */
+_memmap_seg_sram0_start = 0x20000000;
+_memmap_seg_sram0_max   = 0x20001000;
+_memmap_seg_sram1_start = 0x20001000;
+_memmap_seg_sram1_max   = 0x20200000;
+_memmap_seg_dram0_0_start = 0xe0180000;
+_memmap_seg_dram0_0_max   = 0xe0182800;
+_memmap_seg_dram1_0_start = 0xe01a0000;
+_memmap_seg_dram1_0_max   = 0xe01a2800;
+_memmap_seg_local_sram_0_start = 0xffa00000;
+_memmap_seg_local_sram_0_max   = 0xffb80000;
+
+_rom_store_table = 0;
+PROVIDE(_memmap_reset_vector = 0x20000000);
+PROVIDE(_memmap_vecbase_reset = 0x20000000);
+/* Various memory-map dependent cache attribute settings: */
+_memmap_cacheattr_wb_base = 0x10000010;
+_memmap_cacheattr_wt_base = 0x30000030;
+_memmap_cacheattr_bp_base = 0x40000040;
+_memmap_cacheattr_unused_mask = 0x0FFFFF0F;
+_memmap_cacheattr_wb_trapnull = 0x14444410;
+_memmap_cacheattr_wba_trapnull = 0x14444410;
+_memmap_cacheattr_wbna_trapnull = 0x24444420;
+_memmap_cacheattr_wt_trapnull = 0x34444430;
+_memmap_cacheattr_bp_trapnull = 0x44444440;
+_memmap_cacheattr_wb_strict = 0x10000010;
+_memmap_cacheattr_wt_strict = 0x30000030;
+_memmap_cacheattr_bp_strict = 0x40000040;
+_memmap_cacheattr_wb_allvalid = 0x14444414;
+_memmap_cacheattr_wt_allvalid = 0x34444434;
+_memmap_cacheattr_bp_allvalid = 0x44444444;
+_memmap_region_map = 0x00000082;
+PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
+
+SECTIONS
+{
+
+  .DispatchVector.text : ALIGN(4)
+  {
+    _DispatchVector_text_start = ABSOLUTE(.);
+    KEEP (*(.DispatchVector.text))
+    . = ALIGN (4);
+    _DispatchVector_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .ResetVector.text : ALIGN(4)
+  {
+    _ResetVector_text_start = ABSOLUTE(.);
+    *(.ResetVector.text)
+    . = ALIGN (4);
+    _ResetVector_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .ResetHandler.text : ALIGN(4)
+  {
+    _ResetHandler_text_start = ABSOLUTE(.);
+    *(.ResetHandler.literal .ResetHandler.text)
+    . = ALIGN (4);
+    _ResetHandler_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .DispatchHandler.text : ALIGN(4)
+  {
+    _DispatchHandler_text_start = ABSOLUTE(.);
+    *(.DispatchHandler.literal .DispatchHandler.text)
+    . = ALIGN (4);
+    _DispatchHandler_text_end = ABSOLUTE(.);
+    _memmap_seg_sram0_end = ALIGN(0x8);
+  } >sram0_seg :sram0_phdr
+
+
+  .sram.rodata : ALIGN(4)
+  {
+    _sram_rodata_start = ABSOLUTE(.);
+    *(.sram.rodata)
+    . = ALIGN (4);
+    _sram_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.rodata : ALIGN(4)
+  {
+    _clib_rodata_start = ABSOLUTE(.);
+    *(.clib.rodata)
+    . = ALIGN (4);
+    _clib_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.rodata : ALIGN(4)
+  {
+    _rtos_rodata_start = ABSOLUTE(.);
+    *(.rtos.rodata)
+    . = ALIGN (4);
+    _rtos_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rodata : ALIGN(4)
+  {
+    _rodata_start = ABSOLUTE(.);
+    *(.rodata)
+    *(SORT(.rodata.sort.*))
+    KEEP (*(SORT(.rodata.keepsort.*) .rodata.keep.*))
+    *(.rodata.*)
+    *(.gnu.linkonce.r.*)
+    *(.rodata1)
+    __XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
+    KEEP (*(.xt_except_table))
+    KEEP (*(.gcc_except_table))
+    *(.gnu.linkonce.e.*)
+    *(.gnu.version_r)
+    KEEP (*(.eh_frame))
+    /*  C++ constructor and destructor tables, properly ordered:  */
+    KEEP (*crtbegin.o(.ctors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*(.ctors))
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*(.dtors))
+    /*  C++ exception handlers table:  */
+    __XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
+    *(.xt_except_desc)
+    *(.gnu.linkonce.h.*)
+    __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
+    *(.xt_except_desc_end)
+    *(.dynamic)
+    *(.gnu.version_d)
+    . = ALIGN(4);		/* this table MUST be 4-byte aligned */
+    _bss_table_start = ABSOLUTE(.);
+    LONG(_bss_start)
+    LONG(_bss_end)
+    LONG(_sram2_bss_start)
+    LONG(_sram2_bss_end)
+    LONG(_sram3_bss_start)
+    LONG(_sram3_bss_end)
+    LONG(_dram0_bss_start)
+    LONG(_dram0_bss_end)
+    LONG(_dram1_bss_start)
+    LONG(_dram1_bss_end)
+    LONG(_local_sram_bss_start)
+    LONG(_local_sram_bss_end)
+    _bss_table_end = ABSOLUTE(.);
+    . = ALIGN (4);
+    _rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .sram.text : ALIGN(4)
+  {
+    _sram_text_start = ABSOLUTE(.);
+    *(.sram.literal .sram.text)
+    . = ALIGN (4);
+    _sram_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .text : ALIGN(4)
+  {
+    _stext = .;
+    _text_start = ABSOLUTE(.);
+    *(.entry.text)
+    *(.init.literal)
+    KEEP(*(.init))
+    *(.literal.sort.* SORT(.text.sort.*))
+    KEEP (*(.literal.keepsort.* SORT(.text.keepsort.*) .literal.keep.* .text.keep.* .literal.*personality* .text.*personality*))
+    *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
+    *(.fini.literal)
+    KEEP(*(.fini))
+    *(.gnu.version)
+    . = ALIGN (4);
+    _text_end = ABSOLUTE(.);
+    _etext = .;
+  } >sram1_seg :sram1_phdr
+
+  .clib.text : ALIGN(4)
+  {
+    _clib_text_start = ABSOLUTE(.);
+    *(.clib.literal .clib.text)
+    . = ALIGN (4);
+    _clib_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.text : ALIGN(4)
+  {
+    _rtos_text_start = ABSOLUTE(.);
+    *(.rtos.literal .rtos.text)
+    . = ALIGN (4);
+    _rtos_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.data : ALIGN(4)
+  {
+    _clib_data_start = ABSOLUTE(.);
+    *(.clib.data)
+    . = ALIGN (4);
+    _clib_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.percpu.data : ALIGN(4)
+  {
+    _clib_percpu_data_start = ABSOLUTE(.);
+    *(.clib.percpu.data)
+    . = ALIGN (4);
+    _clib_percpu_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.percpu.data : ALIGN(4)
+  {
+    _rtos_percpu_data_start = ABSOLUTE(.);
+    *(.rtos.percpu.data)
+    . = ALIGN (4);
+    _rtos_percpu_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.data : ALIGN(4)
+  {
+    _rtos_data_start = ABSOLUTE(.);
+    *(.rtos.data)
+    . = ALIGN (4);
+    _rtos_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .sram.data : ALIGN(4)
+  {
+    _sram_data_start = ABSOLUTE(.);
+    *(.sram.data)
+    . = ALIGN (4);
+    _sram_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .data : ALIGN(4)
+  {
+    _data_start = ABSOLUTE(.);
+    *(.data)
+    *(SORT(.data.sort.*))
+    KEEP (*(SORT(.data.keepsort.*) .data.keep.*))
+    *(.data.*)
+    *(.gnu.linkonce.d.*)
+    KEEP(*(.gnu.linkonce.d.*personality*))
+    *(.data1)
+    *(.sdata)
+    *(.sdata.*)
+    *(.gnu.linkonce.s.*)
+    *(.sdata2)
+    *(.sdata2.*)
+    *(.gnu.linkonce.s2.*)
+    KEEP(*(.jcr))
+    *(__llvm_prf_cnts)
+    *(__llvm_prf_data)
+    *(__llvm_prf_vnds)
+    . = ALIGN (4);
+    _data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  __llvm_prf_names : ALIGN(4)
+  {
+    __llvm_prf_names_start = ABSOLUTE(.);
+    *(__llvm_prf_names)
+    . = ALIGN (4);
+    __llvm_prf_names_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _bss_start = ABSOLUTE(.);
+    *(.dynsbss)
+    *(.sbss)
+    *(.sbss.*)
+    *(.gnu.linkonce.sb.*)
+    *(.scommon)
+    *(.sbss2)
+    *(.sbss2.*)
+    *(.gnu.linkonce.sb2.*)
+    *(.dynbss)
+    *(.bss)
+    *(SORT(.bss.sort.*))
+    KEEP (*(SORT(.bss.keepsort.*) .bss.keep.*))
+    *(.bss.*)
+    *(.gnu.linkonce.b.*)
+    *(COMMON)
+    *(.clib.bss)
+    *(.clib.percpu.bss)
+    *(.rtos.percpu.bss)
+    *(.rtos.bss)
+    *(.sram.bss)
+    *(.debug.bss)
+    . = ALIGN (8);
+    _bss_end = ABSOLUTE(.);
+    _end = ALIGN(0x8);
+    PROVIDE(end = ALIGN(0x8));
+    _memmap_seg_sram1_end = ALIGN(0x8);
+  } >sram1_seg :sram1_bss_phdr
+
+  _heap_sentry = 0x20200000;
+
+  .sram2.rodata : ALIGN(4)
+  {
+    _sram2_rodata_start = ABSOLUTE(.);
+    *(.sram2.rodata)
+    . = ALIGN (4);
+    _sram2_rodata_end = ABSOLUTE(.);
+  } >sram2_seg :sram2_phdr
+
+  .sram2.text : ALIGN(4)
+  {
+    _sram2_text_start = ABSOLUTE(.);
+    *(.sram2.literal .sram2.text)
+    . = ALIGN (4);
+    _sram2_text_end = ABSOLUTE(.);
+  } >sram2_seg :sram2_phdr
+
+  .sram2.data : ALIGN(4)
+  {
+    _sram2_data_start = ABSOLUTE(.);
+    *(.sram2.data)
+    . = ALIGN (4);
+    _sram2_data_end = ABSOLUTE(.);
+  } >sram2_seg :sram2_phdr
+
+  .sram2.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _sram2_bss_start = ABSOLUTE(.);
+    *(.sram2.bss)
+    . = ALIGN (8);
+    _sram2_bss_end = ABSOLUTE(.);
+    _memmap_seg_sram2_end = ALIGN(0x8);
+  } >sram2_seg :sram2_bss_phdr
+
+
+  .sram3.rodata : ALIGN(4)
+  {
+    _sram3_rodata_start = ABSOLUTE(.);
+    *(.sram3.rodata)
+    . = ALIGN (4);
+    _sram3_rodata_end = ABSOLUTE(.);
+  } >sram3_seg :sram3_phdr
+
+  .sram3.text : ALIGN(4)
+  {
+    _sram3_text_start = ABSOLUTE(.);
+    *(.sram3.literal .sram3.text)
+    . = ALIGN (4);
+    _sram3_text_end = ABSOLUTE(.);
+  } >sram3_seg :sram3_phdr
+
+  .sram3.data : ALIGN(4)
+  {
+    _sram3_data_start = ABSOLUTE(.);
+    *(.sram3.data)
+    . = ALIGN (4);
+    _sram3_data_end = ABSOLUTE(.);
+  } >sram3_seg :sram3_phdr
+
+  .sram3.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _sram3_bss_start = ABSOLUTE(.);
+    *(.sram3.bss)
+    . = ALIGN (8);
+    _sram3_bss_end = ABSOLUTE(.);
+    _memmap_seg_sram3_end = ALIGN(0x8);
+  } >sram3_seg :sram3_bss_phdr
+
+  _memmap_mem_sram_max = ABSOLUTE(.);
+
+  .dram0.rodata : ALIGN(4)
+  {
+    _dram0_rodata_start = ABSOLUTE(.);
+    *(.dram0.rodata)
+    . = ALIGN (4);
+    _dram0_rodata_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.data : ALIGN(4)
+  {
+    _dram0_data_start = ABSOLUTE(.);
+    *(.dram0.data)
+    . = ALIGN (4);
+    _dram0_data_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dram0_bss_start = ABSOLUTE(.);
+    *(.dram0.bss)
+    *(.dram0_user.bss)
+    . = ALIGN (8);
+    _dram0_bss_end = ABSOLUTE(.);
+    _memmap_seg_dram0_0_end = ALIGN(0x8);
+  } >dram0_0_seg :dram0_0_bss_phdr
+
+  _memmap_mem_dram0_max = ABSOLUTE(.);
+
+  .dram1.rodata : ALIGN(4)
+  {
+    _dram1_rodata_start = ABSOLUTE(.);
+    *(.dram1.rodata)
+    . = ALIGN (4);
+    _dram1_rodata_end = ABSOLUTE(.);
+  } >dram1_0_seg :dram1_0_phdr
+
+  .dram1.data : ALIGN(4)
+  {
+    _dram1_data_start = ABSOLUTE(.);
+    *(.dram1.data)
+    . = ALIGN (4);
+    _dram1_data_end = ABSOLUTE(.);
+  } >dram1_0_seg :dram1_0_phdr
+
+  .dram1.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dram1_bss_start = ABSOLUTE(.);
+    *(.dram1.bss)
+    *(.dram1_user.bss)
+    . = ALIGN (8);
+    _dram1_bss_end = ABSOLUTE(.);
+    _stack_sentry = ALIGN(0x8);
+    _memmap_seg_dram1_0_end = ALIGN(0x8);
+  } >dram1_0_seg :dram1_0_bss_phdr
+
+  PROVIDE(__stack = 0xe01a2800);
+  _memmap_mem_dram1_max = ABSOLUTE(.);
+
+  .local_sram.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _local_sram_bss_start = ABSOLUTE(.);
+    *(.local_sram.bss)
+    . = ALIGN (8);
+    _local_sram_bss_end = ABSOLUTE(.);
+    _memmap_seg_local_sram_0_end = ALIGN(0x8);
+  } >local_sram_0_seg :local_sram_0_bss_phdr
+
+
+  _memmap_mem_local_sram_max = ABSOLUTE(.);
+
+  .debug  0 :  { *(.debug) }
+  .line  0 :  { *(.line) }
+  .debug_srcinfo  0 :  { *(.debug_srcinfo) }
+  .debug_sfnames  0 :  { *(.debug_sfnames) }
+  .debug_aranges  0 :  { *(.debug_aranges) }
+  .debug_pubnames  0 :  { *(.debug_pubnames) }
+  .debug_info  0 :  { *(.debug_info) }
+  .debug_abbrev  0 :  { *(.debug_abbrev) }
+  .debug_line  0 :  { *(.debug_line) }
+  .debug_frame  0 :  { *(.debug_frame) }
+  .debug_str  0 :  { *(.debug_str) }
+  .debug_loc  0 :  { *(.debug_loc) }
+  .debug_macinfo  0 :  { *(.debug_macinfo) }
+  .debug_weaknames  0 :  { *(.debug_weaknames) }
+  .debug_funcnames  0 :  { *(.debug_funcnames) }
+  .debug_typenames  0 :  { *(.debug_typenames) }
+  .debug_varnames  0 :  { *(.debug_varnames) }
+  .xt.insn 0 :
+  {
+    KEEP (*(.xt.insn))
+    KEEP (*(.gnu.linkonce.x.*))
+  }
+  .xt.prop 0 :
+  {
+    KEEP (*(.xt.prop))
+    KEEP (*(.xt.prop.*))
+    KEEP (*(.gnu.linkonce.prop.*))
+  }
+  .xt.lit 0 :
+  {
+    KEEP (*(.xt.lit))
+    KEEP (*(.xt.lit.*))
+    KEEP (*(.gnu.linkonce.p.*))
+  }
+  .debug.xt.callgraph 0 :
+  {
+    KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
+  }
+}
+

+ 523 - 0
LSP/min-rt_core0_main_stack_tcm1/ldscripts/elf32xtensa.xn

@@ -0,0 +1,523 @@
+/* This linker script generated from xt-genldscripts.tpp for LSP C:\Users\DELL\workspace\CSI_DSP_FW\LSP\min-rt_core0_main_stack_tcm1 */
+/* Linker Script for ld -n */
+MEMORY
+{
+  sram0_seg :                         	org = 0x20000000, len = 0x1000
+  sram1_seg :                         	org = 0x20001000, len = 0x1FF000
+  sram2_seg :                         	org = 0x20200000, len = 0x0
+  sram3_seg :                         	org = 0x20240000, len = 0x0
+  dram0_0_seg :                       	org = 0xE0180000, len = 0x2800
+  dram1_0_seg :                       	org = 0xE01A0000, len = 0x2800
+  local_sram_0_seg :                  	org = 0xFFA00000, len = 0x180000
+}
+
+PHDRS
+{
+  sram0_phdr PT_LOAD;
+  sram1_phdr PT_LOAD;
+  sram1_bss_phdr PT_LOAD;
+  sram2_phdr PT_LOAD;
+  sram2_bss_phdr PT_LOAD;
+  sram3_phdr PT_LOAD;
+  sram3_bss_phdr PT_LOAD;
+  dram0_0_phdr PT_LOAD;
+  dram0_0_bss_phdr PT_LOAD;
+  dram1_0_phdr PT_LOAD;
+  dram1_0_bss_phdr PT_LOAD;
+  local_sram_0_phdr PT_LOAD;
+  local_sram_0_bss_phdr PT_LOAD;
+}
+
+
+/*  Default entry point:  */
+ENTRY(_ResetVector)
+
+
+/*  Memory boundary addresses:  */
+_memmap_mem_sram_start = 0x20000000;
+_memmap_mem_sram_end   = 0x20280000;
+_memmap_mem_dram0_start = 0xe0180000;
+_memmap_mem_dram0_end   = 0xe01a0000;
+_memmap_mem_dram1_start = 0xe01a0000;
+_memmap_mem_dram1_end   = 0xe01c0000;
+_memmap_mem_local_sram_start = 0xffa00000;
+_memmap_mem_local_sram_end   = 0xffb80000;
+
+/*  Memory segment boundary addresses:  */
+_memmap_seg_sram0_start = 0x20000000;
+_memmap_seg_sram0_max   = 0x20001000;
+_memmap_seg_sram1_start = 0x20001000;
+_memmap_seg_sram1_max   = 0x20200000;
+_memmap_seg_dram0_0_start = 0xe0180000;
+_memmap_seg_dram0_0_max   = 0xe0182800;
+_memmap_seg_dram1_0_start = 0xe01a0000;
+_memmap_seg_dram1_0_max   = 0xe01a2800;
+_memmap_seg_local_sram_0_start = 0xffa00000;
+_memmap_seg_local_sram_0_max   = 0xffb80000;
+
+_rom_store_table = 0;
+PROVIDE(_memmap_reset_vector = 0x20000000);
+PROVIDE(_memmap_vecbase_reset = 0x20000000);
+/* Various memory-map dependent cache attribute settings: */
+_memmap_cacheattr_wb_base = 0x10000010;
+_memmap_cacheattr_wt_base = 0x30000030;
+_memmap_cacheattr_bp_base = 0x40000040;
+_memmap_cacheattr_unused_mask = 0x0FFFFF0F;
+_memmap_cacheattr_wb_trapnull = 0x14444410;
+_memmap_cacheattr_wba_trapnull = 0x14444410;
+_memmap_cacheattr_wbna_trapnull = 0x24444420;
+_memmap_cacheattr_wt_trapnull = 0x34444430;
+_memmap_cacheattr_bp_trapnull = 0x44444440;
+_memmap_cacheattr_wb_strict = 0x10000010;
+_memmap_cacheattr_wt_strict = 0x30000030;
+_memmap_cacheattr_bp_strict = 0x40000040;
+_memmap_cacheattr_wb_allvalid = 0x14444414;
+_memmap_cacheattr_wt_allvalid = 0x34444434;
+_memmap_cacheattr_bp_allvalid = 0x44444444;
+_memmap_region_map = 0x00000082;
+PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
+
+SECTIONS
+{
+
+  .DispatchVector.text : ALIGN(4)
+  {
+    _DispatchVector_text_start = ABSOLUTE(.);
+    KEEP (*(.DispatchVector.text))
+    . = ALIGN (4);
+    _DispatchVector_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .ResetVector.text : ALIGN(4)
+  {
+    _ResetVector_text_start = ABSOLUTE(.);
+    *(.ResetVector.text)
+    . = ALIGN (4);
+    _ResetVector_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .ResetHandler.text : ALIGN(4)
+  {
+    _ResetHandler_text_start = ABSOLUTE(.);
+    *(.ResetHandler.literal .ResetHandler.text)
+    . = ALIGN (4);
+    _ResetHandler_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .DispatchHandler.text : ALIGN(4)
+  {
+    _DispatchHandler_text_start = ABSOLUTE(.);
+    *(.DispatchHandler.literal .DispatchHandler.text)
+    . = ALIGN (4);
+    _DispatchHandler_text_end = ABSOLUTE(.);
+    _memmap_seg_sram0_end = ALIGN(0x8);
+  } >sram0_seg :sram0_phdr
+
+
+  .sram.rodata : ALIGN(4)
+  {
+    _sram_rodata_start = ABSOLUTE(.);
+    *(.sram.rodata)
+    . = ALIGN (4);
+    _sram_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.rodata : ALIGN(4)
+  {
+    _clib_rodata_start = ABSOLUTE(.);
+    *(.clib.rodata)
+    . = ALIGN (4);
+    _clib_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.rodata : ALIGN(4)
+  {
+    _rtos_rodata_start = ABSOLUTE(.);
+    *(.rtos.rodata)
+    . = ALIGN (4);
+    _rtos_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rodata : ALIGN(4)
+  {
+    _rodata_start = ABSOLUTE(.);
+    *(.rodata)
+    *(SORT(.rodata.sort.*))
+    KEEP (*(SORT(.rodata.keepsort.*) .rodata.keep.*))
+    *(.rodata.*)
+    *(.gnu.linkonce.r.*)
+    *(.rodata1)
+    __XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
+    KEEP (*(.xt_except_table))
+    KEEP (*(.gcc_except_table))
+    *(.gnu.linkonce.e.*)
+    *(.gnu.version_r)
+    KEEP (*(.eh_frame))
+    /*  C++ constructor and destructor tables, properly ordered:  */
+    KEEP (*crtbegin.o(.ctors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*(.ctors))
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*(.dtors))
+    /*  C++ exception handlers table:  */
+    __XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
+    *(.xt_except_desc)
+    *(.gnu.linkonce.h.*)
+    __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
+    *(.xt_except_desc_end)
+    *(.dynamic)
+    *(.gnu.version_d)
+    . = ALIGN(4);		/* this table MUST be 4-byte aligned */
+    _bss_table_start = ABSOLUTE(.);
+    LONG(_bss_start)
+    LONG(_bss_end)
+    LONG(_sram2_bss_start)
+    LONG(_sram2_bss_end)
+    LONG(_sram3_bss_start)
+    LONG(_sram3_bss_end)
+    LONG(_dram0_bss_start)
+    LONG(_dram0_bss_end)
+    LONG(_dram1_bss_start)
+    LONG(_dram1_bss_end)
+    LONG(_local_sram_bss_start)
+    LONG(_local_sram_bss_end)
+    _bss_table_end = ABSOLUTE(.);
+    . = ALIGN (4);
+    _rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .sram.text : ALIGN(4)
+  {
+    _sram_text_start = ABSOLUTE(.);
+    *(.sram.literal .sram.text)
+    . = ALIGN (4);
+    _sram_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .text : ALIGN(4)
+  {
+    _stext = .;
+    _text_start = ABSOLUTE(.);
+    *(.entry.text)
+    *(.init.literal)
+    KEEP(*(.init))
+    *(.literal.sort.* SORT(.text.sort.*))
+    KEEP (*(.literal.keepsort.* SORT(.text.keepsort.*) .literal.keep.* .text.keep.* .literal.*personality* .text.*personality*))
+    *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
+    *(.fini.literal)
+    KEEP(*(.fini))
+    *(.gnu.version)
+    . = ALIGN (4);
+    _text_end = ABSOLUTE(.);
+    _etext = .;
+  } >sram1_seg :sram1_phdr
+
+  .clib.text : ALIGN(4)
+  {
+    _clib_text_start = ABSOLUTE(.);
+    *(.clib.literal .clib.text)
+    . = ALIGN (4);
+    _clib_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.text : ALIGN(4)
+  {
+    _rtos_text_start = ABSOLUTE(.);
+    *(.rtos.literal .rtos.text)
+    . = ALIGN (4);
+    _rtos_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.data : ALIGN(4)
+  {
+    _clib_data_start = ABSOLUTE(.);
+    *(.clib.data)
+    . = ALIGN (4);
+    _clib_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.percpu.data : ALIGN(4)
+  {
+    _clib_percpu_data_start = ABSOLUTE(.);
+    *(.clib.percpu.data)
+    . = ALIGN (4);
+    _clib_percpu_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.percpu.data : ALIGN(4)
+  {
+    _rtos_percpu_data_start = ABSOLUTE(.);
+    *(.rtos.percpu.data)
+    . = ALIGN (4);
+    _rtos_percpu_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.data : ALIGN(4)
+  {
+    _rtos_data_start = ABSOLUTE(.);
+    *(.rtos.data)
+    . = ALIGN (4);
+    _rtos_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .sram.data : ALIGN(4)
+  {
+    _sram_data_start = ABSOLUTE(.);
+    *(.sram.data)
+    . = ALIGN (4);
+    _sram_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .data : ALIGN(4)
+  {
+    _data_start = ABSOLUTE(.);
+    *(.data)
+    *(SORT(.data.sort.*))
+    KEEP (*(SORT(.data.keepsort.*) .data.keep.*))
+    *(.data.*)
+    *(.gnu.linkonce.d.*)
+    KEEP(*(.gnu.linkonce.d.*personality*))
+    *(.data1)
+    *(.sdata)
+    *(.sdata.*)
+    *(.gnu.linkonce.s.*)
+    *(.sdata2)
+    *(.sdata2.*)
+    *(.gnu.linkonce.s2.*)
+    KEEP(*(.jcr))
+    *(__llvm_prf_cnts)
+    *(__llvm_prf_data)
+    *(__llvm_prf_vnds)
+    . = ALIGN (4);
+    _data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  __llvm_prf_names : ALIGN(4)
+  {
+    __llvm_prf_names_start = ABSOLUTE(.);
+    *(__llvm_prf_names)
+    . = ALIGN (4);
+    __llvm_prf_names_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _bss_start = ABSOLUTE(.);
+    *(.dynsbss)
+    *(.sbss)
+    *(.sbss.*)
+    *(.gnu.linkonce.sb.*)
+    *(.scommon)
+    *(.sbss2)
+    *(.sbss2.*)
+    *(.gnu.linkonce.sb2.*)
+    *(.dynbss)
+    *(.bss)
+    *(SORT(.bss.sort.*))
+    KEEP (*(SORT(.bss.keepsort.*) .bss.keep.*))
+    *(.bss.*)
+    *(.gnu.linkonce.b.*)
+    *(COMMON)
+    *(.clib.bss)
+    *(.clib.percpu.bss)
+    *(.rtos.percpu.bss)
+    *(.rtos.bss)
+    *(.sram.bss)
+    *(.debug.bss)
+    . = ALIGN (8);
+    _bss_end = ABSOLUTE(.);
+    _end = ALIGN(0x8);
+    PROVIDE(end = ALIGN(0x8));
+    _memmap_seg_sram1_end = ALIGN(0x8);
+  } >sram1_seg :sram1_bss_phdr
+
+  _heap_sentry = 0x20200000;
+
+  .sram2.rodata : ALIGN(4)
+  {
+    _sram2_rodata_start = ABSOLUTE(.);
+    *(.sram2.rodata)
+    . = ALIGN (4);
+    _sram2_rodata_end = ABSOLUTE(.);
+  } >sram2_seg :sram2_phdr
+
+  .sram2.text : ALIGN(4)
+  {
+    _sram2_text_start = ABSOLUTE(.);
+    *(.sram2.literal .sram2.text)
+    . = ALIGN (4);
+    _sram2_text_end = ABSOLUTE(.);
+  } >sram2_seg :sram2_phdr
+
+  .sram2.data : ALIGN(4)
+  {
+    _sram2_data_start = ABSOLUTE(.);
+    *(.sram2.data)
+    . = ALIGN (4);
+    _sram2_data_end = ABSOLUTE(.);
+  } >sram2_seg :sram2_phdr
+
+  .sram2.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _sram2_bss_start = ABSOLUTE(.);
+    *(.sram2.bss)
+    . = ALIGN (8);
+    _sram2_bss_end = ABSOLUTE(.);
+    _memmap_seg_sram2_end = ALIGN(0x8);
+  } >sram2_seg :sram2_bss_phdr
+
+
+  .sram3.rodata : ALIGN(4)
+  {
+    _sram3_rodata_start = ABSOLUTE(.);
+    *(.sram3.rodata)
+    . = ALIGN (4);
+    _sram3_rodata_end = ABSOLUTE(.);
+  } >sram3_seg :sram3_phdr
+
+  .sram3.text : ALIGN(4)
+  {
+    _sram3_text_start = ABSOLUTE(.);
+    *(.sram3.literal .sram3.text)
+    . = ALIGN (4);
+    _sram3_text_end = ABSOLUTE(.);
+  } >sram3_seg :sram3_phdr
+
+  .sram3.data : ALIGN(4)
+  {
+    _sram3_data_start = ABSOLUTE(.);
+    *(.sram3.data)
+    . = ALIGN (4);
+    _sram3_data_end = ABSOLUTE(.);
+  } >sram3_seg :sram3_phdr
+
+  .sram3.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _sram3_bss_start = ABSOLUTE(.);
+    *(.sram3.bss)
+    . = ALIGN (8);
+    _sram3_bss_end = ABSOLUTE(.);
+    _memmap_seg_sram3_end = ALIGN(0x8);
+  } >sram3_seg :sram3_bss_phdr
+
+  _memmap_mem_sram_max = ABSOLUTE(.);
+
+  .dram0.rodata : ALIGN(4)
+  {
+    _dram0_rodata_start = ABSOLUTE(.);
+    *(.dram0.rodata)
+    . = ALIGN (4);
+    _dram0_rodata_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.data : ALIGN(4)
+  {
+    _dram0_data_start = ABSOLUTE(.);
+    *(.dram0.data)
+    . = ALIGN (4);
+    _dram0_data_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dram0_bss_start = ABSOLUTE(.);
+    *(.dram0.bss)
+    *(.dram0_user.bss)
+    . = ALIGN (8);
+    _dram0_bss_end = ABSOLUTE(.);
+    _memmap_seg_dram0_0_end = ALIGN(0x8);
+  } >dram0_0_seg :dram0_0_bss_phdr
+
+  _memmap_mem_dram0_max = ABSOLUTE(.);
+
+  .dram1.rodata : ALIGN(4)
+  {
+    _dram1_rodata_start = ABSOLUTE(.);
+    *(.dram1.rodata)
+    . = ALIGN (4);
+    _dram1_rodata_end = ABSOLUTE(.);
+  } >dram1_0_seg :dram1_0_phdr
+
+  .dram1.data : ALIGN(4)
+  {
+    _dram1_data_start = ABSOLUTE(.);
+    *(.dram1.data)
+    . = ALIGN (4);
+    _dram1_data_end = ABSOLUTE(.);
+  } >dram1_0_seg :dram1_0_phdr
+
+  .dram1.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dram1_bss_start = ABSOLUTE(.);
+    *(.dram1.bss)
+    *(.dram1_user.bss)
+    . = ALIGN (8);
+    _dram1_bss_end = ABSOLUTE(.);
+    _stack_sentry = ALIGN(0x8);
+    _memmap_seg_dram1_0_end = ALIGN(0x8);
+  } >dram1_0_seg :dram1_0_bss_phdr
+
+  PROVIDE(__stack = 0xe01a2800);
+  _memmap_mem_dram1_max = ABSOLUTE(.);
+
+  .local_sram.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _local_sram_bss_start = ABSOLUTE(.);
+    *(.local_sram.bss)
+    . = ALIGN (8);
+    _local_sram_bss_end = ABSOLUTE(.);
+    _memmap_seg_local_sram_0_end = ALIGN(0x8);
+  } >local_sram_0_seg :local_sram_0_bss_phdr
+
+
+  _memmap_mem_local_sram_max = ABSOLUTE(.);
+
+  .debug  0 :  { *(.debug) }
+  .line  0 :  { *(.line) }
+  .debug_srcinfo  0 :  { *(.debug_srcinfo) }
+  .debug_sfnames  0 :  { *(.debug_sfnames) }
+  .debug_aranges  0 :  { *(.debug_aranges) }
+  .debug_pubnames  0 :  { *(.debug_pubnames) }
+  .debug_info  0 :  { *(.debug_info) }
+  .debug_abbrev  0 :  { *(.debug_abbrev) }
+  .debug_line  0 :  { *(.debug_line) }
+  .debug_frame  0 :  { *(.debug_frame) }
+  .debug_str  0 :  { *(.debug_str) }
+  .debug_loc  0 :  { *(.debug_loc) }
+  .debug_macinfo  0 :  { *(.debug_macinfo) }
+  .debug_weaknames  0 :  { *(.debug_weaknames) }
+  .debug_funcnames  0 :  { *(.debug_funcnames) }
+  .debug_typenames  0 :  { *(.debug_typenames) }
+  .debug_varnames  0 :  { *(.debug_varnames) }
+  .xt.insn 0 :
+  {
+    KEEP (*(.xt.insn))
+    KEEP (*(.gnu.linkonce.x.*))
+  }
+  .xt.prop 0 :
+  {
+    KEEP (*(.xt.prop))
+    KEEP (*(.xt.prop.*))
+    KEEP (*(.gnu.linkonce.prop.*))
+  }
+  .xt.lit 0 :
+  {
+    KEEP (*(.xt.lit))
+    KEEP (*(.xt.lit.*))
+    KEEP (*(.gnu.linkonce.p.*))
+  }
+  .debug.xt.callgraph 0 :
+  {
+    KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
+  }
+}
+

+ 61 - 0
LSP/min-rt_core0_main_stack_tcm1/ldscripts/elf32xtensa.xr

@@ -0,0 +1,61 @@
+/* This linker script generated from xt-genldscripts.tpp for LSP C:\Users\DELL\workspace\CSI_DSP_FW\LSP\min-rt_core0_main_stack_tcm1 */
+/* Linker Script for ld -r or ld -i */
+
+
+SECTIONS
+{
+
+  .text 0 :
+  {
+    *(.literal .text)
+  }
+
+  .bss 0 :
+  {
+    *(.dynsbss)
+    *(.sbss)
+    *(.scommon)
+    *(.dynbss)
+    *(.bss)
+    *(COMMON)
+  }
+  .debug  0 :  { *(.debug) }
+  .line  0 :  { *(.line) }
+  .debug_srcinfo  0 :  { *(.debug_srcinfo) }
+  .debug_sfnames  0 :  { *(.debug_sfnames) }
+  .debug_aranges  0 :  { *(.debug_aranges) }
+  .debug_pubnames  0 :  { *(.debug_pubnames) }
+  .debug_info  0 :  { *(.debug_info) }
+  .debug_abbrev  0 :  { *(.debug_abbrev) }
+  .debug_line  0 :  { *(.debug_line) }
+  .debug_frame  0 :  { *(.debug_frame) }
+  .debug_str  0 :  { *(.debug_str) }
+  .debug_loc  0 :  { *(.debug_loc) }
+  .debug_macinfo  0 :  { *(.debug_macinfo) }
+  .debug_weaknames  0 :  { *(.debug_weaknames) }
+  .debug_funcnames  0 :  { *(.debug_funcnames) }
+  .debug_typenames  0 :  { *(.debug_typenames) }
+  .debug_varnames  0 :  { *(.debug_varnames) }
+  .xt.insn 0 :
+  {
+    KEEP (*(.xt.insn))
+    KEEP (*(.gnu.linkonce.x.*))
+  }
+  .xt.prop 0 :
+  {
+    KEEP (*(.xt.prop))
+    KEEP (*(.xt.prop.*))
+    KEEP (*(.gnu.linkonce.prop.*))
+  }
+  .xt.lit 0 :
+  {
+    KEEP (*(.xt.lit))
+    KEEP (*(.xt.lit.*))
+    KEEP (*(.gnu.linkonce.p.*))
+  }
+  .debug.xt.callgraph 0 :
+  {
+    KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
+  }
+}
+

+ 61 - 0
LSP/min-rt_core0_main_stack_tcm1/ldscripts/elf32xtensa.xu

@@ -0,0 +1,61 @@
+/* This linker script generated from xt-genldscripts.tpp for LSP C:\Users\DELL\workspace\CSI_DSP_FW\LSP\min-rt_core0_main_stack_tcm1 */
+/* Linker Script for ld -Ur */
+
+
+SECTIONS
+{
+
+  .text 0 :
+  {
+    *(.literal .text)
+  }
+
+  .bss 0 :
+  {
+    *(.dynsbss)
+    *(.sbss)
+    *(.scommon)
+    *(.dynbss)
+    *(.bss)
+    *(COMMON)
+  }
+  .debug  0 :  { *(.debug) }
+  .line  0 :  { *(.line) }
+  .debug_srcinfo  0 :  { *(.debug_srcinfo) }
+  .debug_sfnames  0 :  { *(.debug_sfnames) }
+  .debug_aranges  0 :  { *(.debug_aranges) }
+  .debug_pubnames  0 :  { *(.debug_pubnames) }
+  .debug_info  0 :  { *(.debug_info) }
+  .debug_abbrev  0 :  { *(.debug_abbrev) }
+  .debug_line  0 :  { *(.debug_line) }
+  .debug_frame  0 :  { *(.debug_frame) }
+  .debug_str  0 :  { *(.debug_str) }
+  .debug_loc  0 :  { *(.debug_loc) }
+  .debug_macinfo  0 :  { *(.debug_macinfo) }
+  .debug_weaknames  0 :  { *(.debug_weaknames) }
+  .debug_funcnames  0 :  { *(.debug_funcnames) }
+  .debug_typenames  0 :  { *(.debug_typenames) }
+  .debug_varnames  0 :  { *(.debug_varnames) }
+  .xt.insn 0 :
+  {
+    KEEP (*(.xt.insn))
+    KEEP (*(.gnu.linkonce.x.*))
+  }
+  .xt.prop 0 :
+  {
+    KEEP (*(.xt.prop))
+    KEEP (*(.xt.prop.*))
+    KEEP (*(.gnu.linkonce.prop.*))
+  }
+  .xt.lit 0 :
+  {
+    KEEP (*(.xt.lit))
+    KEEP (*(.xt.lit.*))
+    KEEP (*(.gnu.linkonce.p.*))
+  }
+  .debug.xt.callgraph 0 :
+  {
+    KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
+  }
+}
+

BIN
LSP/min-rt_core0_main_stack_tcm1/ldscripts/libminrt.a


BIN
LSP/min-rt_core0_main_stack_tcm1/libminrt.a


+ 80 - 0
LSP/min-rt_core0_main_stack_tcm1/memmap.xmm

@@ -0,0 +1,80 @@
+//  Memory map file to generate linker scripts for programs without board I/O.
+
+// Customer ID=16470; Build=0x8e648; Copyright (c) 2004-2015 Cadence Design Systems, Inc.
+//
+// Permission is hereby granted, free of charge, to any person obtaining
+// a copy of this software and associated documentation files (the
+// "Software"), to deal in the Software without restriction, including
+// without limitation the rights to use, copy, modify, merge, publish,
+// distribute, sublicense, and/or sell copies of the Software, and to
+// permit persons to whom the Software is furnished to do so, subject to
+// the following conditions:
+//
+// The above copyright notice and this permission notice shall be included
+// in all copies or substantial portions of the Software.
+//
+// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+// EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+// IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+// CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+// TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+// SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+
+//  Place stack in local RAM:
+PLACE SECTIONS(STACK) WITH_SECTION(.dram1.bss)
+// A memory map is a sequence of memory descriptions and
+// optional parameter assignments.
+//
+// Each memory description has the following format:
+//   BEGIN <name>
+//     <addr> [,<paddr>] : <mem-type> : <mem-name> : <size> [,<psize>]
+//                       : [writable] [,executable] [,device] ;
+//     <segment>*
+//   END <name>
+//
+// where each <segment> description has the following format:
+//     <seg-name> : F|C : <start-addr> - <end-addr> [ : STACK ] [ : HEAP ]
+//                : <section-name>* ;
+//
+// Each parameter assignment is a keyword/value pair in the following format:
+//   <keyword> = <value>                (no spaces in <value>)
+// or
+//   <keyword> = "<value>"              (spaces allowed in <value>)
+//
+// The following primitives are also defined:
+//   PLACE SECTIONS( <section-name>* ) { WITH_SECTION(<section-name>)
+//                                       | IN_SEGMENT(<seg-name>) }
+//
+//   NOLOAD <section-name1> [ <section-name2> ... ]
+//
+// Please refer to the Xtensa LSP Reference Manual for more details.
+//
+VECSELECT=1
+VECRESET=0x20000000
+VECBASE= 0x20000000
+
+BEGIN sram
+0x20000000: extra_mem : sram : 0x00280000 : executable, writable ;
+ sram0 : F : 0x20000000 - 0x20000fff : .DispatchVector.text .ResetVector.text .ResetHandler.literal .ResetHandler.text .DispatchHandler.literal .DispatchHandler.text;
+ sram1 : C : 0x20001000 - 0x201fffff :  HEAP : .sram.rodata .clib.rodata .rtos.rodata .rodata .sram.literal .literal .rtos.literal .clib.literal .sram.text .text .clib.text .rtos.text .clib.data .clib.percpu.data .rtos.percpu.data .rtos.data .sram.data .data __llvm_prf_names .clib.bss .clib.percpu.bss .rtos.percpu.bss .rtos.bss .sram.bss .bss .debug.bss;
+ sram2 : C : 0x20200000 - 0x2023ffff : .sram2.rodata .sram2.literal .sram2.text .sram2.data .sram2.bss;
+ sram3 : C : 0x20240000 - 0x2027ffff : .sram3.rodata .sram3.literal .sram3.text .sram3.data .sram3.bss;
+ END sram
+
+BEGIN dram0
+0xe0180000: dataRam : dram0 : 0x20000 : writable ;
+ dram0_0 : C : 0xe0180000 - 0xe019ffff :.dram0.rodata .dram0.data .dram0.bss .dram0_user.bss;
+END dram0
+
+BEGIN dram1
+0xe01a0000: dataRam : dram1 : 0x20000 : writable ;
+ dram1_0 : C : 0xe01a0000 - 0xe01bffff :STACK :.dram1.rodata .dram1.data .dram1.bss .dram1_user.bss;
+END dram1
+
+BEGIN local_sram
+0xffa00000: sysram : local_sram :   0x180000: writable ;
+  local_sram_0 : C : 0xffa00000 - 0xffb7ffff :.local_sram.bss ;
+ END local_sram
+
+RESERVE_SEGMENT_AREA = ".dram0.data 120832 + 0 end : .dram1.data 120832 + 0 end : .sram2.data 262144 + 0 end : .sram3.data 262144 + 0 end"

+ 36 - 0
LSP/min-rt_core0_main_stack_tcm1/specs

@@ -0,0 +1,36 @@
+# Customer ID=16470; Build=0x8e648; Copyright (c) 2001-2015 Cadence Design Systems, Inc.
+#
+# Permission is hereby granted, free of charge, to any person obtaining
+# a copy of this software and associated documentation files (the
+# "Software"), to deal in the Software without restriction, including
+# without limitation the rights to use, copy, modify, merge, publish,
+# distribute, sublicense, and/or sell copies of the Software, and to
+# permit persons to whom the Software is furnished to do so, subject to
+# the following conditions:
+#
+# The above copyright notice and this permission notice shall be included
+# in all copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+# IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+# CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+# TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+# SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+
+
+# The %O suffix on the start and end files indicates that the system's
+# standard suffix for object files (e.g., ".o") should be appended.
+# The %s suffix tells the compiler driver to search for the file in the
+# list of known locations for startfiles.
+
+*startfile:
+crt1-boards%O%s crti%O%s crtbegin%O%s _sharedvectors%O%s _vectors%O%s
+
+*endfile:
+crtend%O%s crtn%O%s
+
+*lib:
+-lc -lgloss  -lc -lhandler-reset -lhandlers-board  -lhal -lc
+

+ 444 - 0
LSP/min-rt_core0_stack_tcm1/ldscripts/elf32xtensa.x

@@ -0,0 +1,444 @@
+/* This linker script generated from xt-genldscripts.tpp for LSP C:\Users\DELL\workspace\CSI_DSP_FW\LSP\min-rt_core0_stack_tcm1 */
+/* Linker Script for default link */
+MEMORY
+{
+  sram0_seg :                         	org = 0x20000000, len = 0x1000
+  sram1_seg :                         	org = 0x20001000, len = 0x27F000
+  dram0_0_seg :                       	org = 0xE0180000, len = 0x20000
+  dram1_0_seg :                       	org = 0xE01A0000, len = 0x20000
+  local_sram_0_seg :                  	org = 0xFFA00000, len = 0x180000
+}
+
+PHDRS
+{
+  sram0_phdr PT_LOAD;
+  sram1_phdr PT_LOAD;
+  sram1_bss_phdr PT_LOAD;
+  dram0_0_phdr PT_LOAD;
+  dram0_0_bss_phdr PT_LOAD;
+  dram1_0_phdr PT_LOAD;
+  dram1_0_bss_phdr PT_LOAD;
+  local_sram_0_phdr PT_LOAD;
+  local_sram_0_bss_phdr PT_LOAD;
+}
+
+
+/*  Default entry point:  */
+ENTRY(_ResetVector)
+
+
+/*  Memory boundary addresses:  */
+_memmap_mem_sram_start = 0x20000000;
+_memmap_mem_sram_end   = 0x20280000;
+_memmap_mem_dram0_start = 0xe0180000;
+_memmap_mem_dram0_end   = 0xe01a0000;
+_memmap_mem_dram1_start = 0xe01a0000;
+_memmap_mem_dram1_end   = 0xe01c0000;
+_memmap_mem_local_sram_start = 0xffa00000;
+_memmap_mem_local_sram_end   = 0xffb80000;
+
+/*  Memory segment boundary addresses:  */
+_memmap_seg_sram0_start = 0x20000000;
+_memmap_seg_sram0_max   = 0x20001000;
+_memmap_seg_sram1_start = 0x20001000;
+_memmap_seg_sram1_max   = 0x20280000;
+_memmap_seg_dram0_0_start = 0xe0180000;
+_memmap_seg_dram0_0_max   = 0xe01a0000;
+_memmap_seg_dram1_0_start = 0xe01a0000;
+_memmap_seg_dram1_0_max   = 0xe01c0000;
+_memmap_seg_local_sram_0_start = 0xffa00000;
+_memmap_seg_local_sram_0_max   = 0xffb80000;
+
+_rom_store_table = 0;
+PROVIDE(_memmap_reset_vector = 0x20000000);
+PROVIDE(_memmap_vecbase_reset = 0x20000000);
+/* Various memory-map dependent cache attribute settings: */
+_memmap_cacheattr_wb_base = 0x10000010;
+_memmap_cacheattr_wt_base = 0x30000030;
+_memmap_cacheattr_bp_base = 0x40000040;
+_memmap_cacheattr_unused_mask = 0x0FFFFF0F;
+_memmap_cacheattr_wb_trapnull = 0x14444411;
+_memmap_cacheattr_wba_trapnull = 0x14444410;
+_memmap_cacheattr_wbna_trapnull = 0x24444420;
+_memmap_cacheattr_wt_trapnull = 0x34444430;
+_memmap_cacheattr_bp_trapnull = 0x44444440;
+_memmap_cacheattr_wb_strict = 0x10000010;
+_memmap_cacheattr_wt_strict = 0x30000030;
+_memmap_cacheattr_bp_strict = 0x40000040;
+_memmap_cacheattr_wb_allvalid = 0x14444414;
+_memmap_cacheattr_wt_allvalid = 0x34444434;
+_memmap_cacheattr_bp_allvalid = 0x44444444;
+_memmap_region_map = 0x00000082;
+PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
+
+SECTIONS
+{
+
+  .DispatchVector.text : ALIGN(4)
+  {
+    _DispatchVector_text_start = ABSOLUTE(.);
+    KEEP (*(.DispatchVector.text))
+    . = ALIGN (4);
+    _DispatchVector_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .ResetVector.text : ALIGN(4)
+  {
+    _ResetVector_text_start = ABSOLUTE(.);
+    *(.ResetVector.text)
+    . = ALIGN (4);
+    _ResetVector_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .ResetHandler.text : ALIGN(4)
+  {
+    _ResetHandler_text_start = ABSOLUTE(.);
+    *(.ResetHandler.literal .ResetHandler.text)
+    . = ALIGN (4);
+    _ResetHandler_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .DispatchHandler.text : ALIGN(4)
+  {
+    _DispatchHandler_text_start = ABSOLUTE(.);
+    *(.DispatchHandler.literal .DispatchHandler.text)
+    . = ALIGN (4);
+    _DispatchHandler_text_end = ABSOLUTE(.);
+    _memmap_seg_sram0_end = ALIGN(0x8);
+  } >sram0_seg :sram0_phdr
+
+
+  .sram.rodata : ALIGN(4)
+  {
+    _sram_rodata_start = ABSOLUTE(.);
+    *(.sram.rodata)
+    . = ALIGN (4);
+    _sram_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.rodata : ALIGN(4)
+  {
+    _clib_rodata_start = ABSOLUTE(.);
+    *(.clib.rodata)
+    . = ALIGN (4);
+    _clib_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.rodata : ALIGN(4)
+  {
+    _rtos_rodata_start = ABSOLUTE(.);
+    *(.rtos.rodata)
+    . = ALIGN (4);
+    _rtos_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rodata : ALIGN(4)
+  {
+    _rodata_start = ABSOLUTE(.);
+    *(.rodata)
+    *(SORT(.rodata.sort.*))
+    KEEP (*(SORT(.rodata.keepsort.*) .rodata.keep.*))
+    *(.rodata.*)
+    *(.gnu.linkonce.r.*)
+    *(.rodata1)
+    __XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
+    KEEP (*(.xt_except_table))
+    KEEP (*(.gcc_except_table))
+    *(.gnu.linkonce.e.*)
+    *(.gnu.version_r)
+    KEEP (*(.eh_frame))
+    /*  C++ constructor and destructor tables, properly ordered:  */
+    KEEP (*crtbegin.o(.ctors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*(.ctors))
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*(.dtors))
+    /*  C++ exception handlers table:  */
+    __XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
+    *(.xt_except_desc)
+    *(.gnu.linkonce.h.*)
+    __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
+    *(.xt_except_desc_end)
+    *(.dynamic)
+    *(.gnu.version_d)
+    . = ALIGN(4);		/* this table MUST be 4-byte aligned */
+    _bss_table_start = ABSOLUTE(.);
+    LONG(_bss_start)
+    LONG(_bss_end)
+    LONG(_dram0_bss_start)
+    LONG(_dram0_bss_end)
+    LONG(_dram1_bss_start)
+    LONG(_dram1_bss_end)
+    LONG(_local_sram_bss_start)
+    LONG(_local_sram_bss_end)
+    _bss_table_end = ABSOLUTE(.);
+    . = ALIGN (4);
+    _rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .sram.text : ALIGN(4)
+  {
+    _sram_text_start = ABSOLUTE(.);
+    *(.sram.literal .sram.text)
+    . = ALIGN (4);
+    _sram_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .text : ALIGN(4)
+  {
+    _stext = .;
+    _text_start = ABSOLUTE(.);
+    *(.entry.text)
+    *(.init.literal)
+    KEEP(*(.init))
+    *(.literal.sort.* SORT(.text.sort.*))
+    KEEP (*(.literal.keepsort.* SORT(.text.keepsort.*) .literal.keep.* .text.keep.* .literal.*personality* .text.*personality*))
+    *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
+    *(.fini.literal)
+    KEEP(*(.fini))
+    *(.gnu.version)
+    . = ALIGN (4);
+    _text_end = ABSOLUTE(.);
+    _etext = .;
+  } >sram1_seg :sram1_phdr
+
+  .clib.text : ALIGN(4)
+  {
+    _clib_text_start = ABSOLUTE(.);
+    *(.clib.literal .clib.text)
+    . = ALIGN (4);
+    _clib_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.text : ALIGN(4)
+  {
+    _rtos_text_start = ABSOLUTE(.);
+    *(.rtos.literal .rtos.text)
+    . = ALIGN (4);
+    _rtos_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.data : ALIGN(4)
+  {
+    _clib_data_start = ABSOLUTE(.);
+    *(.clib.data)
+    . = ALIGN (4);
+    _clib_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.percpu.data : ALIGN(4)
+  {
+    _clib_percpu_data_start = ABSOLUTE(.);
+    *(.clib.percpu.data)
+    . = ALIGN (4);
+    _clib_percpu_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.percpu.data : ALIGN(4)
+  {
+    _rtos_percpu_data_start = ABSOLUTE(.);
+    *(.rtos.percpu.data)
+    . = ALIGN (4);
+    _rtos_percpu_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.data : ALIGN(4)
+  {
+    _rtos_data_start = ABSOLUTE(.);
+    *(.rtos.data)
+    . = ALIGN (4);
+    _rtos_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .sram.data : ALIGN(4)
+  {
+    _sram_data_start = ABSOLUTE(.);
+    *(.sram.data)
+    . = ALIGN (4);
+    _sram_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .data : ALIGN(4)
+  {
+    _data_start = ABSOLUTE(.);
+    *(.data)
+    *(SORT(.data.sort.*))
+    KEEP (*(SORT(.data.keepsort.*) .data.keep.*))
+    *(.data.*)
+    *(.gnu.linkonce.d.*)
+    KEEP(*(.gnu.linkonce.d.*personality*))
+    *(.data1)
+    *(.sdata)
+    *(.sdata.*)
+    *(.gnu.linkonce.s.*)
+    *(.sdata2)
+    *(.sdata2.*)
+    *(.gnu.linkonce.s2.*)
+    KEEP(*(.jcr))
+    *(__llvm_prf_cnts)
+    *(__llvm_prf_data)
+    *(__llvm_prf_vnds)
+    . = ALIGN (4);
+    _data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  __llvm_prf_names : ALIGN(4)
+  {
+    __llvm_prf_names_start = ABSOLUTE(.);
+    *(__llvm_prf_names)
+    . = ALIGN (4);
+    __llvm_prf_names_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _bss_start = ABSOLUTE(.);
+    *(.dynsbss)
+    *(.sbss)
+    *(.sbss.*)
+    *(.gnu.linkonce.sb.*)
+    *(.scommon)
+    *(.sbss2)
+    *(.sbss2.*)
+    *(.gnu.linkonce.sb2.*)
+    *(.dynbss)
+    *(.bss)
+    *(SORT(.bss.sort.*))
+    KEEP (*(SORT(.bss.keepsort.*) .bss.keep.*))
+    *(.bss.*)
+    *(.gnu.linkonce.b.*)
+    *(COMMON)
+    *(.clib.bss)
+    *(.clib.percpu.bss)
+    *(.rtos.percpu.bss)
+    *(.rtos.bss)
+    *(.sram.bss)
+    *(.debug.bss)
+    . = ALIGN (8);
+    _bss_end = ABSOLUTE(.);
+    _end = ALIGN(0x8);
+    PROVIDE(end = ALIGN(0x8));
+    _memmap_seg_sram1_end = ALIGN(0x8);
+  } >sram1_seg :sram1_bss_phdr
+
+  _heap_sentry = 0x20280000;
+  _memmap_mem_sram_max = ABSOLUTE(.);
+
+  .dram0.rodata : ALIGN(4)
+  {
+    _dram0_rodata_start = ABSOLUTE(.);
+    *(.dram0.rodata)
+    . = ALIGN (4);
+    _dram0_rodata_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.data : ALIGN(4)
+  {
+    _dram0_data_start = ABSOLUTE(.);
+    *(.dram0.data)
+    . = ALIGN (4);
+    _dram0_data_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dram0_bss_start = ABSOLUTE(.);
+    *(.dram0.bss)
+    *(.dram0_user.bss)
+    . = ALIGN (8);
+    _dram0_bss_end = ABSOLUTE(.);
+    _memmap_seg_dram0_0_end = ALIGN(0x8);
+  } >dram0_0_seg :dram0_0_bss_phdr
+
+  _memmap_mem_dram0_max = ABSOLUTE(.);
+
+  .dram1.rodata : ALIGN(4)
+  {
+    _dram1_rodata_start = ABSOLUTE(.);
+    *(.dram1.rodata)
+    . = ALIGN (4);
+    _dram1_rodata_end = ABSOLUTE(.);
+  } >dram1_0_seg :dram1_0_phdr
+
+  .dram1.data : ALIGN(4)
+  {
+    _dram1_data_start = ABSOLUTE(.);
+    *(.dram1.data)
+    . = ALIGN (4);
+    _dram1_data_end = ABSOLUTE(.);
+  } >dram1_0_seg :dram1_0_phdr
+
+  .dram1.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dram1_bss_start = ABSOLUTE(.);
+    *(.dram1.bss)
+    *(.dram1_user.bss)
+    . = ALIGN (8);
+    _dram1_bss_end = ABSOLUTE(.);
+    _stack_sentry = ALIGN(0x8);
+    _memmap_seg_dram1_0_end = ALIGN(0x8);
+  } >dram1_0_seg :dram1_0_bss_phdr
+
+  PROVIDE(__stack = 0xe01c0000);
+  _isb_default = 0xe01bfe10;
+  _memmap_mem_dram1_max = ABSOLUTE(.);
+
+  .local_sram.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _local_sram_bss_start = ABSOLUTE(.);
+    *(.local_sram.bss)
+    . = ALIGN (8);
+    _local_sram_bss_end = ABSOLUTE(.);
+    _memmap_seg_local_sram_0_end = ALIGN(0x8);
+  } >local_sram_0_seg :local_sram_0_bss_phdr
+
+
+  _memmap_mem_local_sram_max = ABSOLUTE(.);
+
+  .debug  0 :  { *(.debug) }
+  .line  0 :  { *(.line) }
+  .debug_srcinfo  0 :  { *(.debug_srcinfo) }
+  .debug_sfnames  0 :  { *(.debug_sfnames) }
+  .debug_aranges  0 :  { *(.debug_aranges) }
+  .debug_pubnames  0 :  { *(.debug_pubnames) }
+  .debug_info  0 :  { *(.debug_info) }
+  .debug_abbrev  0 :  { *(.debug_abbrev) }
+  .debug_line  0 :  { *(.debug_line) }
+  .debug_frame  0 :  { *(.debug_frame) }
+  .debug_str  0 :  { *(.debug_str) }
+  .debug_loc  0 :  { *(.debug_loc) }
+  .debug_macinfo  0 :  { *(.debug_macinfo) }
+  .debug_weaknames  0 :  { *(.debug_weaknames) }
+  .debug_funcnames  0 :  { *(.debug_funcnames) }
+  .debug_typenames  0 :  { *(.debug_typenames) }
+  .debug_varnames  0 :  { *(.debug_varnames) }
+  .xt.insn 0 :
+  {
+    KEEP (*(.xt.insn))
+    KEEP (*(.gnu.linkonce.x.*))
+  }
+  .xt.prop 0 :
+  {
+    KEEP (*(.xt.prop))
+    KEEP (*(.xt.prop.*))
+    KEEP (*(.gnu.linkonce.prop.*))
+  }
+  .xt.lit 0 :
+  {
+    KEEP (*(.xt.lit))
+    KEEP (*(.xt.lit.*))
+    KEEP (*(.gnu.linkonce.p.*))
+  }
+  .debug.xt.callgraph 0 :
+  {
+    KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
+  }
+}
+

+ 444 - 0
LSP/min-rt_core0_stack_tcm1/ldscripts/elf32xtensa.xbn

@@ -0,0 +1,444 @@
+/* This linker script generated from xt-genldscripts.tpp for LSP C:\Users\DELL\workspace\CSI_DSP_FW\LSP\min-rt_core0_stack_tcm1 */
+/* Linker Script for ld -N */
+MEMORY
+{
+  sram0_seg :                         	org = 0x20000000, len = 0x1000
+  sram1_seg :                         	org = 0x20001000, len = 0x27F000
+  dram0_0_seg :                       	org = 0xE0180000, len = 0x20000
+  dram1_0_seg :                       	org = 0xE01A0000, len = 0x20000
+  local_sram_0_seg :                  	org = 0xFFA00000, len = 0x180000
+}
+
+PHDRS
+{
+  sram0_phdr PT_LOAD;
+  sram1_phdr PT_LOAD;
+  sram1_bss_phdr PT_LOAD;
+  dram0_0_phdr PT_LOAD;
+  dram0_0_bss_phdr PT_LOAD;
+  dram1_0_phdr PT_LOAD;
+  dram1_0_bss_phdr PT_LOAD;
+  local_sram_0_phdr PT_LOAD;
+  local_sram_0_bss_phdr PT_LOAD;
+}
+
+
+/*  Default entry point:  */
+ENTRY(_ResetVector)
+
+
+/*  Memory boundary addresses:  */
+_memmap_mem_sram_start = 0x20000000;
+_memmap_mem_sram_end   = 0x20280000;
+_memmap_mem_dram0_start = 0xe0180000;
+_memmap_mem_dram0_end   = 0xe01a0000;
+_memmap_mem_dram1_start = 0xe01a0000;
+_memmap_mem_dram1_end   = 0xe01c0000;
+_memmap_mem_local_sram_start = 0xffa00000;
+_memmap_mem_local_sram_end   = 0xffb80000;
+
+/*  Memory segment boundary addresses:  */
+_memmap_seg_sram0_start = 0x20000000;
+_memmap_seg_sram0_max   = 0x20001000;
+_memmap_seg_sram1_start = 0x20001000;
+_memmap_seg_sram1_max   = 0x20280000;
+_memmap_seg_dram0_0_start = 0xe0180000;
+_memmap_seg_dram0_0_max   = 0xe01a0000;
+_memmap_seg_dram1_0_start = 0xe01a0000;
+_memmap_seg_dram1_0_max   = 0xe01c0000;
+_memmap_seg_local_sram_0_start = 0xffa00000;
+_memmap_seg_local_sram_0_max   = 0xffb80000;
+
+_rom_store_table = 0;
+PROVIDE(_memmap_reset_vector = 0x20000000);
+PROVIDE(_memmap_vecbase_reset = 0x20000000);
+/* Various memory-map dependent cache attribute settings: */
+_memmap_cacheattr_wb_base = 0x10000010;
+_memmap_cacheattr_wt_base = 0x30000030;
+_memmap_cacheattr_bp_base = 0x40000040;
+_memmap_cacheattr_unused_mask = 0x0FFFFF0F;
+_memmap_cacheattr_wb_trapnull = 0x14444410;
+_memmap_cacheattr_wba_trapnull = 0x14444410;
+_memmap_cacheattr_wbna_trapnull = 0x24444420;
+_memmap_cacheattr_wt_trapnull = 0x34444430;
+_memmap_cacheattr_bp_trapnull = 0x44444440;
+_memmap_cacheattr_wb_strict = 0x10000010;
+_memmap_cacheattr_wt_strict = 0x30000030;
+_memmap_cacheattr_bp_strict = 0x40000040;
+_memmap_cacheattr_wb_allvalid = 0x14444414;
+_memmap_cacheattr_wt_allvalid = 0x34444434;
+_memmap_cacheattr_bp_allvalid = 0x44444444;
+_memmap_region_map = 0x00000082;
+PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
+
+SECTIONS
+{
+
+  .DispatchVector.text : ALIGN(4)
+  {
+    _DispatchVector_text_start = ABSOLUTE(.);
+    KEEP (*(.DispatchVector.text))
+    . = ALIGN (4);
+    _DispatchVector_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .ResetVector.text : ALIGN(4)
+  {
+    _ResetVector_text_start = ABSOLUTE(.);
+    *(.ResetVector.text)
+    . = ALIGN (4);
+    _ResetVector_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .ResetHandler.text : ALIGN(4)
+  {
+    _ResetHandler_text_start = ABSOLUTE(.);
+    *(.ResetHandler.literal .ResetHandler.text)
+    . = ALIGN (4);
+    _ResetHandler_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .DispatchHandler.text : ALIGN(4)
+  {
+    _DispatchHandler_text_start = ABSOLUTE(.);
+    *(.DispatchHandler.literal .DispatchHandler.text)
+    . = ALIGN (4);
+    _DispatchHandler_text_end = ABSOLUTE(.);
+    _memmap_seg_sram0_end = ALIGN(0x8);
+  } >sram0_seg :sram0_phdr
+
+
+  .sram.rodata : ALIGN(4)
+  {
+    _sram_rodata_start = ABSOLUTE(.);
+    *(.sram.rodata)
+    . = ALIGN (4);
+    _sram_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.rodata : ALIGN(4)
+  {
+    _clib_rodata_start = ABSOLUTE(.);
+    *(.clib.rodata)
+    . = ALIGN (4);
+    _clib_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.rodata : ALIGN(4)
+  {
+    _rtos_rodata_start = ABSOLUTE(.);
+    *(.rtos.rodata)
+    . = ALIGN (4);
+    _rtos_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rodata : ALIGN(4)
+  {
+    _rodata_start = ABSOLUTE(.);
+    *(.rodata)
+    *(SORT(.rodata.sort.*))
+    KEEP (*(SORT(.rodata.keepsort.*) .rodata.keep.*))
+    *(.rodata.*)
+    *(.gnu.linkonce.r.*)
+    *(.rodata1)
+    __XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
+    KEEP (*(.xt_except_table))
+    KEEP (*(.gcc_except_table))
+    *(.gnu.linkonce.e.*)
+    *(.gnu.version_r)
+    KEEP (*(.eh_frame))
+    /*  C++ constructor and destructor tables, properly ordered:  */
+    KEEP (*crtbegin.o(.ctors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*(.ctors))
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*(.dtors))
+    /*  C++ exception handlers table:  */
+    __XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
+    *(.xt_except_desc)
+    *(.gnu.linkonce.h.*)
+    __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
+    *(.xt_except_desc_end)
+    *(.dynamic)
+    *(.gnu.version_d)
+    . = ALIGN(4);		/* this table MUST be 4-byte aligned */
+    _bss_table_start = ABSOLUTE(.);
+    LONG(_bss_start)
+    LONG(_bss_end)
+    LONG(_dram0_bss_start)
+    LONG(_dram0_bss_end)
+    LONG(_dram1_bss_start)
+    LONG(_dram1_bss_end)
+    LONG(_local_sram_bss_start)
+    LONG(_local_sram_bss_end)
+    _bss_table_end = ABSOLUTE(.);
+    . = ALIGN (4);
+    _rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .sram.text : ALIGN(4)
+  {
+    _sram_text_start = ABSOLUTE(.);
+    *(.sram.literal .sram.text)
+    . = ALIGN (4);
+    _sram_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .text : ALIGN(4)
+  {
+    _stext = .;
+    _text_start = ABSOLUTE(.);
+    *(.entry.text)
+    *(.init.literal)
+    KEEP(*(.init))
+    *(.literal.sort.* SORT(.text.sort.*))
+    KEEP (*(.literal.keepsort.* SORT(.text.keepsort.*) .literal.keep.* .text.keep.* .literal.*personality* .text.*personality*))
+    *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
+    *(.fini.literal)
+    KEEP(*(.fini))
+    *(.gnu.version)
+    . = ALIGN (4);
+    _text_end = ABSOLUTE(.);
+    _etext = .;
+  } >sram1_seg :sram1_phdr
+
+  .clib.text : ALIGN(4)
+  {
+    _clib_text_start = ABSOLUTE(.);
+    *(.clib.literal .clib.text)
+    . = ALIGN (4);
+    _clib_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.text : ALIGN(4)
+  {
+    _rtos_text_start = ABSOLUTE(.);
+    *(.rtos.literal .rtos.text)
+    . = ALIGN (4);
+    _rtos_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.data : ALIGN(4)
+  {
+    _clib_data_start = ABSOLUTE(.);
+    *(.clib.data)
+    . = ALIGN (4);
+    _clib_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.percpu.data : ALIGN(4)
+  {
+    _clib_percpu_data_start = ABSOLUTE(.);
+    *(.clib.percpu.data)
+    . = ALIGN (4);
+    _clib_percpu_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.percpu.data : ALIGN(4)
+  {
+    _rtos_percpu_data_start = ABSOLUTE(.);
+    *(.rtos.percpu.data)
+    . = ALIGN (4);
+    _rtos_percpu_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.data : ALIGN(4)
+  {
+    _rtos_data_start = ABSOLUTE(.);
+    *(.rtos.data)
+    . = ALIGN (4);
+    _rtos_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .sram.data : ALIGN(4)
+  {
+    _sram_data_start = ABSOLUTE(.);
+    *(.sram.data)
+    . = ALIGN (4);
+    _sram_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .data : ALIGN(4)
+  {
+    _data_start = ABSOLUTE(.);
+    *(.data)
+    *(SORT(.data.sort.*))
+    KEEP (*(SORT(.data.keepsort.*) .data.keep.*))
+    *(.data.*)
+    *(.gnu.linkonce.d.*)
+    KEEP(*(.gnu.linkonce.d.*personality*))
+    *(.data1)
+    *(.sdata)
+    *(.sdata.*)
+    *(.gnu.linkonce.s.*)
+    *(.sdata2)
+    *(.sdata2.*)
+    *(.gnu.linkonce.s2.*)
+    KEEP(*(.jcr))
+    *(__llvm_prf_cnts)
+    *(__llvm_prf_data)
+    *(__llvm_prf_vnds)
+    . = ALIGN (4);
+    _data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  __llvm_prf_names : ALIGN(4)
+  {
+    __llvm_prf_names_start = ABSOLUTE(.);
+    *(__llvm_prf_names)
+    . = ALIGN (4);
+    __llvm_prf_names_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _bss_start = ABSOLUTE(.);
+    *(.dynsbss)
+    *(.sbss)
+    *(.sbss.*)
+    *(.gnu.linkonce.sb.*)
+    *(.scommon)
+    *(.sbss2)
+    *(.sbss2.*)
+    *(.gnu.linkonce.sb2.*)
+    *(.dynbss)
+    *(.bss)
+    *(SORT(.bss.sort.*))
+    KEEP (*(SORT(.bss.keepsort.*) .bss.keep.*))
+    *(.bss.*)
+    *(.gnu.linkonce.b.*)
+    *(COMMON)
+    *(.clib.bss)
+    *(.clib.percpu.bss)
+    *(.rtos.percpu.bss)
+    *(.rtos.bss)
+    *(.sram.bss)
+    *(.debug.bss)
+    . = ALIGN (8);
+    _bss_end = ABSOLUTE(.);
+    _end = ALIGN(0x8);
+    PROVIDE(end = ALIGN(0x8));
+    _memmap_seg_sram1_end = ALIGN(0x8);
+  } >sram1_seg :sram1_bss_phdr
+
+  _heap_sentry = 0x20280000;
+  _memmap_mem_sram_max = ABSOLUTE(.);
+
+  .dram0.rodata : ALIGN(4)
+  {
+    _dram0_rodata_start = ABSOLUTE(.);
+    *(.dram0.rodata)
+    . = ALIGN (4);
+    _dram0_rodata_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.data : ALIGN(4)
+  {
+    _dram0_data_start = ABSOLUTE(.);
+    *(.dram0.data)
+    . = ALIGN (4);
+    _dram0_data_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dram0_bss_start = ABSOLUTE(.);
+    *(.dram0.bss)
+    *(.dram0_user.bss)
+    . = ALIGN (8);
+    _dram0_bss_end = ABSOLUTE(.);
+    _memmap_seg_dram0_0_end = ALIGN(0x8);
+  } >dram0_0_seg :dram0_0_bss_phdr
+
+  _memmap_mem_dram0_max = ABSOLUTE(.);
+
+  .dram1.rodata : ALIGN(4)
+  {
+    _dram1_rodata_start = ABSOLUTE(.);
+    *(.dram1.rodata)
+    . = ALIGN (4);
+    _dram1_rodata_end = ABSOLUTE(.);
+  } >dram1_0_seg :dram1_0_phdr
+
+  .dram1.data : ALIGN(4)
+  {
+    _dram1_data_start = ABSOLUTE(.);
+    *(.dram1.data)
+    . = ALIGN (4);
+    _dram1_data_end = ABSOLUTE(.);
+  } >dram1_0_seg :dram1_0_phdr
+
+  .dram1.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dram1_bss_start = ABSOLUTE(.);
+    *(.dram1.bss)
+    *(.dram1_user.bss)
+    . = ALIGN (8);
+    _dram1_bss_end = ABSOLUTE(.);
+    _stack_sentry = ALIGN(0x8);
+    _memmap_seg_dram1_0_end = ALIGN(0x8);
+  } >dram1_0_seg :dram1_0_bss_phdr
+
+  PROVIDE(__stack = 0xe01c0000);
+  _isb_default = 0xe01bfe10;
+  _memmap_mem_dram1_max = ABSOLUTE(.);
+
+  .local_sram.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _local_sram_bss_start = ABSOLUTE(.);
+    *(.local_sram.bss)
+    . = ALIGN (8);
+    _local_sram_bss_end = ABSOLUTE(.);
+    _memmap_seg_local_sram_0_end = ALIGN(0x8);
+  } >local_sram_0_seg :local_sram_0_bss_phdr
+
+
+  _memmap_mem_local_sram_max = ABSOLUTE(.);
+
+  .debug  0 :  { *(.debug) }
+  .line  0 :  { *(.line) }
+  .debug_srcinfo  0 :  { *(.debug_srcinfo) }
+  .debug_sfnames  0 :  { *(.debug_sfnames) }
+  .debug_aranges  0 :  { *(.debug_aranges) }
+  .debug_pubnames  0 :  { *(.debug_pubnames) }
+  .debug_info  0 :  { *(.debug_info) }
+  .debug_abbrev  0 :  { *(.debug_abbrev) }
+  .debug_line  0 :  { *(.debug_line) }
+  .debug_frame  0 :  { *(.debug_frame) }
+  .debug_str  0 :  { *(.debug_str) }
+  .debug_loc  0 :  { *(.debug_loc) }
+  .debug_macinfo  0 :  { *(.debug_macinfo) }
+  .debug_weaknames  0 :  { *(.debug_weaknames) }
+  .debug_funcnames  0 :  { *(.debug_funcnames) }
+  .debug_typenames  0 :  { *(.debug_typenames) }
+  .debug_varnames  0 :  { *(.debug_varnames) }
+  .xt.insn 0 :
+  {
+    KEEP (*(.xt.insn))
+    KEEP (*(.gnu.linkonce.x.*))
+  }
+  .xt.prop 0 :
+  {
+    KEEP (*(.xt.prop))
+    KEEP (*(.xt.prop.*))
+    KEEP (*(.gnu.linkonce.prop.*))
+  }
+  .xt.lit 0 :
+  {
+    KEEP (*(.xt.lit))
+    KEEP (*(.xt.lit.*))
+    KEEP (*(.gnu.linkonce.p.*))
+  }
+  .debug.xt.callgraph 0 :
+  {
+    KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
+  }
+}
+

+ 444 - 0
LSP/min-rt_core0_stack_tcm1/ldscripts/elf32xtensa.xn

@@ -0,0 +1,444 @@
+/* This linker script generated from xt-genldscripts.tpp for LSP C:\Users\DELL\workspace\CSI_DSP_FW\LSP\min-rt_core0_stack_tcm1 */
+/* Linker Script for ld -n */
+MEMORY
+{
+  sram0_seg :                         	org = 0x20000000, len = 0x1000
+  sram1_seg :                         	org = 0x20001000, len = 0x27F000
+  dram0_0_seg :                       	org = 0xE0180000, len = 0x20000
+  dram1_0_seg :                       	org = 0xE01A0000, len = 0x20000
+  local_sram_0_seg :                  	org = 0xFFA00000, len = 0x180000
+}
+
+PHDRS
+{
+  sram0_phdr PT_LOAD;
+  sram1_phdr PT_LOAD;
+  sram1_bss_phdr PT_LOAD;
+  dram0_0_phdr PT_LOAD;
+  dram0_0_bss_phdr PT_LOAD;
+  dram1_0_phdr PT_LOAD;
+  dram1_0_bss_phdr PT_LOAD;
+  local_sram_0_phdr PT_LOAD;
+  local_sram_0_bss_phdr PT_LOAD;
+}
+
+
+/*  Default entry point:  */
+ENTRY(_ResetVector)
+
+
+/*  Memory boundary addresses:  */
+_memmap_mem_sram_start = 0x20000000;
+_memmap_mem_sram_end   = 0x20280000;
+_memmap_mem_dram0_start = 0xe0180000;
+_memmap_mem_dram0_end   = 0xe01a0000;
+_memmap_mem_dram1_start = 0xe01a0000;
+_memmap_mem_dram1_end   = 0xe01c0000;
+_memmap_mem_local_sram_start = 0xffa00000;
+_memmap_mem_local_sram_end   = 0xffb80000;
+
+/*  Memory segment boundary addresses:  */
+_memmap_seg_sram0_start = 0x20000000;
+_memmap_seg_sram0_max   = 0x20001000;
+_memmap_seg_sram1_start = 0x20001000;
+_memmap_seg_sram1_max   = 0x20280000;
+_memmap_seg_dram0_0_start = 0xe0180000;
+_memmap_seg_dram0_0_max   = 0xe01a0000;
+_memmap_seg_dram1_0_start = 0xe01a0000;
+_memmap_seg_dram1_0_max   = 0xe01c0000;
+_memmap_seg_local_sram_0_start = 0xffa00000;
+_memmap_seg_local_sram_0_max   = 0xffb80000;
+
+_rom_store_table = 0;
+PROVIDE(_memmap_reset_vector = 0x20000000);
+PROVIDE(_memmap_vecbase_reset = 0x20000000);
+/* Various memory-map dependent cache attribute settings: */
+_memmap_cacheattr_wb_base = 0x10000010;
+_memmap_cacheattr_wt_base = 0x30000030;
+_memmap_cacheattr_bp_base = 0x40000040;
+_memmap_cacheattr_unused_mask = 0x0FFFFF0F;
+_memmap_cacheattr_wb_trapnull = 0x14444410;
+_memmap_cacheattr_wba_trapnull = 0x14444410;
+_memmap_cacheattr_wbna_trapnull = 0x24444420;
+_memmap_cacheattr_wt_trapnull = 0x34444430;
+_memmap_cacheattr_bp_trapnull = 0x44444440;
+_memmap_cacheattr_wb_strict = 0x10000010;
+_memmap_cacheattr_wt_strict = 0x30000030;
+_memmap_cacheattr_bp_strict = 0x40000040;
+_memmap_cacheattr_wb_allvalid = 0x14444414;
+_memmap_cacheattr_wt_allvalid = 0x34444434;
+_memmap_cacheattr_bp_allvalid = 0x44444444;
+_memmap_region_map = 0x00000082;
+PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
+
+SECTIONS
+{
+
+  .DispatchVector.text : ALIGN(4)
+  {
+    _DispatchVector_text_start = ABSOLUTE(.);
+    KEEP (*(.DispatchVector.text))
+    . = ALIGN (4);
+    _DispatchVector_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .ResetVector.text : ALIGN(4)
+  {
+    _ResetVector_text_start = ABSOLUTE(.);
+    *(.ResetVector.text)
+    . = ALIGN (4);
+    _ResetVector_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .ResetHandler.text : ALIGN(4)
+  {
+    _ResetHandler_text_start = ABSOLUTE(.);
+    *(.ResetHandler.literal .ResetHandler.text)
+    . = ALIGN (4);
+    _ResetHandler_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .DispatchHandler.text : ALIGN(4)
+  {
+    _DispatchHandler_text_start = ABSOLUTE(.);
+    *(.DispatchHandler.literal .DispatchHandler.text)
+    . = ALIGN (4);
+    _DispatchHandler_text_end = ABSOLUTE(.);
+    _memmap_seg_sram0_end = ALIGN(0x8);
+  } >sram0_seg :sram0_phdr
+
+
+  .sram.rodata : ALIGN(4)
+  {
+    _sram_rodata_start = ABSOLUTE(.);
+    *(.sram.rodata)
+    . = ALIGN (4);
+    _sram_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.rodata : ALIGN(4)
+  {
+    _clib_rodata_start = ABSOLUTE(.);
+    *(.clib.rodata)
+    . = ALIGN (4);
+    _clib_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.rodata : ALIGN(4)
+  {
+    _rtos_rodata_start = ABSOLUTE(.);
+    *(.rtos.rodata)
+    . = ALIGN (4);
+    _rtos_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rodata : ALIGN(4)
+  {
+    _rodata_start = ABSOLUTE(.);
+    *(.rodata)
+    *(SORT(.rodata.sort.*))
+    KEEP (*(SORT(.rodata.keepsort.*) .rodata.keep.*))
+    *(.rodata.*)
+    *(.gnu.linkonce.r.*)
+    *(.rodata1)
+    __XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
+    KEEP (*(.xt_except_table))
+    KEEP (*(.gcc_except_table))
+    *(.gnu.linkonce.e.*)
+    *(.gnu.version_r)
+    KEEP (*(.eh_frame))
+    /*  C++ constructor and destructor tables, properly ordered:  */
+    KEEP (*crtbegin.o(.ctors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*(.ctors))
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*(.dtors))
+    /*  C++ exception handlers table:  */
+    __XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
+    *(.xt_except_desc)
+    *(.gnu.linkonce.h.*)
+    __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
+    *(.xt_except_desc_end)
+    *(.dynamic)
+    *(.gnu.version_d)
+    . = ALIGN(4);		/* this table MUST be 4-byte aligned */
+    _bss_table_start = ABSOLUTE(.);
+    LONG(_bss_start)
+    LONG(_bss_end)
+    LONG(_dram0_bss_start)
+    LONG(_dram0_bss_end)
+    LONG(_dram1_bss_start)
+    LONG(_dram1_bss_end)
+    LONG(_local_sram_bss_start)
+    LONG(_local_sram_bss_end)
+    _bss_table_end = ABSOLUTE(.);
+    . = ALIGN (4);
+    _rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .sram.text : ALIGN(4)
+  {
+    _sram_text_start = ABSOLUTE(.);
+    *(.sram.literal .sram.text)
+    . = ALIGN (4);
+    _sram_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .text : ALIGN(4)
+  {
+    _stext = .;
+    _text_start = ABSOLUTE(.);
+    *(.entry.text)
+    *(.init.literal)
+    KEEP(*(.init))
+    *(.literal.sort.* SORT(.text.sort.*))
+    KEEP (*(.literal.keepsort.* SORT(.text.keepsort.*) .literal.keep.* .text.keep.* .literal.*personality* .text.*personality*))
+    *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
+    *(.fini.literal)
+    KEEP(*(.fini))
+    *(.gnu.version)
+    . = ALIGN (4);
+    _text_end = ABSOLUTE(.);
+    _etext = .;
+  } >sram1_seg :sram1_phdr
+
+  .clib.text : ALIGN(4)
+  {
+    _clib_text_start = ABSOLUTE(.);
+    *(.clib.literal .clib.text)
+    . = ALIGN (4);
+    _clib_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.text : ALIGN(4)
+  {
+    _rtos_text_start = ABSOLUTE(.);
+    *(.rtos.literal .rtos.text)
+    . = ALIGN (4);
+    _rtos_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.data : ALIGN(4)
+  {
+    _clib_data_start = ABSOLUTE(.);
+    *(.clib.data)
+    . = ALIGN (4);
+    _clib_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.percpu.data : ALIGN(4)
+  {
+    _clib_percpu_data_start = ABSOLUTE(.);
+    *(.clib.percpu.data)
+    . = ALIGN (4);
+    _clib_percpu_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.percpu.data : ALIGN(4)
+  {
+    _rtos_percpu_data_start = ABSOLUTE(.);
+    *(.rtos.percpu.data)
+    . = ALIGN (4);
+    _rtos_percpu_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.data : ALIGN(4)
+  {
+    _rtos_data_start = ABSOLUTE(.);
+    *(.rtos.data)
+    . = ALIGN (4);
+    _rtos_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .sram.data : ALIGN(4)
+  {
+    _sram_data_start = ABSOLUTE(.);
+    *(.sram.data)
+    . = ALIGN (4);
+    _sram_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .data : ALIGN(4)
+  {
+    _data_start = ABSOLUTE(.);
+    *(.data)
+    *(SORT(.data.sort.*))
+    KEEP (*(SORT(.data.keepsort.*) .data.keep.*))
+    *(.data.*)
+    *(.gnu.linkonce.d.*)
+    KEEP(*(.gnu.linkonce.d.*personality*))
+    *(.data1)
+    *(.sdata)
+    *(.sdata.*)
+    *(.gnu.linkonce.s.*)
+    *(.sdata2)
+    *(.sdata2.*)
+    *(.gnu.linkonce.s2.*)
+    KEEP(*(.jcr))
+    *(__llvm_prf_cnts)
+    *(__llvm_prf_data)
+    *(__llvm_prf_vnds)
+    . = ALIGN (4);
+    _data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  __llvm_prf_names : ALIGN(4)
+  {
+    __llvm_prf_names_start = ABSOLUTE(.);
+    *(__llvm_prf_names)
+    . = ALIGN (4);
+    __llvm_prf_names_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _bss_start = ABSOLUTE(.);
+    *(.dynsbss)
+    *(.sbss)
+    *(.sbss.*)
+    *(.gnu.linkonce.sb.*)
+    *(.scommon)
+    *(.sbss2)
+    *(.sbss2.*)
+    *(.gnu.linkonce.sb2.*)
+    *(.dynbss)
+    *(.bss)
+    *(SORT(.bss.sort.*))
+    KEEP (*(SORT(.bss.keepsort.*) .bss.keep.*))
+    *(.bss.*)
+    *(.gnu.linkonce.b.*)
+    *(COMMON)
+    *(.clib.bss)
+    *(.clib.percpu.bss)
+    *(.rtos.percpu.bss)
+    *(.rtos.bss)
+    *(.sram.bss)
+    *(.debug.bss)
+    . = ALIGN (8);
+    _bss_end = ABSOLUTE(.);
+    _end = ALIGN(0x8);
+    PROVIDE(end = ALIGN(0x8));
+    _memmap_seg_sram1_end = ALIGN(0x8);
+  } >sram1_seg :sram1_bss_phdr
+
+  _heap_sentry = 0x20280000;
+  _memmap_mem_sram_max = ABSOLUTE(.);
+
+  .dram0.rodata : ALIGN(4)
+  {
+    _dram0_rodata_start = ABSOLUTE(.);
+    *(.dram0.rodata)
+    . = ALIGN (4);
+    _dram0_rodata_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.data : ALIGN(4)
+  {
+    _dram0_data_start = ABSOLUTE(.);
+    *(.dram0.data)
+    . = ALIGN (4);
+    _dram0_data_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dram0_bss_start = ABSOLUTE(.);
+    *(.dram0.bss)
+    *(.dram0_user.bss)
+    . = ALIGN (8);
+    _dram0_bss_end = ABSOLUTE(.);
+    _memmap_seg_dram0_0_end = ALIGN(0x8);
+  } >dram0_0_seg :dram0_0_bss_phdr
+
+  _memmap_mem_dram0_max = ABSOLUTE(.);
+
+  .dram1.rodata : ALIGN(4)
+  {
+    _dram1_rodata_start = ABSOLUTE(.);
+    *(.dram1.rodata)
+    . = ALIGN (4);
+    _dram1_rodata_end = ABSOLUTE(.);
+  } >dram1_0_seg :dram1_0_phdr
+
+  .dram1.data : ALIGN(4)
+  {
+    _dram1_data_start = ABSOLUTE(.);
+    *(.dram1.data)
+    . = ALIGN (4);
+    _dram1_data_end = ABSOLUTE(.);
+  } >dram1_0_seg :dram1_0_phdr
+
+  .dram1.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dram1_bss_start = ABSOLUTE(.);
+    *(.dram1.bss)
+    *(.dram1_user.bss)
+    . = ALIGN (8);
+    _dram1_bss_end = ABSOLUTE(.);
+    _stack_sentry = ALIGN(0x8);
+    _memmap_seg_dram1_0_end = ALIGN(0x8);
+  } >dram1_0_seg :dram1_0_bss_phdr
+
+  PROVIDE(__stack = 0xe01c0000);
+  _isb_default = 0xe01bfe10;
+  _memmap_mem_dram1_max = ABSOLUTE(.);
+
+  .local_sram.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _local_sram_bss_start = ABSOLUTE(.);
+    *(.local_sram.bss)
+    . = ALIGN (8);
+    _local_sram_bss_end = ABSOLUTE(.);
+    _memmap_seg_local_sram_0_end = ALIGN(0x8);
+  } >local_sram_0_seg :local_sram_0_bss_phdr
+
+
+  _memmap_mem_local_sram_max = ABSOLUTE(.);
+
+  .debug  0 :  { *(.debug) }
+  .line  0 :  { *(.line) }
+  .debug_srcinfo  0 :  { *(.debug_srcinfo) }
+  .debug_sfnames  0 :  { *(.debug_sfnames) }
+  .debug_aranges  0 :  { *(.debug_aranges) }
+  .debug_pubnames  0 :  { *(.debug_pubnames) }
+  .debug_info  0 :  { *(.debug_info) }
+  .debug_abbrev  0 :  { *(.debug_abbrev) }
+  .debug_line  0 :  { *(.debug_line) }
+  .debug_frame  0 :  { *(.debug_frame) }
+  .debug_str  0 :  { *(.debug_str) }
+  .debug_loc  0 :  { *(.debug_loc) }
+  .debug_macinfo  0 :  { *(.debug_macinfo) }
+  .debug_weaknames  0 :  { *(.debug_weaknames) }
+  .debug_funcnames  0 :  { *(.debug_funcnames) }
+  .debug_typenames  0 :  { *(.debug_typenames) }
+  .debug_varnames  0 :  { *(.debug_varnames) }
+  .xt.insn 0 :
+  {
+    KEEP (*(.xt.insn))
+    KEEP (*(.gnu.linkonce.x.*))
+  }
+  .xt.prop 0 :
+  {
+    KEEP (*(.xt.prop))
+    KEEP (*(.xt.prop.*))
+    KEEP (*(.gnu.linkonce.prop.*))
+  }
+  .xt.lit 0 :
+  {
+    KEEP (*(.xt.lit))
+    KEEP (*(.xt.lit.*))
+    KEEP (*(.gnu.linkonce.p.*))
+  }
+  .debug.xt.callgraph 0 :
+  {
+    KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
+  }
+}
+

+ 61 - 0
LSP/min-rt_core0_stack_tcm1/ldscripts/elf32xtensa.xr

@@ -0,0 +1,61 @@
+/* This linker script generated from xt-genldscripts.tpp for LSP C:\Users\DELL\workspace\CSI_DSP_FW\LSP\min-rt_core0_stack_tcm1 */
+/* Linker Script for ld -r or ld -i */
+
+
+SECTIONS
+{
+
+  .text 0 :
+  {
+    *(.literal .text)
+  }
+
+  .bss 0 :
+  {
+    *(.dynsbss)
+    *(.sbss)
+    *(.scommon)
+    *(.dynbss)
+    *(.bss)
+    *(COMMON)
+  }
+  .debug  0 :  { *(.debug) }
+  .line  0 :  { *(.line) }
+  .debug_srcinfo  0 :  { *(.debug_srcinfo) }
+  .debug_sfnames  0 :  { *(.debug_sfnames) }
+  .debug_aranges  0 :  { *(.debug_aranges) }
+  .debug_pubnames  0 :  { *(.debug_pubnames) }
+  .debug_info  0 :  { *(.debug_info) }
+  .debug_abbrev  0 :  { *(.debug_abbrev) }
+  .debug_line  0 :  { *(.debug_line) }
+  .debug_frame  0 :  { *(.debug_frame) }
+  .debug_str  0 :  { *(.debug_str) }
+  .debug_loc  0 :  { *(.debug_loc) }
+  .debug_macinfo  0 :  { *(.debug_macinfo) }
+  .debug_weaknames  0 :  { *(.debug_weaknames) }
+  .debug_funcnames  0 :  { *(.debug_funcnames) }
+  .debug_typenames  0 :  { *(.debug_typenames) }
+  .debug_varnames  0 :  { *(.debug_varnames) }
+  .xt.insn 0 :
+  {
+    KEEP (*(.xt.insn))
+    KEEP (*(.gnu.linkonce.x.*))
+  }
+  .xt.prop 0 :
+  {
+    KEEP (*(.xt.prop))
+    KEEP (*(.xt.prop.*))
+    KEEP (*(.gnu.linkonce.prop.*))
+  }
+  .xt.lit 0 :
+  {
+    KEEP (*(.xt.lit))
+    KEEP (*(.xt.lit.*))
+    KEEP (*(.gnu.linkonce.p.*))
+  }
+  .debug.xt.callgraph 0 :
+  {
+    KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
+  }
+}
+

+ 61 - 0
LSP/min-rt_core0_stack_tcm1/ldscripts/elf32xtensa.xu

@@ -0,0 +1,61 @@
+/* This linker script generated from xt-genldscripts.tpp for LSP C:\Users\DELL\workspace\CSI_DSP_FW\LSP\min-rt_core0_stack_tcm1 */
+/* Linker Script for ld -Ur */
+
+
+SECTIONS
+{
+
+  .text 0 :
+  {
+    *(.literal .text)
+  }
+
+  .bss 0 :
+  {
+    *(.dynsbss)
+    *(.sbss)
+    *(.scommon)
+    *(.dynbss)
+    *(.bss)
+    *(COMMON)
+  }
+  .debug  0 :  { *(.debug) }
+  .line  0 :  { *(.line) }
+  .debug_srcinfo  0 :  { *(.debug_srcinfo) }
+  .debug_sfnames  0 :  { *(.debug_sfnames) }
+  .debug_aranges  0 :  { *(.debug_aranges) }
+  .debug_pubnames  0 :  { *(.debug_pubnames) }
+  .debug_info  0 :  { *(.debug_info) }
+  .debug_abbrev  0 :  { *(.debug_abbrev) }
+  .debug_line  0 :  { *(.debug_line) }
+  .debug_frame  0 :  { *(.debug_frame) }
+  .debug_str  0 :  { *(.debug_str) }
+  .debug_loc  0 :  { *(.debug_loc) }
+  .debug_macinfo  0 :  { *(.debug_macinfo) }
+  .debug_weaknames  0 :  { *(.debug_weaknames) }
+  .debug_funcnames  0 :  { *(.debug_funcnames) }
+  .debug_typenames  0 :  { *(.debug_typenames) }
+  .debug_varnames  0 :  { *(.debug_varnames) }
+  .xt.insn 0 :
+  {
+    KEEP (*(.xt.insn))
+    KEEP (*(.gnu.linkonce.x.*))
+  }
+  .xt.prop 0 :
+  {
+    KEEP (*(.xt.prop))
+    KEEP (*(.xt.prop.*))
+    KEEP (*(.gnu.linkonce.prop.*))
+  }
+  .xt.lit 0 :
+  {
+    KEEP (*(.xt.lit))
+    KEEP (*(.xt.lit.*))
+    KEEP (*(.gnu.linkonce.p.*))
+  }
+  .debug.xt.callgraph 0 :
+  {
+    KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
+  }
+}
+

BIN
LSP/min-rt_core0_stack_tcm1/ldscripts/libminrt.a


BIN
LSP/min-rt_core0_stack_tcm1/libminrt.a


+ 77 - 0
LSP/min-rt_core0_stack_tcm1/memmap.xmm

@@ -0,0 +1,77 @@
+//  Memory map file to generate linker scripts for programs without board I/O.
+
+// Customer ID=16470; Build=0x8e648; Copyright (c) 2004-2015 Cadence Design Systems, Inc.
+//
+// Permission is hereby granted, free of charge, to any person obtaining
+// a copy of this software and associated documentation files (the
+// "Software"), to deal in the Software without restriction, including
+// without limitation the rights to use, copy, modify, merge, publish,
+// distribute, sublicense, and/or sell copies of the Software, and to
+// permit persons to whom the Software is furnished to do so, subject to
+// the following conditions:
+//
+// The above copyright notice and this permission notice shall be included
+// in all copies or substantial portions of the Software.
+//
+// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+// EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+// IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+// CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+// TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+// SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+
+//  Place stack in local RAM:
+PLACE SECTIONS(STACK) WITH_SECTION(.dram1.bss)
+// A memory map is a sequence of memory descriptions and
+// optional parameter assignments.
+//
+// Each memory description has the following format:
+//   BEGIN <name>
+//     <addr> [,<paddr>] : <mem-type> : <mem-name> : <size> [,<psize>]
+//                       : [writable] [,executable] [,device] ;
+//     <segment>*
+//   END <name>
+//
+// where each <segment> description has the following format:
+//     <seg-name> : F|C : <start-addr> - <end-addr> [ : STACK ] [ : HEAP ]
+//                : <section-name>* ;
+//
+// Each parameter assignment is a keyword/value pair in the following format:
+//   <keyword> = <value>                (no spaces in <value>)
+// or
+//   <keyword> = "<value>"              (spaces allowed in <value>)
+//
+// The following primitives are also defined:
+//   PLACE SECTIONS( <section-name>* ) { WITH_SECTION(<section-name>)
+//                                       | IN_SEGMENT(<seg-name>) }
+//
+//   NOLOAD <section-name1> [ <section-name2> ... ]
+//
+// Please refer to the Xtensa LSP Reference Manual for more details.
+//
+VECSELECT=1
+VECRESET=0x20000000
+VECBASE= 0x20000000
+
+BEGIN sram
+0x20000000: extra_mem : sram : 0x00280000 : executable, writable ;
+ sram0 : F : 0x20000000 - 0x20000fff : .DispatchVector.text .ResetVector.text .ResetHandler.literal .ResetHandler.text .DispatchHandler.literal .DispatchHandler.text;
+ sram1 : C : 0x20001000 - 0x2027ffff :  HEAP : .sram.rodata .clib.rodata .rtos.rodata .rodata .sram.literal .literal .rtos.literal .clib.literal .sram.text .text .clib.text .rtos.text .clib.data .clib.percpu.data .rtos.percpu.data .rtos.data .sram.data .data __llvm_prf_names .clib.bss .clib.percpu.bss .rtos.percpu.bss .rtos.bss .sram.bss .bss .debug.bss;
+ END sram
+
+BEGIN dram0
+0xe0180000: dataRam : dram0 : 0x20000 : writable ;
+ dram0_0 : C : 0xe0180000 - 0xe019ffff :.dram0.rodata .dram0.data .dram0.bss .dram0_user.bss;
+END dram0
+
+BEGIN dram1
+0xe01a0000: dataRam : dram1 : 0x20000 : writable ;
+ dram1_0 : C : 0xe01a0000 - 0xe01bffff :STACK :.dram1.rodata .dram1.data .dram1.bss .dram1_user.bss;
+END dram1
+
+BEGIN local_sram
+0xffa00000: sysram : local_sram :   0x180000: writable ;
+  local_sram_0 : C : 0xffa00000 - 0xffb7ffff :.local_sram.bss ;
+ END local_sram
+

+ 36 - 0
LSP/min-rt_core0_stack_tcm1/specs

@@ -0,0 +1,36 @@
+# Customer ID=16470; Build=0x8e648; Copyright (c) 2001-2015 Cadence Design Systems, Inc.
+#
+# Permission is hereby granted, free of charge, to any person obtaining
+# a copy of this software and associated documentation files (the
+# "Software"), to deal in the Software without restriction, including
+# without limitation the rights to use, copy, modify, merge, publish,
+# distribute, sublicense, and/or sell copies of the Software, and to
+# permit persons to whom the Software is furnished to do so, subject to
+# the following conditions:
+#
+# The above copyright notice and this permission notice shall be included
+# in all copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+# IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+# CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+# TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+# SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+
+
+# The %O suffix on the start and end files indicates that the system's
+# standard suffix for object files (e.g., ".o") should be appended.
+# The %s suffix tells the compiler driver to search for the file in the
+# list of known locations for startfiles.
+
+*startfile:
+crt1-boards%O%s crti%O%s crtbegin%O%s _sharedvectors%O%s _vectors%O%s
+
+*endfile:
+crtend%O%s crtn%O%s
+
+*lib:
+-lc -lgloss  -lc -lhandler-reset -lhandlers-board  -lhal -lc
+

+ 528 - 0
LSP/min-rt_core1_lib0_stack_tcm1/ldscripts/elf32xtensa.x

@@ -0,0 +1,528 @@
+/* This linker script generated from xt-genldscripts.tpp for LSP C:\Users\DELL\workspace\CSI_DSP_FW\LSP\min-rt_core1_lib0_stack_tcm1 */
+/* Linker Script for default link */
+MEMORY
+{
+  sram0_seg :                         	org = 0x20400000, len = 0x1000
+  sram1_seg :                         	org = 0x20401000, len = 0x1FF000
+  sram2_seg :                         	org = 0x20600000, len = 0x40000
+  sram3_seg :                         	org = 0x20640000, len = 0x40000
+  dram0_0_seg :                       	org = 0xE0182800, len = 0x1D800
+  dram1_0_seg :                       	org = 0xE01A2800, len = 0x1D800
+  local_sram_0_seg :                  	org = 0xFFA00000, len = 0x180000
+}
+
+PHDRS
+{
+  sram0_phdr PT_LOAD;
+  sram1_phdr PT_LOAD;
+  sram1_bss_phdr PT_LOAD;
+  sram2_phdr PT_LOAD;
+  sram2_bss_phdr PT_LOAD;
+  sram3_phdr PT_LOAD;
+  sram3_bss_phdr PT_LOAD;
+  dram0_0_phdr PT_LOAD;
+  dram0_0_bss_phdr PT_LOAD;
+  dram1_0_phdr PT_LOAD;
+  dram1_0_bss_phdr PT_LOAD;
+  local_sram_0_phdr PT_LOAD;
+  local_sram_0_bss_phdr PT_LOAD;
+}
+
+
+/*  Default entry point:  */
+ENTRY(_libinit)
+
+
+/*  Memory boundary addresses:  */
+_memmap_mem_sram_start = 0x20400000;
+_memmap_mem_sram_end   = 0x20680000;
+_memmap_mem_dram0_start = 0xe0180000;
+_memmap_mem_dram0_end   = 0xe01a0000;
+_memmap_mem_dram1_start = 0xe01a0000;
+_memmap_mem_dram1_end   = 0xe01c0000;
+_memmap_mem_local_sram_start = 0xffa00000;
+_memmap_mem_local_sram_end   = 0xffb80000;
+
+/*  Memory segment boundary addresses:  */
+_memmap_seg_sram0_start = 0x20400000;
+_memmap_seg_sram0_max   = 0x20401000;
+_memmap_seg_sram1_start = 0x20401000;
+_memmap_seg_sram1_max   = 0x20600000;
+_memmap_seg_sram2_start = 0x20600000;
+_memmap_seg_sram2_max   = 0x20640000;
+_memmap_seg_sram3_start = 0x20640000;
+_memmap_seg_sram3_max   = 0x20680000;
+_memmap_seg_dram0_0_start = 0xe0182800;
+_memmap_seg_dram0_0_max   = 0xe01a0000;
+_memmap_seg_dram1_0_start = 0xe01a2800;
+_memmap_seg_dram1_0_max   = 0xe01c0000;
+_memmap_seg_local_sram_0_start = 0xffa00000;
+_memmap_seg_local_sram_0_max   = 0xffb80000;
+
+_rom_store_table = 0;
+PROVIDE(_memmap_reset_vector = 0x20400000);
+PROVIDE(_memmap_vecbase_reset = 0x20400000);
+/* Various memory-map dependent cache attribute settings: */
+_memmap_cacheattr_wb_base = 0x10000010;
+_memmap_cacheattr_wt_base = 0x30000030;
+_memmap_cacheattr_bp_base = 0x40000040;
+_memmap_cacheattr_unused_mask = 0x0FFFFF0F;
+_memmap_cacheattr_wb_trapnull = 0x14444411;
+_memmap_cacheattr_wba_trapnull = 0x14444410;
+_memmap_cacheattr_wbna_trapnull = 0x24444420;
+_memmap_cacheattr_wt_trapnull = 0x34444430;
+_memmap_cacheattr_bp_trapnull = 0x44444440;
+_memmap_cacheattr_wb_strict = 0x10000010;
+_memmap_cacheattr_wt_strict = 0x30000030;
+_memmap_cacheattr_bp_strict = 0x40000040;
+_memmap_cacheattr_wb_allvalid = 0x14444414;
+_memmap_cacheattr_wt_allvalid = 0x34444434;
+_memmap_cacheattr_bp_allvalid = 0x44444444;
+_memmap_region_map = 0x00000082;
+PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
+
+SECTIONS
+{
+
+  .DispatchVector.text : ALIGN(4)
+  {
+    _DispatchVector_text_start = ABSOLUTE(.);
+    KEEP (*(.DispatchVector.text))
+    . = ALIGN (4);
+    _DispatchVector_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .ResetVector.text : ALIGN(4)
+  {
+    _ResetVector_text_start = ABSOLUTE(.);
+    *(.ResetVector.text)
+    . = ALIGN (4);
+    _ResetVector_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .ResetHandler.text : ALIGN(4)
+  {
+    _ResetHandler_text_start = ABSOLUTE(.);
+    *(.ResetHandler.literal .ResetHandler.text)
+    . = ALIGN (4);
+    _ResetHandler_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .DispatchHandler.text : ALIGN(4)
+  {
+    _DispatchHandler_text_start = ABSOLUTE(.);
+    *(.DispatchHandler.literal .DispatchHandler.text)
+    . = ALIGN (4);
+    _DispatchHandler_text_end = ABSOLUTE(.);
+    _memmap_seg_sram0_end = ALIGN(0x8);
+  } >sram0_seg :sram0_phdr
+
+
+  .sram.rodata : ALIGN(4)
+  {
+    _sram_rodata_start = ABSOLUTE(.);
+    *(.sram.rodata)
+    . = ALIGN (4);
+    _sram_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.rodata : ALIGN(4)
+  {
+    _clib_rodata_start = ABSOLUTE(.);
+    *(.clib.rodata)
+    . = ALIGN (4);
+    _clib_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.rodata : ALIGN(4)
+  {
+    _rtos_rodata_start = ABSOLUTE(.);
+    *(.rtos.rodata)
+    . = ALIGN (4);
+    _rtos_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .sram.text : ALIGN(4)
+  {
+    _sram_text_start = ABSOLUTE(.);
+    *(.sram.literal .sram.text)
+    . = ALIGN (4);
+    _sram_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.text : ALIGN(4)
+  {
+    _clib_text_start = ABSOLUTE(.);
+    *(.clib.literal .clib.text)
+    . = ALIGN (4);
+    _clib_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.text : ALIGN(4)
+  {
+    _rtos_text_start = ABSOLUTE(.);
+    *(.rtos.literal .rtos.text)
+    . = ALIGN (4);
+    _rtos_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.data : ALIGN(4)
+  {
+    _clib_data_start = ABSOLUTE(.);
+    *(.clib.data)
+    . = ALIGN (4);
+    _clib_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.percpu.data : ALIGN(4)
+  {
+    _clib_percpu_data_start = ABSOLUTE(.);
+    *(.clib.percpu.data)
+    . = ALIGN (4);
+    _clib_percpu_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.percpu.data : ALIGN(4)
+  {
+    _rtos_percpu_data_start = ABSOLUTE(.);
+    *(.rtos.percpu.data)
+    . = ALIGN (4);
+    _rtos_percpu_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.data : ALIGN(4)
+  {
+    _rtos_data_start = ABSOLUTE(.);
+    *(.rtos.data)
+    . = ALIGN (4);
+    _rtos_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .sram.data : ALIGN(4)
+  {
+    _sram_data_start = ABSOLUTE(.);
+    *(.sram.data)
+    . = ALIGN (4);
+    _sram_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  __llvm_prf_names : ALIGN(4)
+  {
+    __llvm_prf_names_start = ABSOLUTE(.);
+    *(__llvm_prf_names)
+    . = ALIGN (4);
+    __llvm_prf_names_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _clib_bss_start = ABSOLUTE(.);
+    *(.clib.bss)
+    *(.clib.percpu.bss)
+    *(.rtos.percpu.bss)
+    *(.rtos.bss)
+    *(.sram.bss)
+    *(.debug.bss)
+    . = ALIGN (8);
+    _clib_bss_end = ABSOLUTE(.);
+    _end = ALIGN(0x8);
+    PROVIDE(end = ALIGN(0x8));
+    _memmap_seg_sram1_end = ALIGN(0x8);
+  } >sram1_seg :sram1_bss_phdr
+
+  _heap_sentry = 0x20600000;
+
+  .sram2.rodata : ALIGN(4)
+  {
+    _sram2_rodata_start = ABSOLUTE(.);
+    *(.sram2.rodata)
+    . = ALIGN (4);
+    _sram2_rodata_end = ABSOLUTE(.);
+  } >sram2_seg :sram2_phdr
+
+  .rodata : ALIGN(4)
+  {
+    _rodata_start = ABSOLUTE(.);
+    *(.rodata)
+    *(SORT(.rodata.sort.*))
+    KEEP (*(SORT(.rodata.keepsort.*) .rodata.keep.*))
+    *(.rodata.*)
+    *(.gnu.linkonce.r.*)
+    *(.rodata1)
+    __XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
+    KEEP (*(.xt_except_table))
+    KEEP (*(.gcc_except_table))
+    *(.gnu.linkonce.e.*)
+    *(.gnu.version_r)
+    KEEP (*(.eh_frame))
+    /*  C++ constructor and destructor tables, properly ordered:  */
+    KEEP (*crtbegin.o(.ctors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*(.ctors))
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*(.dtors))
+    /*  C++ exception handlers table:  */
+    __XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
+    *(.xt_except_desc)
+    *(.gnu.linkonce.h.*)
+    __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
+    *(.xt_except_desc_end)
+    *(.dynamic)
+    *(.gnu.version_d)
+    . = ALIGN(4);		/* this table MUST be 4-byte aligned */
+    _bss_table_start = ABSOLUTE(.);
+    LONG(_clib_bss_start)
+    LONG(_clib_bss_end)
+    LONG(_bss_start)
+    LONG(_bss_end)
+    LONG(_sram3_bss_start)
+    LONG(_sram3_bss_end)
+    LONG(_dram0_bss_start)
+    LONG(_dram0_bss_end)
+    LONG(_dram1_bss_start)
+    LONG(_dram1_bss_end)
+    LONG(_local_sram_bss_start)
+    LONG(_local_sram_bss_end)
+    _bss_table_end = ABSOLUTE(.);
+    . = ALIGN (4);
+    _rodata_end = ABSOLUTE(.);
+  } >sram2_seg :sram2_phdr
+
+  .sram2.text : ALIGN(4)
+  {
+    _sram2_text_start = ABSOLUTE(.);
+    *(.sram2.literal .sram2.text)
+    . = ALIGN (4);
+    _sram2_text_end = ABSOLUTE(.);
+  } >sram2_seg :sram2_phdr
+
+  .text : ALIGN(4)
+  {
+    _stext = .;
+    _text_start = ABSOLUTE(.);
+    *(.entry.text)
+    *(.init.literal)
+    KEEP(*(.init))
+    *(.literal.sort.* SORT(.text.sort.*))
+    KEEP (*(.literal.keepsort.* SORT(.text.keepsort.*) .literal.keep.* .text.keep.* .literal.*personality* .text.*personality*))
+    *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
+    *(.fini.literal)
+    KEEP(*(.fini))
+    *(.gnu.version)
+    . = ALIGN (4);
+    _text_end = ABSOLUTE(.);
+    _etext = .;
+  } >sram2_seg :sram2_phdr
+
+  .sram2.data : ALIGN(4)
+  {
+    _sram2_data_start = ABSOLUTE(.);
+    *(.sram2.data)
+    . = ALIGN (4);
+    _sram2_data_end = ABSOLUTE(.);
+  } >sram2_seg :sram2_phdr
+
+  .data : ALIGN(4)
+  {
+    _data_start = ABSOLUTE(.);
+    *(.data)
+    *(SORT(.data.sort.*))
+    KEEP (*(SORT(.data.keepsort.*) .data.keep.*))
+    *(.data.*)
+    *(.gnu.linkonce.d.*)
+    KEEP(*(.gnu.linkonce.d.*personality*))
+    *(.data1)
+    *(.sdata)
+    *(.sdata.*)
+    *(.gnu.linkonce.s.*)
+    *(.sdata2)
+    *(.sdata2.*)
+    *(.gnu.linkonce.s2.*)
+    KEEP(*(.jcr))
+    *(__llvm_prf_cnts)
+    *(__llvm_prf_data)
+    *(__llvm_prf_vnds)
+    . = ALIGN (4);
+    _data_end = ABSOLUTE(.);
+  } >sram2_seg :sram2_phdr
+
+  .bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _bss_start = ABSOLUTE(.);
+    *(.dynsbss)
+    *(.sbss)
+    *(.sbss.*)
+    *(.gnu.linkonce.sb.*)
+    *(.scommon)
+    *(.sbss2)
+    *(.sbss2.*)
+    *(.gnu.linkonce.sb2.*)
+    *(.dynbss)
+    *(.bss)
+    *(SORT(.bss.sort.*))
+    KEEP (*(SORT(.bss.keepsort.*) .bss.keep.*))
+    *(.bss.*)
+    *(.gnu.linkonce.b.*)
+    *(COMMON)
+    *(.sram2.bss)
+    . = ALIGN (8);
+    _bss_end = ABSOLUTE(.);
+    _memmap_seg_sram2_end = ALIGN(0x8);
+  } >sram2_seg :sram2_bss_phdr
+
+
+  .sram3.rodata : ALIGN(4)
+  {
+    _sram3_rodata_start = ABSOLUTE(.);
+    *(.sram3.rodata)
+    . = ALIGN (4);
+    _sram3_rodata_end = ABSOLUTE(.);
+  } >sram3_seg :sram3_phdr
+
+  .sram3.text : ALIGN(4)
+  {
+    _sram3_text_start = ABSOLUTE(.);
+    *(.sram3.literal .sram3.text)
+    . = ALIGN (4);
+    _sram3_text_end = ABSOLUTE(.);
+  } >sram3_seg :sram3_phdr
+
+  .sram3.data : ALIGN(4)
+  {
+    _sram3_data_start = ABSOLUTE(.);
+    *(.sram3.data)
+    . = ALIGN (4);
+    _sram3_data_end = ABSOLUTE(.);
+  } >sram3_seg :sram3_phdr
+
+  .sram3.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _sram3_bss_start = ABSOLUTE(.);
+    *(.sram3.bss)
+    . = ALIGN (8);
+    _sram3_bss_end = ABSOLUTE(.);
+    _memmap_seg_sram3_end = ALIGN(0x8);
+  } >sram3_seg :sram3_bss_phdr
+
+  _memmap_mem_sram_max = ABSOLUTE(.);
+
+  .dram0.rodata : ALIGN(4)
+  {
+    _dram0_rodata_start = ABSOLUTE(.);
+    *(.dram0.rodata)
+    . = ALIGN (4);
+    _dram0_rodata_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.data : ALIGN(4)
+  {
+    _dram0_data_start = ABSOLUTE(.);
+    *(.dram0.data)
+    . = ALIGN (4);
+    _dram0_data_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dram0_bss_start = ABSOLUTE(.);
+    *(.dram0.bss)
+    *(.dram0_user.bss)
+    . = ALIGN (8);
+    _dram0_bss_end = ABSOLUTE(.);
+    _memmap_seg_dram0_0_end = ALIGN(0x8);
+  } >dram0_0_seg :dram0_0_bss_phdr
+
+  _memmap_mem_dram0_max = ABSOLUTE(.);
+
+  .dram1.rodata : ALIGN(4)
+  {
+    _dram1_rodata_start = ABSOLUTE(.);
+    *(.dram1.rodata)
+    . = ALIGN (4);
+    _dram1_rodata_end = ABSOLUTE(.);
+  } >dram1_0_seg :dram1_0_phdr
+
+  .dram1.data : ALIGN(4)
+  {
+    _dram1_data_start = ABSOLUTE(.);
+    *(.dram1.data)
+    . = ALIGN (4);
+    _dram1_data_end = ABSOLUTE(.);
+  } >dram1_0_seg :dram1_0_phdr
+
+  .dram1.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dram1_bss_start = ABSOLUTE(.);
+    *(.dram1.bss)
+    *(.dram1_user.bss)
+    . = ALIGN (8);
+    _dram1_bss_end = ABSOLUTE(.);
+    _stack_sentry = ALIGN(0x8);
+    _memmap_seg_dram1_0_end = ALIGN(0x8);
+  } >dram1_0_seg :dram1_0_bss_phdr
+
+  PROVIDE(__stack = 0xe01c0000);
+  _isb_default = 0xe01bfe10;
+  _memmap_mem_dram1_max = ABSOLUTE(.);
+
+  .local_sram.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _local_sram_bss_start = ABSOLUTE(.);
+    *(.local_sram.bss)
+    . = ALIGN (8);
+    _local_sram_bss_end = ABSOLUTE(.);
+    _memmap_seg_local_sram_0_end = ALIGN(0x8);
+  } >local_sram_0_seg :local_sram_0_bss_phdr
+
+
+  _memmap_mem_local_sram_max = ABSOLUTE(.);
+
+  .debug  0 :  { *(.debug) }
+  .line  0 :  { *(.line) }
+  .debug_srcinfo  0 :  { *(.debug_srcinfo) }
+  .debug_sfnames  0 :  { *(.debug_sfnames) }
+  .debug_aranges  0 :  { *(.debug_aranges) }
+  .debug_pubnames  0 :  { *(.debug_pubnames) }
+  .debug_info  0 :  { *(.debug_info) }
+  .debug_abbrev  0 :  { *(.debug_abbrev) }
+  .debug_line  0 :  { *(.debug_line) }
+  .debug_frame  0 :  { *(.debug_frame) }
+  .debug_str  0 :  { *(.debug_str) }
+  .debug_loc  0 :  { *(.debug_loc) }
+  .debug_macinfo  0 :  { *(.debug_macinfo) }
+  .debug_weaknames  0 :  { *(.debug_weaknames) }
+  .debug_funcnames  0 :  { *(.debug_funcnames) }
+  .debug_typenames  0 :  { *(.debug_typenames) }
+  .debug_varnames  0 :  { *(.debug_varnames) }
+  .xt.insn 0 :
+  {
+    KEEP (*(.xt.insn))
+    KEEP (*(.gnu.linkonce.x.*))
+  }
+  .xt.prop 0 :
+  {
+    KEEP (*(.xt.prop))
+    KEEP (*(.xt.prop.*))
+    KEEP (*(.gnu.linkonce.prop.*))
+  }
+  .xt.lit 0 :
+  {
+    KEEP (*(.xt.lit))
+    KEEP (*(.xt.lit.*))
+    KEEP (*(.gnu.linkonce.p.*))
+  }
+  .debug.xt.callgraph 0 :
+  {
+    KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
+  }
+}
+

+ 528 - 0
LSP/min-rt_core1_lib0_stack_tcm1/ldscripts/elf32xtensa.xbn

@@ -0,0 +1,528 @@
+/* This linker script generated from xt-genldscripts.tpp for LSP C:\Users\DELL\workspace\CSI_DSP_FW\LSP\min-rt_core1_lib0_stack_tcm1 */
+/* Linker Script for ld -N */
+MEMORY
+{
+  sram0_seg :                         	org = 0x20400000, len = 0x1000
+  sram1_seg :                         	org = 0x20401000, len = 0x1FF000
+  sram2_seg :                         	org = 0x20600000, len = 0x40000
+  sram3_seg :                         	org = 0x20640000, len = 0x40000
+  dram0_0_seg :                       	org = 0xE0182800, len = 0x1D800
+  dram1_0_seg :                       	org = 0xE01A2800, len = 0x1D800
+  local_sram_0_seg :                  	org = 0xFFA00000, len = 0x180000
+}
+
+PHDRS
+{
+  sram0_phdr PT_LOAD;
+  sram1_phdr PT_LOAD;
+  sram1_bss_phdr PT_LOAD;
+  sram2_phdr PT_LOAD;
+  sram2_bss_phdr PT_LOAD;
+  sram3_phdr PT_LOAD;
+  sram3_bss_phdr PT_LOAD;
+  dram0_0_phdr PT_LOAD;
+  dram0_0_bss_phdr PT_LOAD;
+  dram1_0_phdr PT_LOAD;
+  dram1_0_bss_phdr PT_LOAD;
+  local_sram_0_phdr PT_LOAD;
+  local_sram_0_bss_phdr PT_LOAD;
+}
+
+
+/*  Default entry point:  */
+ENTRY(_libinit)
+
+
+/*  Memory boundary addresses:  */
+_memmap_mem_sram_start = 0x20400000;
+_memmap_mem_sram_end   = 0x20680000;
+_memmap_mem_dram0_start = 0xe0180000;
+_memmap_mem_dram0_end   = 0xe01a0000;
+_memmap_mem_dram1_start = 0xe01a0000;
+_memmap_mem_dram1_end   = 0xe01c0000;
+_memmap_mem_local_sram_start = 0xffa00000;
+_memmap_mem_local_sram_end   = 0xffb80000;
+
+/*  Memory segment boundary addresses:  */
+_memmap_seg_sram0_start = 0x20400000;
+_memmap_seg_sram0_max   = 0x20401000;
+_memmap_seg_sram1_start = 0x20401000;
+_memmap_seg_sram1_max   = 0x20600000;
+_memmap_seg_sram2_start = 0x20600000;
+_memmap_seg_sram2_max   = 0x20640000;
+_memmap_seg_sram3_start = 0x20640000;
+_memmap_seg_sram3_max   = 0x20680000;
+_memmap_seg_dram0_0_start = 0xe0182800;
+_memmap_seg_dram0_0_max   = 0xe01a0000;
+_memmap_seg_dram1_0_start = 0xe01a2800;
+_memmap_seg_dram1_0_max   = 0xe01c0000;
+_memmap_seg_local_sram_0_start = 0xffa00000;
+_memmap_seg_local_sram_0_max   = 0xffb80000;
+
+_rom_store_table = 0;
+PROVIDE(_memmap_reset_vector = 0x20400000);
+PROVIDE(_memmap_vecbase_reset = 0x20400000);
+/* Various memory-map dependent cache attribute settings: */
+_memmap_cacheattr_wb_base = 0x10000010;
+_memmap_cacheattr_wt_base = 0x30000030;
+_memmap_cacheattr_bp_base = 0x40000040;
+_memmap_cacheattr_unused_mask = 0x0FFFFF0F;
+_memmap_cacheattr_wb_trapnull = 0x14444410;
+_memmap_cacheattr_wba_trapnull = 0x14444410;
+_memmap_cacheattr_wbna_trapnull = 0x24444420;
+_memmap_cacheattr_wt_trapnull = 0x34444430;
+_memmap_cacheattr_bp_trapnull = 0x44444440;
+_memmap_cacheattr_wb_strict = 0x10000010;
+_memmap_cacheattr_wt_strict = 0x30000030;
+_memmap_cacheattr_bp_strict = 0x40000040;
+_memmap_cacheattr_wb_allvalid = 0x14444414;
+_memmap_cacheattr_wt_allvalid = 0x34444434;
+_memmap_cacheattr_bp_allvalid = 0x44444444;
+_memmap_region_map = 0x00000082;
+PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
+
+SECTIONS
+{
+
+  .DispatchVector.text : ALIGN(4)
+  {
+    _DispatchVector_text_start = ABSOLUTE(.);
+    KEEP (*(.DispatchVector.text))
+    . = ALIGN (4);
+    _DispatchVector_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .ResetVector.text : ALIGN(4)
+  {
+    _ResetVector_text_start = ABSOLUTE(.);
+    *(.ResetVector.text)
+    . = ALIGN (4);
+    _ResetVector_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .ResetHandler.text : ALIGN(4)
+  {
+    _ResetHandler_text_start = ABSOLUTE(.);
+    *(.ResetHandler.literal .ResetHandler.text)
+    . = ALIGN (4);
+    _ResetHandler_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .DispatchHandler.text : ALIGN(4)
+  {
+    _DispatchHandler_text_start = ABSOLUTE(.);
+    *(.DispatchHandler.literal .DispatchHandler.text)
+    . = ALIGN (4);
+    _DispatchHandler_text_end = ABSOLUTE(.);
+    _memmap_seg_sram0_end = ALIGN(0x8);
+  } >sram0_seg :sram0_phdr
+
+
+  .sram.rodata : ALIGN(4)
+  {
+    _sram_rodata_start = ABSOLUTE(.);
+    *(.sram.rodata)
+    . = ALIGN (4);
+    _sram_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.rodata : ALIGN(4)
+  {
+    _clib_rodata_start = ABSOLUTE(.);
+    *(.clib.rodata)
+    . = ALIGN (4);
+    _clib_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.rodata : ALIGN(4)
+  {
+    _rtos_rodata_start = ABSOLUTE(.);
+    *(.rtos.rodata)
+    . = ALIGN (4);
+    _rtos_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .sram.text : ALIGN(4)
+  {
+    _sram_text_start = ABSOLUTE(.);
+    *(.sram.literal .sram.text)
+    . = ALIGN (4);
+    _sram_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.text : ALIGN(4)
+  {
+    _clib_text_start = ABSOLUTE(.);
+    *(.clib.literal .clib.text)
+    . = ALIGN (4);
+    _clib_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.text : ALIGN(4)
+  {
+    _rtos_text_start = ABSOLUTE(.);
+    *(.rtos.literal .rtos.text)
+    . = ALIGN (4);
+    _rtos_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.data : ALIGN(4)
+  {
+    _clib_data_start = ABSOLUTE(.);
+    *(.clib.data)
+    . = ALIGN (4);
+    _clib_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.percpu.data : ALIGN(4)
+  {
+    _clib_percpu_data_start = ABSOLUTE(.);
+    *(.clib.percpu.data)
+    . = ALIGN (4);
+    _clib_percpu_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.percpu.data : ALIGN(4)
+  {
+    _rtos_percpu_data_start = ABSOLUTE(.);
+    *(.rtos.percpu.data)
+    . = ALIGN (4);
+    _rtos_percpu_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.data : ALIGN(4)
+  {
+    _rtos_data_start = ABSOLUTE(.);
+    *(.rtos.data)
+    . = ALIGN (4);
+    _rtos_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .sram.data : ALIGN(4)
+  {
+    _sram_data_start = ABSOLUTE(.);
+    *(.sram.data)
+    . = ALIGN (4);
+    _sram_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  __llvm_prf_names : ALIGN(4)
+  {
+    __llvm_prf_names_start = ABSOLUTE(.);
+    *(__llvm_prf_names)
+    . = ALIGN (4);
+    __llvm_prf_names_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _clib_bss_start = ABSOLUTE(.);
+    *(.clib.bss)
+    *(.clib.percpu.bss)
+    *(.rtos.percpu.bss)
+    *(.rtos.bss)
+    *(.sram.bss)
+    *(.debug.bss)
+    . = ALIGN (8);
+    _clib_bss_end = ABSOLUTE(.);
+    _end = ALIGN(0x8);
+    PROVIDE(end = ALIGN(0x8));
+    _memmap_seg_sram1_end = ALIGN(0x8);
+  } >sram1_seg :sram1_bss_phdr
+
+  _heap_sentry = 0x20600000;
+
+  .sram2.rodata : ALIGN(4)
+  {
+    _sram2_rodata_start = ABSOLUTE(.);
+    *(.sram2.rodata)
+    . = ALIGN (4);
+    _sram2_rodata_end = ABSOLUTE(.);
+  } >sram2_seg :sram2_phdr
+
+  .rodata : ALIGN(4)
+  {
+    _rodata_start = ABSOLUTE(.);
+    *(.rodata)
+    *(SORT(.rodata.sort.*))
+    KEEP (*(SORT(.rodata.keepsort.*) .rodata.keep.*))
+    *(.rodata.*)
+    *(.gnu.linkonce.r.*)
+    *(.rodata1)
+    __XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
+    KEEP (*(.xt_except_table))
+    KEEP (*(.gcc_except_table))
+    *(.gnu.linkonce.e.*)
+    *(.gnu.version_r)
+    KEEP (*(.eh_frame))
+    /*  C++ constructor and destructor tables, properly ordered:  */
+    KEEP (*crtbegin.o(.ctors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*(.ctors))
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*(.dtors))
+    /*  C++ exception handlers table:  */
+    __XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
+    *(.xt_except_desc)
+    *(.gnu.linkonce.h.*)
+    __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
+    *(.xt_except_desc_end)
+    *(.dynamic)
+    *(.gnu.version_d)
+    . = ALIGN(4);		/* this table MUST be 4-byte aligned */
+    _bss_table_start = ABSOLUTE(.);
+    LONG(_clib_bss_start)
+    LONG(_clib_bss_end)
+    LONG(_bss_start)
+    LONG(_bss_end)
+    LONG(_sram3_bss_start)
+    LONG(_sram3_bss_end)
+    LONG(_dram0_bss_start)
+    LONG(_dram0_bss_end)
+    LONG(_dram1_bss_start)
+    LONG(_dram1_bss_end)
+    LONG(_local_sram_bss_start)
+    LONG(_local_sram_bss_end)
+    _bss_table_end = ABSOLUTE(.);
+    . = ALIGN (4);
+    _rodata_end = ABSOLUTE(.);
+  } >sram2_seg :sram2_phdr
+
+  .sram2.text : ALIGN(4)
+  {
+    _sram2_text_start = ABSOLUTE(.);
+    *(.sram2.literal .sram2.text)
+    . = ALIGN (4);
+    _sram2_text_end = ABSOLUTE(.);
+  } >sram2_seg :sram2_phdr
+
+  .text : ALIGN(4)
+  {
+    _stext = .;
+    _text_start = ABSOLUTE(.);
+    *(.entry.text)
+    *(.init.literal)
+    KEEP(*(.init))
+    *(.literal.sort.* SORT(.text.sort.*))
+    KEEP (*(.literal.keepsort.* SORT(.text.keepsort.*) .literal.keep.* .text.keep.* .literal.*personality* .text.*personality*))
+    *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
+    *(.fini.literal)
+    KEEP(*(.fini))
+    *(.gnu.version)
+    . = ALIGN (4);
+    _text_end = ABSOLUTE(.);
+    _etext = .;
+  } >sram2_seg :sram2_phdr
+
+  .sram2.data : ALIGN(4)
+  {
+    _sram2_data_start = ABSOLUTE(.);
+    *(.sram2.data)
+    . = ALIGN (4);
+    _sram2_data_end = ABSOLUTE(.);
+  } >sram2_seg :sram2_phdr
+
+  .data : ALIGN(4)
+  {
+    _data_start = ABSOLUTE(.);
+    *(.data)
+    *(SORT(.data.sort.*))
+    KEEP (*(SORT(.data.keepsort.*) .data.keep.*))
+    *(.data.*)
+    *(.gnu.linkonce.d.*)
+    KEEP(*(.gnu.linkonce.d.*personality*))
+    *(.data1)
+    *(.sdata)
+    *(.sdata.*)
+    *(.gnu.linkonce.s.*)
+    *(.sdata2)
+    *(.sdata2.*)
+    *(.gnu.linkonce.s2.*)
+    KEEP(*(.jcr))
+    *(__llvm_prf_cnts)
+    *(__llvm_prf_data)
+    *(__llvm_prf_vnds)
+    . = ALIGN (4);
+    _data_end = ABSOLUTE(.);
+  } >sram2_seg :sram2_phdr
+
+  .bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _bss_start = ABSOLUTE(.);
+    *(.dynsbss)
+    *(.sbss)
+    *(.sbss.*)
+    *(.gnu.linkonce.sb.*)
+    *(.scommon)
+    *(.sbss2)
+    *(.sbss2.*)
+    *(.gnu.linkonce.sb2.*)
+    *(.dynbss)
+    *(.bss)
+    *(SORT(.bss.sort.*))
+    KEEP (*(SORT(.bss.keepsort.*) .bss.keep.*))
+    *(.bss.*)
+    *(.gnu.linkonce.b.*)
+    *(COMMON)
+    *(.sram2.bss)
+    . = ALIGN (8);
+    _bss_end = ABSOLUTE(.);
+    _memmap_seg_sram2_end = ALIGN(0x8);
+  } >sram2_seg :sram2_bss_phdr
+
+
+  .sram3.rodata : ALIGN(4)
+  {
+    _sram3_rodata_start = ABSOLUTE(.);
+    *(.sram3.rodata)
+    . = ALIGN (4);
+    _sram3_rodata_end = ABSOLUTE(.);
+  } >sram3_seg :sram3_phdr
+
+  .sram3.text : ALIGN(4)
+  {
+    _sram3_text_start = ABSOLUTE(.);
+    *(.sram3.literal .sram3.text)
+    . = ALIGN (4);
+    _sram3_text_end = ABSOLUTE(.);
+  } >sram3_seg :sram3_phdr
+
+  .sram3.data : ALIGN(4)
+  {
+    _sram3_data_start = ABSOLUTE(.);
+    *(.sram3.data)
+    . = ALIGN (4);
+    _sram3_data_end = ABSOLUTE(.);
+  } >sram3_seg :sram3_phdr
+
+  .sram3.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _sram3_bss_start = ABSOLUTE(.);
+    *(.sram3.bss)
+    . = ALIGN (8);
+    _sram3_bss_end = ABSOLUTE(.);
+    _memmap_seg_sram3_end = ALIGN(0x8);
+  } >sram3_seg :sram3_bss_phdr
+
+  _memmap_mem_sram_max = ABSOLUTE(.);
+
+  .dram0.rodata : ALIGN(4)
+  {
+    _dram0_rodata_start = ABSOLUTE(.);
+    *(.dram0.rodata)
+    . = ALIGN (4);
+    _dram0_rodata_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.data : ALIGN(4)
+  {
+    _dram0_data_start = ABSOLUTE(.);
+    *(.dram0.data)
+    . = ALIGN (4);
+    _dram0_data_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dram0_bss_start = ABSOLUTE(.);
+    *(.dram0.bss)
+    *(.dram0_user.bss)
+    . = ALIGN (8);
+    _dram0_bss_end = ABSOLUTE(.);
+    _memmap_seg_dram0_0_end = ALIGN(0x8);
+  } >dram0_0_seg :dram0_0_bss_phdr
+
+  _memmap_mem_dram0_max = ABSOLUTE(.);
+
+  .dram1.rodata : ALIGN(4)
+  {
+    _dram1_rodata_start = ABSOLUTE(.);
+    *(.dram1.rodata)
+    . = ALIGN (4);
+    _dram1_rodata_end = ABSOLUTE(.);
+  } >dram1_0_seg :dram1_0_phdr
+
+  .dram1.data : ALIGN(4)
+  {
+    _dram1_data_start = ABSOLUTE(.);
+    *(.dram1.data)
+    . = ALIGN (4);
+    _dram1_data_end = ABSOLUTE(.);
+  } >dram1_0_seg :dram1_0_phdr
+
+  .dram1.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dram1_bss_start = ABSOLUTE(.);
+    *(.dram1.bss)
+    *(.dram1_user.bss)
+    . = ALIGN (8);
+    _dram1_bss_end = ABSOLUTE(.);
+    _stack_sentry = ALIGN(0x8);
+    _memmap_seg_dram1_0_end = ALIGN(0x8);
+  } >dram1_0_seg :dram1_0_bss_phdr
+
+  PROVIDE(__stack = 0xe01c0000);
+  _isb_default = 0xe01bfe10;
+  _memmap_mem_dram1_max = ABSOLUTE(.);
+
+  .local_sram.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _local_sram_bss_start = ABSOLUTE(.);
+    *(.local_sram.bss)
+    . = ALIGN (8);
+    _local_sram_bss_end = ABSOLUTE(.);
+    _memmap_seg_local_sram_0_end = ALIGN(0x8);
+  } >local_sram_0_seg :local_sram_0_bss_phdr
+
+
+  _memmap_mem_local_sram_max = ABSOLUTE(.);
+
+  .debug  0 :  { *(.debug) }
+  .line  0 :  { *(.line) }
+  .debug_srcinfo  0 :  { *(.debug_srcinfo) }
+  .debug_sfnames  0 :  { *(.debug_sfnames) }
+  .debug_aranges  0 :  { *(.debug_aranges) }
+  .debug_pubnames  0 :  { *(.debug_pubnames) }
+  .debug_info  0 :  { *(.debug_info) }
+  .debug_abbrev  0 :  { *(.debug_abbrev) }
+  .debug_line  0 :  { *(.debug_line) }
+  .debug_frame  0 :  { *(.debug_frame) }
+  .debug_str  0 :  { *(.debug_str) }
+  .debug_loc  0 :  { *(.debug_loc) }
+  .debug_macinfo  0 :  { *(.debug_macinfo) }
+  .debug_weaknames  0 :  { *(.debug_weaknames) }
+  .debug_funcnames  0 :  { *(.debug_funcnames) }
+  .debug_typenames  0 :  { *(.debug_typenames) }
+  .debug_varnames  0 :  { *(.debug_varnames) }
+  .xt.insn 0 :
+  {
+    KEEP (*(.xt.insn))
+    KEEP (*(.gnu.linkonce.x.*))
+  }
+  .xt.prop 0 :
+  {
+    KEEP (*(.xt.prop))
+    KEEP (*(.xt.prop.*))
+    KEEP (*(.gnu.linkonce.prop.*))
+  }
+  .xt.lit 0 :
+  {
+    KEEP (*(.xt.lit))
+    KEEP (*(.xt.lit.*))
+    KEEP (*(.gnu.linkonce.p.*))
+  }
+  .debug.xt.callgraph 0 :
+  {
+    KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
+  }
+}
+

+ 528 - 0
LSP/min-rt_core1_lib0_stack_tcm1/ldscripts/elf32xtensa.xn

@@ -0,0 +1,528 @@
+/* This linker script generated from xt-genldscripts.tpp for LSP C:\Users\DELL\workspace\CSI_DSP_FW\LSP\min-rt_core1_lib0_stack_tcm1 */
+/* Linker Script for ld -n */
+MEMORY
+{
+  sram0_seg :                         	org = 0x20400000, len = 0x1000
+  sram1_seg :                         	org = 0x20401000, len = 0x1FF000
+  sram2_seg :                         	org = 0x20600000, len = 0x40000
+  sram3_seg :                         	org = 0x20640000, len = 0x40000
+  dram0_0_seg :                       	org = 0xE0182800, len = 0x1D800
+  dram1_0_seg :                       	org = 0xE01A2800, len = 0x1D800
+  local_sram_0_seg :                  	org = 0xFFA00000, len = 0x180000
+}
+
+PHDRS
+{
+  sram0_phdr PT_LOAD;
+  sram1_phdr PT_LOAD;
+  sram1_bss_phdr PT_LOAD;
+  sram2_phdr PT_LOAD;
+  sram2_bss_phdr PT_LOAD;
+  sram3_phdr PT_LOAD;
+  sram3_bss_phdr PT_LOAD;
+  dram0_0_phdr PT_LOAD;
+  dram0_0_bss_phdr PT_LOAD;
+  dram1_0_phdr PT_LOAD;
+  dram1_0_bss_phdr PT_LOAD;
+  local_sram_0_phdr PT_LOAD;
+  local_sram_0_bss_phdr PT_LOAD;
+}
+
+
+/*  Default entry point:  */
+ENTRY(_libinit)
+
+
+/*  Memory boundary addresses:  */
+_memmap_mem_sram_start = 0x20400000;
+_memmap_mem_sram_end   = 0x20680000;
+_memmap_mem_dram0_start = 0xe0180000;
+_memmap_mem_dram0_end   = 0xe01a0000;
+_memmap_mem_dram1_start = 0xe01a0000;
+_memmap_mem_dram1_end   = 0xe01c0000;
+_memmap_mem_local_sram_start = 0xffa00000;
+_memmap_mem_local_sram_end   = 0xffb80000;
+
+/*  Memory segment boundary addresses:  */
+_memmap_seg_sram0_start = 0x20400000;
+_memmap_seg_sram0_max   = 0x20401000;
+_memmap_seg_sram1_start = 0x20401000;
+_memmap_seg_sram1_max   = 0x20600000;
+_memmap_seg_sram2_start = 0x20600000;
+_memmap_seg_sram2_max   = 0x20640000;
+_memmap_seg_sram3_start = 0x20640000;
+_memmap_seg_sram3_max   = 0x20680000;
+_memmap_seg_dram0_0_start = 0xe0182800;
+_memmap_seg_dram0_0_max   = 0xe01a0000;
+_memmap_seg_dram1_0_start = 0xe01a2800;
+_memmap_seg_dram1_0_max   = 0xe01c0000;
+_memmap_seg_local_sram_0_start = 0xffa00000;
+_memmap_seg_local_sram_0_max   = 0xffb80000;
+
+_rom_store_table = 0;
+PROVIDE(_memmap_reset_vector = 0x20400000);
+PROVIDE(_memmap_vecbase_reset = 0x20400000);
+/* Various memory-map dependent cache attribute settings: */
+_memmap_cacheattr_wb_base = 0x10000010;
+_memmap_cacheattr_wt_base = 0x30000030;
+_memmap_cacheattr_bp_base = 0x40000040;
+_memmap_cacheattr_unused_mask = 0x0FFFFF0F;
+_memmap_cacheattr_wb_trapnull = 0x14444410;
+_memmap_cacheattr_wba_trapnull = 0x14444410;
+_memmap_cacheattr_wbna_trapnull = 0x24444420;
+_memmap_cacheattr_wt_trapnull = 0x34444430;
+_memmap_cacheattr_bp_trapnull = 0x44444440;
+_memmap_cacheattr_wb_strict = 0x10000010;
+_memmap_cacheattr_wt_strict = 0x30000030;
+_memmap_cacheattr_bp_strict = 0x40000040;
+_memmap_cacheattr_wb_allvalid = 0x14444414;
+_memmap_cacheattr_wt_allvalid = 0x34444434;
+_memmap_cacheattr_bp_allvalid = 0x44444444;
+_memmap_region_map = 0x00000082;
+PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
+
+SECTIONS
+{
+
+  .DispatchVector.text : ALIGN(4)
+  {
+    _DispatchVector_text_start = ABSOLUTE(.);
+    KEEP (*(.DispatchVector.text))
+    . = ALIGN (4);
+    _DispatchVector_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .ResetVector.text : ALIGN(4)
+  {
+    _ResetVector_text_start = ABSOLUTE(.);
+    *(.ResetVector.text)
+    . = ALIGN (4);
+    _ResetVector_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .ResetHandler.text : ALIGN(4)
+  {
+    _ResetHandler_text_start = ABSOLUTE(.);
+    *(.ResetHandler.literal .ResetHandler.text)
+    . = ALIGN (4);
+    _ResetHandler_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .DispatchHandler.text : ALIGN(4)
+  {
+    _DispatchHandler_text_start = ABSOLUTE(.);
+    *(.DispatchHandler.literal .DispatchHandler.text)
+    . = ALIGN (4);
+    _DispatchHandler_text_end = ABSOLUTE(.);
+    _memmap_seg_sram0_end = ALIGN(0x8);
+  } >sram0_seg :sram0_phdr
+
+
+  .sram.rodata : ALIGN(4)
+  {
+    _sram_rodata_start = ABSOLUTE(.);
+    *(.sram.rodata)
+    . = ALIGN (4);
+    _sram_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.rodata : ALIGN(4)
+  {
+    _clib_rodata_start = ABSOLUTE(.);
+    *(.clib.rodata)
+    . = ALIGN (4);
+    _clib_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.rodata : ALIGN(4)
+  {
+    _rtos_rodata_start = ABSOLUTE(.);
+    *(.rtos.rodata)
+    . = ALIGN (4);
+    _rtos_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .sram.text : ALIGN(4)
+  {
+    _sram_text_start = ABSOLUTE(.);
+    *(.sram.literal .sram.text)
+    . = ALIGN (4);
+    _sram_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.text : ALIGN(4)
+  {
+    _clib_text_start = ABSOLUTE(.);
+    *(.clib.literal .clib.text)
+    . = ALIGN (4);
+    _clib_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.text : ALIGN(4)
+  {
+    _rtos_text_start = ABSOLUTE(.);
+    *(.rtos.literal .rtos.text)
+    . = ALIGN (4);
+    _rtos_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.data : ALIGN(4)
+  {
+    _clib_data_start = ABSOLUTE(.);
+    *(.clib.data)
+    . = ALIGN (4);
+    _clib_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.percpu.data : ALIGN(4)
+  {
+    _clib_percpu_data_start = ABSOLUTE(.);
+    *(.clib.percpu.data)
+    . = ALIGN (4);
+    _clib_percpu_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.percpu.data : ALIGN(4)
+  {
+    _rtos_percpu_data_start = ABSOLUTE(.);
+    *(.rtos.percpu.data)
+    . = ALIGN (4);
+    _rtos_percpu_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.data : ALIGN(4)
+  {
+    _rtos_data_start = ABSOLUTE(.);
+    *(.rtos.data)
+    . = ALIGN (4);
+    _rtos_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .sram.data : ALIGN(4)
+  {
+    _sram_data_start = ABSOLUTE(.);
+    *(.sram.data)
+    . = ALIGN (4);
+    _sram_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  __llvm_prf_names : ALIGN(4)
+  {
+    __llvm_prf_names_start = ABSOLUTE(.);
+    *(__llvm_prf_names)
+    . = ALIGN (4);
+    __llvm_prf_names_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _clib_bss_start = ABSOLUTE(.);
+    *(.clib.bss)
+    *(.clib.percpu.bss)
+    *(.rtos.percpu.bss)
+    *(.rtos.bss)
+    *(.sram.bss)
+    *(.debug.bss)
+    . = ALIGN (8);
+    _clib_bss_end = ABSOLUTE(.);
+    _end = ALIGN(0x8);
+    PROVIDE(end = ALIGN(0x8));
+    _memmap_seg_sram1_end = ALIGN(0x8);
+  } >sram1_seg :sram1_bss_phdr
+
+  _heap_sentry = 0x20600000;
+
+  .sram2.rodata : ALIGN(4)
+  {
+    _sram2_rodata_start = ABSOLUTE(.);
+    *(.sram2.rodata)
+    . = ALIGN (4);
+    _sram2_rodata_end = ABSOLUTE(.);
+  } >sram2_seg :sram2_phdr
+
+  .rodata : ALIGN(4)
+  {
+    _rodata_start = ABSOLUTE(.);
+    *(.rodata)
+    *(SORT(.rodata.sort.*))
+    KEEP (*(SORT(.rodata.keepsort.*) .rodata.keep.*))
+    *(.rodata.*)
+    *(.gnu.linkonce.r.*)
+    *(.rodata1)
+    __XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
+    KEEP (*(.xt_except_table))
+    KEEP (*(.gcc_except_table))
+    *(.gnu.linkonce.e.*)
+    *(.gnu.version_r)
+    KEEP (*(.eh_frame))
+    /*  C++ constructor and destructor tables, properly ordered:  */
+    KEEP (*crtbegin.o(.ctors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*(.ctors))
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*(.dtors))
+    /*  C++ exception handlers table:  */
+    __XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
+    *(.xt_except_desc)
+    *(.gnu.linkonce.h.*)
+    __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
+    *(.xt_except_desc_end)
+    *(.dynamic)
+    *(.gnu.version_d)
+    . = ALIGN(4);		/* this table MUST be 4-byte aligned */
+    _bss_table_start = ABSOLUTE(.);
+    LONG(_clib_bss_start)
+    LONG(_clib_bss_end)
+    LONG(_bss_start)
+    LONG(_bss_end)
+    LONG(_sram3_bss_start)
+    LONG(_sram3_bss_end)
+    LONG(_dram0_bss_start)
+    LONG(_dram0_bss_end)
+    LONG(_dram1_bss_start)
+    LONG(_dram1_bss_end)
+    LONG(_local_sram_bss_start)
+    LONG(_local_sram_bss_end)
+    _bss_table_end = ABSOLUTE(.);
+    . = ALIGN (4);
+    _rodata_end = ABSOLUTE(.);
+  } >sram2_seg :sram2_phdr
+
+  .sram2.text : ALIGN(4)
+  {
+    _sram2_text_start = ABSOLUTE(.);
+    *(.sram2.literal .sram2.text)
+    . = ALIGN (4);
+    _sram2_text_end = ABSOLUTE(.);
+  } >sram2_seg :sram2_phdr
+
+  .text : ALIGN(4)
+  {
+    _stext = .;
+    _text_start = ABSOLUTE(.);
+    *(.entry.text)
+    *(.init.literal)
+    KEEP(*(.init))
+    *(.literal.sort.* SORT(.text.sort.*))
+    KEEP (*(.literal.keepsort.* SORT(.text.keepsort.*) .literal.keep.* .text.keep.* .literal.*personality* .text.*personality*))
+    *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
+    *(.fini.literal)
+    KEEP(*(.fini))
+    *(.gnu.version)
+    . = ALIGN (4);
+    _text_end = ABSOLUTE(.);
+    _etext = .;
+  } >sram2_seg :sram2_phdr
+
+  .sram2.data : ALIGN(4)
+  {
+    _sram2_data_start = ABSOLUTE(.);
+    *(.sram2.data)
+    . = ALIGN (4);
+    _sram2_data_end = ABSOLUTE(.);
+  } >sram2_seg :sram2_phdr
+
+  .data : ALIGN(4)
+  {
+    _data_start = ABSOLUTE(.);
+    *(.data)
+    *(SORT(.data.sort.*))
+    KEEP (*(SORT(.data.keepsort.*) .data.keep.*))
+    *(.data.*)
+    *(.gnu.linkonce.d.*)
+    KEEP(*(.gnu.linkonce.d.*personality*))
+    *(.data1)
+    *(.sdata)
+    *(.sdata.*)
+    *(.gnu.linkonce.s.*)
+    *(.sdata2)
+    *(.sdata2.*)
+    *(.gnu.linkonce.s2.*)
+    KEEP(*(.jcr))
+    *(__llvm_prf_cnts)
+    *(__llvm_prf_data)
+    *(__llvm_prf_vnds)
+    . = ALIGN (4);
+    _data_end = ABSOLUTE(.);
+  } >sram2_seg :sram2_phdr
+
+  .bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _bss_start = ABSOLUTE(.);
+    *(.dynsbss)
+    *(.sbss)
+    *(.sbss.*)
+    *(.gnu.linkonce.sb.*)
+    *(.scommon)
+    *(.sbss2)
+    *(.sbss2.*)
+    *(.gnu.linkonce.sb2.*)
+    *(.dynbss)
+    *(.bss)
+    *(SORT(.bss.sort.*))
+    KEEP (*(SORT(.bss.keepsort.*) .bss.keep.*))
+    *(.bss.*)
+    *(.gnu.linkonce.b.*)
+    *(COMMON)
+    *(.sram2.bss)
+    . = ALIGN (8);
+    _bss_end = ABSOLUTE(.);
+    _memmap_seg_sram2_end = ALIGN(0x8);
+  } >sram2_seg :sram2_bss_phdr
+
+
+  .sram3.rodata : ALIGN(4)
+  {
+    _sram3_rodata_start = ABSOLUTE(.);
+    *(.sram3.rodata)
+    . = ALIGN (4);
+    _sram3_rodata_end = ABSOLUTE(.);
+  } >sram3_seg :sram3_phdr
+
+  .sram3.text : ALIGN(4)
+  {
+    _sram3_text_start = ABSOLUTE(.);
+    *(.sram3.literal .sram3.text)
+    . = ALIGN (4);
+    _sram3_text_end = ABSOLUTE(.);
+  } >sram3_seg :sram3_phdr
+
+  .sram3.data : ALIGN(4)
+  {
+    _sram3_data_start = ABSOLUTE(.);
+    *(.sram3.data)
+    . = ALIGN (4);
+    _sram3_data_end = ABSOLUTE(.);
+  } >sram3_seg :sram3_phdr
+
+  .sram3.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _sram3_bss_start = ABSOLUTE(.);
+    *(.sram3.bss)
+    . = ALIGN (8);
+    _sram3_bss_end = ABSOLUTE(.);
+    _memmap_seg_sram3_end = ALIGN(0x8);
+  } >sram3_seg :sram3_bss_phdr
+
+  _memmap_mem_sram_max = ABSOLUTE(.);
+
+  .dram0.rodata : ALIGN(4)
+  {
+    _dram0_rodata_start = ABSOLUTE(.);
+    *(.dram0.rodata)
+    . = ALIGN (4);
+    _dram0_rodata_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.data : ALIGN(4)
+  {
+    _dram0_data_start = ABSOLUTE(.);
+    *(.dram0.data)
+    . = ALIGN (4);
+    _dram0_data_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dram0_bss_start = ABSOLUTE(.);
+    *(.dram0.bss)
+    *(.dram0_user.bss)
+    . = ALIGN (8);
+    _dram0_bss_end = ABSOLUTE(.);
+    _memmap_seg_dram0_0_end = ALIGN(0x8);
+  } >dram0_0_seg :dram0_0_bss_phdr
+
+  _memmap_mem_dram0_max = ABSOLUTE(.);
+
+  .dram1.rodata : ALIGN(4)
+  {
+    _dram1_rodata_start = ABSOLUTE(.);
+    *(.dram1.rodata)
+    . = ALIGN (4);
+    _dram1_rodata_end = ABSOLUTE(.);
+  } >dram1_0_seg :dram1_0_phdr
+
+  .dram1.data : ALIGN(4)
+  {
+    _dram1_data_start = ABSOLUTE(.);
+    *(.dram1.data)
+    . = ALIGN (4);
+    _dram1_data_end = ABSOLUTE(.);
+  } >dram1_0_seg :dram1_0_phdr
+
+  .dram1.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dram1_bss_start = ABSOLUTE(.);
+    *(.dram1.bss)
+    *(.dram1_user.bss)
+    . = ALIGN (8);
+    _dram1_bss_end = ABSOLUTE(.);
+    _stack_sentry = ALIGN(0x8);
+    _memmap_seg_dram1_0_end = ALIGN(0x8);
+  } >dram1_0_seg :dram1_0_bss_phdr
+
+  PROVIDE(__stack = 0xe01c0000);
+  _isb_default = 0xe01bfe10;
+  _memmap_mem_dram1_max = ABSOLUTE(.);
+
+  .local_sram.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _local_sram_bss_start = ABSOLUTE(.);
+    *(.local_sram.bss)
+    . = ALIGN (8);
+    _local_sram_bss_end = ABSOLUTE(.);
+    _memmap_seg_local_sram_0_end = ALIGN(0x8);
+  } >local_sram_0_seg :local_sram_0_bss_phdr
+
+
+  _memmap_mem_local_sram_max = ABSOLUTE(.);
+
+  .debug  0 :  { *(.debug) }
+  .line  0 :  { *(.line) }
+  .debug_srcinfo  0 :  { *(.debug_srcinfo) }
+  .debug_sfnames  0 :  { *(.debug_sfnames) }
+  .debug_aranges  0 :  { *(.debug_aranges) }
+  .debug_pubnames  0 :  { *(.debug_pubnames) }
+  .debug_info  0 :  { *(.debug_info) }
+  .debug_abbrev  0 :  { *(.debug_abbrev) }
+  .debug_line  0 :  { *(.debug_line) }
+  .debug_frame  0 :  { *(.debug_frame) }
+  .debug_str  0 :  { *(.debug_str) }
+  .debug_loc  0 :  { *(.debug_loc) }
+  .debug_macinfo  0 :  { *(.debug_macinfo) }
+  .debug_weaknames  0 :  { *(.debug_weaknames) }
+  .debug_funcnames  0 :  { *(.debug_funcnames) }
+  .debug_typenames  0 :  { *(.debug_typenames) }
+  .debug_varnames  0 :  { *(.debug_varnames) }
+  .xt.insn 0 :
+  {
+    KEEP (*(.xt.insn))
+    KEEP (*(.gnu.linkonce.x.*))
+  }
+  .xt.prop 0 :
+  {
+    KEEP (*(.xt.prop))
+    KEEP (*(.xt.prop.*))
+    KEEP (*(.gnu.linkonce.prop.*))
+  }
+  .xt.lit 0 :
+  {
+    KEEP (*(.xt.lit))
+    KEEP (*(.xt.lit.*))
+    KEEP (*(.gnu.linkonce.p.*))
+  }
+  .debug.xt.callgraph 0 :
+  {
+    KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
+  }
+}
+

+ 61 - 0
LSP/min-rt_core1_lib0_stack_tcm1/ldscripts/elf32xtensa.xr

@@ -0,0 +1,61 @@
+/* This linker script generated from xt-genldscripts.tpp for LSP C:\Users\DELL\workspace\CSI_DSP_FW\LSP\min-rt_core1_lib0_stack_tcm1 */
+/* Linker Script for ld -r or ld -i */
+
+
+SECTIONS
+{
+
+  .text 0 :
+  {
+    *(.literal .text)
+  }
+
+  .bss 0 :
+  {
+    *(.dynsbss)
+    *(.sbss)
+    *(.scommon)
+    *(.dynbss)
+    *(.bss)
+    *(COMMON)
+  }
+  .debug  0 :  { *(.debug) }
+  .line  0 :  { *(.line) }
+  .debug_srcinfo  0 :  { *(.debug_srcinfo) }
+  .debug_sfnames  0 :  { *(.debug_sfnames) }
+  .debug_aranges  0 :  { *(.debug_aranges) }
+  .debug_pubnames  0 :  { *(.debug_pubnames) }
+  .debug_info  0 :  { *(.debug_info) }
+  .debug_abbrev  0 :  { *(.debug_abbrev) }
+  .debug_line  0 :  { *(.debug_line) }
+  .debug_frame  0 :  { *(.debug_frame) }
+  .debug_str  0 :  { *(.debug_str) }
+  .debug_loc  0 :  { *(.debug_loc) }
+  .debug_macinfo  0 :  { *(.debug_macinfo) }
+  .debug_weaknames  0 :  { *(.debug_weaknames) }
+  .debug_funcnames  0 :  { *(.debug_funcnames) }
+  .debug_typenames  0 :  { *(.debug_typenames) }
+  .debug_varnames  0 :  { *(.debug_varnames) }
+  .xt.insn 0 :
+  {
+    KEEP (*(.xt.insn))
+    KEEP (*(.gnu.linkonce.x.*))
+  }
+  .xt.prop 0 :
+  {
+    KEEP (*(.xt.prop))
+    KEEP (*(.xt.prop.*))
+    KEEP (*(.gnu.linkonce.prop.*))
+  }
+  .xt.lit 0 :
+  {
+    KEEP (*(.xt.lit))
+    KEEP (*(.xt.lit.*))
+    KEEP (*(.gnu.linkonce.p.*))
+  }
+  .debug.xt.callgraph 0 :
+  {
+    KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
+  }
+}
+

+ 61 - 0
LSP/min-rt_core1_lib0_stack_tcm1/ldscripts/elf32xtensa.xu

@@ -0,0 +1,61 @@
+/* This linker script generated from xt-genldscripts.tpp for LSP C:\Users\DELL\workspace\CSI_DSP_FW\LSP\min-rt_core1_lib0_stack_tcm1 */
+/* Linker Script for ld -Ur */
+
+
+SECTIONS
+{
+
+  .text 0 :
+  {
+    *(.literal .text)
+  }
+
+  .bss 0 :
+  {
+    *(.dynsbss)
+    *(.sbss)
+    *(.scommon)
+    *(.dynbss)
+    *(.bss)
+    *(COMMON)
+  }
+  .debug  0 :  { *(.debug) }
+  .line  0 :  { *(.line) }
+  .debug_srcinfo  0 :  { *(.debug_srcinfo) }
+  .debug_sfnames  0 :  { *(.debug_sfnames) }
+  .debug_aranges  0 :  { *(.debug_aranges) }
+  .debug_pubnames  0 :  { *(.debug_pubnames) }
+  .debug_info  0 :  { *(.debug_info) }
+  .debug_abbrev  0 :  { *(.debug_abbrev) }
+  .debug_line  0 :  { *(.debug_line) }
+  .debug_frame  0 :  { *(.debug_frame) }
+  .debug_str  0 :  { *(.debug_str) }
+  .debug_loc  0 :  { *(.debug_loc) }
+  .debug_macinfo  0 :  { *(.debug_macinfo) }
+  .debug_weaknames  0 :  { *(.debug_weaknames) }
+  .debug_funcnames  0 :  { *(.debug_funcnames) }
+  .debug_typenames  0 :  { *(.debug_typenames) }
+  .debug_varnames  0 :  { *(.debug_varnames) }
+  .xt.insn 0 :
+  {
+    KEEP (*(.xt.insn))
+    KEEP (*(.gnu.linkonce.x.*))
+  }
+  .xt.prop 0 :
+  {
+    KEEP (*(.xt.prop))
+    KEEP (*(.xt.prop.*))
+    KEEP (*(.gnu.linkonce.prop.*))
+  }
+  .xt.lit 0 :
+  {
+    KEEP (*(.xt.lit))
+    KEEP (*(.xt.lit.*))
+    KEEP (*(.gnu.linkonce.p.*))
+  }
+  .debug.xt.callgraph 0 :
+  {
+    KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
+  }
+}
+

+ 81 - 0
LSP/min-rt_core1_lib0_stack_tcm1/memmap.xmm

@@ -0,0 +1,81 @@
+//  Memory map file to generate linker scripts for programs without board I/O.
+
+// Customer ID=16470; Build=0x8e648; Copyright (c) 2004-2015 Cadence Design Systems, Inc.
+//
+// Permission is hereby granted, free of charge, to any person obtaining
+// a copy of this software and associated documentation files (the
+// "Software"), to deal in the Software without restriction, including
+// without limitation the rights to use, copy, modify, merge, publish,
+// distribute, sublicense, and/or sell copies of the Software, and to
+// permit persons to whom the Software is furnished to do so, subject to
+// the following conditions:
+//
+// The above copyright notice and this permission notice shall be included
+// in all copies or substantial portions of the Software.
+//
+// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+// EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+// IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+// CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+// TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+// SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+
+//  Place stack in local RAM:
+PLACE SECTIONS(STACK) WITH_SECTION(.dram1.bss)
+// A memory map is a sequence of memory descriptions and
+// optional parameter assignments.
+//
+// Each memory description has the following format:
+//   BEGIN <name>
+//     <addr> [,<paddr>] : <mem-type> : <mem-name> : <size> [,<psize>]
+//                       : [writable] [,executable] [,device] ;
+//     <segment>*
+//   END <name>
+//
+// where each <segment> description has the following format:
+//     <seg-name> : F|C : <start-addr> - <end-addr> [ : STACK ] [ : HEAP ]
+//                : <section-name>* ;
+//
+// Each parameter assignment is a keyword/value pair in the following format:
+//   <keyword> = <value>                (no spaces in <value>)
+// or
+//   <keyword> = "<value>"              (spaces allowed in <value>)
+//
+// The following primitives are also defined:
+//   PLACE SECTIONS( <section-name>* ) { WITH_SECTION(<section-name>)
+//                                       | IN_SEGMENT(<seg-name>) }
+//
+//   NOLOAD <section-name1> [ <section-name2> ... ]
+//
+// Please refer to the Xtensa LSP Reference Manual for more details.
+//
+VECSELECT=1
+VECRESET=0x20400000
+VECBASE= 0x20400000
+
+BEGIN sram
+0x20400000: extra_mem : sram : 0x00280000 : executable, writable ;
+ sram0 : F : 0x20400000 - 0x20400fff : .DispatchVector.text .ResetVector.text .ResetHandler.literal .ResetHandler.text .DispatchHandler.literal .DispatchHandler.text;
+ sram1 : C : 0x20401000 - 0x205fffff :  HEAP : .sram.rodata .clib.rodata .rtos.rodata .sram.literal  .rtos.literal .clib.literal .sram.text .clib.text .rtos.text .clib.data .clib.percpu.data .rtos.percpu.data .rtos.data .sram.data  __llvm_prf_names .clib.bss .clib.percpu.bss .rtos.percpu.bss .rtos.bss .sram.bss  .debug.bss;
+ sram2 : C : 0x20600000 - 0x2063ffff : .sram2.rodata .rodata .sram2.literal .literal .sram2.text .text .sram2.data .data .sram2.bss .bss;
+ sram3 : C : 0x20640000 - 0x2067ffff : .sram3.rodata .sram3.literal .sram3.text .sram3.data .sram3.bss;
+ END sram
+
+BEGIN dram0
+0xe0180000: dataRam : dram0 : 0x20000 : writable ;
+ dram0_0 : C : 0xe0180000 - 0xe019ffff :.dram0.rodata .dram0.data .dram0.bss .dram0_user.bss;
+END dram0
+
+BEGIN dram1
+0xe01a0000: dataRam : dram1 : 0x20000 : writable ;
+ dram1_0 : C : 0xe01a0000 - 0xe01bffff :STACK :.dram1.rodata .dram1.data .dram1.bss .dram1_user.bss;
+END dram1
+
+BEGIN local_sram
+0xffa00000: sysram : local_sram :   0x180000: writable ;
+  local_sram_0 : C : 0xffa00000 - 0xffb7ffff :.local_sram.bss ;
+ END local_sram
+
+ENTRY = _libinit
+USE_SEGMENT_AREA = ".dram0.data 120832 + 0 end : .dram1.data 120832 + 0 end : .sram2.data 262144 + 0 end "

+ 35 - 0
LSP/min-rt_core1_lib0_stack_tcm1/specs

@@ -0,0 +1,35 @@
+# Customer ID=16470; Build=0x8e648; Copyright (c) 2001-2015 Cadence Design Systems, Inc.
+#
+# Permission is hereby granted, free of charge, to any person obtaining
+# a copy of this software and associated documentation files (the
+# "Software"), to deal in the Software without restriction, including
+# without limitation the rights to use, copy, modify, merge, publish,
+# distribute, sublicense, and/or sell copies of the Software, and to
+# permit persons to whom the Software is furnished to do so, subject to
+# the following conditions:
+#
+# The above copyright notice and this permission notice shall be included
+# in all copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+# IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+# CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+# TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+# SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+
+
+# The %O suffix on the start and end files indicates that the system's
+# standard suffix for object files (e.g., ".o") should be appended.
+# The %s suffix tells the compiler driver to search for the file in the
+# list of known locations for startfiles.
+
+*startfile:
+crti%O%s crtbegin%O%s
+*endfile:
+crtend%O%s crtn%O%s
+
+*lib:
+
+

+ 528 - 0
LSP/min-rt_core1_lib1_stack_tcm1/ldscripts/elf32xtensa.x

@@ -0,0 +1,528 @@
+/* This linker script generated from xt-genldscripts.tpp for LSP C:\Users\DELL\workspace\CSI_DSP_FW\LSP\min-rt_core1_lib1_stack_tcm1 */
+/* Linker Script for default link */
+MEMORY
+{
+  sram0_seg :                         	org = 0x20400000, len = 0x1000
+  sram1_seg :                         	org = 0x20401000, len = 0x1FF000
+  sram2_seg :                         	org = 0x20600000, len = 0x40000
+  sram3_seg :                         	org = 0x20640000, len = 0x40000
+  dram0_0_seg :                       	org = 0xE0182800, len = 0x1D800
+  dram1_0_seg :                       	org = 0xE01A2800, len = 0x1D800
+  local_sram_0_seg :                  	org = 0xFFA00000, len = 0x180000
+}
+
+PHDRS
+{
+  sram0_phdr PT_LOAD;
+  sram1_phdr PT_LOAD;
+  sram1_bss_phdr PT_LOAD;
+  sram2_phdr PT_LOAD;
+  sram2_bss_phdr PT_LOAD;
+  sram3_phdr PT_LOAD;
+  sram3_bss_phdr PT_LOAD;
+  dram0_0_phdr PT_LOAD;
+  dram0_0_bss_phdr PT_LOAD;
+  dram1_0_phdr PT_LOAD;
+  dram1_0_bss_phdr PT_LOAD;
+  local_sram_0_phdr PT_LOAD;
+  local_sram_0_bss_phdr PT_LOAD;
+}
+
+
+/*  Default entry point:  */
+ENTRY(_libinit)
+
+
+/*  Memory boundary addresses:  */
+_memmap_mem_sram_start = 0x20400000;
+_memmap_mem_sram_end   = 0x20680000;
+_memmap_mem_dram0_start = 0xe0180000;
+_memmap_mem_dram0_end   = 0xe01a0000;
+_memmap_mem_dram1_start = 0xe01a0000;
+_memmap_mem_dram1_end   = 0xe01c0000;
+_memmap_mem_local_sram_start = 0xffa00000;
+_memmap_mem_local_sram_end   = 0xffb80000;
+
+/*  Memory segment boundary addresses:  */
+_memmap_seg_sram0_start = 0x20400000;
+_memmap_seg_sram0_max   = 0x20401000;
+_memmap_seg_sram1_start = 0x20401000;
+_memmap_seg_sram1_max   = 0x20600000;
+_memmap_seg_sram2_start = 0x20600000;
+_memmap_seg_sram2_max   = 0x20640000;
+_memmap_seg_sram3_start = 0x20640000;
+_memmap_seg_sram3_max   = 0x20680000;
+_memmap_seg_dram0_0_start = 0xe0182800;
+_memmap_seg_dram0_0_max   = 0xe01a0000;
+_memmap_seg_dram1_0_start = 0xe01a2800;
+_memmap_seg_dram1_0_max   = 0xe01c0000;
+_memmap_seg_local_sram_0_start = 0xffa00000;
+_memmap_seg_local_sram_0_max   = 0xffb80000;
+
+_rom_store_table = 0;
+PROVIDE(_memmap_reset_vector = 0x20400000);
+PROVIDE(_memmap_vecbase_reset = 0x20400000);
+/* Various memory-map dependent cache attribute settings: */
+_memmap_cacheattr_wb_base = 0x10000010;
+_memmap_cacheattr_wt_base = 0x30000030;
+_memmap_cacheattr_bp_base = 0x40000040;
+_memmap_cacheattr_unused_mask = 0x0FFFFF0F;
+_memmap_cacheattr_wb_trapnull = 0x14444411;
+_memmap_cacheattr_wba_trapnull = 0x14444410;
+_memmap_cacheattr_wbna_trapnull = 0x24444420;
+_memmap_cacheattr_wt_trapnull = 0x34444430;
+_memmap_cacheattr_bp_trapnull = 0x44444440;
+_memmap_cacheattr_wb_strict = 0x10000010;
+_memmap_cacheattr_wt_strict = 0x30000030;
+_memmap_cacheattr_bp_strict = 0x40000040;
+_memmap_cacheattr_wb_allvalid = 0x14444414;
+_memmap_cacheattr_wt_allvalid = 0x34444434;
+_memmap_cacheattr_bp_allvalid = 0x44444444;
+_memmap_region_map = 0x00000082;
+PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
+
+SECTIONS
+{
+
+  .DispatchVector.text : ALIGN(4)
+  {
+    _DispatchVector_text_start = ABSOLUTE(.);
+    KEEP (*(.DispatchVector.text))
+    . = ALIGN (4);
+    _DispatchVector_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .ResetVector.text : ALIGN(4)
+  {
+    _ResetVector_text_start = ABSOLUTE(.);
+    *(.ResetVector.text)
+    . = ALIGN (4);
+    _ResetVector_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .ResetHandler.text : ALIGN(4)
+  {
+    _ResetHandler_text_start = ABSOLUTE(.);
+    *(.ResetHandler.literal .ResetHandler.text)
+    . = ALIGN (4);
+    _ResetHandler_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .DispatchHandler.text : ALIGN(4)
+  {
+    _DispatchHandler_text_start = ABSOLUTE(.);
+    *(.DispatchHandler.literal .DispatchHandler.text)
+    . = ALIGN (4);
+    _DispatchHandler_text_end = ABSOLUTE(.);
+    _memmap_seg_sram0_end = ALIGN(0x8);
+  } >sram0_seg :sram0_phdr
+
+
+  .sram.rodata : ALIGN(4)
+  {
+    _sram_rodata_start = ABSOLUTE(.);
+    *(.sram.rodata)
+    . = ALIGN (4);
+    _sram_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.rodata : ALIGN(4)
+  {
+    _clib_rodata_start = ABSOLUTE(.);
+    *(.clib.rodata)
+    . = ALIGN (4);
+    _clib_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.rodata : ALIGN(4)
+  {
+    _rtos_rodata_start = ABSOLUTE(.);
+    *(.rtos.rodata)
+    . = ALIGN (4);
+    _rtos_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .sram.text : ALIGN(4)
+  {
+    _sram_text_start = ABSOLUTE(.);
+    *(.sram.literal .sram.text)
+    . = ALIGN (4);
+    _sram_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.text : ALIGN(4)
+  {
+    _clib_text_start = ABSOLUTE(.);
+    *(.clib.literal .clib.text)
+    . = ALIGN (4);
+    _clib_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.text : ALIGN(4)
+  {
+    _rtos_text_start = ABSOLUTE(.);
+    *(.rtos.literal .rtos.text)
+    . = ALIGN (4);
+    _rtos_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.data : ALIGN(4)
+  {
+    _clib_data_start = ABSOLUTE(.);
+    *(.clib.data)
+    . = ALIGN (4);
+    _clib_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.percpu.data : ALIGN(4)
+  {
+    _clib_percpu_data_start = ABSOLUTE(.);
+    *(.clib.percpu.data)
+    . = ALIGN (4);
+    _clib_percpu_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.percpu.data : ALIGN(4)
+  {
+    _rtos_percpu_data_start = ABSOLUTE(.);
+    *(.rtos.percpu.data)
+    . = ALIGN (4);
+    _rtos_percpu_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.data : ALIGN(4)
+  {
+    _rtos_data_start = ABSOLUTE(.);
+    *(.rtos.data)
+    . = ALIGN (4);
+    _rtos_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .sram.data : ALIGN(4)
+  {
+    _sram_data_start = ABSOLUTE(.);
+    *(.sram.data)
+    . = ALIGN (4);
+    _sram_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  __llvm_prf_names : ALIGN(4)
+  {
+    __llvm_prf_names_start = ABSOLUTE(.);
+    *(__llvm_prf_names)
+    . = ALIGN (4);
+    __llvm_prf_names_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _clib_bss_start = ABSOLUTE(.);
+    *(.clib.bss)
+    *(.clib.percpu.bss)
+    *(.rtos.percpu.bss)
+    *(.rtos.bss)
+    *(.sram.bss)
+    *(.debug.bss)
+    . = ALIGN (8);
+    _clib_bss_end = ABSOLUTE(.);
+    _end = ALIGN(0x8);
+    PROVIDE(end = ALIGN(0x8));
+    _memmap_seg_sram1_end = ALIGN(0x8);
+  } >sram1_seg :sram1_bss_phdr
+
+  _heap_sentry = 0x20600000;
+
+  .sram2.rodata : ALIGN(4)
+  {
+    _sram2_rodata_start = ABSOLUTE(.);
+    *(.sram2.rodata)
+    . = ALIGN (4);
+    _sram2_rodata_end = ABSOLUTE(.);
+  } >sram2_seg :sram2_phdr
+
+  .sram2.text : ALIGN(4)
+  {
+    _sram2_text_start = ABSOLUTE(.);
+    *(.sram2.literal .sram2.text)
+    . = ALIGN (4);
+    _sram2_text_end = ABSOLUTE(.);
+  } >sram2_seg :sram2_phdr
+
+  .sram2.data : ALIGN(4)
+  {
+    _sram2_data_start = ABSOLUTE(.);
+    *(.sram2.data)
+    . = ALIGN (4);
+    _sram2_data_end = ABSOLUTE(.);
+  } >sram2_seg :sram2_phdr
+
+  .sram2.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _sram2_bss_start = ABSOLUTE(.);
+    *(.sram2.bss)
+    . = ALIGN (8);
+    _sram2_bss_end = ABSOLUTE(.);
+    _memmap_seg_sram2_end = ALIGN(0x8);
+  } >sram2_seg :sram2_bss_phdr
+
+
+  .sram3.rodata : ALIGN(4)
+  {
+    _sram3_rodata_start = ABSOLUTE(.);
+    *(.sram3.rodata)
+    . = ALIGN (4);
+    _sram3_rodata_end = ABSOLUTE(.);
+  } >sram3_seg :sram3_phdr
+
+  .rodata : ALIGN(4)
+  {
+    _rodata_start = ABSOLUTE(.);
+    *(.rodata)
+    *(SORT(.rodata.sort.*))
+    KEEP (*(SORT(.rodata.keepsort.*) .rodata.keep.*))
+    *(.rodata.*)
+    *(.gnu.linkonce.r.*)
+    *(.rodata1)
+    __XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
+    KEEP (*(.xt_except_table))
+    KEEP (*(.gcc_except_table))
+    *(.gnu.linkonce.e.*)
+    *(.gnu.version_r)
+    KEEP (*(.eh_frame))
+    /*  C++ constructor and destructor tables, properly ordered:  */
+    KEEP (*crtbegin.o(.ctors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*(.ctors))
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*(.dtors))
+    /*  C++ exception handlers table:  */
+    __XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
+    *(.xt_except_desc)
+    *(.gnu.linkonce.h.*)
+    __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
+    *(.xt_except_desc_end)
+    *(.dynamic)
+    *(.gnu.version_d)
+    . = ALIGN(4);		/* this table MUST be 4-byte aligned */
+    _bss_table_start = ABSOLUTE(.);
+    LONG(_clib_bss_start)
+    LONG(_clib_bss_end)
+    LONG(_sram2_bss_start)
+    LONG(_sram2_bss_end)
+    LONG(_bss_start)
+    LONG(_bss_end)
+    LONG(_dram0_bss_start)
+    LONG(_dram0_bss_end)
+    LONG(_dram1_bss_start)
+    LONG(_dram1_bss_end)
+    LONG(_local_sram_bss_start)
+    LONG(_local_sram_bss_end)
+    _bss_table_end = ABSOLUTE(.);
+    . = ALIGN (4);
+    _rodata_end = ABSOLUTE(.);
+  } >sram3_seg :sram3_phdr
+
+  .sram3.text : ALIGN(4)
+  {
+    _sram3_text_start = ABSOLUTE(.);
+    *(.sram3.literal .sram3.text)
+    . = ALIGN (4);
+    _sram3_text_end = ABSOLUTE(.);
+  } >sram3_seg :sram3_phdr
+
+  .text : ALIGN(4)
+  {
+    _stext = .;
+    _text_start = ABSOLUTE(.);
+    *(.entry.text)
+    *(.init.literal)
+    KEEP(*(.init))
+    *(.literal.sort.* SORT(.text.sort.*))
+    KEEP (*(.literal.keepsort.* SORT(.text.keepsort.*) .literal.keep.* .text.keep.* .literal.*personality* .text.*personality*))
+    *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
+    *(.fini.literal)
+    KEEP(*(.fini))
+    *(.gnu.version)
+    . = ALIGN (4);
+    _text_end = ABSOLUTE(.);
+    _etext = .;
+  } >sram3_seg :sram3_phdr
+
+  .sram3.data : ALIGN(4)
+  {
+    _sram3_data_start = ABSOLUTE(.);
+    *(.sram3.data)
+    . = ALIGN (4);
+    _sram3_data_end = ABSOLUTE(.);
+  } >sram3_seg :sram3_phdr
+
+  .data : ALIGN(4)
+  {
+    _data_start = ABSOLUTE(.);
+    *(.data)
+    *(SORT(.data.sort.*))
+    KEEP (*(SORT(.data.keepsort.*) .data.keep.*))
+    *(.data.*)
+    *(.gnu.linkonce.d.*)
+    KEEP(*(.gnu.linkonce.d.*personality*))
+    *(.data1)
+    *(.sdata)
+    *(.sdata.*)
+    *(.gnu.linkonce.s.*)
+    *(.sdata2)
+    *(.sdata2.*)
+    *(.gnu.linkonce.s2.*)
+    KEEP(*(.jcr))
+    *(__llvm_prf_cnts)
+    *(__llvm_prf_data)
+    *(__llvm_prf_vnds)
+    . = ALIGN (4);
+    _data_end = ABSOLUTE(.);
+  } >sram3_seg :sram3_phdr
+
+  .bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _bss_start = ABSOLUTE(.);
+    *(.dynsbss)
+    *(.sbss)
+    *(.sbss.*)
+    *(.gnu.linkonce.sb.*)
+    *(.scommon)
+    *(.sbss2)
+    *(.sbss2.*)
+    *(.gnu.linkonce.sb2.*)
+    *(.dynbss)
+    *(.bss)
+    *(SORT(.bss.sort.*))
+    KEEP (*(SORT(.bss.keepsort.*) .bss.keep.*))
+    *(.bss.*)
+    *(.gnu.linkonce.b.*)
+    *(COMMON)
+    *(.sram3.bss)
+    . = ALIGN (8);
+    _bss_end = ABSOLUTE(.);
+    _memmap_seg_sram3_end = ALIGN(0x8);
+  } >sram3_seg :sram3_bss_phdr
+
+  _memmap_mem_sram_max = ABSOLUTE(.);
+
+  .dram0.rodata : ALIGN(4)
+  {
+    _dram0_rodata_start = ABSOLUTE(.);
+    *(.dram0.rodata)
+    . = ALIGN (4);
+    _dram0_rodata_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.data : ALIGN(4)
+  {
+    _dram0_data_start = ABSOLUTE(.);
+    *(.dram0.data)
+    . = ALIGN (4);
+    _dram0_data_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dram0_bss_start = ABSOLUTE(.);
+    *(.dram0.bss)
+    *(.dram0_user.bss)
+    . = ALIGN (8);
+    _dram0_bss_end = ABSOLUTE(.);
+    _memmap_seg_dram0_0_end = ALIGN(0x8);
+  } >dram0_0_seg :dram0_0_bss_phdr
+
+  _memmap_mem_dram0_max = ABSOLUTE(.);
+
+  .dram1.rodata : ALIGN(4)
+  {
+    _dram1_rodata_start = ABSOLUTE(.);
+    *(.dram1.rodata)
+    . = ALIGN (4);
+    _dram1_rodata_end = ABSOLUTE(.);
+  } >dram1_0_seg :dram1_0_phdr
+
+  .dram1.data : ALIGN(4)
+  {
+    _dram1_data_start = ABSOLUTE(.);
+    *(.dram1.data)
+    . = ALIGN (4);
+    _dram1_data_end = ABSOLUTE(.);
+  } >dram1_0_seg :dram1_0_phdr
+
+  .dram1.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dram1_bss_start = ABSOLUTE(.);
+    *(.dram1.bss)
+    *(.dram1_user.bss)
+    . = ALIGN (8);
+    _dram1_bss_end = ABSOLUTE(.);
+    _stack_sentry = ALIGN(0x8);
+    _memmap_seg_dram1_0_end = ALIGN(0x8);
+  } >dram1_0_seg :dram1_0_bss_phdr
+
+  PROVIDE(__stack = 0xe01c0000);
+  _isb_default = 0xe01bfe10;
+  _memmap_mem_dram1_max = ABSOLUTE(.);
+
+  .local_sram.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _local_sram_bss_start = ABSOLUTE(.);
+    *(.local_sram.bss)
+    . = ALIGN (8);
+    _local_sram_bss_end = ABSOLUTE(.);
+    _memmap_seg_local_sram_0_end = ALIGN(0x8);
+  } >local_sram_0_seg :local_sram_0_bss_phdr
+
+
+  _memmap_mem_local_sram_max = ABSOLUTE(.);
+
+  .debug  0 :  { *(.debug) }
+  .line  0 :  { *(.line) }
+  .debug_srcinfo  0 :  { *(.debug_srcinfo) }
+  .debug_sfnames  0 :  { *(.debug_sfnames) }
+  .debug_aranges  0 :  { *(.debug_aranges) }
+  .debug_pubnames  0 :  { *(.debug_pubnames) }
+  .debug_info  0 :  { *(.debug_info) }
+  .debug_abbrev  0 :  { *(.debug_abbrev) }
+  .debug_line  0 :  { *(.debug_line) }
+  .debug_frame  0 :  { *(.debug_frame) }
+  .debug_str  0 :  { *(.debug_str) }
+  .debug_loc  0 :  { *(.debug_loc) }
+  .debug_macinfo  0 :  { *(.debug_macinfo) }
+  .debug_weaknames  0 :  { *(.debug_weaknames) }
+  .debug_funcnames  0 :  { *(.debug_funcnames) }
+  .debug_typenames  0 :  { *(.debug_typenames) }
+  .debug_varnames  0 :  { *(.debug_varnames) }
+  .xt.insn 0 :
+  {
+    KEEP (*(.xt.insn))
+    KEEP (*(.gnu.linkonce.x.*))
+  }
+  .xt.prop 0 :
+  {
+    KEEP (*(.xt.prop))
+    KEEP (*(.xt.prop.*))
+    KEEP (*(.gnu.linkonce.prop.*))
+  }
+  .xt.lit 0 :
+  {
+    KEEP (*(.xt.lit))
+    KEEP (*(.xt.lit.*))
+    KEEP (*(.gnu.linkonce.p.*))
+  }
+  .debug.xt.callgraph 0 :
+  {
+    KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
+  }
+}
+

+ 528 - 0
LSP/min-rt_core1_lib1_stack_tcm1/ldscripts/elf32xtensa.xbn

@@ -0,0 +1,528 @@
+/* This linker script generated from xt-genldscripts.tpp for LSP C:\Users\DELL\workspace\CSI_DSP_FW\LSP\min-rt_core1_lib1_stack_tcm1 */
+/* Linker Script for ld -N */
+MEMORY
+{
+  sram0_seg :                         	org = 0x20400000, len = 0x1000
+  sram1_seg :                         	org = 0x20401000, len = 0x1FF000
+  sram2_seg :                         	org = 0x20600000, len = 0x40000
+  sram3_seg :                         	org = 0x20640000, len = 0x40000
+  dram0_0_seg :                       	org = 0xE0182800, len = 0x1D800
+  dram1_0_seg :                       	org = 0xE01A2800, len = 0x1D800
+  local_sram_0_seg :                  	org = 0xFFA00000, len = 0x180000
+}
+
+PHDRS
+{
+  sram0_phdr PT_LOAD;
+  sram1_phdr PT_LOAD;
+  sram1_bss_phdr PT_LOAD;
+  sram2_phdr PT_LOAD;
+  sram2_bss_phdr PT_LOAD;
+  sram3_phdr PT_LOAD;
+  sram3_bss_phdr PT_LOAD;
+  dram0_0_phdr PT_LOAD;
+  dram0_0_bss_phdr PT_LOAD;
+  dram1_0_phdr PT_LOAD;
+  dram1_0_bss_phdr PT_LOAD;
+  local_sram_0_phdr PT_LOAD;
+  local_sram_0_bss_phdr PT_LOAD;
+}
+
+
+/*  Default entry point:  */
+ENTRY(_libinit)
+
+
+/*  Memory boundary addresses:  */
+_memmap_mem_sram_start = 0x20400000;
+_memmap_mem_sram_end   = 0x20680000;
+_memmap_mem_dram0_start = 0xe0180000;
+_memmap_mem_dram0_end   = 0xe01a0000;
+_memmap_mem_dram1_start = 0xe01a0000;
+_memmap_mem_dram1_end   = 0xe01c0000;
+_memmap_mem_local_sram_start = 0xffa00000;
+_memmap_mem_local_sram_end   = 0xffb80000;
+
+/*  Memory segment boundary addresses:  */
+_memmap_seg_sram0_start = 0x20400000;
+_memmap_seg_sram0_max   = 0x20401000;
+_memmap_seg_sram1_start = 0x20401000;
+_memmap_seg_sram1_max   = 0x20600000;
+_memmap_seg_sram2_start = 0x20600000;
+_memmap_seg_sram2_max   = 0x20640000;
+_memmap_seg_sram3_start = 0x20640000;
+_memmap_seg_sram3_max   = 0x20680000;
+_memmap_seg_dram0_0_start = 0xe0182800;
+_memmap_seg_dram0_0_max   = 0xe01a0000;
+_memmap_seg_dram1_0_start = 0xe01a2800;
+_memmap_seg_dram1_0_max   = 0xe01c0000;
+_memmap_seg_local_sram_0_start = 0xffa00000;
+_memmap_seg_local_sram_0_max   = 0xffb80000;
+
+_rom_store_table = 0;
+PROVIDE(_memmap_reset_vector = 0x20400000);
+PROVIDE(_memmap_vecbase_reset = 0x20400000);
+/* Various memory-map dependent cache attribute settings: */
+_memmap_cacheattr_wb_base = 0x10000010;
+_memmap_cacheattr_wt_base = 0x30000030;
+_memmap_cacheattr_bp_base = 0x40000040;
+_memmap_cacheattr_unused_mask = 0x0FFFFF0F;
+_memmap_cacheattr_wb_trapnull = 0x14444410;
+_memmap_cacheattr_wba_trapnull = 0x14444410;
+_memmap_cacheattr_wbna_trapnull = 0x24444420;
+_memmap_cacheattr_wt_trapnull = 0x34444430;
+_memmap_cacheattr_bp_trapnull = 0x44444440;
+_memmap_cacheattr_wb_strict = 0x10000010;
+_memmap_cacheattr_wt_strict = 0x30000030;
+_memmap_cacheattr_bp_strict = 0x40000040;
+_memmap_cacheattr_wb_allvalid = 0x14444414;
+_memmap_cacheattr_wt_allvalid = 0x34444434;
+_memmap_cacheattr_bp_allvalid = 0x44444444;
+_memmap_region_map = 0x00000082;
+PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
+
+SECTIONS
+{
+
+  .DispatchVector.text : ALIGN(4)
+  {
+    _DispatchVector_text_start = ABSOLUTE(.);
+    KEEP (*(.DispatchVector.text))
+    . = ALIGN (4);
+    _DispatchVector_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .ResetVector.text : ALIGN(4)
+  {
+    _ResetVector_text_start = ABSOLUTE(.);
+    *(.ResetVector.text)
+    . = ALIGN (4);
+    _ResetVector_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .ResetHandler.text : ALIGN(4)
+  {
+    _ResetHandler_text_start = ABSOLUTE(.);
+    *(.ResetHandler.literal .ResetHandler.text)
+    . = ALIGN (4);
+    _ResetHandler_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .DispatchHandler.text : ALIGN(4)
+  {
+    _DispatchHandler_text_start = ABSOLUTE(.);
+    *(.DispatchHandler.literal .DispatchHandler.text)
+    . = ALIGN (4);
+    _DispatchHandler_text_end = ABSOLUTE(.);
+    _memmap_seg_sram0_end = ALIGN(0x8);
+  } >sram0_seg :sram0_phdr
+
+
+  .sram.rodata : ALIGN(4)
+  {
+    _sram_rodata_start = ABSOLUTE(.);
+    *(.sram.rodata)
+    . = ALIGN (4);
+    _sram_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.rodata : ALIGN(4)
+  {
+    _clib_rodata_start = ABSOLUTE(.);
+    *(.clib.rodata)
+    . = ALIGN (4);
+    _clib_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.rodata : ALIGN(4)
+  {
+    _rtos_rodata_start = ABSOLUTE(.);
+    *(.rtos.rodata)
+    . = ALIGN (4);
+    _rtos_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .sram.text : ALIGN(4)
+  {
+    _sram_text_start = ABSOLUTE(.);
+    *(.sram.literal .sram.text)
+    . = ALIGN (4);
+    _sram_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.text : ALIGN(4)
+  {
+    _clib_text_start = ABSOLUTE(.);
+    *(.clib.literal .clib.text)
+    . = ALIGN (4);
+    _clib_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.text : ALIGN(4)
+  {
+    _rtos_text_start = ABSOLUTE(.);
+    *(.rtos.literal .rtos.text)
+    . = ALIGN (4);
+    _rtos_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.data : ALIGN(4)
+  {
+    _clib_data_start = ABSOLUTE(.);
+    *(.clib.data)
+    . = ALIGN (4);
+    _clib_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.percpu.data : ALIGN(4)
+  {
+    _clib_percpu_data_start = ABSOLUTE(.);
+    *(.clib.percpu.data)
+    . = ALIGN (4);
+    _clib_percpu_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.percpu.data : ALIGN(4)
+  {
+    _rtos_percpu_data_start = ABSOLUTE(.);
+    *(.rtos.percpu.data)
+    . = ALIGN (4);
+    _rtos_percpu_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.data : ALIGN(4)
+  {
+    _rtos_data_start = ABSOLUTE(.);
+    *(.rtos.data)
+    . = ALIGN (4);
+    _rtos_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .sram.data : ALIGN(4)
+  {
+    _sram_data_start = ABSOLUTE(.);
+    *(.sram.data)
+    . = ALIGN (4);
+    _sram_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  __llvm_prf_names : ALIGN(4)
+  {
+    __llvm_prf_names_start = ABSOLUTE(.);
+    *(__llvm_prf_names)
+    . = ALIGN (4);
+    __llvm_prf_names_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _clib_bss_start = ABSOLUTE(.);
+    *(.clib.bss)
+    *(.clib.percpu.bss)
+    *(.rtos.percpu.bss)
+    *(.rtos.bss)
+    *(.sram.bss)
+    *(.debug.bss)
+    . = ALIGN (8);
+    _clib_bss_end = ABSOLUTE(.);
+    _end = ALIGN(0x8);
+    PROVIDE(end = ALIGN(0x8));
+    _memmap_seg_sram1_end = ALIGN(0x8);
+  } >sram1_seg :sram1_bss_phdr
+
+  _heap_sentry = 0x20600000;
+
+  .sram2.rodata : ALIGN(4)
+  {
+    _sram2_rodata_start = ABSOLUTE(.);
+    *(.sram2.rodata)
+    . = ALIGN (4);
+    _sram2_rodata_end = ABSOLUTE(.);
+  } >sram2_seg :sram2_phdr
+
+  .sram2.text : ALIGN(4)
+  {
+    _sram2_text_start = ABSOLUTE(.);
+    *(.sram2.literal .sram2.text)
+    . = ALIGN (4);
+    _sram2_text_end = ABSOLUTE(.);
+  } >sram2_seg :sram2_phdr
+
+  .sram2.data : ALIGN(4)
+  {
+    _sram2_data_start = ABSOLUTE(.);
+    *(.sram2.data)
+    . = ALIGN (4);
+    _sram2_data_end = ABSOLUTE(.);
+  } >sram2_seg :sram2_phdr
+
+  .sram2.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _sram2_bss_start = ABSOLUTE(.);
+    *(.sram2.bss)
+    . = ALIGN (8);
+    _sram2_bss_end = ABSOLUTE(.);
+    _memmap_seg_sram2_end = ALIGN(0x8);
+  } >sram2_seg :sram2_bss_phdr
+
+
+  .sram3.rodata : ALIGN(4)
+  {
+    _sram3_rodata_start = ABSOLUTE(.);
+    *(.sram3.rodata)
+    . = ALIGN (4);
+    _sram3_rodata_end = ABSOLUTE(.);
+  } >sram3_seg :sram3_phdr
+
+  .rodata : ALIGN(4)
+  {
+    _rodata_start = ABSOLUTE(.);
+    *(.rodata)
+    *(SORT(.rodata.sort.*))
+    KEEP (*(SORT(.rodata.keepsort.*) .rodata.keep.*))
+    *(.rodata.*)
+    *(.gnu.linkonce.r.*)
+    *(.rodata1)
+    __XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
+    KEEP (*(.xt_except_table))
+    KEEP (*(.gcc_except_table))
+    *(.gnu.linkonce.e.*)
+    *(.gnu.version_r)
+    KEEP (*(.eh_frame))
+    /*  C++ constructor and destructor tables, properly ordered:  */
+    KEEP (*crtbegin.o(.ctors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*(.ctors))
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*(.dtors))
+    /*  C++ exception handlers table:  */
+    __XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
+    *(.xt_except_desc)
+    *(.gnu.linkonce.h.*)
+    __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
+    *(.xt_except_desc_end)
+    *(.dynamic)
+    *(.gnu.version_d)
+    . = ALIGN(4);		/* this table MUST be 4-byte aligned */
+    _bss_table_start = ABSOLUTE(.);
+    LONG(_clib_bss_start)
+    LONG(_clib_bss_end)
+    LONG(_sram2_bss_start)
+    LONG(_sram2_bss_end)
+    LONG(_bss_start)
+    LONG(_bss_end)
+    LONG(_dram0_bss_start)
+    LONG(_dram0_bss_end)
+    LONG(_dram1_bss_start)
+    LONG(_dram1_bss_end)
+    LONG(_local_sram_bss_start)
+    LONG(_local_sram_bss_end)
+    _bss_table_end = ABSOLUTE(.);
+    . = ALIGN (4);
+    _rodata_end = ABSOLUTE(.);
+  } >sram3_seg :sram3_phdr
+
+  .sram3.text : ALIGN(4)
+  {
+    _sram3_text_start = ABSOLUTE(.);
+    *(.sram3.literal .sram3.text)
+    . = ALIGN (4);
+    _sram3_text_end = ABSOLUTE(.);
+  } >sram3_seg :sram3_phdr
+
+  .text : ALIGN(4)
+  {
+    _stext = .;
+    _text_start = ABSOLUTE(.);
+    *(.entry.text)
+    *(.init.literal)
+    KEEP(*(.init))
+    *(.literal.sort.* SORT(.text.sort.*))
+    KEEP (*(.literal.keepsort.* SORT(.text.keepsort.*) .literal.keep.* .text.keep.* .literal.*personality* .text.*personality*))
+    *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
+    *(.fini.literal)
+    KEEP(*(.fini))
+    *(.gnu.version)
+    . = ALIGN (4);
+    _text_end = ABSOLUTE(.);
+    _etext = .;
+  } >sram3_seg :sram3_phdr
+
+  .sram3.data : ALIGN(4)
+  {
+    _sram3_data_start = ABSOLUTE(.);
+    *(.sram3.data)
+    . = ALIGN (4);
+    _sram3_data_end = ABSOLUTE(.);
+  } >sram3_seg :sram3_phdr
+
+  .data : ALIGN(4)
+  {
+    _data_start = ABSOLUTE(.);
+    *(.data)
+    *(SORT(.data.sort.*))
+    KEEP (*(SORT(.data.keepsort.*) .data.keep.*))
+    *(.data.*)
+    *(.gnu.linkonce.d.*)
+    KEEP(*(.gnu.linkonce.d.*personality*))
+    *(.data1)
+    *(.sdata)
+    *(.sdata.*)
+    *(.gnu.linkonce.s.*)
+    *(.sdata2)
+    *(.sdata2.*)
+    *(.gnu.linkonce.s2.*)
+    KEEP(*(.jcr))
+    *(__llvm_prf_cnts)
+    *(__llvm_prf_data)
+    *(__llvm_prf_vnds)
+    . = ALIGN (4);
+    _data_end = ABSOLUTE(.);
+  } >sram3_seg :sram3_phdr
+
+  .bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _bss_start = ABSOLUTE(.);
+    *(.dynsbss)
+    *(.sbss)
+    *(.sbss.*)
+    *(.gnu.linkonce.sb.*)
+    *(.scommon)
+    *(.sbss2)
+    *(.sbss2.*)
+    *(.gnu.linkonce.sb2.*)
+    *(.dynbss)
+    *(.bss)
+    *(SORT(.bss.sort.*))
+    KEEP (*(SORT(.bss.keepsort.*) .bss.keep.*))
+    *(.bss.*)
+    *(.gnu.linkonce.b.*)
+    *(COMMON)
+    *(.sram3.bss)
+    . = ALIGN (8);
+    _bss_end = ABSOLUTE(.);
+    _memmap_seg_sram3_end = ALIGN(0x8);
+  } >sram3_seg :sram3_bss_phdr
+
+  _memmap_mem_sram_max = ABSOLUTE(.);
+
+  .dram0.rodata : ALIGN(4)
+  {
+    _dram0_rodata_start = ABSOLUTE(.);
+    *(.dram0.rodata)
+    . = ALIGN (4);
+    _dram0_rodata_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.data : ALIGN(4)
+  {
+    _dram0_data_start = ABSOLUTE(.);
+    *(.dram0.data)
+    . = ALIGN (4);
+    _dram0_data_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dram0_bss_start = ABSOLUTE(.);
+    *(.dram0.bss)
+    *(.dram0_user.bss)
+    . = ALIGN (8);
+    _dram0_bss_end = ABSOLUTE(.);
+    _memmap_seg_dram0_0_end = ALIGN(0x8);
+  } >dram0_0_seg :dram0_0_bss_phdr
+
+  _memmap_mem_dram0_max = ABSOLUTE(.);
+
+  .dram1.rodata : ALIGN(4)
+  {
+    _dram1_rodata_start = ABSOLUTE(.);
+    *(.dram1.rodata)
+    . = ALIGN (4);
+    _dram1_rodata_end = ABSOLUTE(.);
+  } >dram1_0_seg :dram1_0_phdr
+
+  .dram1.data : ALIGN(4)
+  {
+    _dram1_data_start = ABSOLUTE(.);
+    *(.dram1.data)
+    . = ALIGN (4);
+    _dram1_data_end = ABSOLUTE(.);
+  } >dram1_0_seg :dram1_0_phdr
+
+  .dram1.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dram1_bss_start = ABSOLUTE(.);
+    *(.dram1.bss)
+    *(.dram1_user.bss)
+    . = ALIGN (8);
+    _dram1_bss_end = ABSOLUTE(.);
+    _stack_sentry = ALIGN(0x8);
+    _memmap_seg_dram1_0_end = ALIGN(0x8);
+  } >dram1_0_seg :dram1_0_bss_phdr
+
+  PROVIDE(__stack = 0xe01c0000);
+  _isb_default = 0xe01bfe10;
+  _memmap_mem_dram1_max = ABSOLUTE(.);
+
+  .local_sram.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _local_sram_bss_start = ABSOLUTE(.);
+    *(.local_sram.bss)
+    . = ALIGN (8);
+    _local_sram_bss_end = ABSOLUTE(.);
+    _memmap_seg_local_sram_0_end = ALIGN(0x8);
+  } >local_sram_0_seg :local_sram_0_bss_phdr
+
+
+  _memmap_mem_local_sram_max = ABSOLUTE(.);
+
+  .debug  0 :  { *(.debug) }
+  .line  0 :  { *(.line) }
+  .debug_srcinfo  0 :  { *(.debug_srcinfo) }
+  .debug_sfnames  0 :  { *(.debug_sfnames) }
+  .debug_aranges  0 :  { *(.debug_aranges) }
+  .debug_pubnames  0 :  { *(.debug_pubnames) }
+  .debug_info  0 :  { *(.debug_info) }
+  .debug_abbrev  0 :  { *(.debug_abbrev) }
+  .debug_line  0 :  { *(.debug_line) }
+  .debug_frame  0 :  { *(.debug_frame) }
+  .debug_str  0 :  { *(.debug_str) }
+  .debug_loc  0 :  { *(.debug_loc) }
+  .debug_macinfo  0 :  { *(.debug_macinfo) }
+  .debug_weaknames  0 :  { *(.debug_weaknames) }
+  .debug_funcnames  0 :  { *(.debug_funcnames) }
+  .debug_typenames  0 :  { *(.debug_typenames) }
+  .debug_varnames  0 :  { *(.debug_varnames) }
+  .xt.insn 0 :
+  {
+    KEEP (*(.xt.insn))
+    KEEP (*(.gnu.linkonce.x.*))
+  }
+  .xt.prop 0 :
+  {
+    KEEP (*(.xt.prop))
+    KEEP (*(.xt.prop.*))
+    KEEP (*(.gnu.linkonce.prop.*))
+  }
+  .xt.lit 0 :
+  {
+    KEEP (*(.xt.lit))
+    KEEP (*(.xt.lit.*))
+    KEEP (*(.gnu.linkonce.p.*))
+  }
+  .debug.xt.callgraph 0 :
+  {
+    KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
+  }
+}
+

+ 528 - 0
LSP/min-rt_core1_lib1_stack_tcm1/ldscripts/elf32xtensa.xn

@@ -0,0 +1,528 @@
+/* This linker script generated from xt-genldscripts.tpp for LSP C:\Users\DELL\workspace\CSI_DSP_FW\LSP\min-rt_core1_lib1_stack_tcm1 */
+/* Linker Script for ld -n */
+MEMORY
+{
+  sram0_seg :                         	org = 0x20400000, len = 0x1000
+  sram1_seg :                         	org = 0x20401000, len = 0x1FF000
+  sram2_seg :                         	org = 0x20600000, len = 0x40000
+  sram3_seg :                         	org = 0x20640000, len = 0x40000
+  dram0_0_seg :                       	org = 0xE0182800, len = 0x1D800
+  dram1_0_seg :                       	org = 0xE01A2800, len = 0x1D800
+  local_sram_0_seg :                  	org = 0xFFA00000, len = 0x180000
+}
+
+PHDRS
+{
+  sram0_phdr PT_LOAD;
+  sram1_phdr PT_LOAD;
+  sram1_bss_phdr PT_LOAD;
+  sram2_phdr PT_LOAD;
+  sram2_bss_phdr PT_LOAD;
+  sram3_phdr PT_LOAD;
+  sram3_bss_phdr PT_LOAD;
+  dram0_0_phdr PT_LOAD;
+  dram0_0_bss_phdr PT_LOAD;
+  dram1_0_phdr PT_LOAD;
+  dram1_0_bss_phdr PT_LOAD;
+  local_sram_0_phdr PT_LOAD;
+  local_sram_0_bss_phdr PT_LOAD;
+}
+
+
+/*  Default entry point:  */
+ENTRY(_libinit)
+
+
+/*  Memory boundary addresses:  */
+_memmap_mem_sram_start = 0x20400000;
+_memmap_mem_sram_end   = 0x20680000;
+_memmap_mem_dram0_start = 0xe0180000;
+_memmap_mem_dram0_end   = 0xe01a0000;
+_memmap_mem_dram1_start = 0xe01a0000;
+_memmap_mem_dram1_end   = 0xe01c0000;
+_memmap_mem_local_sram_start = 0xffa00000;
+_memmap_mem_local_sram_end   = 0xffb80000;
+
+/*  Memory segment boundary addresses:  */
+_memmap_seg_sram0_start = 0x20400000;
+_memmap_seg_sram0_max   = 0x20401000;
+_memmap_seg_sram1_start = 0x20401000;
+_memmap_seg_sram1_max   = 0x20600000;
+_memmap_seg_sram2_start = 0x20600000;
+_memmap_seg_sram2_max   = 0x20640000;
+_memmap_seg_sram3_start = 0x20640000;
+_memmap_seg_sram3_max   = 0x20680000;
+_memmap_seg_dram0_0_start = 0xe0182800;
+_memmap_seg_dram0_0_max   = 0xe01a0000;
+_memmap_seg_dram1_0_start = 0xe01a2800;
+_memmap_seg_dram1_0_max   = 0xe01c0000;
+_memmap_seg_local_sram_0_start = 0xffa00000;
+_memmap_seg_local_sram_0_max   = 0xffb80000;
+
+_rom_store_table = 0;
+PROVIDE(_memmap_reset_vector = 0x20400000);
+PROVIDE(_memmap_vecbase_reset = 0x20400000);
+/* Various memory-map dependent cache attribute settings: */
+_memmap_cacheattr_wb_base = 0x10000010;
+_memmap_cacheattr_wt_base = 0x30000030;
+_memmap_cacheattr_bp_base = 0x40000040;
+_memmap_cacheattr_unused_mask = 0x0FFFFF0F;
+_memmap_cacheattr_wb_trapnull = 0x14444410;
+_memmap_cacheattr_wba_trapnull = 0x14444410;
+_memmap_cacheattr_wbna_trapnull = 0x24444420;
+_memmap_cacheattr_wt_trapnull = 0x34444430;
+_memmap_cacheattr_bp_trapnull = 0x44444440;
+_memmap_cacheattr_wb_strict = 0x10000010;
+_memmap_cacheattr_wt_strict = 0x30000030;
+_memmap_cacheattr_bp_strict = 0x40000040;
+_memmap_cacheattr_wb_allvalid = 0x14444414;
+_memmap_cacheattr_wt_allvalid = 0x34444434;
+_memmap_cacheattr_bp_allvalid = 0x44444444;
+_memmap_region_map = 0x00000082;
+PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
+
+SECTIONS
+{
+
+  .DispatchVector.text : ALIGN(4)
+  {
+    _DispatchVector_text_start = ABSOLUTE(.);
+    KEEP (*(.DispatchVector.text))
+    . = ALIGN (4);
+    _DispatchVector_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .ResetVector.text : ALIGN(4)
+  {
+    _ResetVector_text_start = ABSOLUTE(.);
+    *(.ResetVector.text)
+    . = ALIGN (4);
+    _ResetVector_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .ResetHandler.text : ALIGN(4)
+  {
+    _ResetHandler_text_start = ABSOLUTE(.);
+    *(.ResetHandler.literal .ResetHandler.text)
+    . = ALIGN (4);
+    _ResetHandler_text_end = ABSOLUTE(.);
+  } >sram0_seg :sram0_phdr
+
+  .DispatchHandler.text : ALIGN(4)
+  {
+    _DispatchHandler_text_start = ABSOLUTE(.);
+    *(.DispatchHandler.literal .DispatchHandler.text)
+    . = ALIGN (4);
+    _DispatchHandler_text_end = ABSOLUTE(.);
+    _memmap_seg_sram0_end = ALIGN(0x8);
+  } >sram0_seg :sram0_phdr
+
+
+  .sram.rodata : ALIGN(4)
+  {
+    _sram_rodata_start = ABSOLUTE(.);
+    *(.sram.rodata)
+    . = ALIGN (4);
+    _sram_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.rodata : ALIGN(4)
+  {
+    _clib_rodata_start = ABSOLUTE(.);
+    *(.clib.rodata)
+    . = ALIGN (4);
+    _clib_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.rodata : ALIGN(4)
+  {
+    _rtos_rodata_start = ABSOLUTE(.);
+    *(.rtos.rodata)
+    . = ALIGN (4);
+    _rtos_rodata_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .sram.text : ALIGN(4)
+  {
+    _sram_text_start = ABSOLUTE(.);
+    *(.sram.literal .sram.text)
+    . = ALIGN (4);
+    _sram_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.text : ALIGN(4)
+  {
+    _clib_text_start = ABSOLUTE(.);
+    *(.clib.literal .clib.text)
+    . = ALIGN (4);
+    _clib_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.text : ALIGN(4)
+  {
+    _rtos_text_start = ABSOLUTE(.);
+    *(.rtos.literal .rtos.text)
+    . = ALIGN (4);
+    _rtos_text_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.data : ALIGN(4)
+  {
+    _clib_data_start = ABSOLUTE(.);
+    *(.clib.data)
+    . = ALIGN (4);
+    _clib_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.percpu.data : ALIGN(4)
+  {
+    _clib_percpu_data_start = ABSOLUTE(.);
+    *(.clib.percpu.data)
+    . = ALIGN (4);
+    _clib_percpu_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.percpu.data : ALIGN(4)
+  {
+    _rtos_percpu_data_start = ABSOLUTE(.);
+    *(.rtos.percpu.data)
+    . = ALIGN (4);
+    _rtos_percpu_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .rtos.data : ALIGN(4)
+  {
+    _rtos_data_start = ABSOLUTE(.);
+    *(.rtos.data)
+    . = ALIGN (4);
+    _rtos_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .sram.data : ALIGN(4)
+  {
+    _sram_data_start = ABSOLUTE(.);
+    *(.sram.data)
+    . = ALIGN (4);
+    _sram_data_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  __llvm_prf_names : ALIGN(4)
+  {
+    __llvm_prf_names_start = ABSOLUTE(.);
+    *(__llvm_prf_names)
+    . = ALIGN (4);
+    __llvm_prf_names_end = ABSOLUTE(.);
+  } >sram1_seg :sram1_phdr
+
+  .clib.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _clib_bss_start = ABSOLUTE(.);
+    *(.clib.bss)
+    *(.clib.percpu.bss)
+    *(.rtos.percpu.bss)
+    *(.rtos.bss)
+    *(.sram.bss)
+    *(.debug.bss)
+    . = ALIGN (8);
+    _clib_bss_end = ABSOLUTE(.);
+    _end = ALIGN(0x8);
+    PROVIDE(end = ALIGN(0x8));
+    _memmap_seg_sram1_end = ALIGN(0x8);
+  } >sram1_seg :sram1_bss_phdr
+
+  _heap_sentry = 0x20600000;
+
+  .sram2.rodata : ALIGN(4)
+  {
+    _sram2_rodata_start = ABSOLUTE(.);
+    *(.sram2.rodata)
+    . = ALIGN (4);
+    _sram2_rodata_end = ABSOLUTE(.);
+  } >sram2_seg :sram2_phdr
+
+  .sram2.text : ALIGN(4)
+  {
+    _sram2_text_start = ABSOLUTE(.);
+    *(.sram2.literal .sram2.text)
+    . = ALIGN (4);
+    _sram2_text_end = ABSOLUTE(.);
+  } >sram2_seg :sram2_phdr
+
+  .sram2.data : ALIGN(4)
+  {
+    _sram2_data_start = ABSOLUTE(.);
+    *(.sram2.data)
+    . = ALIGN (4);
+    _sram2_data_end = ABSOLUTE(.);
+  } >sram2_seg :sram2_phdr
+
+  .sram2.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _sram2_bss_start = ABSOLUTE(.);
+    *(.sram2.bss)
+    . = ALIGN (8);
+    _sram2_bss_end = ABSOLUTE(.);
+    _memmap_seg_sram2_end = ALIGN(0x8);
+  } >sram2_seg :sram2_bss_phdr
+
+
+  .sram3.rodata : ALIGN(4)
+  {
+    _sram3_rodata_start = ABSOLUTE(.);
+    *(.sram3.rodata)
+    . = ALIGN (4);
+    _sram3_rodata_end = ABSOLUTE(.);
+  } >sram3_seg :sram3_phdr
+
+  .rodata : ALIGN(4)
+  {
+    _rodata_start = ABSOLUTE(.);
+    *(.rodata)
+    *(SORT(.rodata.sort.*))
+    KEEP (*(SORT(.rodata.keepsort.*) .rodata.keep.*))
+    *(.rodata.*)
+    *(.gnu.linkonce.r.*)
+    *(.rodata1)
+    __XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
+    KEEP (*(.xt_except_table))
+    KEEP (*(.gcc_except_table))
+    *(.gnu.linkonce.e.*)
+    *(.gnu.version_r)
+    KEEP (*(.eh_frame))
+    /*  C++ constructor and destructor tables, properly ordered:  */
+    KEEP (*crtbegin.o(.ctors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*(.ctors))
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*(.dtors))
+    /*  C++ exception handlers table:  */
+    __XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
+    *(.xt_except_desc)
+    *(.gnu.linkonce.h.*)
+    __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
+    *(.xt_except_desc_end)
+    *(.dynamic)
+    *(.gnu.version_d)
+    . = ALIGN(4);		/* this table MUST be 4-byte aligned */
+    _bss_table_start = ABSOLUTE(.);
+    LONG(_clib_bss_start)
+    LONG(_clib_bss_end)
+    LONG(_sram2_bss_start)
+    LONG(_sram2_bss_end)
+    LONG(_bss_start)
+    LONG(_bss_end)
+    LONG(_dram0_bss_start)
+    LONG(_dram0_bss_end)
+    LONG(_dram1_bss_start)
+    LONG(_dram1_bss_end)
+    LONG(_local_sram_bss_start)
+    LONG(_local_sram_bss_end)
+    _bss_table_end = ABSOLUTE(.);
+    . = ALIGN (4);
+    _rodata_end = ABSOLUTE(.);
+  } >sram3_seg :sram3_phdr
+
+  .sram3.text : ALIGN(4)
+  {
+    _sram3_text_start = ABSOLUTE(.);
+    *(.sram3.literal .sram3.text)
+    . = ALIGN (4);
+    _sram3_text_end = ABSOLUTE(.);
+  } >sram3_seg :sram3_phdr
+
+  .text : ALIGN(4)
+  {
+    _stext = .;
+    _text_start = ABSOLUTE(.);
+    *(.entry.text)
+    *(.init.literal)
+    KEEP(*(.init))
+    *(.literal.sort.* SORT(.text.sort.*))
+    KEEP (*(.literal.keepsort.* SORT(.text.keepsort.*) .literal.keep.* .text.keep.* .literal.*personality* .text.*personality*))
+    *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
+    *(.fini.literal)
+    KEEP(*(.fini))
+    *(.gnu.version)
+    . = ALIGN (4);
+    _text_end = ABSOLUTE(.);
+    _etext = .;
+  } >sram3_seg :sram3_phdr
+
+  .sram3.data : ALIGN(4)
+  {
+    _sram3_data_start = ABSOLUTE(.);
+    *(.sram3.data)
+    . = ALIGN (4);
+    _sram3_data_end = ABSOLUTE(.);
+  } >sram3_seg :sram3_phdr
+
+  .data : ALIGN(4)
+  {
+    _data_start = ABSOLUTE(.);
+    *(.data)
+    *(SORT(.data.sort.*))
+    KEEP (*(SORT(.data.keepsort.*) .data.keep.*))
+    *(.data.*)
+    *(.gnu.linkonce.d.*)
+    KEEP(*(.gnu.linkonce.d.*personality*))
+    *(.data1)
+    *(.sdata)
+    *(.sdata.*)
+    *(.gnu.linkonce.s.*)
+    *(.sdata2)
+    *(.sdata2.*)
+    *(.gnu.linkonce.s2.*)
+    KEEP(*(.jcr))
+    *(__llvm_prf_cnts)
+    *(__llvm_prf_data)
+    *(__llvm_prf_vnds)
+    . = ALIGN (4);
+    _data_end = ABSOLUTE(.);
+  } >sram3_seg :sram3_phdr
+
+  .bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _bss_start = ABSOLUTE(.);
+    *(.dynsbss)
+    *(.sbss)
+    *(.sbss.*)
+    *(.gnu.linkonce.sb.*)
+    *(.scommon)
+    *(.sbss2)
+    *(.sbss2.*)
+    *(.gnu.linkonce.sb2.*)
+    *(.dynbss)
+    *(.bss)
+    *(SORT(.bss.sort.*))
+    KEEP (*(SORT(.bss.keepsort.*) .bss.keep.*))
+    *(.bss.*)
+    *(.gnu.linkonce.b.*)
+    *(COMMON)
+    *(.sram3.bss)
+    . = ALIGN (8);
+    _bss_end = ABSOLUTE(.);
+    _memmap_seg_sram3_end = ALIGN(0x8);
+  } >sram3_seg :sram3_bss_phdr
+
+  _memmap_mem_sram_max = ABSOLUTE(.);
+
+  .dram0.rodata : ALIGN(4)
+  {
+    _dram0_rodata_start = ABSOLUTE(.);
+    *(.dram0.rodata)
+    . = ALIGN (4);
+    _dram0_rodata_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.data : ALIGN(4)
+  {
+    _dram0_data_start = ABSOLUTE(.);
+    *(.dram0.data)
+    . = ALIGN (4);
+    _dram0_data_end = ABSOLUTE(.);
+  } >dram0_0_seg :dram0_0_phdr
+
+  .dram0.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dram0_bss_start = ABSOLUTE(.);
+    *(.dram0.bss)
+    *(.dram0_user.bss)
+    . = ALIGN (8);
+    _dram0_bss_end = ABSOLUTE(.);
+    _memmap_seg_dram0_0_end = ALIGN(0x8);
+  } >dram0_0_seg :dram0_0_bss_phdr
+
+  _memmap_mem_dram0_max = ABSOLUTE(.);
+
+  .dram1.rodata : ALIGN(4)
+  {
+    _dram1_rodata_start = ABSOLUTE(.);
+    *(.dram1.rodata)
+    . = ALIGN (4);
+    _dram1_rodata_end = ABSOLUTE(.);
+  } >dram1_0_seg :dram1_0_phdr
+
+  .dram1.data : ALIGN(4)
+  {
+    _dram1_data_start = ABSOLUTE(.);
+    *(.dram1.data)
+    . = ALIGN (4);
+    _dram1_data_end = ABSOLUTE(.);
+  } >dram1_0_seg :dram1_0_phdr
+
+  .dram1.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _dram1_bss_start = ABSOLUTE(.);
+    *(.dram1.bss)
+    *(.dram1_user.bss)
+    . = ALIGN (8);
+    _dram1_bss_end = ABSOLUTE(.);
+    _stack_sentry = ALIGN(0x8);
+    _memmap_seg_dram1_0_end = ALIGN(0x8);
+  } >dram1_0_seg :dram1_0_bss_phdr
+
+  PROVIDE(__stack = 0xe01c0000);
+  _isb_default = 0xe01bfe10;
+  _memmap_mem_dram1_max = ABSOLUTE(.);
+
+  .local_sram.bss (NOLOAD) : ALIGN(8)
+  {
+    . = ALIGN (8);
+    _local_sram_bss_start = ABSOLUTE(.);
+    *(.local_sram.bss)
+    . = ALIGN (8);
+    _local_sram_bss_end = ABSOLUTE(.);
+    _memmap_seg_local_sram_0_end = ALIGN(0x8);
+  } >local_sram_0_seg :local_sram_0_bss_phdr
+
+
+  _memmap_mem_local_sram_max = ABSOLUTE(.);
+
+  .debug  0 :  { *(.debug) }
+  .line  0 :  { *(.line) }
+  .debug_srcinfo  0 :  { *(.debug_srcinfo) }
+  .debug_sfnames  0 :  { *(.debug_sfnames) }
+  .debug_aranges  0 :  { *(.debug_aranges) }
+  .debug_pubnames  0 :  { *(.debug_pubnames) }
+  .debug_info  0 :  { *(.debug_info) }
+  .debug_abbrev  0 :  { *(.debug_abbrev) }
+  .debug_line  0 :  { *(.debug_line) }
+  .debug_frame  0 :  { *(.debug_frame) }
+  .debug_str  0 :  { *(.debug_str) }
+  .debug_loc  0 :  { *(.debug_loc) }
+  .debug_macinfo  0 :  { *(.debug_macinfo) }
+  .debug_weaknames  0 :  { *(.debug_weaknames) }
+  .debug_funcnames  0 :  { *(.debug_funcnames) }
+  .debug_typenames  0 :  { *(.debug_typenames) }
+  .debug_varnames  0 :  { *(.debug_varnames) }
+  .xt.insn 0 :
+  {
+    KEEP (*(.xt.insn))
+    KEEP (*(.gnu.linkonce.x.*))
+  }
+  .xt.prop 0 :
+  {
+    KEEP (*(.xt.prop))
+    KEEP (*(.xt.prop.*))
+    KEEP (*(.gnu.linkonce.prop.*))
+  }
+  .xt.lit 0 :
+  {
+    KEEP (*(.xt.lit))
+    KEEP (*(.xt.lit.*))
+    KEEP (*(.gnu.linkonce.p.*))
+  }
+  .debug.xt.callgraph 0 :
+  {
+    KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
+  }
+}
+

+ 61 - 0
LSP/min-rt_core1_lib1_stack_tcm1/ldscripts/elf32xtensa.xr

@@ -0,0 +1,61 @@
+/* This linker script generated from xt-genldscripts.tpp for LSP C:\Users\DELL\workspace\CSI_DSP_FW\LSP\min-rt_core1_lib1_stack_tcm1 */
+/* Linker Script for ld -r or ld -i */
+
+
+SECTIONS
+{
+
+  .text 0 :
+  {
+    *(.literal .text)
+  }
+
+  .bss 0 :
+  {
+    *(.dynsbss)
+    *(.sbss)
+    *(.scommon)
+    *(.dynbss)
+    *(.bss)
+    *(COMMON)
+  }
+  .debug  0 :  { *(.debug) }
+  .line  0 :  { *(.line) }
+  .debug_srcinfo  0 :  { *(.debug_srcinfo) }
+  .debug_sfnames  0 :  { *(.debug_sfnames) }
+  .debug_aranges  0 :  { *(.debug_aranges) }
+  .debug_pubnames  0 :  { *(.debug_pubnames) }
+  .debug_info  0 :  { *(.debug_info) }
+  .debug_abbrev  0 :  { *(.debug_abbrev) }
+  .debug_line  0 :  { *(.debug_line) }
+  .debug_frame  0 :  { *(.debug_frame) }
+  .debug_str  0 :  { *(.debug_str) }
+  .debug_loc  0 :  { *(.debug_loc) }
+  .debug_macinfo  0 :  { *(.debug_macinfo) }
+  .debug_weaknames  0 :  { *(.debug_weaknames) }
+  .debug_funcnames  0 :  { *(.debug_funcnames) }
+  .debug_typenames  0 :  { *(.debug_typenames) }
+  .debug_varnames  0 :  { *(.debug_varnames) }
+  .xt.insn 0 :
+  {
+    KEEP (*(.xt.insn))
+    KEEP (*(.gnu.linkonce.x.*))
+  }
+  .xt.prop 0 :
+  {
+    KEEP (*(.xt.prop))
+    KEEP (*(.xt.prop.*))
+    KEEP (*(.gnu.linkonce.prop.*))
+  }
+  .xt.lit 0 :
+  {
+    KEEP (*(.xt.lit))
+    KEEP (*(.xt.lit.*))
+    KEEP (*(.gnu.linkonce.p.*))
+  }
+  .debug.xt.callgraph 0 :
+  {
+    KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
+  }
+}
+

+ 61 - 0
LSP/min-rt_core1_lib1_stack_tcm1/ldscripts/elf32xtensa.xu

@@ -0,0 +1,61 @@
+/* This linker script generated from xt-genldscripts.tpp for LSP C:\Users\DELL\workspace\CSI_DSP_FW\LSP\min-rt_core1_lib1_stack_tcm1 */
+/* Linker Script for ld -Ur */
+
+
+SECTIONS
+{
+
+  .text 0 :
+  {
+    *(.literal .text)
+  }
+
+  .bss 0 :
+  {
+    *(.dynsbss)
+    *(.sbss)
+    *(.scommon)
+    *(.dynbss)
+    *(.bss)
+    *(COMMON)
+  }
+  .debug  0 :  { *(.debug) }
+  .line  0 :  { *(.line) }
+  .debug_srcinfo  0 :  { *(.debug_srcinfo) }
+  .debug_sfnames  0 :  { *(.debug_sfnames) }
+  .debug_aranges  0 :  { *(.debug_aranges) }
+  .debug_pubnames  0 :  { *(.debug_pubnames) }
+  .debug_info  0 :  { *(.debug_info) }
+  .debug_abbrev  0 :  { *(.debug_abbrev) }
+  .debug_line  0 :  { *(.debug_line) }
+  .debug_frame  0 :  { *(.debug_frame) }
+  .debug_str  0 :  { *(.debug_str) }
+  .debug_loc  0 :  { *(.debug_loc) }
+  .debug_macinfo  0 :  { *(.debug_macinfo) }
+  .debug_weaknames  0 :  { *(.debug_weaknames) }
+  .debug_funcnames  0 :  { *(.debug_funcnames) }
+  .debug_typenames  0 :  { *(.debug_typenames) }
+  .debug_varnames  0 :  { *(.debug_varnames) }
+  .xt.insn 0 :
+  {
+    KEEP (*(.xt.insn))
+    KEEP (*(.gnu.linkonce.x.*))
+  }
+  .xt.prop 0 :
+  {
+    KEEP (*(.xt.prop))
+    KEEP (*(.xt.prop.*))
+    KEEP (*(.gnu.linkonce.prop.*))
+  }
+  .xt.lit 0 :
+  {
+    KEEP (*(.xt.lit))
+    KEEP (*(.xt.lit.*))
+    KEEP (*(.gnu.linkonce.p.*))
+  }
+  .debug.xt.callgraph 0 :
+  {
+    KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
+  }
+}
+

+ 81 - 0
LSP/min-rt_core1_lib1_stack_tcm1/memmap.xmm

@@ -0,0 +1,81 @@
+//  Memory map file to generate linker scripts for programs without board I/O.
+
+// Customer ID=16470; Build=0x8e648; Copyright (c) 2004-2015 Cadence Design Systems, Inc.
+//
+// Permission is hereby granted, free of charge, to any person obtaining
+// a copy of this software and associated documentation files (the
+// "Software"), to deal in the Software without restriction, including
+// without limitation the rights to use, copy, modify, merge, publish,
+// distribute, sublicense, and/or sell copies of the Software, and to
+// permit persons to whom the Software is furnished to do so, subject to
+// the following conditions:
+//
+// The above copyright notice and this permission notice shall be included
+// in all copies or substantial portions of the Software.
+//
+// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+// EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+// IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+// CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+// TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+// SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+
+//  Place stack in local RAM:
+PLACE SECTIONS(STACK) WITH_SECTION(.dram1.bss)
+// A memory map is a sequence of memory descriptions and
+// optional parameter assignments.
+//
+// Each memory description has the following format:
+//   BEGIN <name>
+//     <addr> [,<paddr>] : <mem-type> : <mem-name> : <size> [,<psize>]
+//                       : [writable] [,executable] [,device] ;
+//     <segment>*
+//   END <name>
+//
+// where each <segment> description has the following format:
+//     <seg-name> : F|C : <start-addr> - <end-addr> [ : STACK ] [ : HEAP ]
+//                : <section-name>* ;
+//
+// Each parameter assignment is a keyword/value pair in the following format:
+//   <keyword> = <value>                (no spaces in <value>)
+// or
+//   <keyword> = "<value>"              (spaces allowed in <value>)
+//
+// The following primitives are also defined:
+//   PLACE SECTIONS( <section-name>* ) { WITH_SECTION(<section-name>)
+//                                       | IN_SEGMENT(<seg-name>) }
+//
+//   NOLOAD <section-name1> [ <section-name2> ... ]
+//
+// Please refer to the Xtensa LSP Reference Manual for more details.
+//
+VECSELECT=1
+VECRESET=0x20400000
+VECBASE= 0x20400000
+
+BEGIN sram
+0x20400000: extra_mem : sram : 0x00280000 : executable, writable ;
+ sram0 : F : 0x20400000 - 0x20400fff : .DispatchVector.text .ResetVector.text .ResetHandler.literal .ResetHandler.text .DispatchHandler.literal .DispatchHandler.text;
+ sram1 : C : 0x20401000 - 0x205fffff :  HEAP : .sram.rodata .clib.rodata .rtos.rodata .sram.literal .rtos.literal .clib.literal .sram.text .clib.text .rtos.text .clib.data .clib.percpu.data .rtos.percpu.data .rtos.data .sram.data __llvm_prf_names .clib.bss .clib.percpu.bss .rtos.percpu.bss .rtos.bss .sram.bss .debug.bss;
+ sram2 : C : 0x20600000 - 0x2063ffff : .sram2.rodata .sram2.literal .sram2.text .sram2.data .sram2.bss;
+ sram3 : C : 0x20640000 - 0x2067ffff : .sram3.rodata .rodata .sram3.literal .literal .sram3.text .text .sram3.data .data .sram3.bss .bss;
+ END sram
+
+BEGIN dram0
+0xe0180000: dataRam : dram0 : 0x20000 : writable ;
+ dram0_0 : C : 0xe0180000 - 0xe019ffff :.dram0.rodata .dram0.data .dram0.bss .dram0_user.bss;
+END dram0
+
+BEGIN dram1
+0xe01a0000: dataRam : dram1 : 0x20000 : writable ;
+ dram1_0 : C : 0xe01a0000 - 0xe01bffff :STACK :.dram1.rodata .dram1.data .dram1.bss .dram1_user.bss;
+END dram1
+
+BEGIN local_sram
+0xffa00000: sysram : local_sram :   0x180000: writable ;
+  local_sram_0 : C : 0xffa00000 - 0xffb7ffff :.local_sram.bss ;
+ END local_sram
+
+ENTRY = _libinit
+USE_SEGMENT_AREA = ".dram0.data 120832 + 0 end : .dram1.data 120832 + 0 end : .sram3.data 262144 + 0 end"

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