isp_stitching0.c 17 KB

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  1. /*
  2. * Copyright (C) 2021 Alibaba Group Holding Limited
  3. * Author: LuChongzhi <chongzhi.lcz@alibaba-inc.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. */
  9. #include <stdio.h>
  10. #include <stdlib.h>
  11. #include <stdint.h>
  12. #include <unistd.h>
  13. #include <string.h>
  14. #include "ra_common.h"
  15. #define ISP_STITCHING0_BASE 0x3300
  16. #define REG_BASE ISP_STITCHING0_BASE
  17. static const reg_field_s reg_desc[] = {
  18. /* structure field order
  19. reg_name, reg_desc, offset,reset_value,msb,lsb, field_name, field_desc */
  20. {"ISP_STITCHING0_CTRL", "HDR Stitch Control Register",
  21. 0x00003300, 0x00000000, 26, 26, "share_en", "Enable/Disable share of sram. 0: Disable share sram; 1: Enable share sram"},
  22. {NULL, NULL, 0x00003300, 0x00000000, 25, 25, "digital_gain_en_2", "Enable/Disable dgain of very short frame. 0: Disable the dgain; 1: Enable the dgain"},
  23. {NULL, NULL, 0x00003300, 0x00000000, 24, 24, "digital_gain_en_1", "Enable/Disable dgain of short frame. 0: Disable the dgain; 1: Enable the dgain"},
  24. {NULL, NULL, 0x00003300, 0x00000000, 23, 23, "digital_gain_en_0", "Enable/Disable dgain of long frame. 0: Disable the dgain; 1: Enable the dgain"},
  25. {NULL, NULL, 0x00003300, 0x00000000, 22, 22, "regs_inform_en", "Enable/Disable inform module. 0: Disable the inform; 1: Enable the inform"},
  26. {NULL, NULL, 0x00003300, 0x00000000, 21, 21, "vsync_pol", "VSYNC polarity reversal"},
  27. {NULL, NULL, 0x00003300, 0x00000000, 20, 20, "hsync_pol", "HSYNC polarity reversal"},
  28. {NULL, NULL, 0x00003300, 0x00000000, 19, 19, "awb_gain_enable", "Enable/Disable AWB Gain module. 0: Disable the AWB gain; 1: Enable the AWB gain"},
  29. {NULL, NULL, 0x00003300, 0x00000000, 18, 18, "cfg_upd", "Configuration update"},
  30. {NULL, NULL, 0x00003300, 0x00000000, 17, 17, "gen_cfg_upd", "Generate configuration update"},
  31. {NULL, NULL, 0x00003300, 0x00000000, 16, 16, "gen_cfg_upd_fix", "Auto configuration update in the end of frame"},
  32. {NULL, NULL, 0x00003300, 0x00000000, 14, 13, "bypass_select", "Bypass frame select. 0: long frame; 1: short frame; 2: very short frame"},
  33. {NULL, NULL, 0x00003300, 0x00000000, 12, 12, "linear_combine_enable","linear combination enable"},
  34. {NULL, NULL, 0x00003300, 0x00000000, 11, 11, "base_frame_selection", "base frame select"},
  35. {NULL, NULL, 0x00003300, 0x00000000, 10, 9, "combination_mode", "combination_mode"},
  36. {NULL, NULL, 0x00003300, 0x00000000, 8, 8, "channel_config_bit", "channel_config_bit"},
  37. {NULL, NULL, 0x00003300, 0x00000000, 7, 7, "b10_enable_bit", "10 bit enable"},
  38. {NULL, NULL, 0x00003300, 0x00000000, 6, 6, "lin_enable_bit", "reserved"},
  39. {NULL, NULL, 0x00003300, 0x00000000, 5, 5, "vs_enable_bit", "very short frame enable"},
  40. {NULL, NULL, 0x00003300, 0x00000000, 4, 3, "bayer_pattern", "bayer pattern. 00: RGGB; 01: GRBG; 10: GBRB; 11: BGGR"},
  41. {NULL, NULL, 0x00003300, 0x00000000, 2, 2, "soft_reset_flag", "Activate/deactivate Stitch software reset. 0: software reset un-active; 1: software reset active"},
  42. {NULL, NULL, 0x00003300, 0x00000000, 1, 1, "mono_input_flag", "reserved"},
  43. {NULL, NULL, 0x00003300, 0x00000000, 0, 0, "combine_enable_bit", "Enable/Disable Stitch module. 0: Disable the Stitch module; 1: Enable the Stitch module"},
  44. {"ISP_STITCHING0_FRAME_WIDTH", "Stitching frame width", 0x00003304, 0x00000000, 13, 0, "stitching_frame_width", "Frame width"},
  45. {"ISP_STITCHING0_FRAME_HEIGHT","Stitching frame height", 0x00003308, 0x00000000, 13, 0, "stitching_frame_height", "Frame height"},
  46. {"ISP_STITCHING0_EXPOSURE_BIT", "Stitching frame data bit depth",
  47. 0x0000330C, 0x05050505, 31, 24, "stitching_l_bit_depth", "Exposure bit for LS; valid range: [0..255]"},
  48. {NULL, NULL, 0x0000330C, 0x05050505, 23, 16, "stitching_s_bit_depth", "Exposure bit for VS; valid range: [0..255]"},
  49. {NULL, NULL, 0x0000330C, 0x05050505, 15, 8, "stitching_vs_bit_depth", "Exposure bit for S; valid range: [0..255]"},
  50. {NULL, NULL, 0x0000330C, 0x05050505, 7, 0, "stitching_ls_bit_depth", "Exposure bit for L; valid range: [0..255]"},
  51. {"ISP_STITCHING0_COLOR_WEIGHT", "Channel color weight for gray computation",
  52. 0x00003310, 0x001D464D, 23, 16, "stitching_color_weight_2", "B color weight for Y conversion. Valid range: [0..255]"},
  53. {NULL, NULL, 0x00003310, 0x001D464D, 15, 8, "stitching_color_weight_1", "G color weight for Y conversion. Valid range: [0..255]"},
  54. {NULL, NULL, 0x00003310, 0x001D464D, 7, 0, "stitching_color_weight_0", "R color weight for Y conversion.. Valid range: [0..255]"},
  55. {"ISP_STITCHING0_BLS_EXP_0_A", "Black level for exposure 0 channel A",
  56. 0x00003314, 0x01000000, 31, 16, "stitching_digital_gain_exp_0_r", "Digital gain value for exposure 0 red pixel"},
  57. {NULL, NULL, 0x00003314, 0x01000000, 11, 0, "stitching_bls_exp_0_a", "Black level value for exposure 0 channel A"},
  58. {"ISP_STITCHING0_BLS_EXP_0_B", "Black level for exposure 0 channel B",
  59. 0x00003318, 0x01000000, 31, 16, "stitching_digital_gain_exp_0_g", "Digital gain value for exposure 0 blue pixel"},
  60. {NULL, NULL, 0x00003318, 0x01000000, 11, 0, "stitching_bls_exp_0_b", "Black level value for exposure 0 channel B"},
  61. {"ISP_STITCHING0_RATIO_LS", "Exposure ratio between Long and Short",
  62. 0x00003344, 0x00400400, 23, 12, "stitching_ratio_long_short_1", "Exposure merge ratio from S to L (greater than 1)"},
  63. {NULL, NULL, 0x00003344, 0x00400400, 11, 0, "stitching_ratio_long_short_0", "Exposure merge ratio from S to L (less than 1)"},
  64. {"ISP_STITCHING0_LONG_EXPOSURE", "Long exposure time", 0x00003360, 0x00000040, 11, 0, "stitching_long_exposure_time", "Exposure time for long exposure frame"},
  65. {"ISP_STITCHING0_SHORT_EXPOSURE", "Short exposure time", 0x00003364, 0x00000008, 11, 0, "stitching_short_exposure_time", "Exposure time for short exposure frame"},
  66. {"ISP_STITCHING0_VERY_SHORT_EXPOSURE", "Very short exposure time", 0x00003368, 0x00000008, 11, 0, "stitching_very_short_exposure_time", "Exposure time for very short exposure frame"},
  67. {"ISP_STITCHING0_HDR_MODE", "HDR combination mode", 0x0000336C, 0x00000000, 3, 0, "stitching_hdr_input_format_type", "Input Sensor HDR mode:" LINE_PADDING_6TAB
  68. " 0: dual DCG mode 3x12-bit (default)" LINE_PADDING_6TAB
  69. " 1: DOL 3 Frame 3x12-bit" LINE_PADDING_6TAB
  70. " 2: 3x12-bit line by line without waiting" LINE_PADDING_6TAB
  71. " 3: 16-bit compressed data + 12-bit RAW" LINE_PADDING_6TAB
  72. " 4: 2x12-bit dual DCG without waiting" LINE_PADDING_6TAB
  73. " 5: DOL2 frame or 1 CG+VS sx12-bit RAW" LINE_PADDING_6TAB
  74. " 6: L+S 2x12-bit RAW"},
  75. {"ISP_STITCHING0_OUT_HBLANK", "HDR blanking in horizontal direction",
  76. 0x00003370, 0x00100080, 31, 16, "stitching_dummy_s_hblank", "Dummy line horizontal blank for short exposure"},
  77. {NULL, NULL, 0x00003370, 0x00100080, 15, 0, "stitching_out_hblank", "Output data horizontal blank time"},
  78. {"ISP_STITCHING0_OUT_VBLANK", "HDR blanking in vertical direction",
  79. 0x00003374, 0x00100020, 31, 16, "stitching_dummy_vs_hblank", "Dummy line horizontal blank for very short exposure"},
  80. {NULL, NULL, 0x00003374, 0x00100020, 15, 0, "stitching_out_vblank", "Output data vertical blank time"},
  81. {"ISP_STITCHING0_INTERRUPT_STATUS", "Stitching interrupt status", 0x00003378, 0x00000000, 2, 0, "stitching_interrupt_status", " Unknown yet"},
  82. {"ISP_STITCHING0_COMPRESS_X0", "Compression LUT x index", 0x0000337C, 0x00000000, 9, 0, "compress_lut_first_valid_x", " Compression LUT first valid x index"},
  83. {"ISP_STITCHING0_COMPRESS_X0_SHD", "Compression LUT x index shadow", 0x00003380, 0x00000000, 9, 0, "compress_lut_first_valid_shd_x", " Compression LUT first valid x index shadow"},
  84. {"ISP_STITCHING0_COMPRESS_LUT_0", "Compression LUT data 0",
  85. 0x000033A0, 0x00000000, 29, 20, "stitching_compress_lut_2", "VS compression LUT2"},
  86. {NULL, NULL, 0x000033A0, 0x00000000, 19, 10, "stitching_compress_lut_1", "VS compression LUT1"},
  87. {NULL, NULL, 0x000033A0, 0x00000000, 9, 0, "stitching_compress_lut_0", "VS compression LUT0"},
  88. {"ISP_STITCHING0_COMPRESS_LUT_1", "Compression LUT data 1",
  89. 0x000033A4, 0x00000000, 29, 20, "stitching_compress_lut_5", "VS compression LUT5"},
  90. {NULL, NULL, 0x000033A4, 0x00000000, 19, 10, "stitching_compress_lut_4", "VS compression LUT4"},
  91. {NULL, NULL, 0x000033A4, 0x00000000, 9, 0, "stitching_compress_lut_3", "VS compression LUT3"},
  92. {"ISP_STITCHING0_COMPRESS_LUT_4", "Compression LUT data 4",
  93. 0x000033B0, 0x00000000, 29, 20, "stitching_compress_lut_14", "VS compression LUT14"},
  94. {NULL, NULL, 0x000033B0, 0x00000000, 19, 10, "stitching_compress_lut_13", "VS compression LUT13"},
  95. {NULL, NULL, 0x000033B0, 0x00000000, 9, 0, "stitching_compress_lut_12", "VS compression LUT12"},
  96. {"ISP_STITCHING0_COMPRESS_LUT_SHD_0", "Compression LUT data 0 shadow",
  97. 0x000033B4, 0x00000000, 29, 20, "stitching_compress_lut_shd_2", "Shadow of VS compression LUT2"},
  98. {NULL, NULL, 0x000033B4, 0x00000000, 19, 10, "stitching_compress_lut_shd_1", "Shadow of VS compression LUT1"},
  99. {NULL, NULL, 0x000033B4, 0x00000000, 9, 0, "stitching_compress_lut_shd_0", "Shadow of VS compression LUT0"},
  100. {"ISP_STITCHING0_EXP0_AWB_GAIN_G", "AWB gain for exposure 0 channel G",
  101. 0x000033C8, 0x01000100, 25, 16, "stitching_exp0_awb_gain_gr", "Stitching AWB GR gain for exposure 0"},
  102. {NULL, NULL, 0x000033C8, 0x01000100, 9, 0, "stitching_exp0_awb_gain_gb", "Stitching AWB GB gain for exposure 0"},
  103. {"ISP_STITCHING0_EXP0_AWB_GAIN_RB", "AWB gain for exposure 0 channel RB",
  104. 0x000033CC, 0x01000100, 25, 16, "stitching_exp0_awb_gain_r", "Stitching AWB R gain for exposure 0"},
  105. {NULL, NULL, 0x000033CC, 0x01000100, 9, 0, "stitching_exp0_awb_gain_b", "Stitching AWB B gain for exposure 0"},
  106. {"ISP_STITCHING0_EXP1_AWB_GAIN_G", "AWB gain for exposure 1 channel G",
  107. 0x000033D0, 0x01000100, 25, 16, "stitching_exp1_awb_gain_gr", "Stitching AWB GR gain for exposure 1"},
  108. {NULL, NULL, 0x000033D0, 0x01000100, 9, 0, "stitching_exp1_awb_gain_gb", "Stitching AWB GB gain for exposure 1"},
  109. {"ISP_STITCHING0_EXP1_AWB_GAIN_RB", "AWB gain for exposure 1 channel RB",
  110. 0x000033D4, 0x01000100, 25, 16, "stitching_exp1_awb_gain_r", "Stitching AWB R gain for exposure 1"},
  111. {NULL, NULL, 0x000033D4, 0x01000100, 9, 0, "stitching_exp1_awb_gain_b", "Stitching AWB B gain for exposure 1"},
  112. {"ISP_STITCHING0_LONG_SAT_PARAMS", "Stitching saturation params for long exposure",
  113. 0x000033E0, 0x007FF000, 23, 12, "stitching_long_sat_thresh", "Stitching long saturation threshold"},
  114. {NULL, NULL, 0x000033E0, 0x007FF000, 8, 0, "stitching_long_sat_combine_weight", "Stitching long combine weight"},
  115. {"ISP_STITCHING0_EXP2_AWB_GAIN_G", "AWB gain for exposure 2 channel G",
  116. 0x000033D8, 0x01000100, 25, 16, "stitching_exp2_awb_gain_gr", "Stitching AWB GR gain for exposure 2"},
  117. {NULL, NULL, 0x000033D8, 0x01000100, 9, 0, "stitching_exp2_awb_gain_gb", "Stitching AWB GB gain for exposure 2"},
  118. {"ISP_STITCHING0_EXP2_AWB_GAIN_RB", "AWB gain for exposure 2 channel RB",
  119. 0x000033DC, 0x01000100, 25, 16, "stitching_exp2_awb_gain_r", "Stitching AWB R gain for exposure 2"},
  120. {NULL, NULL, 0x000033DC, 0x01000100, 9, 0, "stitching_exp2_awb_gain_b", "Stitching AWB B gain for exposure 2"},
  121. {"ISP_STITCHING0_IMSC", "IMSC Interrupt Mask",
  122. 0x000033E4, 0x00000000, 8, 8, "stitching_imsc_hdr_hist_irq_vs", "Stitching HDR hist VS interrupt mask"},
  123. {NULL, NULL, 0x000033E4, 0x00000000, 7, 7, "stitching_imsc_hdr_hist_irq_s", "Stitching HDR hist S interrupt mask"},
  124. {NULL, NULL, 0x000033E4, 0x00000000, 6, 6, "stitching_imsc_hdr_hist_irq_l", "Stitching HDR hist L interrupt mask"},
  125. {NULL, NULL, 0x000033E4, 0x00000000, 5, 5, "stitching_imsc_hdr_exp_complete_vs", "Stitching HDR exp statistic VS interrupt mask"},
  126. {NULL, NULL, 0x000033E4, 0x00000000, 4, 4, "stitching_imsc_hdr_exp_complete_s", "Stitching HDR exp statistic S interrupt mask"},
  127. {NULL, NULL, 0x000033E4, 0x00000000, 3, 3, "stitching_imsc_hdr_exp_complete_l", "Stitching HDR exp statistic L interrupt mask"},
  128. {NULL, NULL, 0x000033E4, 0x00000000, 2, 2, "stitching_imsc_fifo_empty", "Stitching HDR FIFO empty L interrupt mask"},
  129. {NULL, NULL, 0x000033E4, 0x00000000, 1, 1, "stitching_imsc_exp_err2", "Stitching HDR very short exp time error L interrupt mask"},
  130. {NULL, NULL, 0x000033E4, 0x00000000, 0, 0, "stitching_imsc_exp_err1", "Stitching HDR short exp time error L interrupt mask"},
  131. {"ISP_STITCHING0_RIS", "RIS Raw Interrupt Status",
  132. 0x000033E8, 0x00000000, 8, 8, "stitching_ris_hdr_hist_irq_vs", "Stitching HDR hist VS interrupt status"},
  133. {NULL, NULL, 0x000033E8, 0x00000000, 7, 7, "stitching_ris_hdr_hist_irq_s", "Stitching HDR hist S interrupt status"},
  134. {NULL, NULL, 0x000033E8, 0x00000000, 6, 6, "stitching_ris_hdr_hist_irq_l", "Stitching HDR hist L interrupt status"},
  135. {NULL, NULL, 0x000033E8, 0x00000000, 5, 5, "stitching_ris_hdr_exp_complete_vs", "Stitching HDR exp statistic VS interrupt status"},
  136. {NULL, NULL, 0x000033E8, 0x00000000, 4, 4, "stitching_ris_hdr_exp_complete_s", "Stitching HDR exp statistic S interrupt status"},
  137. {NULL, NULL, 0x000033E8, 0x00000000, 3, 3, "stitching_ris_hdr_exp_complete_l", "Stitching HDR exp statistic L interrupt status"},
  138. {NULL, NULL, 0x000033E8, 0x00000000, 2, 2, "stitching_ris_fifo_empty", "Stitching HDR FIFO empty L interrupt status"},
  139. {NULL, NULL, 0x000033E8, 0x00000000, 1, 1, "stitching_ris_exp_err2", "Stitching HDR very short exp time error L interrupt status"},
  140. {NULL, NULL, 0x000033E8, 0x00000000, 0, 0, "stitching_ris_exp_err1", "Stitching HDR short exp time error L interrupt status"},
  141. {"ISP_STITCHING0_MIS", "MIS Masked Interrupt Status",
  142. 0x000033EC, 0x00000000, 8, 8, "stitching_mis_hdr_hist_irq_vs", "Stitching HDR hist VS interrupt masked status"},
  143. {NULL, NULL, 0x000033EC, 0x00000000, 7, 7, "stitching_mis_hdr_hist_irq_s", "Stitching HDR hist S interrupt masked status"},
  144. {NULL, NULL, 0x000033EC, 0x00000000, 6, 6, "stitching_mis_hdr_hist_irq_l", "Stitching HDR hist L interrupt masked status"},
  145. {NULL, NULL, 0x000033EC, 0x00000000, 5, 5, "stitching_mis_hdr_exp_complete_vs", "Stitching HDR exp statistic VS interrupt masked status"},
  146. {NULL, NULL, 0x000033EC, 0x00000000, 4, 4, "stitching_mis_hdr_exp_complete_s", "Stitching HDR exp statistic S interrupt masked status"},
  147. {NULL, NULL, 0x000033EC, 0x00000000, 3, 3, "stitching_mis_hdr_exp_complete_l", "Stitching HDR exp statistic L interrupt masked status"},
  148. {NULL, NULL, 0x000033EC, 0x00000000, 2, 2, "stitching_mis_fifo_empty", "Stitching HDR FIFO empty L interrupt masked status"},
  149. {NULL, NULL, 0x000033EC, 0x00000000, 1, 1, "stitching_mis_exp_err2", "Stitching HDR very short exp time error\n\t L interrupt masked status"},
  150. {NULL, NULL, 0x000033EC, 0x00000000, 0, 0, "stitching_mis_exp_err1", "Stitching HDR short exp time error L interrupt \n\tMasked status"},
  151. {"ISP_STITCHING0_ICR", "ICR Interrupt Clear Register",
  152. 0x000033F0, 0x00000000, 8, 8, "stitching_icr_hdr_hist_irq_vs", "Stitching HDR hist VS interrupt clear"},
  153. {NULL, NULL, 0x000033F0, 0x00000000, 7, 7, "stitching_icr_hdr_hist_irq_s", "Stitching HDR hist S interrupt clear"},
  154. {NULL, NULL, 0x000033F0, 0x00000000, 6, 6, "stitching_icr_hdr_hist_irq_l", "Stitching HDR hist L interrupt clear"},
  155. {NULL, NULL, 0x000033F0, 0x00000000, 5, 5, "stitching_icr_hdr_exp_complete_vs", "Stitching HDR exp statistic VS interrupt clear"},
  156. {NULL, NULL, 0x000033F0, 0x00000000, 4, 4, "stitching_icr_hdr_exp_complete_s", "Stitching HDR exp statistic S interrupt clear"},
  157. {NULL, NULL, 0x000033F0, 0x00000000, 3, 3, "stitching_icr_hdr_exp_complete_l", "Stitching HDR exp statistic L interrupt clear"},
  158. {NULL, NULL, 0x000033F0, 0x00000000, 2, 2, "stitching_icr_fifo_empty", "Stitching HDR FIFO empty L interrupt clear"},
  159. {NULL, NULL, 0x000033F0, 0x00000000, 1, 1, "stitching_icr_exp_err2", "Stitching HDR very short exp time error L interrupt clear"},
  160. {NULL, NULL, 0x000033F0, 0x00000000, 0, 0, "stitching_icr_exp_err1", "Stitching HDR short exp time error L interrupt clear"},
  161. {"ISP_STITCHING0_ISR", "ISR Interrupt Set Register",
  162. 0x000033F4, 0x00000000, 8, 8, "stitching_isr_hdr_hist_irq_vs", "Stitching HDR hist VS interrupt set"},
  163. {NULL, NULL, 0x000033F4, 0x00000000, 7, 7, "stitching_isr_hdr_hist_irq_s", "Stitching HDR hist S interrupt set"},
  164. {NULL, NULL, 0x000033F4, 0x00000000, 6, 6, "stitching_isr_hdr_hist_irq_l", "Stitching HDR hist L interrupt set"},
  165. {NULL, NULL, 0x000033F4, 0x00000000, 5, 5, "stitching_isr_hdr_exp_complete_vs", "Stitching HDR exp statistic VS interrupt set"},
  166. {NULL, NULL, 0x000033F4, 0x00000000, 4, 4, "stitching_isr_hdr_exp_complete_s", "Stitching HDR exp statistic S interrupt set"},
  167. {NULL, NULL, 0x000033F4, 0x00000000, 3, 3, "stitching_isr_hdr_exp_complete_l", "Stitching HDR exp statistic L interrupt set"},
  168. {NULL, NULL, 0x000033F4, 0x00000000, 2, 2, "stitching_isr_fifo_empty", "Stitching HDR FIFO empty L interrupt set"},
  169. {NULL, NULL, 0x000033F4, 0x00000000, 1, 1, "stitching_isr_exp_err2", "Stitching HDR very short exp time error L interrupt set"},
  170. {NULL, NULL, 0x000033F4, 0x00000000, 0, 0, "stitching_isr_exp_err1", "Stitching HDR short exp time error L interrupt set"},
  171. };
  172. int light_isp_sitching0_reg_dump(reg_analyzer_info_s *ra_info)
  173. {
  174. uint32_t count = sizeof(reg_desc) / sizeof(reg_desc[0]);
  175. return ra_dump_reg_fields(ra_info, reg_desc, count);
  176. }
  177. int light_isp_sitching0_define(reg_analyzer_info_s *ra_info)
  178. {
  179. uint32_t count = sizeof(reg_desc) / sizeof(reg_desc[0]);
  180. return ra_dump_reg_define(ra_info, reg_desc, count);
  181. }
  182. int light_isp_sitching0_find(reg_analyzer_info_s *ra_info)
  183. {
  184. uint32_t count = sizeof(reg_desc) / sizeof(reg_desc[0]);
  185. return ra_dump_reg_find(ra_info, reg_desc, count);
  186. }