fdtdec.c 43 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (c) 2011 The Chromium OS Authors.
  4. */
  5. #ifndef USE_HOSTCC
  6. #include <common.h>
  7. #include <boot_fit.h>
  8. #include <dm.h>
  9. #include <hang.h>
  10. #include <init.h>
  11. #include <log.h>
  12. #include <malloc.h>
  13. #include <net.h>
  14. #include <dm/of_extra.h>
  15. #include <env.h>
  16. #include <errno.h>
  17. #include <fdtdec.h>
  18. #include <fdt_support.h>
  19. #include <gzip.h>
  20. #include <mapmem.h>
  21. #include <linux/libfdt.h>
  22. #include <serial.h>
  23. #include <asm/global_data.h>
  24. #include <asm/sections.h>
  25. #include <linux/ctype.h>
  26. #include <linux/lzo.h>
  27. #include <linux/ioport.h>
  28. DECLARE_GLOBAL_DATA_PTR;
  29. /*
  30. * Here are the type we know about. One day we might allow drivers to
  31. * register. For now we just put them here. The COMPAT macro allows us to
  32. * turn this into a sparse list later, and keeps the ID with the name.
  33. *
  34. * NOTE: This list is basically a TODO list for things that need to be
  35. * converted to driver model. So don't add new things here unless there is a
  36. * good reason why driver-model conversion is infeasible. Examples include
  37. * things which are used before driver model is available.
  38. */
  39. #define COMPAT(id, name) name
  40. static const char * const compat_names[COMPAT_COUNT] = {
  41. COMPAT(UNKNOWN, "<none>"),
  42. COMPAT(NVIDIA_TEGRA20_EMC, "nvidia,tegra20-emc"),
  43. COMPAT(NVIDIA_TEGRA20_EMC_TABLE, "nvidia,tegra20-emc-table"),
  44. COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"),
  45. COMPAT(NVIDIA_TEGRA124_XUSB_PADCTL, "nvidia,tegra124-xusb-padctl"),
  46. COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL, "nvidia,tegra210-xusb-padctl"),
  47. COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"),
  48. COMPAT(SAMSUNG_EXYNOS5_USB3_PHY, "samsung,exynos5250-usb3-phy"),
  49. COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"),
  50. COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"),
  51. COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"),
  52. COMPAT(GENERIC_SPI_FLASH, "jedec,spi-nor"),
  53. COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"),
  54. COMPAT(INTEL_MICROCODE, "intel,microcode"),
  55. COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"),
  56. COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"),
  57. COMPAT(ALTERA_SOCFPGA_DWMMC, "altr,socfpga-dw-mshc"),
  58. COMPAT(ALTERA_SOCFPGA_DWC2USB, "snps,dwc2"),
  59. COMPAT(INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"),
  60. COMPAT(INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"),
  61. COMPAT(INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"),
  62. COMPAT(COMPAT_SUNXI_NAND, "allwinner,sun4i-a10-nand"),
  63. COMPAT(ALTERA_SOCFPGA_CLK, "altr,clk-mgr"),
  64. COMPAT(ALTERA_SOCFPGA_PINCTRL_SINGLE, "pinctrl-single"),
  65. COMPAT(ALTERA_SOCFPGA_H2F_BRG, "altr,socfpga-hps2fpga-bridge"),
  66. COMPAT(ALTERA_SOCFPGA_LWH2F_BRG, "altr,socfpga-lwhps2fpga-bridge"),
  67. COMPAT(ALTERA_SOCFPGA_F2H_BRG, "altr,socfpga-fpga2hps-bridge"),
  68. COMPAT(ALTERA_SOCFPGA_F2SDR0, "altr,socfpga-fpga2sdram0-bridge"),
  69. COMPAT(ALTERA_SOCFPGA_F2SDR1, "altr,socfpga-fpga2sdram1-bridge"),
  70. COMPAT(ALTERA_SOCFPGA_F2SDR2, "altr,socfpga-fpga2sdram2-bridge"),
  71. COMPAT(ALTERA_SOCFPGA_FPGA0, "altr,socfpga-a10-fpga-mgr"),
  72. COMPAT(ALTERA_SOCFPGA_NOC, "altr,socfpga-a10-noc"),
  73. COMPAT(ALTERA_SOCFPGA_CLK_INIT, "altr,socfpga-a10-clk-init")
  74. };
  75. const char *fdtdec_get_compatible(enum fdt_compat_id id)
  76. {
  77. /* We allow reading of the 'unknown' ID for testing purposes */
  78. assert(id >= 0 && id < COMPAT_COUNT);
  79. return compat_names[id];
  80. }
  81. fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int node,
  82. const char *prop_name, int index, int na,
  83. int ns, fdt_size_t *sizep,
  84. bool translate)
  85. {
  86. const fdt32_t *prop, *prop_end;
  87. const fdt32_t *prop_addr, *prop_size, *prop_after_size;
  88. int len;
  89. fdt_addr_t addr;
  90. debug("%s: %s: ", __func__, prop_name);
  91. prop = fdt_getprop(blob, node, prop_name, &len);
  92. if (!prop) {
  93. debug("(not found)\n");
  94. return FDT_ADDR_T_NONE;
  95. }
  96. prop_end = prop + (len / sizeof(*prop));
  97. prop_addr = prop + (index * (na + ns));
  98. prop_size = prop_addr + na;
  99. prop_after_size = prop_size + ns;
  100. if (prop_after_size > prop_end) {
  101. debug("(not enough data: expected >= %d cells, got %d cells)\n",
  102. (u32)(prop_after_size - prop), ((u32)(prop_end - prop)));
  103. return FDT_ADDR_T_NONE;
  104. }
  105. #if CONFIG_IS_ENABLED(OF_TRANSLATE)
  106. if (translate)
  107. addr = fdt_translate_address(blob, node, prop_addr);
  108. else
  109. #endif
  110. addr = fdtdec_get_number(prop_addr, na);
  111. if (sizep) {
  112. *sizep = fdtdec_get_number(prop_size, ns);
  113. debug("addr=%08llx, size=%llx\n", (unsigned long long)addr,
  114. (unsigned long long)*sizep);
  115. } else {
  116. debug("addr=%08llx\n", (unsigned long long)addr);
  117. }
  118. return addr;
  119. }
  120. fdt_addr_t fdtdec_get_addr_size_auto_parent(const void *blob, int parent,
  121. int node, const char *prop_name,
  122. int index, fdt_size_t *sizep,
  123. bool translate)
  124. {
  125. int na, ns;
  126. debug("%s: ", __func__);
  127. na = fdt_address_cells(blob, parent);
  128. if (na < 1) {
  129. debug("(bad #address-cells)\n");
  130. return FDT_ADDR_T_NONE;
  131. }
  132. ns = fdt_size_cells(blob, parent);
  133. if (ns < 0) {
  134. debug("(bad #size-cells)\n");
  135. return FDT_ADDR_T_NONE;
  136. }
  137. debug("na=%d, ns=%d, ", na, ns);
  138. return fdtdec_get_addr_size_fixed(blob, node, prop_name, index, na,
  139. ns, sizep, translate);
  140. }
  141. fdt_addr_t fdtdec_get_addr_size_auto_noparent(const void *blob, int node,
  142. const char *prop_name, int index,
  143. fdt_size_t *sizep,
  144. bool translate)
  145. {
  146. int parent;
  147. debug("%s: ", __func__);
  148. parent = fdt_parent_offset(blob, node);
  149. if (parent < 0) {
  150. debug("(no parent found)\n");
  151. return FDT_ADDR_T_NONE;
  152. }
  153. return fdtdec_get_addr_size_auto_parent(blob, parent, node, prop_name,
  154. index, sizep, translate);
  155. }
  156. fdt_addr_t fdtdec_get_addr_size(const void *blob, int node,
  157. const char *prop_name, fdt_size_t *sizep)
  158. {
  159. int ns = sizep ? (sizeof(fdt_size_t) / sizeof(fdt32_t)) : 0;
  160. return fdtdec_get_addr_size_fixed(blob, node, prop_name, 0,
  161. sizeof(fdt_addr_t) / sizeof(fdt32_t),
  162. ns, sizep, false);
  163. }
  164. fdt_addr_t fdtdec_get_addr(const void *blob, int node, const char *prop_name)
  165. {
  166. return fdtdec_get_addr_size(blob, node, prop_name, NULL);
  167. }
  168. int fdtdec_get_pci_vendev(const void *blob, int node, u16 *vendor, u16 *device)
  169. {
  170. const char *list, *end;
  171. int len;
  172. list = fdt_getprop(blob, node, "compatible", &len);
  173. if (!list)
  174. return -ENOENT;
  175. end = list + len;
  176. while (list < end) {
  177. len = strlen(list);
  178. if (len >= strlen("pciVVVV,DDDD")) {
  179. char *s = strstr(list, "pci");
  180. /*
  181. * check if the string is something like pciVVVV,DDDD.RR
  182. * or just pciVVVV,DDDD
  183. */
  184. if (s && s[7] == ',' &&
  185. (s[12] == '.' || s[12] == 0)) {
  186. s += 3;
  187. *vendor = simple_strtol(s, NULL, 16);
  188. s += 5;
  189. *device = simple_strtol(s, NULL, 16);
  190. return 0;
  191. }
  192. }
  193. list += (len + 1);
  194. }
  195. return -ENOENT;
  196. }
  197. int fdtdec_get_pci_bar32(const struct udevice *dev, struct fdt_pci_addr *addr,
  198. u32 *bar)
  199. {
  200. int barnum;
  201. /* extract the bar number from fdt_pci_addr */
  202. barnum = addr->phys_hi & 0xff;
  203. if (barnum < PCI_BASE_ADDRESS_0 || barnum > PCI_CARDBUS_CIS)
  204. return -EINVAL;
  205. barnum = (barnum - PCI_BASE_ADDRESS_0) / 4;
  206. /*
  207. * There is a strange toolchain bug with nds32 which complains about
  208. * an undefined reference here, even if fdtdec_get_pci_bar32() is never
  209. * called. An #ifdef seems to be the only fix!
  210. */
  211. #if !IS_ENABLED(CONFIG_NDS32)
  212. *bar = dm_pci_read_bar32(dev, barnum);
  213. #endif
  214. return 0;
  215. }
  216. int fdtdec_get_pci_bus_range(const void *blob, int node,
  217. struct fdt_resource *res)
  218. {
  219. const u32 *values;
  220. int len;
  221. values = fdt_getprop(blob, node, "bus-range", &len);
  222. if (!values || len < sizeof(*values) * 2)
  223. return -EINVAL;
  224. res->start = fdt32_to_cpu(*values++);
  225. res->end = fdt32_to_cpu(*values);
  226. return 0;
  227. }
  228. uint64_t fdtdec_get_uint64(const void *blob, int node, const char *prop_name,
  229. uint64_t default_val)
  230. {
  231. const unaligned_fdt64_t *cell64;
  232. int length;
  233. cell64 = fdt_getprop(blob, node, prop_name, &length);
  234. if (!cell64 || length < sizeof(*cell64))
  235. return default_val;
  236. return fdt64_to_cpu(*cell64);
  237. }
  238. int fdtdec_get_is_enabled(const void *blob, int node)
  239. {
  240. const char *cell;
  241. /*
  242. * It should say "okay", so only allow that. Some fdts use "ok" but
  243. * this is a bug. Please fix your device tree source file. See here
  244. * for discussion:
  245. *
  246. * http://www.mail-archive.com/u-boot@lists.denx.de/msg71598.html
  247. */
  248. cell = fdt_getprop(blob, node, "status", NULL);
  249. if (cell)
  250. return strcmp(cell, "okay") == 0;
  251. return 1;
  252. }
  253. enum fdt_compat_id fdtdec_lookup(const void *blob, int node)
  254. {
  255. enum fdt_compat_id id;
  256. /* Search our drivers */
  257. for (id = COMPAT_UNKNOWN; id < COMPAT_COUNT; id++)
  258. if (fdt_node_check_compatible(blob, node,
  259. compat_names[id]) == 0)
  260. return id;
  261. return COMPAT_UNKNOWN;
  262. }
  263. int fdtdec_next_compatible(const void *blob, int node, enum fdt_compat_id id)
  264. {
  265. return fdt_node_offset_by_compatible(blob, node, compat_names[id]);
  266. }
  267. int fdtdec_next_compatible_subnode(const void *blob, int node,
  268. enum fdt_compat_id id, int *depthp)
  269. {
  270. do {
  271. node = fdt_next_node(blob, node, depthp);
  272. } while (*depthp > 1);
  273. /* If this is a direct subnode, and compatible, return it */
  274. if (*depthp == 1 && 0 == fdt_node_check_compatible(
  275. blob, node, compat_names[id]))
  276. return node;
  277. return -FDT_ERR_NOTFOUND;
  278. }
  279. int fdtdec_next_alias(const void *blob, const char *name, enum fdt_compat_id id,
  280. int *upto)
  281. {
  282. #define MAX_STR_LEN 20
  283. char str[MAX_STR_LEN + 20];
  284. int node, err;
  285. /* snprintf() is not available */
  286. assert(strlen(name) < MAX_STR_LEN);
  287. sprintf(str, "%.*s%d", MAX_STR_LEN, name, *upto);
  288. node = fdt_path_offset(blob, str);
  289. if (node < 0)
  290. return node;
  291. err = fdt_node_check_compatible(blob, node, compat_names[id]);
  292. if (err < 0)
  293. return err;
  294. if (err)
  295. return -FDT_ERR_NOTFOUND;
  296. (*upto)++;
  297. return node;
  298. }
  299. int fdtdec_find_aliases_for_id(const void *blob, const char *name,
  300. enum fdt_compat_id id, int *node_list,
  301. int maxcount)
  302. {
  303. memset(node_list, '\0', sizeof(*node_list) * maxcount);
  304. return fdtdec_add_aliases_for_id(blob, name, id, node_list, maxcount);
  305. }
  306. /* TODO: Can we tighten this code up a little? */
  307. int fdtdec_add_aliases_for_id(const void *blob, const char *name,
  308. enum fdt_compat_id id, int *node_list,
  309. int maxcount)
  310. {
  311. int name_len = strlen(name);
  312. int nodes[maxcount];
  313. int num_found = 0;
  314. int offset, node;
  315. int alias_node;
  316. int count;
  317. int i, j;
  318. /* find the alias node if present */
  319. alias_node = fdt_path_offset(blob, "/aliases");
  320. /*
  321. * start with nothing, and we can assume that the root node can't
  322. * match
  323. */
  324. memset(nodes, '\0', sizeof(nodes));
  325. /* First find all the compatible nodes */
  326. for (node = count = 0; node >= 0 && count < maxcount;) {
  327. node = fdtdec_next_compatible(blob, node, id);
  328. if (node >= 0)
  329. nodes[count++] = node;
  330. }
  331. if (node >= 0)
  332. debug("%s: warning: maxcount exceeded with alias '%s'\n",
  333. __func__, name);
  334. /* Now find all the aliases */
  335. for (offset = fdt_first_property_offset(blob, alias_node);
  336. offset > 0;
  337. offset = fdt_next_property_offset(blob, offset)) {
  338. const struct fdt_property *prop;
  339. const char *path;
  340. int number;
  341. int found;
  342. node = 0;
  343. prop = fdt_get_property_by_offset(blob, offset, NULL);
  344. path = fdt_string(blob, fdt32_to_cpu(prop->nameoff));
  345. if (prop->len && 0 == strncmp(path, name, name_len))
  346. node = fdt_path_offset(blob, prop->data);
  347. if (node <= 0)
  348. continue;
  349. /* Get the alias number */
  350. number = dectoul(path + name_len, NULL);
  351. if (number < 0 || number >= maxcount) {
  352. debug("%s: warning: alias '%s' is out of range\n",
  353. __func__, path);
  354. continue;
  355. }
  356. /* Make sure the node we found is actually in our list! */
  357. found = -1;
  358. for (j = 0; j < count; j++)
  359. if (nodes[j] == node) {
  360. found = j;
  361. break;
  362. }
  363. if (found == -1) {
  364. debug("%s: warning: alias '%s' points to a node "
  365. "'%s' that is missing or is not compatible "
  366. " with '%s'\n", __func__, path,
  367. fdt_get_name(blob, node, NULL),
  368. compat_names[id]);
  369. continue;
  370. }
  371. /*
  372. * Add this node to our list in the right place, and mark
  373. * it as done.
  374. */
  375. if (fdtdec_get_is_enabled(blob, node)) {
  376. if (node_list[number]) {
  377. debug("%s: warning: alias '%s' requires that "
  378. "a node be placed in the list in a "
  379. "position which is already filled by "
  380. "node '%s'\n", __func__, path,
  381. fdt_get_name(blob, node, NULL));
  382. continue;
  383. }
  384. node_list[number] = node;
  385. if (number >= num_found)
  386. num_found = number + 1;
  387. }
  388. nodes[found] = 0;
  389. }
  390. /* Add any nodes not mentioned by an alias */
  391. for (i = j = 0; i < maxcount; i++) {
  392. if (!node_list[i]) {
  393. for (; j < maxcount; j++)
  394. if (nodes[j] &&
  395. fdtdec_get_is_enabled(blob, nodes[j]))
  396. break;
  397. /* Have we run out of nodes to add? */
  398. if (j == maxcount)
  399. break;
  400. assert(!node_list[i]);
  401. node_list[i] = nodes[j++];
  402. if (i >= num_found)
  403. num_found = i + 1;
  404. }
  405. }
  406. return num_found;
  407. }
  408. int fdtdec_get_alias_seq(const void *blob, const char *base, int offset,
  409. int *seqp)
  410. {
  411. int base_len = strlen(base);
  412. const char *find_name;
  413. int find_namelen;
  414. int prop_offset;
  415. int aliases;
  416. find_name = fdt_get_name(blob, offset, &find_namelen);
  417. debug("Looking for '%s' at %d, name %s\n", base, offset, find_name);
  418. aliases = fdt_path_offset(blob, "/aliases");
  419. for (prop_offset = fdt_first_property_offset(blob, aliases);
  420. prop_offset > 0;
  421. prop_offset = fdt_next_property_offset(blob, prop_offset)) {
  422. const char *prop;
  423. const char *name;
  424. const char *slash;
  425. int len, val;
  426. prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
  427. debug(" - %s, %s\n", name, prop);
  428. if (len < find_namelen || *prop != '/' || prop[len - 1] ||
  429. strncmp(name, base, base_len))
  430. continue;
  431. slash = strrchr(prop, '/');
  432. if (strcmp(slash + 1, find_name))
  433. continue;
  434. /*
  435. * Adding an extra check to distinguish DT nodes with
  436. * same name
  437. */
  438. if (IS_ENABLED(CONFIG_PHANDLE_CHECK_SEQ)) {
  439. if (fdt_get_phandle(blob, offset) !=
  440. fdt_get_phandle(blob, fdt_path_offset(blob, prop)))
  441. continue;
  442. }
  443. val = trailing_strtol(name);
  444. if (val != -1) {
  445. *seqp = val;
  446. debug("Found seq %d\n", *seqp);
  447. return 0;
  448. }
  449. }
  450. debug("Not found\n");
  451. return -ENOENT;
  452. }
  453. int fdtdec_get_alias_highest_id(const void *blob, const char *base)
  454. {
  455. int base_len = strlen(base);
  456. int prop_offset;
  457. int aliases;
  458. int max = -1;
  459. debug("Looking for highest alias id for '%s'\n", base);
  460. aliases = fdt_path_offset(blob, "/aliases");
  461. for (prop_offset = fdt_first_property_offset(blob, aliases);
  462. prop_offset > 0;
  463. prop_offset = fdt_next_property_offset(blob, prop_offset)) {
  464. const char *prop;
  465. const char *name;
  466. int len, val;
  467. prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
  468. debug(" - %s, %s\n", name, prop);
  469. if (*prop != '/' || prop[len - 1] ||
  470. strncmp(name, base, base_len))
  471. continue;
  472. val = trailing_strtol(name);
  473. if (val > max) {
  474. debug("Found seq %d\n", val);
  475. max = val;
  476. }
  477. }
  478. return max;
  479. }
  480. const char *fdtdec_get_chosen_prop(const void *blob, const char *name)
  481. {
  482. int chosen_node;
  483. if (!blob)
  484. return NULL;
  485. chosen_node = fdt_path_offset(blob, "/chosen");
  486. return fdt_getprop(blob, chosen_node, name, NULL);
  487. }
  488. int fdtdec_get_chosen_node(const void *blob, const char *name)
  489. {
  490. const char *prop;
  491. prop = fdtdec_get_chosen_prop(blob, name);
  492. if (!prop)
  493. return -FDT_ERR_NOTFOUND;
  494. return fdt_path_offset(blob, prop);
  495. }
  496. int fdtdec_check_fdt(void)
  497. {
  498. /*
  499. * We must have an FDT, but we cannot panic() yet since the console
  500. * is not ready. So for now, just assert(). Boards which need an early
  501. * FDT (prior to console ready) will need to make their own
  502. * arrangements and do their own checks.
  503. */
  504. assert(!fdtdec_prepare_fdt());
  505. return 0;
  506. }
  507. /*
  508. * This function is a little odd in that it accesses global data. At some
  509. * point if the architecture board.c files merge this will make more sense.
  510. * Even now, it is common code.
  511. */
  512. int fdtdec_prepare_fdt(void)
  513. {
  514. if (!gd->fdt_blob || ((uintptr_t)gd->fdt_blob & 3) ||
  515. fdt_check_header(gd->fdt_blob)) {
  516. #ifdef CONFIG_SPL_BUILD
  517. puts("Missing DTB\n");
  518. #else
  519. printf("No valid device tree binary found at %p\n",
  520. gd->fdt_blob);
  521. # ifdef DEBUG
  522. if (gd->fdt_blob) {
  523. printf("fdt_blob=%p\n", gd->fdt_blob);
  524. print_buffer((ulong)gd->fdt_blob, gd->fdt_blob, 4,
  525. 32, 0);
  526. }
  527. # endif
  528. #endif
  529. return -1;
  530. }
  531. return 0;
  532. }
  533. int fdtdec_lookup_phandle(const void *blob, int node, const char *prop_name)
  534. {
  535. const u32 *phandle;
  536. int lookup;
  537. debug("%s: %s\n", __func__, prop_name);
  538. phandle = fdt_getprop(blob, node, prop_name, NULL);
  539. if (!phandle)
  540. return -FDT_ERR_NOTFOUND;
  541. lookup = fdt_node_offset_by_phandle(blob, fdt32_to_cpu(*phandle));
  542. return lookup;
  543. }
  544. /**
  545. * Look up a property in a node and check that it has a minimum length.
  546. *
  547. * @param blob FDT blob
  548. * @param node node to examine
  549. * @param prop_name name of property to find
  550. * @param min_len minimum property length in bytes
  551. * @param err 0 if ok, or -FDT_ERR_NOTFOUND if the property is not
  552. found, or -FDT_ERR_BADLAYOUT if not enough data
  553. * @return pointer to cell, which is only valid if err == 0
  554. */
  555. static const void *get_prop_check_min_len(const void *blob, int node,
  556. const char *prop_name, int min_len,
  557. int *err)
  558. {
  559. const void *cell;
  560. int len;
  561. debug("%s: %s\n", __func__, prop_name);
  562. cell = fdt_getprop(blob, node, prop_name, &len);
  563. if (!cell)
  564. *err = -FDT_ERR_NOTFOUND;
  565. else if (len < min_len)
  566. *err = -FDT_ERR_BADLAYOUT;
  567. else
  568. *err = 0;
  569. return cell;
  570. }
  571. int fdtdec_get_int_array(const void *blob, int node, const char *prop_name,
  572. u32 *array, int count)
  573. {
  574. const u32 *cell;
  575. int err = 0;
  576. debug("%s: %s\n", __func__, prop_name);
  577. cell = get_prop_check_min_len(blob, node, prop_name,
  578. sizeof(u32) * count, &err);
  579. if (!err) {
  580. int i;
  581. for (i = 0; i < count; i++)
  582. array[i] = fdt32_to_cpu(cell[i]);
  583. }
  584. return err;
  585. }
  586. int fdtdec_get_int_array_count(const void *blob, int node,
  587. const char *prop_name, u32 *array, int count)
  588. {
  589. const u32 *cell;
  590. int len, elems;
  591. int i;
  592. debug("%s: %s\n", __func__, prop_name);
  593. cell = fdt_getprop(blob, node, prop_name, &len);
  594. if (!cell)
  595. return -FDT_ERR_NOTFOUND;
  596. elems = len / sizeof(u32);
  597. if (count > elems)
  598. count = elems;
  599. for (i = 0; i < count; i++)
  600. array[i] = fdt32_to_cpu(cell[i]);
  601. return count;
  602. }
  603. const u32 *fdtdec_locate_array(const void *blob, int node,
  604. const char *prop_name, int count)
  605. {
  606. const u32 *cell;
  607. int err;
  608. cell = get_prop_check_min_len(blob, node, prop_name,
  609. sizeof(u32) * count, &err);
  610. return err ? NULL : cell;
  611. }
  612. int fdtdec_get_bool(const void *blob, int node, const char *prop_name)
  613. {
  614. const s32 *cell;
  615. int len;
  616. debug("%s: %s\n", __func__, prop_name);
  617. cell = fdt_getprop(blob, node, prop_name, &len);
  618. return cell != NULL;
  619. }
  620. int fdtdec_parse_phandle_with_args(const void *blob, int src_node,
  621. const char *list_name,
  622. const char *cells_name,
  623. int cell_count, int index,
  624. struct fdtdec_phandle_args *out_args)
  625. {
  626. const __be32 *list, *list_end;
  627. int rc = 0, size, cur_index = 0;
  628. uint32_t count = 0;
  629. int node = -1;
  630. int phandle;
  631. /* Retrieve the phandle list property */
  632. list = fdt_getprop(blob, src_node, list_name, &size);
  633. if (!list)
  634. return -ENOENT;
  635. list_end = list + size / sizeof(*list);
  636. /* Loop over the phandles until all the requested entry is found */
  637. while (list < list_end) {
  638. rc = -EINVAL;
  639. count = 0;
  640. /*
  641. * If phandle is 0, then it is an empty entry with no
  642. * arguments. Skip forward to the next entry.
  643. */
  644. phandle = be32_to_cpup(list++);
  645. if (phandle) {
  646. /*
  647. * Find the provider node and parse the #*-cells
  648. * property to determine the argument length.
  649. *
  650. * This is not needed if the cell count is hard-coded
  651. * (i.e. cells_name not set, but cell_count is set),
  652. * except when we're going to return the found node
  653. * below.
  654. */
  655. if (cells_name || cur_index == index) {
  656. node = fdt_node_offset_by_phandle(blob,
  657. phandle);
  658. if (node < 0) {
  659. debug("%s: could not find phandle\n",
  660. fdt_get_name(blob, src_node,
  661. NULL));
  662. goto err;
  663. }
  664. }
  665. if (cells_name) {
  666. count = fdtdec_get_int(blob, node, cells_name,
  667. -1);
  668. if (count == -1) {
  669. debug("%s: could not get %s for %s\n",
  670. fdt_get_name(blob, src_node,
  671. NULL),
  672. cells_name,
  673. fdt_get_name(blob, node,
  674. NULL));
  675. goto err;
  676. }
  677. } else {
  678. count = cell_count;
  679. }
  680. /*
  681. * Make sure that the arguments actually fit in the
  682. * remaining property data length
  683. */
  684. if (list + count > list_end) {
  685. debug("%s: arguments longer than property\n",
  686. fdt_get_name(blob, src_node, NULL));
  687. goto err;
  688. }
  689. }
  690. /*
  691. * All of the error cases above bail out of the loop, so at
  692. * this point, the parsing is successful. If the requested
  693. * index matches, then fill the out_args structure and return,
  694. * or return -ENOENT for an empty entry.
  695. */
  696. rc = -ENOENT;
  697. if (cur_index == index) {
  698. if (!phandle)
  699. goto err;
  700. if (out_args) {
  701. int i;
  702. if (count > MAX_PHANDLE_ARGS) {
  703. debug("%s: too many arguments %d\n",
  704. fdt_get_name(blob, src_node,
  705. NULL), count);
  706. count = MAX_PHANDLE_ARGS;
  707. }
  708. out_args->node = node;
  709. out_args->args_count = count;
  710. for (i = 0; i < count; i++) {
  711. out_args->args[i] =
  712. be32_to_cpup(list++);
  713. }
  714. }
  715. /* Found it! return success */
  716. return 0;
  717. }
  718. node = -1;
  719. list += count;
  720. cur_index++;
  721. }
  722. /*
  723. * Result will be one of:
  724. * -ENOENT : index is for empty phandle
  725. * -EINVAL : parsing error on data
  726. * [1..n] : Number of phandle (count mode; when index = -1)
  727. */
  728. rc = index < 0 ? cur_index : -ENOENT;
  729. err:
  730. return rc;
  731. }
  732. int fdtdec_get_byte_array(const void *blob, int node, const char *prop_name,
  733. u8 *array, int count)
  734. {
  735. const u8 *cell;
  736. int err;
  737. cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
  738. if (!err)
  739. memcpy(array, cell, count);
  740. return err;
  741. }
  742. const u8 *fdtdec_locate_byte_array(const void *blob, int node,
  743. const char *prop_name, int count)
  744. {
  745. const u8 *cell;
  746. int err;
  747. cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
  748. if (err)
  749. return NULL;
  750. return cell;
  751. }
  752. u64 fdtdec_get_number(const fdt32_t *ptr, unsigned int cells)
  753. {
  754. u64 number = 0;
  755. while (cells--)
  756. number = (number << 32) | fdt32_to_cpu(*ptr++);
  757. return number;
  758. }
  759. int fdt_get_resource(const void *fdt, int node, const char *property,
  760. unsigned int index, struct fdt_resource *res)
  761. {
  762. const fdt32_t *ptr, *end;
  763. int na, ns, len, parent;
  764. unsigned int i = 0;
  765. parent = fdt_parent_offset(fdt, node);
  766. if (parent < 0)
  767. return parent;
  768. na = fdt_address_cells(fdt, parent);
  769. ns = fdt_size_cells(fdt, parent);
  770. ptr = fdt_getprop(fdt, node, property, &len);
  771. if (!ptr)
  772. return len;
  773. end = ptr + len / sizeof(*ptr);
  774. while (ptr + na + ns <= end) {
  775. if (i == index) {
  776. if (CONFIG_IS_ENABLED(OF_TRANSLATE))
  777. res->start = fdt_translate_address(fdt, node, ptr);
  778. else
  779. res->start = fdtdec_get_number(ptr, na);
  780. res->end = res->start;
  781. res->end += fdtdec_get_number(&ptr[na], ns) - 1;
  782. return 0;
  783. }
  784. ptr += na + ns;
  785. i++;
  786. }
  787. return -FDT_ERR_NOTFOUND;
  788. }
  789. int fdt_get_named_resource(const void *fdt, int node, const char *property,
  790. const char *prop_names, const char *name,
  791. struct fdt_resource *res)
  792. {
  793. int index;
  794. index = fdt_stringlist_search(fdt, node, prop_names, name);
  795. if (index < 0)
  796. return index;
  797. return fdt_get_resource(fdt, node, property, index, res);
  798. }
  799. static int decode_timing_property(const void *blob, int node, const char *name,
  800. struct timing_entry *result)
  801. {
  802. int length, ret = 0;
  803. const u32 *prop;
  804. prop = fdt_getprop(blob, node, name, &length);
  805. if (!prop) {
  806. debug("%s: could not find property %s\n",
  807. fdt_get_name(blob, node, NULL), name);
  808. return length;
  809. }
  810. if (length == sizeof(u32)) {
  811. result->typ = fdtdec_get_int(blob, node, name, 0);
  812. result->min = result->typ;
  813. result->max = result->typ;
  814. } else {
  815. ret = fdtdec_get_int_array(blob, node, name, &result->min, 3);
  816. }
  817. return ret;
  818. }
  819. int fdtdec_decode_display_timing(const void *blob, int parent, int index,
  820. struct display_timing *dt)
  821. {
  822. int i, node, timings_node;
  823. u32 val = 0;
  824. int ret = 0;
  825. timings_node = fdt_subnode_offset(blob, parent, "display-timings");
  826. if (timings_node < 0)
  827. return timings_node;
  828. for (i = 0, node = fdt_first_subnode(blob, timings_node);
  829. node > 0 && i != index;
  830. node = fdt_next_subnode(blob, node))
  831. i++;
  832. if (node < 0)
  833. return node;
  834. memset(dt, 0, sizeof(*dt));
  835. ret |= decode_timing_property(blob, node, "hback-porch",
  836. &dt->hback_porch);
  837. ret |= decode_timing_property(blob, node, "hfront-porch",
  838. &dt->hfront_porch);
  839. ret |= decode_timing_property(blob, node, "hactive", &dt->hactive);
  840. ret |= decode_timing_property(blob, node, "hsync-len", &dt->hsync_len);
  841. ret |= decode_timing_property(blob, node, "vback-porch",
  842. &dt->vback_porch);
  843. ret |= decode_timing_property(blob, node, "vfront-porch",
  844. &dt->vfront_porch);
  845. ret |= decode_timing_property(blob, node, "vactive", &dt->vactive);
  846. ret |= decode_timing_property(blob, node, "vsync-len", &dt->vsync_len);
  847. ret |= decode_timing_property(blob, node, "clock-frequency",
  848. &dt->pixelclock);
  849. dt->flags = 0;
  850. val = fdtdec_get_int(blob, node, "vsync-active", -1);
  851. if (val != -1) {
  852. dt->flags |= val ? DISPLAY_FLAGS_VSYNC_HIGH :
  853. DISPLAY_FLAGS_VSYNC_LOW;
  854. }
  855. val = fdtdec_get_int(blob, node, "hsync-active", -1);
  856. if (val != -1) {
  857. dt->flags |= val ? DISPLAY_FLAGS_HSYNC_HIGH :
  858. DISPLAY_FLAGS_HSYNC_LOW;
  859. }
  860. val = fdtdec_get_int(blob, node, "de-active", -1);
  861. if (val != -1) {
  862. dt->flags |= val ? DISPLAY_FLAGS_DE_HIGH :
  863. DISPLAY_FLAGS_DE_LOW;
  864. }
  865. val = fdtdec_get_int(blob, node, "pixelclk-active", -1);
  866. if (val != -1) {
  867. dt->flags |= val ? DISPLAY_FLAGS_PIXDATA_POSEDGE :
  868. DISPLAY_FLAGS_PIXDATA_NEGEDGE;
  869. }
  870. if (fdtdec_get_bool(blob, node, "interlaced"))
  871. dt->flags |= DISPLAY_FLAGS_INTERLACED;
  872. if (fdtdec_get_bool(blob, node, "doublescan"))
  873. dt->flags |= DISPLAY_FLAGS_DOUBLESCAN;
  874. if (fdtdec_get_bool(blob, node, "doubleclk"))
  875. dt->flags |= DISPLAY_FLAGS_DOUBLECLK;
  876. return ret;
  877. }
  878. int fdtdec_setup_mem_size_base(void)
  879. {
  880. int ret;
  881. ofnode mem;
  882. struct resource res;
  883. mem = ofnode_path("/memory");
  884. if (!ofnode_valid(mem)) {
  885. debug("%s: Missing /memory node\n", __func__);
  886. return -EINVAL;
  887. }
  888. ret = ofnode_read_resource(mem, 0, &res);
  889. if (ret != 0) {
  890. debug("%s: Unable to decode first memory bank\n", __func__);
  891. return -EINVAL;
  892. }
  893. gd->ram_size = (phys_size_t)(res.end - res.start + 1);
  894. gd->ram_base = (unsigned long)res.start;
  895. debug("%s: Initial DRAM size %llx\n", __func__,
  896. (unsigned long long)gd->ram_size);
  897. return 0;
  898. }
  899. ofnode get_next_memory_node(ofnode mem)
  900. {
  901. do {
  902. mem = ofnode_by_prop_value(mem, "device_type", "memory", 7);
  903. } while (!ofnode_is_available(mem));
  904. return mem;
  905. }
  906. int fdtdec_setup_memory_banksize(void)
  907. {
  908. int bank, ret, reg = 0;
  909. struct resource res;
  910. ofnode mem = ofnode_null();
  911. mem = get_next_memory_node(mem);
  912. if (!ofnode_valid(mem)) {
  913. debug("%s: Missing /memory node\n", __func__);
  914. return -EINVAL;
  915. }
  916. for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
  917. ret = ofnode_read_resource(mem, reg++, &res);
  918. if (ret < 0) {
  919. reg = 0;
  920. mem = get_next_memory_node(mem);
  921. if (!ofnode_valid(mem))
  922. break;
  923. ret = ofnode_read_resource(mem, reg++, &res);
  924. if (ret < 0)
  925. break;
  926. }
  927. if (ret != 0)
  928. return -EINVAL;
  929. gd->bd->bi_dram[bank].start = (phys_addr_t)res.start;
  930. gd->bd->bi_dram[bank].size =
  931. (phys_size_t)(res.end - res.start + 1);
  932. debug("%s: DRAM Bank #%d: start = 0x%llx, size = 0x%llx\n",
  933. __func__, bank,
  934. (unsigned long long)gd->bd->bi_dram[bank].start,
  935. (unsigned long long)gd->bd->bi_dram[bank].size);
  936. }
  937. return 0;
  938. }
  939. int fdtdec_setup_mem_size_base_lowest(void)
  940. {
  941. int bank, ret, reg = 0;
  942. struct resource res;
  943. unsigned long base;
  944. phys_size_t size;
  945. ofnode mem = ofnode_null();
  946. gd->ram_base = (unsigned long)~0;
  947. mem = get_next_memory_node(mem);
  948. if (!ofnode_valid(mem)) {
  949. debug("%s: Missing /memory node\n", __func__);
  950. return -EINVAL;
  951. }
  952. for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
  953. ret = ofnode_read_resource(mem, reg++, &res);
  954. if (ret < 0) {
  955. reg = 0;
  956. mem = get_next_memory_node(mem);
  957. if (!ofnode_valid(mem))
  958. break;
  959. ret = ofnode_read_resource(mem, reg++, &res);
  960. if (ret < 0)
  961. break;
  962. }
  963. if (ret != 0)
  964. return -EINVAL;
  965. base = (unsigned long)res.start;
  966. size = (phys_size_t)(res.end - res.start + 1);
  967. if (gd->ram_base > base && size) {
  968. gd->ram_base = base;
  969. gd->ram_size = size;
  970. debug("%s: Initial DRAM base %lx size %lx\n",
  971. __func__, base, (unsigned long)size);
  972. }
  973. }
  974. return 0;
  975. }
  976. #if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
  977. # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_GZIP) ||\
  978. CONFIG_IS_ENABLED(MULTI_DTB_FIT_LZO)
  979. static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
  980. {
  981. size_t sz_out = CONFIG_VAL(MULTI_DTB_FIT_UNCOMPRESS_SZ);
  982. bool gzip = 0, lzo = 0;
  983. ulong sz_in = sz_src;
  984. void *dst;
  985. int rc;
  986. if (CONFIG_IS_ENABLED(GZIP))
  987. if (gzip_parse_header(src, sz_in) >= 0)
  988. gzip = 1;
  989. if (CONFIG_IS_ENABLED(LZO))
  990. if (!gzip && lzop_is_valid_header(src))
  991. lzo = 1;
  992. if (!gzip && !lzo)
  993. return -EBADMSG;
  994. if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC)) {
  995. dst = malloc(sz_out);
  996. if (!dst) {
  997. puts("uncompress_blob: Unable to allocate memory\n");
  998. return -ENOMEM;
  999. }
  1000. } else {
  1001. # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_USER_DEFINED_AREA)
  1002. dst = (void *)CONFIG_VAL(MULTI_DTB_FIT_USER_DEF_ADDR);
  1003. # else
  1004. return -ENOTSUPP;
  1005. # endif
  1006. }
  1007. if (CONFIG_IS_ENABLED(GZIP) && gzip)
  1008. rc = gunzip(dst, sz_out, (u8 *)src, &sz_in);
  1009. else if (CONFIG_IS_ENABLED(LZO) && lzo)
  1010. rc = lzop_decompress(src, sz_in, dst, &sz_out);
  1011. else
  1012. hang();
  1013. if (rc < 0) {
  1014. /* not a valid compressed blob */
  1015. puts("uncompress_blob: Unable to uncompress\n");
  1016. if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC))
  1017. free(dst);
  1018. return -EBADMSG;
  1019. }
  1020. *dstp = dst;
  1021. return 0;
  1022. }
  1023. # else
  1024. static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
  1025. {
  1026. *dstp = (void *)src;
  1027. return 0;
  1028. }
  1029. # endif
  1030. #endif
  1031. #if defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
  1032. /*
  1033. * For CONFIG_OF_SEPARATE, the board may optionally implement this to
  1034. * provide and/or fixup the fdt.
  1035. */
  1036. __weak void *board_fdt_blob_setup(int *err)
  1037. {
  1038. void *fdt_blob = NULL;
  1039. *err = 0;
  1040. #ifdef CONFIG_SPL_BUILD
  1041. /* FDT is at end of BSS unless it is in a different memory region */
  1042. if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS))
  1043. fdt_blob = (ulong *)&_image_binary_end;
  1044. else
  1045. fdt_blob = (ulong *)&__bss_end;
  1046. #else
  1047. /* FDT is at end of image */
  1048. fdt_blob = (ulong *)&_end;
  1049. #endif
  1050. return fdt_blob;
  1051. }
  1052. #endif
  1053. int fdtdec_set_ethernet_mac_address(void *fdt, const u8 *mac, size_t size)
  1054. {
  1055. const char *path;
  1056. int offset, err;
  1057. if (!is_valid_ethaddr(mac))
  1058. return -EINVAL;
  1059. path = fdt_get_alias(fdt, "ethernet");
  1060. if (!path)
  1061. return 0;
  1062. debug("ethernet alias found: %s\n", path);
  1063. offset = fdt_path_offset(fdt, path);
  1064. if (offset < 0) {
  1065. debug("ethernet alias points to absent node %s\n", path);
  1066. return -ENOENT;
  1067. }
  1068. err = fdt_setprop_inplace(fdt, offset, "local-mac-address", mac, size);
  1069. if (err < 0)
  1070. return err;
  1071. debug("MAC address: %pM\n", mac);
  1072. return 0;
  1073. }
  1074. static int fdtdec_init_reserved_memory(void *blob)
  1075. {
  1076. int na, ns, node, err;
  1077. fdt32_t value;
  1078. /* inherit #address-cells and #size-cells from the root node */
  1079. na = fdt_address_cells(blob, 0);
  1080. ns = fdt_size_cells(blob, 0);
  1081. node = fdt_add_subnode(blob, 0, "reserved-memory");
  1082. if (node < 0)
  1083. return node;
  1084. err = fdt_setprop(blob, node, "ranges", NULL, 0);
  1085. if (err < 0)
  1086. return err;
  1087. value = cpu_to_fdt32(ns);
  1088. err = fdt_setprop(blob, node, "#size-cells", &value, sizeof(value));
  1089. if (err < 0)
  1090. return err;
  1091. value = cpu_to_fdt32(na);
  1092. err = fdt_setprop(blob, node, "#address-cells", &value, sizeof(value));
  1093. if (err < 0)
  1094. return err;
  1095. return node;
  1096. }
  1097. int fdtdec_add_reserved_memory(void *blob, const char *basename,
  1098. const struct fdt_memory *carveout,
  1099. const char **compatibles, unsigned int count,
  1100. uint32_t *phandlep, unsigned long flags)
  1101. {
  1102. fdt32_t cells[4] = {}, *ptr = cells;
  1103. uint32_t upper, lower, phandle;
  1104. int parent, node, na, ns, err;
  1105. fdt_size_t size;
  1106. char name[64];
  1107. /* create an empty /reserved-memory node if one doesn't exist */
  1108. parent = fdt_path_offset(blob, "/reserved-memory");
  1109. if (parent < 0) {
  1110. parent = fdtdec_init_reserved_memory(blob);
  1111. if (parent < 0)
  1112. return parent;
  1113. }
  1114. /* only 1 or 2 #address-cells and #size-cells are supported */
  1115. na = fdt_address_cells(blob, parent);
  1116. if (na < 1 || na > 2)
  1117. return -FDT_ERR_BADNCELLS;
  1118. ns = fdt_size_cells(blob, parent);
  1119. if (ns < 1 || ns > 2)
  1120. return -FDT_ERR_BADNCELLS;
  1121. /* find a matching node and return the phandle to that */
  1122. fdt_for_each_subnode(node, blob, parent) {
  1123. const char *name = fdt_get_name(blob, node, NULL);
  1124. fdt_addr_t addr;
  1125. fdt_size_t size;
  1126. addr = fdtdec_get_addr_size_fixed(blob, node, "reg", 0, na, ns,
  1127. &size, false);
  1128. if (addr == FDT_ADDR_T_NONE) {
  1129. debug("failed to read address/size for %s\n", name);
  1130. continue;
  1131. }
  1132. if (addr == carveout->start && (addr + size - 1) ==
  1133. carveout->end) {
  1134. if (phandlep)
  1135. *phandlep = fdt_get_phandle(blob, node);
  1136. return 0;
  1137. }
  1138. }
  1139. /*
  1140. * Unpack the start address and generate the name of the new node
  1141. * base on the basename and the unit-address.
  1142. */
  1143. upper = upper_32_bits(carveout->start);
  1144. lower = lower_32_bits(carveout->start);
  1145. if (na > 1 && upper > 0)
  1146. snprintf(name, sizeof(name), "%s@%x,%x", basename, upper,
  1147. lower);
  1148. else {
  1149. if (upper > 0) {
  1150. debug("address %08x:%08x exceeds addressable space\n",
  1151. upper, lower);
  1152. return -FDT_ERR_BADVALUE;
  1153. }
  1154. snprintf(name, sizeof(name), "%s@%x", basename, lower);
  1155. }
  1156. node = fdt_add_subnode(blob, parent, name);
  1157. if (node < 0)
  1158. return node;
  1159. if (flags & FDTDEC_RESERVED_MEMORY_NO_MAP) {
  1160. err = fdt_setprop(blob, node, "no-map", NULL, 0);
  1161. if (err < 0)
  1162. return err;
  1163. }
  1164. if (phandlep) {
  1165. err = fdt_generate_phandle(blob, &phandle);
  1166. if (err < 0)
  1167. return err;
  1168. err = fdtdec_set_phandle(blob, node, phandle);
  1169. if (err < 0)
  1170. return err;
  1171. }
  1172. /* store one or two address cells */
  1173. if (na > 1)
  1174. *ptr++ = cpu_to_fdt32(upper);
  1175. *ptr++ = cpu_to_fdt32(lower);
  1176. /* store one or two size cells */
  1177. size = carveout->end - carveout->start + 1;
  1178. upper = upper_32_bits(size);
  1179. lower = lower_32_bits(size);
  1180. if (ns > 1)
  1181. *ptr++ = cpu_to_fdt32(upper);
  1182. *ptr++ = cpu_to_fdt32(lower);
  1183. err = fdt_setprop(blob, node, "reg", cells, (na + ns) * sizeof(*cells));
  1184. if (err < 0)
  1185. return err;
  1186. if (compatibles && count > 0) {
  1187. size_t length = 0, len = 0;
  1188. unsigned int i;
  1189. char *buffer;
  1190. for (i = 0; i < count; i++)
  1191. length += strlen(compatibles[i]) + 1;
  1192. buffer = malloc(length);
  1193. if (!buffer)
  1194. return -FDT_ERR_INTERNAL;
  1195. for (i = 0; i < count; i++)
  1196. len += strlcpy(buffer + len, compatibles[i],
  1197. length - len) + 1;
  1198. err = fdt_setprop(blob, node, "compatible", buffer, length);
  1199. free(buffer);
  1200. if (err < 0)
  1201. return err;
  1202. }
  1203. /* return the phandle for the new node for the caller to use */
  1204. if (phandlep)
  1205. *phandlep = phandle;
  1206. return 0;
  1207. }
  1208. int fdtdec_get_carveout(const void *blob, const char *node,
  1209. const char *prop_name, unsigned int index,
  1210. struct fdt_memory *carveout, const char **name,
  1211. const char ***compatiblesp, unsigned int *countp,
  1212. unsigned long *flags)
  1213. {
  1214. const fdt32_t *prop;
  1215. uint32_t phandle;
  1216. int offset, len;
  1217. fdt_size_t size;
  1218. offset = fdt_path_offset(blob, node);
  1219. if (offset < 0)
  1220. return offset;
  1221. prop = fdt_getprop(blob, offset, prop_name, &len);
  1222. if (!prop) {
  1223. debug("failed to get %s for %s\n", prop_name, node);
  1224. return -FDT_ERR_NOTFOUND;
  1225. }
  1226. if ((len % sizeof(phandle)) != 0) {
  1227. debug("invalid phandle property\n");
  1228. return -FDT_ERR_BADPHANDLE;
  1229. }
  1230. if (len < (sizeof(phandle) * (index + 1))) {
  1231. debug("invalid phandle index\n");
  1232. return -FDT_ERR_NOTFOUND;
  1233. }
  1234. phandle = fdt32_to_cpu(prop[index]);
  1235. offset = fdt_node_offset_by_phandle(blob, phandle);
  1236. if (offset < 0) {
  1237. debug("failed to find node for phandle %u\n", phandle);
  1238. return offset;
  1239. }
  1240. if (name)
  1241. *name = fdt_get_name(blob, offset, NULL);
  1242. if (compatiblesp) {
  1243. const char **compatibles = NULL;
  1244. const char *start, *end, *ptr;
  1245. unsigned int count = 0;
  1246. prop = fdt_getprop(blob, offset, "compatible", &len);
  1247. if (!prop)
  1248. goto skip_compat;
  1249. start = ptr = (const char *)prop;
  1250. end = start + len;
  1251. while (ptr < end) {
  1252. ptr = strchrnul(ptr, '\0');
  1253. count++;
  1254. ptr++;
  1255. }
  1256. compatibles = malloc(sizeof(ptr) * count);
  1257. if (!compatibles)
  1258. return -FDT_ERR_INTERNAL;
  1259. ptr = start;
  1260. count = 0;
  1261. while (ptr < end) {
  1262. compatibles[count] = ptr;
  1263. ptr = strchrnul(ptr, '\0');
  1264. count++;
  1265. ptr++;
  1266. }
  1267. skip_compat:
  1268. *compatiblesp = compatibles;
  1269. if (countp)
  1270. *countp = count;
  1271. }
  1272. carveout->start = fdtdec_get_addr_size_auto_noparent(blob, offset,
  1273. "reg", 0, &size,
  1274. true);
  1275. if (carveout->start == FDT_ADDR_T_NONE) {
  1276. debug("failed to read address/size from \"reg\" property\n");
  1277. return -FDT_ERR_NOTFOUND;
  1278. }
  1279. carveout->end = carveout->start + size - 1;
  1280. if (flags) {
  1281. *flags = 0;
  1282. if (fdtdec_get_bool(blob, offset, "no-map"))
  1283. *flags |= FDTDEC_RESERVED_MEMORY_NO_MAP;
  1284. }
  1285. return 0;
  1286. }
  1287. int fdtdec_set_carveout(void *blob, const char *node, const char *prop_name,
  1288. unsigned int index, const struct fdt_memory *carveout,
  1289. const char *name, const char **compatibles,
  1290. unsigned int count, unsigned long flags)
  1291. {
  1292. uint32_t phandle;
  1293. int err, offset, len;
  1294. fdt32_t value;
  1295. void *prop;
  1296. err = fdtdec_add_reserved_memory(blob, name, carveout, compatibles,
  1297. count, &phandle, flags);
  1298. if (err < 0) {
  1299. debug("failed to add reserved memory: %d\n", err);
  1300. return err;
  1301. }
  1302. offset = fdt_path_offset(blob, node);
  1303. if (offset < 0) {
  1304. debug("failed to find offset for node %s: %d\n", node, offset);
  1305. return offset;
  1306. }
  1307. value = cpu_to_fdt32(phandle);
  1308. if (!fdt_getprop(blob, offset, prop_name, &len)) {
  1309. if (len == -FDT_ERR_NOTFOUND)
  1310. len = 0;
  1311. else
  1312. return len;
  1313. }
  1314. if ((index + 1) * sizeof(value) > len) {
  1315. err = fdt_setprop_placeholder(blob, offset, prop_name,
  1316. (index + 1) * sizeof(value),
  1317. &prop);
  1318. if (err < 0) {
  1319. debug("failed to resize reserved memory property: %s\n",
  1320. fdt_strerror(err));
  1321. return err;
  1322. }
  1323. }
  1324. err = fdt_setprop_inplace_namelen_partial(blob, offset, prop_name,
  1325. strlen(prop_name),
  1326. index * sizeof(value),
  1327. &value, sizeof(value));
  1328. if (err < 0) {
  1329. debug("failed to update %s property for node %s: %s\n",
  1330. prop_name, node, fdt_strerror(err));
  1331. return err;
  1332. }
  1333. return 0;
  1334. }
  1335. __weak int fdtdec_board_setup(const void *fdt_blob)
  1336. {
  1337. return 0;
  1338. }
  1339. int fdtdec_setup(void)
  1340. {
  1341. int ret;
  1342. #if CONFIG_IS_ENABLED(OF_CONTROL)
  1343. # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
  1344. void *fdt_blob;
  1345. # endif
  1346. # ifdef CONFIG_OF_EMBED
  1347. /* Get a pointer to the FDT */
  1348. # ifdef CONFIG_SPL_BUILD
  1349. gd->fdt_blob = __dtb_dt_spl_begin;
  1350. # else
  1351. gd->fdt_blob = __dtb_dt_begin;
  1352. # endif
  1353. # elif defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
  1354. /* Allow the board to override the fdt address. */
  1355. gd->fdt_blob = board_fdt_blob_setup(&ret);
  1356. if (ret)
  1357. return ret;
  1358. # endif
  1359. # ifndef CONFIG_SPL_BUILD
  1360. /* Allow the early environment to override the fdt address */
  1361. gd->fdt_blob = map_sysmem
  1362. (env_get_ulong("fdtcontroladdr", 16,
  1363. (unsigned long)map_to_sysmem(gd->fdt_blob)), 0);
  1364. # endif
  1365. # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
  1366. /*
  1367. * Try and uncompress the blob.
  1368. * Unfortunately there is no way to know how big the input blob really
  1369. * is. So let us set the maximum input size arbitrarily high. 16MB
  1370. * ought to be more than enough for packed DTBs.
  1371. */
  1372. if (uncompress_blob(gd->fdt_blob, 0x1000000, &fdt_blob) == 0)
  1373. gd->fdt_blob = fdt_blob;
  1374. /*
  1375. * Check if blob is a FIT images containings DTBs.
  1376. * If so, pick the most relevant
  1377. */
  1378. fdt_blob = locate_dtb_in_fit(gd->fdt_blob);
  1379. if (fdt_blob) {
  1380. gd->multi_dtb_fit = gd->fdt_blob;
  1381. gd->fdt_blob = fdt_blob;
  1382. }
  1383. # endif
  1384. #endif
  1385. ret = fdtdec_prepare_fdt();
  1386. if (!ret)
  1387. ret = fdtdec_board_setup(gd->fdt_blob);
  1388. return ret;
  1389. }
  1390. #if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
  1391. int fdtdec_resetup(int *rescan)
  1392. {
  1393. void *fdt_blob;
  1394. /*
  1395. * If the current DTB is part of a compressed FIT image,
  1396. * try to locate the best match from the uncompressed
  1397. * FIT image stillpresent there. Save the time and space
  1398. * required to uncompress it again.
  1399. */
  1400. if (gd->multi_dtb_fit) {
  1401. fdt_blob = locate_dtb_in_fit(gd->multi_dtb_fit);
  1402. if (fdt_blob == gd->fdt_blob) {
  1403. /*
  1404. * The best match did not change. no need to tear down
  1405. * the DM and rescan the fdt.
  1406. */
  1407. *rescan = 0;
  1408. return 0;
  1409. }
  1410. *rescan = 1;
  1411. gd->fdt_blob = fdt_blob;
  1412. return fdtdec_prepare_fdt();
  1413. }
  1414. /*
  1415. * If multi_dtb_fit is NULL, it means that blob appended to u-boot is
  1416. * not a FIT image containings DTB, but a single DTB. There is no need
  1417. * to teard down DM and rescan the DT in this case.
  1418. */
  1419. *rescan = 0;
  1420. return 0;
  1421. }
  1422. #endif
  1423. int fdtdec_decode_ram_size(const void *blob, const char *area, int board_id,
  1424. phys_addr_t *basep, phys_size_t *sizep,
  1425. struct bd_info *bd)
  1426. {
  1427. int addr_cells, size_cells;
  1428. const u32 *cell, *end;
  1429. u64 total_size, size, addr;
  1430. int node, child;
  1431. bool auto_size;
  1432. int bank;
  1433. int len;
  1434. debug("%s: board_id=%d\n", __func__, board_id);
  1435. if (!area)
  1436. area = "/memory";
  1437. node = fdt_path_offset(blob, area);
  1438. if (node < 0) {
  1439. debug("No %s node found\n", area);
  1440. return -ENOENT;
  1441. }
  1442. cell = fdt_getprop(blob, node, "reg", &len);
  1443. if (!cell) {
  1444. debug("No reg property found\n");
  1445. return -ENOENT;
  1446. }
  1447. addr_cells = fdt_address_cells(blob, node);
  1448. size_cells = fdt_size_cells(blob, node);
  1449. /* Check the board id and mask */
  1450. for (child = fdt_first_subnode(blob, node);
  1451. child >= 0;
  1452. child = fdt_next_subnode(blob, child)) {
  1453. int match_mask, match_value;
  1454. match_mask = fdtdec_get_int(blob, child, "match-mask", -1);
  1455. match_value = fdtdec_get_int(blob, child, "match-value", -1);
  1456. if (match_value >= 0 &&
  1457. ((board_id & match_mask) == match_value)) {
  1458. /* Found matching mask */
  1459. debug("Found matching mask %d\n", match_mask);
  1460. node = child;
  1461. cell = fdt_getprop(blob, node, "reg", &len);
  1462. if (!cell) {
  1463. debug("No memory-banks property found\n");
  1464. return -EINVAL;
  1465. }
  1466. break;
  1467. }
  1468. }
  1469. /* Note: if no matching subnode was found we use the parent node */
  1470. if (bd) {
  1471. memset(bd->bi_dram, '\0', sizeof(bd->bi_dram[0]) *
  1472. CONFIG_NR_DRAM_BANKS);
  1473. }
  1474. auto_size = fdtdec_get_bool(blob, node, "auto-size");
  1475. total_size = 0;
  1476. end = cell + len / 4 - addr_cells - size_cells;
  1477. debug("cell at %p, end %p\n", cell, end);
  1478. for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
  1479. if (cell > end)
  1480. break;
  1481. addr = 0;
  1482. if (addr_cells == 2)
  1483. addr += (u64)fdt32_to_cpu(*cell++) << 32UL;
  1484. addr += fdt32_to_cpu(*cell++);
  1485. if (bd)
  1486. bd->bi_dram[bank].start = addr;
  1487. if (basep && !bank)
  1488. *basep = (phys_addr_t)addr;
  1489. size = 0;
  1490. if (size_cells == 2)
  1491. size += (u64)fdt32_to_cpu(*cell++) << 32UL;
  1492. size += fdt32_to_cpu(*cell++);
  1493. if (auto_size) {
  1494. u64 new_size;
  1495. debug("Auto-sizing %llx, size %llx: ", addr, size);
  1496. new_size = get_ram_size((long *)(uintptr_t)addr, size);
  1497. if (new_size == size) {
  1498. debug("OK\n");
  1499. } else {
  1500. debug("sized to %llx\n", new_size);
  1501. size = new_size;
  1502. }
  1503. }
  1504. if (bd)
  1505. bd->bi_dram[bank].size = size;
  1506. total_size += size;
  1507. }
  1508. debug("Memory size %llu\n", total_size);
  1509. if (sizep)
  1510. *sizep = (phys_size_t)total_size;
  1511. return 0;
  1512. }
  1513. #endif /* !USE_HOSTCC */