call32.S 1.1 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * (C) Copyright 2015 Google, Inc
  4. * Written by Simon Glass <sjg@chromium.org>
  5. */
  6. #include <asm/msr-index.h>
  7. #include <asm/processor-flags.h>
  8. /*
  9. * rdi - 32-bit code segment selector
  10. * rsi - target address
  11. * rdx - table address (0 if none)
  12. */
  13. .code64
  14. .globl cpu_call32
  15. cpu_call32:
  16. cli
  17. /* Save table pointer */
  18. mov %edx, %ebx
  19. /*
  20. * Debugging option, this outputs characters to the console UART
  21. * mov $0x3f8,%edx
  22. * mov $'a',%al
  23. * out %al,(%dx)
  24. */
  25. pushf
  26. push %rdi /* 32-bit code segment */
  27. lea compat(%rip), %rax
  28. push %rax
  29. retfq
  30. .code32
  31. compat:
  32. /*
  33. * We are now in compatibility mode with a default operand size of
  34. * 32 bits. First disable paging.
  35. */
  36. movl %cr0, %eax
  37. andl $~X86_CR0_PG, %eax
  38. movl %eax, %cr0
  39. /* Invalidate TLB */
  40. xorl %eax, %eax
  41. movl %eax, %cr3
  42. /* Disable Long mode in EFER (Extended Feature Enable Register) */
  43. movl $MSR_EFER, %ecx
  44. rdmsr
  45. btr $_EFER_LME, %eax
  46. wrmsr
  47. /* Set up table pointer for _x86boot_start */
  48. mov %ebx, %ecx
  49. /* Jump to the required target */
  50. pushl %edi /* 32-bit code segment */
  51. pushl %esi /* 32-bit target address */
  52. retfl