k210-sysctl.h 1.4 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859
  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright (C) 2019-20 Sean Anderson <seanga2@gmail.com>
  4. */
  5. #ifndef CLOCK_K210_SYSCTL_H
  6. #define CLOCK_K210_SYSCTL_H
  7. /*
  8. * Arbitrary identifiers for clocks.
  9. */
  10. #define K210_CLK_NONE 0
  11. #define K210_CLK_IN0_H 1
  12. #define K210_CLK_PLL0_H 2
  13. #define K210_CLK_PLL0 3
  14. #define K210_CLK_PLL1 4
  15. #define K210_CLK_PLL2 5
  16. #define K210_CLK_PLL2_H 6
  17. #define K210_CLK_CPU 7
  18. #define K210_CLK_SRAM0 8
  19. #define K210_CLK_SRAM1 9
  20. #define K210_CLK_APB0 10
  21. #define K210_CLK_APB1 11
  22. #define K210_CLK_APB2 12
  23. #define K210_CLK_ROM 13
  24. #define K210_CLK_DMA 14
  25. #define K210_CLK_AI 15
  26. #define K210_CLK_DVP 16
  27. #define K210_CLK_FFT 17
  28. #define K210_CLK_GPIO 18
  29. #define K210_CLK_SPI0 19
  30. #define K210_CLK_SPI1 20
  31. #define K210_CLK_SPI2 21
  32. #define K210_CLK_SPI3 22
  33. #define K210_CLK_I2S0 23
  34. #define K210_CLK_I2S1 24
  35. #define K210_CLK_I2S2 25
  36. #define K210_CLK_I2S0_M 26
  37. #define K210_CLK_I2S1_M 27
  38. #define K210_CLK_I2S2_M 28
  39. #define K210_CLK_I2C0 29
  40. #define K210_CLK_I2C1 30
  41. #define K210_CLK_I2C2 31
  42. #define K210_CLK_UART1 32
  43. #define K210_CLK_UART2 33
  44. #define K210_CLK_UART3 34
  45. #define K210_CLK_AES 35
  46. #define K210_CLK_FPIOA 36
  47. #define K210_CLK_TIMER0 37
  48. #define K210_CLK_TIMER1 38
  49. #define K210_CLK_TIMER2 39
  50. #define K210_CLK_WDT0 40
  51. #define K210_CLK_WDT1 41
  52. #define K210_CLK_SHA 42
  53. #define K210_CLK_OTP 43
  54. #define K210_CLK_RTC 44
  55. #define K210_CLK_ACLK 45
  56. #endif /* CLOCK_K210_SYSCTL_H */