fdtdec.c 34 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (c) 2011 The Chromium OS Authors.
  4. */
  5. #ifndef USE_HOSTCC
  6. #include <common.h>
  7. #include <boot_fit.h>
  8. #include <dm.h>
  9. #include <dm/of_extra.h>
  10. #include <errno.h>
  11. #include <fdtdec.h>
  12. #include <fdt_support.h>
  13. #include <linux/libfdt.h>
  14. #include <serial.h>
  15. #include <asm/sections.h>
  16. #include <linux/ctype.h>
  17. #include <linux/lzo.h>
  18. DECLARE_GLOBAL_DATA_PTR;
  19. /*
  20. * Here are the type we know about. One day we might allow drivers to
  21. * register. For now we just put them here. The COMPAT macro allows us to
  22. * turn this into a sparse list later, and keeps the ID with the name.
  23. *
  24. * NOTE: This list is basically a TODO list for things that need to be
  25. * converted to driver model. So don't add new things here unless there is a
  26. * good reason why driver-model conversion is infeasible. Examples include
  27. * things which are used before driver model is available.
  28. */
  29. #define COMPAT(id, name) name
  30. static const char * const compat_names[COMPAT_COUNT] = {
  31. COMPAT(UNKNOWN, "<none>"),
  32. COMPAT(NVIDIA_TEGRA20_EMC, "nvidia,tegra20-emc"),
  33. COMPAT(NVIDIA_TEGRA20_EMC_TABLE, "nvidia,tegra20-emc-table"),
  34. COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"),
  35. COMPAT(NVIDIA_TEGRA124_XUSB_PADCTL, "nvidia,tegra124-xusb-padctl"),
  36. COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL, "nvidia,tegra210-xusb-padctl"),
  37. COMPAT(SMSC_LAN9215, "smsc,lan9215"),
  38. COMPAT(SAMSUNG_EXYNOS5_SROMC, "samsung,exynos-sromc"),
  39. COMPAT(SAMSUNG_S3C2440_I2C, "samsung,s3c2440-i2c"),
  40. COMPAT(SAMSUNG_EXYNOS5_SOUND, "samsung,exynos-sound"),
  41. COMPAT(WOLFSON_WM8994_CODEC, "wolfson,wm8994-codec"),
  42. COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"),
  43. COMPAT(SAMSUNG_EXYNOS5_USB3_PHY, "samsung,exynos5250-usb3-phy"),
  44. COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"),
  45. COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"),
  46. COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"),
  47. COMPAT(SAMSUNG_EXYNOS_MMC, "samsung,exynos-mmc"),
  48. COMPAT(GENERIC_SPI_FLASH, "spi-flash"),
  49. COMPAT(MAXIM_98095_CODEC, "maxim,max98095-codec"),
  50. COMPAT(SAMSUNG_EXYNOS5_I2C, "samsung,exynos5-hsi2c"),
  51. COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"),
  52. COMPAT(INTEL_MICROCODE, "intel,microcode"),
  53. COMPAT(AMS_AS3722, "ams,as3722"),
  54. COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"),
  55. COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"),
  56. COMPAT(ALTERA_SOCFPGA_DWMMC, "altr,socfpga-dw-mshc"),
  57. COMPAT(ALTERA_SOCFPGA_DWC2USB, "snps,dwc2"),
  58. COMPAT(INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"),
  59. COMPAT(INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"),
  60. COMPAT(INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"),
  61. COMPAT(COMPAT_SUNXI_NAND, "allwinner,sun4i-a10-nand"),
  62. COMPAT(ALTERA_SOCFPGA_CLK, "altr,clk-mgr"),
  63. COMPAT(ALTERA_SOCFPGA_PINCTRL_SINGLE, "pinctrl-single"),
  64. COMPAT(ALTERA_SOCFPGA_H2F_BRG, "altr,socfpga-hps2fpga-bridge"),
  65. COMPAT(ALTERA_SOCFPGA_LWH2F_BRG, "altr,socfpga-lwhps2fpga-bridge"),
  66. COMPAT(ALTERA_SOCFPGA_F2H_BRG, "altr,socfpga-fpga2hps-bridge"),
  67. COMPAT(ALTERA_SOCFPGA_F2SDR0, "altr,socfpga-fpga2sdram0-bridge"),
  68. COMPAT(ALTERA_SOCFPGA_F2SDR1, "altr,socfpga-fpga2sdram1-bridge"),
  69. COMPAT(ALTERA_SOCFPGA_F2SDR2, "altr,socfpga-fpga2sdram2-bridge"),
  70. COMPAT(ALTERA_SOCFPGA_FPGA0, "altr,socfpga-a10-fpga-mgr"),
  71. COMPAT(ALTERA_SOCFPGA_NOC, "altr,socfpga-a10-noc"),
  72. };
  73. const char *fdtdec_get_compatible(enum fdt_compat_id id)
  74. {
  75. /* We allow reading of the 'unknown' ID for testing purposes */
  76. assert(id >= 0 && id < COMPAT_COUNT);
  77. return compat_names[id];
  78. }
  79. fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int node,
  80. const char *prop_name, int index, int na,
  81. int ns, fdt_size_t *sizep,
  82. bool translate)
  83. {
  84. const fdt32_t *prop, *prop_end;
  85. const fdt32_t *prop_addr, *prop_size, *prop_after_size;
  86. int len;
  87. fdt_addr_t addr;
  88. debug("%s: %s: ", __func__, prop_name);
  89. if (na > (sizeof(fdt_addr_t) / sizeof(fdt32_t))) {
  90. debug("(na too large for fdt_addr_t type)\n");
  91. return FDT_ADDR_T_NONE;
  92. }
  93. if (ns > (sizeof(fdt_size_t) / sizeof(fdt32_t))) {
  94. debug("(ns too large for fdt_size_t type)\n");
  95. return FDT_ADDR_T_NONE;
  96. }
  97. prop = fdt_getprop(blob, node, prop_name, &len);
  98. if (!prop) {
  99. debug("(not found)\n");
  100. return FDT_ADDR_T_NONE;
  101. }
  102. prop_end = prop + (len / sizeof(*prop));
  103. prop_addr = prop + (index * (na + ns));
  104. prop_size = prop_addr + na;
  105. prop_after_size = prop_size + ns;
  106. if (prop_after_size > prop_end) {
  107. debug("(not enough data: expected >= %d cells, got %d cells)\n",
  108. (u32)(prop_after_size - prop), ((u32)(prop_end - prop)));
  109. return FDT_ADDR_T_NONE;
  110. }
  111. #if CONFIG_IS_ENABLED(OF_TRANSLATE)
  112. if (translate)
  113. addr = fdt_translate_address(blob, node, prop_addr);
  114. else
  115. #endif
  116. addr = fdtdec_get_number(prop_addr, na);
  117. if (sizep) {
  118. *sizep = fdtdec_get_number(prop_size, ns);
  119. debug("addr=%08llx, size=%llx\n", (unsigned long long)addr,
  120. (unsigned long long)*sizep);
  121. } else {
  122. debug("addr=%08llx\n", (unsigned long long)addr);
  123. }
  124. return addr;
  125. }
  126. fdt_addr_t fdtdec_get_addr_size_auto_parent(const void *blob, int parent,
  127. int node, const char *prop_name,
  128. int index, fdt_size_t *sizep,
  129. bool translate)
  130. {
  131. int na, ns;
  132. debug("%s: ", __func__);
  133. na = fdt_address_cells(blob, parent);
  134. if (na < 1) {
  135. debug("(bad #address-cells)\n");
  136. return FDT_ADDR_T_NONE;
  137. }
  138. ns = fdt_size_cells(blob, parent);
  139. if (ns < 0) {
  140. debug("(bad #size-cells)\n");
  141. return FDT_ADDR_T_NONE;
  142. }
  143. debug("na=%d, ns=%d, ", na, ns);
  144. return fdtdec_get_addr_size_fixed(blob, node, prop_name, index, na,
  145. ns, sizep, translate);
  146. }
  147. fdt_addr_t fdtdec_get_addr_size_auto_noparent(const void *blob, int node,
  148. const char *prop_name, int index,
  149. fdt_size_t *sizep,
  150. bool translate)
  151. {
  152. int parent;
  153. debug("%s: ", __func__);
  154. parent = fdt_parent_offset(blob, node);
  155. if (parent < 0) {
  156. debug("(no parent found)\n");
  157. return FDT_ADDR_T_NONE;
  158. }
  159. return fdtdec_get_addr_size_auto_parent(blob, parent, node, prop_name,
  160. index, sizep, translate);
  161. }
  162. fdt_addr_t fdtdec_get_addr_size(const void *blob, int node,
  163. const char *prop_name, fdt_size_t *sizep)
  164. {
  165. int ns = sizep ? (sizeof(fdt_size_t) / sizeof(fdt32_t)) : 0;
  166. return fdtdec_get_addr_size_fixed(blob, node, prop_name, 0,
  167. sizeof(fdt_addr_t) / sizeof(fdt32_t),
  168. ns, sizep, false);
  169. }
  170. fdt_addr_t fdtdec_get_addr(const void *blob, int node, const char *prop_name)
  171. {
  172. return fdtdec_get_addr_size(blob, node, prop_name, NULL);
  173. }
  174. #if defined(CONFIG_PCI) && defined(CONFIG_DM_PCI)
  175. int fdtdec_get_pci_addr(const void *blob, int node, enum fdt_pci_space type,
  176. const char *prop_name, struct fdt_pci_addr *addr)
  177. {
  178. const u32 *cell;
  179. int len;
  180. int ret = -ENOENT;
  181. debug("%s: %s: ", __func__, prop_name);
  182. /*
  183. * If we follow the pci bus bindings strictly, we should check
  184. * the value of the node's parent node's #address-cells and
  185. * #size-cells. They need to be 3 and 2 accordingly. However,
  186. * for simplicity we skip the check here.
  187. */
  188. cell = fdt_getprop(blob, node, prop_name, &len);
  189. if (!cell)
  190. goto fail;
  191. if ((len % FDT_PCI_REG_SIZE) == 0) {
  192. int num = len / FDT_PCI_REG_SIZE;
  193. int i;
  194. for (i = 0; i < num; i++) {
  195. debug("pci address #%d: %08lx %08lx %08lx\n", i,
  196. (ulong)fdt32_to_cpu(cell[0]),
  197. (ulong)fdt32_to_cpu(cell[1]),
  198. (ulong)fdt32_to_cpu(cell[2]));
  199. if ((fdt32_to_cpu(*cell) & type) == type) {
  200. addr->phys_hi = fdt32_to_cpu(cell[0]);
  201. addr->phys_mid = fdt32_to_cpu(cell[1]);
  202. addr->phys_lo = fdt32_to_cpu(cell[1]);
  203. break;
  204. }
  205. cell += (FDT_PCI_ADDR_CELLS +
  206. FDT_PCI_SIZE_CELLS);
  207. }
  208. if (i == num) {
  209. ret = -ENXIO;
  210. goto fail;
  211. }
  212. return 0;
  213. }
  214. ret = -EINVAL;
  215. fail:
  216. debug("(not found)\n");
  217. return ret;
  218. }
  219. int fdtdec_get_pci_vendev(const void *blob, int node, u16 *vendor, u16 *device)
  220. {
  221. const char *list, *end;
  222. int len;
  223. list = fdt_getprop(blob, node, "compatible", &len);
  224. if (!list)
  225. return -ENOENT;
  226. end = list + len;
  227. while (list < end) {
  228. len = strlen(list);
  229. if (len >= strlen("pciVVVV,DDDD")) {
  230. char *s = strstr(list, "pci");
  231. /*
  232. * check if the string is something like pciVVVV,DDDD.RR
  233. * or just pciVVVV,DDDD
  234. */
  235. if (s && s[7] == ',' &&
  236. (s[12] == '.' || s[12] == 0)) {
  237. s += 3;
  238. *vendor = simple_strtol(s, NULL, 16);
  239. s += 5;
  240. *device = simple_strtol(s, NULL, 16);
  241. return 0;
  242. }
  243. }
  244. list += (len + 1);
  245. }
  246. return -ENOENT;
  247. }
  248. int fdtdec_get_pci_bar32(struct udevice *dev, struct fdt_pci_addr *addr,
  249. u32 *bar)
  250. {
  251. int barnum;
  252. /* extract the bar number from fdt_pci_addr */
  253. barnum = addr->phys_hi & 0xff;
  254. if (barnum < PCI_BASE_ADDRESS_0 || barnum > PCI_CARDBUS_CIS)
  255. return -EINVAL;
  256. barnum = (barnum - PCI_BASE_ADDRESS_0) / 4;
  257. *bar = dm_pci_read_bar32(dev, barnum);
  258. return 0;
  259. }
  260. #endif
  261. uint64_t fdtdec_get_uint64(const void *blob, int node, const char *prop_name,
  262. uint64_t default_val)
  263. {
  264. const uint64_t *cell64;
  265. int length;
  266. cell64 = fdt_getprop(blob, node, prop_name, &length);
  267. if (!cell64 || length < sizeof(*cell64))
  268. return default_val;
  269. return fdt64_to_cpu(*cell64);
  270. }
  271. int fdtdec_get_is_enabled(const void *blob, int node)
  272. {
  273. const char *cell;
  274. /*
  275. * It should say "okay", so only allow that. Some fdts use "ok" but
  276. * this is a bug. Please fix your device tree source file. See here
  277. * for discussion:
  278. *
  279. * http://www.mail-archive.com/u-boot@lists.denx.de/msg71598.html
  280. */
  281. cell = fdt_getprop(blob, node, "status", NULL);
  282. if (cell)
  283. return strcmp(cell, "okay") == 0;
  284. return 1;
  285. }
  286. enum fdt_compat_id fdtdec_lookup(const void *blob, int node)
  287. {
  288. enum fdt_compat_id id;
  289. /* Search our drivers */
  290. for (id = COMPAT_UNKNOWN; id < COMPAT_COUNT; id++)
  291. if (fdt_node_check_compatible(blob, node,
  292. compat_names[id]) == 0)
  293. return id;
  294. return COMPAT_UNKNOWN;
  295. }
  296. int fdtdec_next_compatible(const void *blob, int node, enum fdt_compat_id id)
  297. {
  298. return fdt_node_offset_by_compatible(blob, node, compat_names[id]);
  299. }
  300. int fdtdec_next_compatible_subnode(const void *blob, int node,
  301. enum fdt_compat_id id, int *depthp)
  302. {
  303. do {
  304. node = fdt_next_node(blob, node, depthp);
  305. } while (*depthp > 1);
  306. /* If this is a direct subnode, and compatible, return it */
  307. if (*depthp == 1 && 0 == fdt_node_check_compatible(
  308. blob, node, compat_names[id]))
  309. return node;
  310. return -FDT_ERR_NOTFOUND;
  311. }
  312. int fdtdec_next_alias(const void *blob, const char *name, enum fdt_compat_id id,
  313. int *upto)
  314. {
  315. #define MAX_STR_LEN 20
  316. char str[MAX_STR_LEN + 20];
  317. int node, err;
  318. /* snprintf() is not available */
  319. assert(strlen(name) < MAX_STR_LEN);
  320. sprintf(str, "%.*s%d", MAX_STR_LEN, name, *upto);
  321. node = fdt_path_offset(blob, str);
  322. if (node < 0)
  323. return node;
  324. err = fdt_node_check_compatible(blob, node, compat_names[id]);
  325. if (err < 0)
  326. return err;
  327. if (err)
  328. return -FDT_ERR_NOTFOUND;
  329. (*upto)++;
  330. return node;
  331. }
  332. int fdtdec_find_aliases_for_id(const void *blob, const char *name,
  333. enum fdt_compat_id id, int *node_list,
  334. int maxcount)
  335. {
  336. memset(node_list, '\0', sizeof(*node_list) * maxcount);
  337. return fdtdec_add_aliases_for_id(blob, name, id, node_list, maxcount);
  338. }
  339. /* TODO: Can we tighten this code up a little? */
  340. int fdtdec_add_aliases_for_id(const void *blob, const char *name,
  341. enum fdt_compat_id id, int *node_list,
  342. int maxcount)
  343. {
  344. int name_len = strlen(name);
  345. int nodes[maxcount];
  346. int num_found = 0;
  347. int offset, node;
  348. int alias_node;
  349. int count;
  350. int i, j;
  351. /* find the alias node if present */
  352. alias_node = fdt_path_offset(blob, "/aliases");
  353. /*
  354. * start with nothing, and we can assume that the root node can't
  355. * match
  356. */
  357. memset(nodes, '\0', sizeof(nodes));
  358. /* First find all the compatible nodes */
  359. for (node = count = 0; node >= 0 && count < maxcount;) {
  360. node = fdtdec_next_compatible(blob, node, id);
  361. if (node >= 0)
  362. nodes[count++] = node;
  363. }
  364. if (node >= 0)
  365. debug("%s: warning: maxcount exceeded with alias '%s'\n",
  366. __func__, name);
  367. /* Now find all the aliases */
  368. for (offset = fdt_first_property_offset(blob, alias_node);
  369. offset > 0;
  370. offset = fdt_next_property_offset(blob, offset)) {
  371. const struct fdt_property *prop;
  372. const char *path;
  373. int number;
  374. int found;
  375. node = 0;
  376. prop = fdt_get_property_by_offset(blob, offset, NULL);
  377. path = fdt_string(blob, fdt32_to_cpu(prop->nameoff));
  378. if (prop->len && 0 == strncmp(path, name, name_len))
  379. node = fdt_path_offset(blob, prop->data);
  380. if (node <= 0)
  381. continue;
  382. /* Get the alias number */
  383. number = simple_strtoul(path + name_len, NULL, 10);
  384. if (number < 0 || number >= maxcount) {
  385. debug("%s: warning: alias '%s' is out of range\n",
  386. __func__, path);
  387. continue;
  388. }
  389. /* Make sure the node we found is actually in our list! */
  390. found = -1;
  391. for (j = 0; j < count; j++)
  392. if (nodes[j] == node) {
  393. found = j;
  394. break;
  395. }
  396. if (found == -1) {
  397. debug("%s: warning: alias '%s' points to a node "
  398. "'%s' that is missing or is not compatible "
  399. " with '%s'\n", __func__, path,
  400. fdt_get_name(blob, node, NULL),
  401. compat_names[id]);
  402. continue;
  403. }
  404. /*
  405. * Add this node to our list in the right place, and mark
  406. * it as done.
  407. */
  408. if (fdtdec_get_is_enabled(blob, node)) {
  409. if (node_list[number]) {
  410. debug("%s: warning: alias '%s' requires that "
  411. "a node be placed in the list in a "
  412. "position which is already filled by "
  413. "node '%s'\n", __func__, path,
  414. fdt_get_name(blob, node, NULL));
  415. continue;
  416. }
  417. node_list[number] = node;
  418. if (number >= num_found)
  419. num_found = number + 1;
  420. }
  421. nodes[found] = 0;
  422. }
  423. /* Add any nodes not mentioned by an alias */
  424. for (i = j = 0; i < maxcount; i++) {
  425. if (!node_list[i]) {
  426. for (; j < maxcount; j++)
  427. if (nodes[j] &&
  428. fdtdec_get_is_enabled(blob, nodes[j]))
  429. break;
  430. /* Have we run out of nodes to add? */
  431. if (j == maxcount)
  432. break;
  433. assert(!node_list[i]);
  434. node_list[i] = nodes[j++];
  435. if (i >= num_found)
  436. num_found = i + 1;
  437. }
  438. }
  439. return num_found;
  440. }
  441. int fdtdec_get_alias_seq(const void *blob, const char *base, int offset,
  442. int *seqp)
  443. {
  444. int base_len = strlen(base);
  445. const char *find_name;
  446. int find_namelen;
  447. int prop_offset;
  448. int aliases;
  449. find_name = fdt_get_name(blob, offset, &find_namelen);
  450. debug("Looking for '%s' at %d, name %s\n", base, offset, find_name);
  451. aliases = fdt_path_offset(blob, "/aliases");
  452. for (prop_offset = fdt_first_property_offset(blob, aliases);
  453. prop_offset > 0;
  454. prop_offset = fdt_next_property_offset(blob, prop_offset)) {
  455. const char *prop;
  456. const char *name;
  457. const char *slash;
  458. int len, val;
  459. prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
  460. debug(" - %s, %s\n", name, prop);
  461. if (len < find_namelen || *prop != '/' || prop[len - 1] ||
  462. strncmp(name, base, base_len))
  463. continue;
  464. slash = strrchr(prop, '/');
  465. if (strcmp(slash + 1, find_name))
  466. continue;
  467. val = trailing_strtol(name);
  468. if (val != -1) {
  469. *seqp = val;
  470. debug("Found seq %d\n", *seqp);
  471. return 0;
  472. }
  473. }
  474. debug("Not found\n");
  475. return -ENOENT;
  476. }
  477. const char *fdtdec_get_chosen_prop(const void *blob, const char *name)
  478. {
  479. int chosen_node;
  480. if (!blob)
  481. return NULL;
  482. chosen_node = fdt_path_offset(blob, "/chosen");
  483. return fdt_getprop(blob, chosen_node, name, NULL);
  484. }
  485. int fdtdec_get_chosen_node(const void *blob, const char *name)
  486. {
  487. const char *prop;
  488. prop = fdtdec_get_chosen_prop(blob, name);
  489. if (!prop)
  490. return -FDT_ERR_NOTFOUND;
  491. return fdt_path_offset(blob, prop);
  492. }
  493. int fdtdec_check_fdt(void)
  494. {
  495. /*
  496. * We must have an FDT, but we cannot panic() yet since the console
  497. * is not ready. So for now, just assert(). Boards which need an early
  498. * FDT (prior to console ready) will need to make their own
  499. * arrangements and do their own checks.
  500. */
  501. assert(!fdtdec_prepare_fdt());
  502. return 0;
  503. }
  504. /*
  505. * This function is a little odd in that it accesses global data. At some
  506. * point if the architecture board.c files merge this will make more sense.
  507. * Even now, it is common code.
  508. */
  509. int fdtdec_prepare_fdt(void)
  510. {
  511. if (!gd->fdt_blob || ((uintptr_t)gd->fdt_blob & 3) ||
  512. fdt_check_header(gd->fdt_blob)) {
  513. #ifdef CONFIG_SPL_BUILD
  514. puts("Missing DTB\n");
  515. #else
  516. puts("No valid device tree binary found - please append one to U-Boot binary, use u-boot-dtb.bin or define CONFIG_OF_EMBED. For sandbox, use -d <file.dtb>\n");
  517. # ifdef DEBUG
  518. if (gd->fdt_blob) {
  519. printf("fdt_blob=%p\n", gd->fdt_blob);
  520. print_buffer((ulong)gd->fdt_blob, gd->fdt_blob, 4,
  521. 32, 0);
  522. }
  523. # endif
  524. #endif
  525. return -1;
  526. }
  527. return 0;
  528. }
  529. int fdtdec_lookup_phandle(const void *blob, int node, const char *prop_name)
  530. {
  531. const u32 *phandle;
  532. int lookup;
  533. debug("%s: %s\n", __func__, prop_name);
  534. phandle = fdt_getprop(blob, node, prop_name, NULL);
  535. if (!phandle)
  536. return -FDT_ERR_NOTFOUND;
  537. lookup = fdt_node_offset_by_phandle(blob, fdt32_to_cpu(*phandle));
  538. return lookup;
  539. }
  540. /**
  541. * Look up a property in a node and check that it has a minimum length.
  542. *
  543. * @param blob FDT blob
  544. * @param node node to examine
  545. * @param prop_name name of property to find
  546. * @param min_len minimum property length in bytes
  547. * @param err 0 if ok, or -FDT_ERR_NOTFOUND if the property is not
  548. found, or -FDT_ERR_BADLAYOUT if not enough data
  549. * @return pointer to cell, which is only valid if err == 0
  550. */
  551. static const void *get_prop_check_min_len(const void *blob, int node,
  552. const char *prop_name, int min_len,
  553. int *err)
  554. {
  555. const void *cell;
  556. int len;
  557. debug("%s: %s\n", __func__, prop_name);
  558. cell = fdt_getprop(blob, node, prop_name, &len);
  559. if (!cell)
  560. *err = -FDT_ERR_NOTFOUND;
  561. else if (len < min_len)
  562. *err = -FDT_ERR_BADLAYOUT;
  563. else
  564. *err = 0;
  565. return cell;
  566. }
  567. int fdtdec_get_int_array(const void *blob, int node, const char *prop_name,
  568. u32 *array, int count)
  569. {
  570. const u32 *cell;
  571. int err = 0;
  572. debug("%s: %s\n", __func__, prop_name);
  573. cell = get_prop_check_min_len(blob, node, prop_name,
  574. sizeof(u32) * count, &err);
  575. if (!err) {
  576. int i;
  577. for (i = 0; i < count; i++)
  578. array[i] = fdt32_to_cpu(cell[i]);
  579. }
  580. return err;
  581. }
  582. int fdtdec_get_int_array_count(const void *blob, int node,
  583. const char *prop_name, u32 *array, int count)
  584. {
  585. const u32 *cell;
  586. int len, elems;
  587. int i;
  588. debug("%s: %s\n", __func__, prop_name);
  589. cell = fdt_getprop(blob, node, prop_name, &len);
  590. if (!cell)
  591. return -FDT_ERR_NOTFOUND;
  592. elems = len / sizeof(u32);
  593. if (count > elems)
  594. count = elems;
  595. for (i = 0; i < count; i++)
  596. array[i] = fdt32_to_cpu(cell[i]);
  597. return count;
  598. }
  599. const u32 *fdtdec_locate_array(const void *blob, int node,
  600. const char *prop_name, int count)
  601. {
  602. const u32 *cell;
  603. int err;
  604. cell = get_prop_check_min_len(blob, node, prop_name,
  605. sizeof(u32) * count, &err);
  606. return err ? NULL : cell;
  607. }
  608. int fdtdec_get_bool(const void *blob, int node, const char *prop_name)
  609. {
  610. const s32 *cell;
  611. int len;
  612. debug("%s: %s\n", __func__, prop_name);
  613. cell = fdt_getprop(blob, node, prop_name, &len);
  614. return cell != NULL;
  615. }
  616. int fdtdec_parse_phandle_with_args(const void *blob, int src_node,
  617. const char *list_name,
  618. const char *cells_name,
  619. int cell_count, int index,
  620. struct fdtdec_phandle_args *out_args)
  621. {
  622. const __be32 *list, *list_end;
  623. int rc = 0, size, cur_index = 0;
  624. uint32_t count = 0;
  625. int node = -1;
  626. int phandle;
  627. /* Retrieve the phandle list property */
  628. list = fdt_getprop(blob, src_node, list_name, &size);
  629. if (!list)
  630. return -ENOENT;
  631. list_end = list + size / sizeof(*list);
  632. /* Loop over the phandles until all the requested entry is found */
  633. while (list < list_end) {
  634. rc = -EINVAL;
  635. count = 0;
  636. /*
  637. * If phandle is 0, then it is an empty entry with no
  638. * arguments. Skip forward to the next entry.
  639. */
  640. phandle = be32_to_cpup(list++);
  641. if (phandle) {
  642. /*
  643. * Find the provider node and parse the #*-cells
  644. * property to determine the argument length.
  645. *
  646. * This is not needed if the cell count is hard-coded
  647. * (i.e. cells_name not set, but cell_count is set),
  648. * except when we're going to return the found node
  649. * below.
  650. */
  651. if (cells_name || cur_index == index) {
  652. node = fdt_node_offset_by_phandle(blob,
  653. phandle);
  654. if (!node) {
  655. debug("%s: could not find phandle\n",
  656. fdt_get_name(blob, src_node,
  657. NULL));
  658. goto err;
  659. }
  660. }
  661. if (cells_name) {
  662. count = fdtdec_get_int(blob, node, cells_name,
  663. -1);
  664. if (count == -1) {
  665. debug("%s: could not get %s for %s\n",
  666. fdt_get_name(blob, src_node,
  667. NULL),
  668. cells_name,
  669. fdt_get_name(blob, node,
  670. NULL));
  671. goto err;
  672. }
  673. } else {
  674. count = cell_count;
  675. }
  676. /*
  677. * Make sure that the arguments actually fit in the
  678. * remaining property data length
  679. */
  680. if (list + count > list_end) {
  681. debug("%s: arguments longer than property\n",
  682. fdt_get_name(blob, src_node, NULL));
  683. goto err;
  684. }
  685. }
  686. /*
  687. * All of the error cases above bail out of the loop, so at
  688. * this point, the parsing is successful. If the requested
  689. * index matches, then fill the out_args structure and return,
  690. * or return -ENOENT for an empty entry.
  691. */
  692. rc = -ENOENT;
  693. if (cur_index == index) {
  694. if (!phandle)
  695. goto err;
  696. if (out_args) {
  697. int i;
  698. if (count > MAX_PHANDLE_ARGS) {
  699. debug("%s: too many arguments %d\n",
  700. fdt_get_name(blob, src_node,
  701. NULL), count);
  702. count = MAX_PHANDLE_ARGS;
  703. }
  704. out_args->node = node;
  705. out_args->args_count = count;
  706. for (i = 0; i < count; i++) {
  707. out_args->args[i] =
  708. be32_to_cpup(list++);
  709. }
  710. }
  711. /* Found it! return success */
  712. return 0;
  713. }
  714. node = -1;
  715. list += count;
  716. cur_index++;
  717. }
  718. /*
  719. * Result will be one of:
  720. * -ENOENT : index is for empty phandle
  721. * -EINVAL : parsing error on data
  722. * [1..n] : Number of phandle (count mode; when index = -1)
  723. */
  724. rc = index < 0 ? cur_index : -ENOENT;
  725. err:
  726. return rc;
  727. }
  728. int fdtdec_get_child_count(const void *blob, int node)
  729. {
  730. int subnode;
  731. int num = 0;
  732. fdt_for_each_subnode(subnode, blob, node)
  733. num++;
  734. return num;
  735. }
  736. int fdtdec_get_byte_array(const void *blob, int node, const char *prop_name,
  737. u8 *array, int count)
  738. {
  739. const u8 *cell;
  740. int err;
  741. cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
  742. if (!err)
  743. memcpy(array, cell, count);
  744. return err;
  745. }
  746. const u8 *fdtdec_locate_byte_array(const void *blob, int node,
  747. const char *prop_name, int count)
  748. {
  749. const u8 *cell;
  750. int err;
  751. cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
  752. if (err)
  753. return NULL;
  754. return cell;
  755. }
  756. int fdtdec_get_config_int(const void *blob, const char *prop_name,
  757. int default_val)
  758. {
  759. int config_node;
  760. debug("%s: %s\n", __func__, prop_name);
  761. config_node = fdt_path_offset(blob, "/config");
  762. if (config_node < 0)
  763. return default_val;
  764. return fdtdec_get_int(blob, config_node, prop_name, default_val);
  765. }
  766. int fdtdec_get_config_bool(const void *blob, const char *prop_name)
  767. {
  768. int config_node;
  769. const void *prop;
  770. debug("%s: %s\n", __func__, prop_name);
  771. config_node = fdt_path_offset(blob, "/config");
  772. if (config_node < 0)
  773. return 0;
  774. prop = fdt_get_property(blob, config_node, prop_name, NULL);
  775. return prop != NULL;
  776. }
  777. char *fdtdec_get_config_string(const void *blob, const char *prop_name)
  778. {
  779. const char *nodep;
  780. int nodeoffset;
  781. int len;
  782. debug("%s: %s\n", __func__, prop_name);
  783. nodeoffset = fdt_path_offset(blob, "/config");
  784. if (nodeoffset < 0)
  785. return NULL;
  786. nodep = fdt_getprop(blob, nodeoffset, prop_name, &len);
  787. if (!nodep)
  788. return NULL;
  789. return (char *)nodep;
  790. }
  791. int fdtdec_decode_region(const void *blob, int node, const char *prop_name,
  792. fdt_addr_t *basep, fdt_size_t *sizep)
  793. {
  794. const fdt_addr_t *cell;
  795. int len;
  796. debug("%s: %s: %s\n", __func__, fdt_get_name(blob, node, NULL),
  797. prop_name);
  798. cell = fdt_getprop(blob, node, prop_name, &len);
  799. if (!cell || (len < sizeof(fdt_addr_t) * 2)) {
  800. debug("cell=%p, len=%d\n", cell, len);
  801. return -1;
  802. }
  803. *basep = fdt_addr_to_cpu(*cell);
  804. *sizep = fdt_size_to_cpu(cell[1]);
  805. debug("%s: base=%08lx, size=%lx\n", __func__, (ulong)*basep,
  806. (ulong)*sizep);
  807. return 0;
  808. }
  809. u64 fdtdec_get_number(const fdt32_t *ptr, unsigned int cells)
  810. {
  811. u64 number = 0;
  812. while (cells--)
  813. number = (number << 32) | fdt32_to_cpu(*ptr++);
  814. return number;
  815. }
  816. int fdt_get_resource(const void *fdt, int node, const char *property,
  817. unsigned int index, struct fdt_resource *res)
  818. {
  819. const fdt32_t *ptr, *end;
  820. int na, ns, len, parent;
  821. unsigned int i = 0;
  822. parent = fdt_parent_offset(fdt, node);
  823. if (parent < 0)
  824. return parent;
  825. na = fdt_address_cells(fdt, parent);
  826. ns = fdt_size_cells(fdt, parent);
  827. ptr = fdt_getprop(fdt, node, property, &len);
  828. if (!ptr)
  829. return len;
  830. end = ptr + len / sizeof(*ptr);
  831. while (ptr + na + ns <= end) {
  832. if (i == index) {
  833. res->start = fdtdec_get_number(ptr, na);
  834. res->end = res->start;
  835. res->end += fdtdec_get_number(&ptr[na], ns) - 1;
  836. return 0;
  837. }
  838. ptr += na + ns;
  839. i++;
  840. }
  841. return -FDT_ERR_NOTFOUND;
  842. }
  843. int fdt_get_named_resource(const void *fdt, int node, const char *property,
  844. const char *prop_names, const char *name,
  845. struct fdt_resource *res)
  846. {
  847. int index;
  848. index = fdt_stringlist_search(fdt, node, prop_names, name);
  849. if (index < 0)
  850. return index;
  851. return fdt_get_resource(fdt, node, property, index, res);
  852. }
  853. int fdtdec_decode_memory_region(const void *blob, int config_node,
  854. const char *mem_type, const char *suffix,
  855. fdt_addr_t *basep, fdt_size_t *sizep)
  856. {
  857. char prop_name[50];
  858. const char *mem;
  859. fdt_size_t size, offset_size;
  860. fdt_addr_t base, offset;
  861. int node;
  862. if (config_node == -1) {
  863. config_node = fdt_path_offset(blob, "/config");
  864. if (config_node < 0) {
  865. debug("%s: Cannot find /config node\n", __func__);
  866. return -ENOENT;
  867. }
  868. }
  869. if (!suffix)
  870. suffix = "";
  871. snprintf(prop_name, sizeof(prop_name), "%s-memory%s", mem_type,
  872. suffix);
  873. mem = fdt_getprop(blob, config_node, prop_name, NULL);
  874. if (!mem) {
  875. debug("%s: No memory type for '%s', using /memory\n", __func__,
  876. prop_name);
  877. mem = "/memory";
  878. }
  879. node = fdt_path_offset(blob, mem);
  880. if (node < 0) {
  881. debug("%s: Failed to find node '%s': %s\n", __func__, mem,
  882. fdt_strerror(node));
  883. return -ENOENT;
  884. }
  885. /*
  886. * Not strictly correct - the memory may have multiple banks. We just
  887. * use the first
  888. */
  889. if (fdtdec_decode_region(blob, node, "reg", &base, &size)) {
  890. debug("%s: Failed to decode memory region %s\n", __func__,
  891. mem);
  892. return -EINVAL;
  893. }
  894. snprintf(prop_name, sizeof(prop_name), "%s-offset%s", mem_type,
  895. suffix);
  896. if (fdtdec_decode_region(blob, config_node, prop_name, &offset,
  897. &offset_size)) {
  898. debug("%s: Failed to decode memory region '%s'\n", __func__,
  899. prop_name);
  900. return -EINVAL;
  901. }
  902. *basep = base + offset;
  903. *sizep = offset_size;
  904. return 0;
  905. }
  906. static int decode_timing_property(const void *blob, int node, const char *name,
  907. struct timing_entry *result)
  908. {
  909. int length, ret = 0;
  910. const u32 *prop;
  911. prop = fdt_getprop(blob, node, name, &length);
  912. if (!prop) {
  913. debug("%s: could not find property %s\n",
  914. fdt_get_name(blob, node, NULL), name);
  915. return length;
  916. }
  917. if (length == sizeof(u32)) {
  918. result->typ = fdtdec_get_int(blob, node, name, 0);
  919. result->min = result->typ;
  920. result->max = result->typ;
  921. } else {
  922. ret = fdtdec_get_int_array(blob, node, name, &result->min, 3);
  923. }
  924. return ret;
  925. }
  926. int fdtdec_decode_display_timing(const void *blob, int parent, int index,
  927. struct display_timing *dt)
  928. {
  929. int i, node, timings_node;
  930. u32 val = 0;
  931. int ret = 0;
  932. timings_node = fdt_subnode_offset(blob, parent, "display-timings");
  933. if (timings_node < 0)
  934. return timings_node;
  935. for (i = 0, node = fdt_first_subnode(blob, timings_node);
  936. node > 0 && i != index;
  937. node = fdt_next_subnode(blob, node))
  938. i++;
  939. if (node < 0)
  940. return node;
  941. memset(dt, 0, sizeof(*dt));
  942. ret |= decode_timing_property(blob, node, "hback-porch",
  943. &dt->hback_porch);
  944. ret |= decode_timing_property(blob, node, "hfront-porch",
  945. &dt->hfront_porch);
  946. ret |= decode_timing_property(blob, node, "hactive", &dt->hactive);
  947. ret |= decode_timing_property(blob, node, "hsync-len", &dt->hsync_len);
  948. ret |= decode_timing_property(blob, node, "vback-porch",
  949. &dt->vback_porch);
  950. ret |= decode_timing_property(blob, node, "vfront-porch",
  951. &dt->vfront_porch);
  952. ret |= decode_timing_property(blob, node, "vactive", &dt->vactive);
  953. ret |= decode_timing_property(blob, node, "vsync-len", &dt->vsync_len);
  954. ret |= decode_timing_property(blob, node, "clock-frequency",
  955. &dt->pixelclock);
  956. dt->flags = 0;
  957. val = fdtdec_get_int(blob, node, "vsync-active", -1);
  958. if (val != -1) {
  959. dt->flags |= val ? DISPLAY_FLAGS_VSYNC_HIGH :
  960. DISPLAY_FLAGS_VSYNC_LOW;
  961. }
  962. val = fdtdec_get_int(blob, node, "hsync-active", -1);
  963. if (val != -1) {
  964. dt->flags |= val ? DISPLAY_FLAGS_HSYNC_HIGH :
  965. DISPLAY_FLAGS_HSYNC_LOW;
  966. }
  967. val = fdtdec_get_int(blob, node, "de-active", -1);
  968. if (val != -1) {
  969. dt->flags |= val ? DISPLAY_FLAGS_DE_HIGH :
  970. DISPLAY_FLAGS_DE_LOW;
  971. }
  972. val = fdtdec_get_int(blob, node, "pixelclk-active", -1);
  973. if (val != -1) {
  974. dt->flags |= val ? DISPLAY_FLAGS_PIXDATA_POSEDGE :
  975. DISPLAY_FLAGS_PIXDATA_NEGEDGE;
  976. }
  977. if (fdtdec_get_bool(blob, node, "interlaced"))
  978. dt->flags |= DISPLAY_FLAGS_INTERLACED;
  979. if (fdtdec_get_bool(blob, node, "doublescan"))
  980. dt->flags |= DISPLAY_FLAGS_DOUBLESCAN;
  981. if (fdtdec_get_bool(blob, node, "doubleclk"))
  982. dt->flags |= DISPLAY_FLAGS_DOUBLECLK;
  983. return ret;
  984. }
  985. int fdtdec_setup_memory_size(void)
  986. {
  987. int ret, mem;
  988. struct fdt_resource res;
  989. mem = fdt_path_offset(gd->fdt_blob, "/memory");
  990. if (mem < 0) {
  991. debug("%s: Missing /memory node\n", __func__);
  992. return -EINVAL;
  993. }
  994. ret = fdt_get_resource(gd->fdt_blob, mem, "reg", 0, &res);
  995. if (ret != 0) {
  996. debug("%s: Unable to decode first memory bank\n", __func__);
  997. return -EINVAL;
  998. }
  999. gd->ram_size = (phys_size_t)(res.end - res.start + 1);
  1000. debug("%s: Initial DRAM size %llx\n", __func__,
  1001. (unsigned long long)gd->ram_size);
  1002. return 0;
  1003. }
  1004. #if defined(CONFIG_NR_DRAM_BANKS)
  1005. int fdtdec_setup_memory_banksize(void)
  1006. {
  1007. int bank, ret, mem, reg = 0;
  1008. struct fdt_resource res;
  1009. mem = fdt_node_offset_by_prop_value(gd->fdt_blob, -1, "device_type",
  1010. "memory", 7);
  1011. if (mem < 0) {
  1012. debug("%s: Missing /memory node\n", __func__);
  1013. return -EINVAL;
  1014. }
  1015. for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
  1016. ret = fdt_get_resource(gd->fdt_blob, mem, "reg", reg++, &res);
  1017. if (ret == -FDT_ERR_NOTFOUND) {
  1018. reg = 0;
  1019. mem = fdt_node_offset_by_prop_value(gd->fdt_blob, mem,
  1020. "device_type",
  1021. "memory", 7);
  1022. if (mem == -FDT_ERR_NOTFOUND)
  1023. break;
  1024. ret = fdt_get_resource(gd->fdt_blob, mem, "reg", reg++, &res);
  1025. if (ret == -FDT_ERR_NOTFOUND)
  1026. break;
  1027. }
  1028. if (ret != 0) {
  1029. return -EINVAL;
  1030. }
  1031. gd->bd->bi_dram[bank].start = (phys_addr_t)res.start;
  1032. gd->bd->bi_dram[bank].size =
  1033. (phys_size_t)(res.end - res.start + 1);
  1034. debug("%s: DRAM Bank #%d: start = 0x%llx, size = 0x%llx\n",
  1035. __func__, bank,
  1036. (unsigned long long)gd->bd->bi_dram[bank].start,
  1037. (unsigned long long)gd->bd->bi_dram[bank].size);
  1038. }
  1039. return 0;
  1040. }
  1041. #endif
  1042. #if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
  1043. # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_GZIP) ||\
  1044. CONFIG_IS_ENABLED(MULTI_DTB_FIT_LZO)
  1045. static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
  1046. {
  1047. size_t sz_out = CONFIG_SPL_MULTI_DTB_FIT_UNCOMPRESS_SZ;
  1048. ulong sz_in = sz_src;
  1049. void *dst;
  1050. int rc;
  1051. if (CONFIG_IS_ENABLED(GZIP))
  1052. if (gzip_parse_header(src, sz_in) < 0)
  1053. return -1;
  1054. if (CONFIG_IS_ENABLED(LZO))
  1055. if (!lzop_is_valid_header(src))
  1056. return -EBADMSG;
  1057. if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC)) {
  1058. dst = malloc(sz_out);
  1059. if (!dst) {
  1060. puts("uncompress_blob: Unable to allocate memory\n");
  1061. return -ENOMEM;
  1062. }
  1063. } else {
  1064. # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_USER_DEFINED_AREA)
  1065. dst = (void *)CONFIG_VAL(MULTI_DTB_FIT_USER_DEF_ADDR);
  1066. # else
  1067. return -ENOTSUPP;
  1068. # endif
  1069. }
  1070. if (CONFIG_IS_ENABLED(GZIP))
  1071. rc = gunzip(dst, sz_out, (u8 *)src, &sz_in);
  1072. else if (CONFIG_IS_ENABLED(LZO))
  1073. rc = lzop_decompress(src, sz_in, dst, &sz_out);
  1074. if (rc < 0) {
  1075. /* not a valid compressed blob */
  1076. puts("uncompress_blob: Unable to uncompress\n");
  1077. if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC))
  1078. free(dst);
  1079. return -EBADMSG;
  1080. }
  1081. *dstp = dst;
  1082. return 0;
  1083. }
  1084. # else
  1085. static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
  1086. {
  1087. return -ENOTSUPP;
  1088. }
  1089. # endif
  1090. #endif
  1091. #if defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
  1092. /*
  1093. * For CONFIG_OF_SEPARATE, the board may optionally implement this to
  1094. * provide and/or fixup the fdt.
  1095. */
  1096. __weak void *board_fdt_blob_setup(void)
  1097. {
  1098. void *fdt_blob = NULL;
  1099. #ifdef CONFIG_SPL_BUILD
  1100. /* FDT is at end of BSS unless it is in a different memory region */
  1101. if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS))
  1102. fdt_blob = (ulong *)&_image_binary_end;
  1103. else
  1104. fdt_blob = (ulong *)&__bss_end;
  1105. #else
  1106. /* FDT is at end of image */
  1107. fdt_blob = (ulong *)&_end;
  1108. #endif
  1109. return fdt_blob;
  1110. }
  1111. #endif
  1112. int fdtdec_setup(void)
  1113. {
  1114. #if CONFIG_IS_ENABLED(OF_CONTROL)
  1115. # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
  1116. void *fdt_blob;
  1117. # endif
  1118. # ifdef CONFIG_OF_EMBED
  1119. /* Get a pointer to the FDT */
  1120. # ifdef CONFIG_SPL_BUILD
  1121. gd->fdt_blob = __dtb_dt_spl_begin;
  1122. # else
  1123. gd->fdt_blob = __dtb_dt_begin;
  1124. # endif
  1125. # elif defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
  1126. /* Allow the board to override the fdt address. */
  1127. gd->fdt_blob = board_fdt_blob_setup();
  1128. # elif defined(CONFIG_OF_HOSTFILE)
  1129. if (sandbox_read_fdt_from_file()) {
  1130. puts("Failed to read control FDT\n");
  1131. return -1;
  1132. }
  1133. # endif
  1134. # ifndef CONFIG_SPL_BUILD
  1135. /* Allow the early environment to override the fdt address */
  1136. gd->fdt_blob = (void *)env_get_ulong("fdtcontroladdr", 16,
  1137. (uintptr_t)gd->fdt_blob);
  1138. # endif
  1139. # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
  1140. /*
  1141. * Try and uncompress the blob.
  1142. * Unfortunately there is no way to know how big the input blob really
  1143. * is. So let us set the maximum input size arbitrarily high. 16MB
  1144. * ought to be more than enough for packed DTBs.
  1145. */
  1146. if (uncompress_blob(gd->fdt_blob, 0x1000000, &fdt_blob) == 0)
  1147. gd->fdt_blob = fdt_blob;
  1148. /*
  1149. * Check if blob is a FIT images containings DTBs.
  1150. * If so, pick the most relevant
  1151. */
  1152. fdt_blob = locate_dtb_in_fit(gd->fdt_blob);
  1153. if (fdt_blob)
  1154. gd->fdt_blob = fdt_blob;
  1155. # endif
  1156. #endif
  1157. return fdtdec_prepare_fdt();
  1158. }
  1159. #endif /* !USE_HOSTCC */