i2c.h 25 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright (C) 2009 Sergey Kubushyn <ksi@koi8.net>
  4. * Copyright (C) 2009 - 2013 Heiko Schocher <hs@denx.de>
  5. * Changes for multibus/multiadapter I2C support.
  6. *
  7. * (C) Copyright 2001
  8. * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
  9. *
  10. * The original I2C interface was
  11. * (C) 2000 by Paolo Scaffardi (arsenio@tin.it)
  12. * AIRVENT SAM s.p.a - RIMINI(ITALY)
  13. * but has been changed substantially.
  14. */
  15. #ifndef _I2C_H_
  16. #define _I2C_H_
  17. /*
  18. * For now there are essentially two parts to this file - driver model
  19. * here at the top, and the older code below (with CONFIG_SYS_I2C being
  20. * most recent). The plan is to migrate everything to driver model.
  21. * The driver model structures and API are separate as they are different
  22. * enough as to be incompatible for compilation purposes.
  23. */
  24. enum dm_i2c_chip_flags {
  25. DM_I2C_CHIP_10BIT = 1 << 0, /* Use 10-bit addressing */
  26. DM_I2C_CHIP_RD_ADDRESS = 1 << 1, /* Send address for each read byte */
  27. DM_I2C_CHIP_WR_ADDRESS = 1 << 2, /* Send address for each write byte */
  28. };
  29. struct udevice;
  30. /**
  31. * struct dm_i2c_chip - information about an i2c chip
  32. *
  33. * An I2C chip is a device on the I2C bus. It sits at a particular address
  34. * and normally supports 7-bit or 10-bit addressing.
  35. *
  36. * To obtain this structure, use dev_get_parent_platdata(dev) where dev is
  37. * the chip to examine.
  38. *
  39. * @chip_addr: Chip address on bus
  40. * @offset_len: Length of offset in bytes. A single byte offset can
  41. * represent up to 256 bytes. A value larger than 1 may be
  42. * needed for larger devices.
  43. * @flags: Flags for this chip (dm_i2c_chip_flags)
  44. * @emul: Emulator for this chip address (only used for emulation)
  45. */
  46. struct dm_i2c_chip {
  47. uint chip_addr;
  48. uint offset_len;
  49. uint flags;
  50. #ifdef CONFIG_SANDBOX
  51. struct udevice *emul;
  52. bool test_mode;
  53. #endif
  54. };
  55. /**
  56. * struct dm_i2c_bus- information about an i2c bus
  57. *
  58. * An I2C bus contains 0 or more chips on it, each at its own address. The
  59. * bus can operate at different speeds (measured in Hz, typically 100KHz
  60. * or 400KHz).
  61. *
  62. * To obtain this structure, use dev_get_uclass_priv(bus) where bus is the
  63. * I2C bus udevice.
  64. *
  65. * @speed_hz: Bus speed in hertz (typically 100000)
  66. */
  67. struct dm_i2c_bus {
  68. int speed_hz;
  69. };
  70. /*
  71. * Not all of these flags are implemented in the U-Boot API
  72. */
  73. enum dm_i2c_msg_flags {
  74. I2C_M_TEN = 0x0010, /* ten-bit chip address */
  75. I2C_M_RD = 0x0001, /* read data, from slave to master */
  76. I2C_M_STOP = 0x8000, /* send stop after this message */
  77. I2C_M_NOSTART = 0x4000, /* no start before this message */
  78. I2C_M_REV_DIR_ADDR = 0x2000, /* invert polarity of R/W bit */
  79. I2C_M_IGNORE_NAK = 0x1000, /* continue after NAK */
  80. I2C_M_NO_RD_ACK = 0x0800, /* skip the Ack bit on reads */
  81. I2C_M_RECV_LEN = 0x0400, /* length is first received byte */
  82. };
  83. /**
  84. * struct i2c_msg - an I2C message
  85. *
  86. * @addr: Slave address
  87. * @flags: Flags (see enum dm_i2c_msg_flags)
  88. * @len: Length of buffer in bytes, may be 0 for a probe
  89. * @buf: Buffer to send/receive, or NULL if no data
  90. */
  91. struct i2c_msg {
  92. uint addr;
  93. uint flags;
  94. uint len;
  95. u8 *buf;
  96. };
  97. /**
  98. * struct i2c_msg_list - a list of I2C messages
  99. *
  100. * This is called i2c_rdwr_ioctl_data in Linux but the name does not seem
  101. * appropriate in U-Boot.
  102. *
  103. * @msg: Pointer to i2c_msg array
  104. * @nmsgs: Number of elements in the array
  105. */
  106. struct i2c_msg_list {
  107. struct i2c_msg *msgs;
  108. uint nmsgs;
  109. };
  110. /**
  111. * dm_i2c_read() - read bytes from an I2C chip
  112. *
  113. * To obtain an I2C device (called a 'chip') given the I2C bus address you
  114. * can use i2c_get_chip(). To obtain a bus by bus number use
  115. * uclass_get_device_by_seq(UCLASS_I2C, <bus number>).
  116. *
  117. * To set the address length of a devce use i2c_set_addr_len(). It
  118. * defaults to 1.
  119. *
  120. * @dev: Chip to read from
  121. * @offset: Offset within chip to start reading
  122. * @buffer: Place to put data
  123. * @len: Number of bytes to read
  124. *
  125. * @return 0 on success, -ve on failure
  126. */
  127. int dm_i2c_read(struct udevice *dev, uint offset, uint8_t *buffer, int len);
  128. /**
  129. * dm_i2c_write() - write bytes to an I2C chip
  130. *
  131. * See notes for dm_i2c_read() above.
  132. *
  133. * @dev: Chip to write to
  134. * @offset: Offset within chip to start writing
  135. * @buffer: Buffer containing data to write
  136. * @len: Number of bytes to write
  137. *
  138. * @return 0 on success, -ve on failure
  139. */
  140. int dm_i2c_write(struct udevice *dev, uint offset, const uint8_t *buffer,
  141. int len);
  142. /**
  143. * dm_i2c_probe() - probe a particular chip address
  144. *
  145. * This can be useful to check for the existence of a chip on the bus.
  146. * It is typically implemented by writing the chip address to the bus
  147. * and checking that the chip replies with an ACK.
  148. *
  149. * @bus: Bus to probe
  150. * @chip_addr: 7-bit address to probe (10-bit and others are not supported)
  151. * @chip_flags: Flags for the probe (see enum dm_i2c_chip_flags)
  152. * @devp: Returns the device found, or NULL if none
  153. * @return 0 if a chip was found at that address, -ve if not
  154. */
  155. int dm_i2c_probe(struct udevice *bus, uint chip_addr, uint chip_flags,
  156. struct udevice **devp);
  157. /**
  158. * dm_i2c_reg_read() - Read a value from an I2C register
  159. *
  160. * This reads a single value from the given address in an I2C chip
  161. *
  162. * @dev: Device to use for transfer
  163. * @addr: Address to read from
  164. * @return value read, or -ve on error
  165. */
  166. int dm_i2c_reg_read(struct udevice *dev, uint offset);
  167. /**
  168. * dm_i2c_reg_write() - Write a value to an I2C register
  169. *
  170. * This writes a single value to the given address in an I2C chip
  171. *
  172. * @dev: Device to use for transfer
  173. * @addr: Address to write to
  174. * @val: Value to write (normally a byte)
  175. * @return 0 on success, -ve on error
  176. */
  177. int dm_i2c_reg_write(struct udevice *dev, uint offset, unsigned int val);
  178. /**
  179. * dm_i2c_xfer() - Transfer messages over I2C
  180. *
  181. * This transfers a raw message. It is best to use dm_i2c_reg_read/write()
  182. * instead.
  183. *
  184. * @dev: Device to use for transfer
  185. * @msg: List of messages to transfer
  186. * @nmsgs: Number of messages to transfer
  187. * @return 0 on success, -ve on error
  188. */
  189. int dm_i2c_xfer(struct udevice *dev, struct i2c_msg *msg, int nmsgs);
  190. /**
  191. * dm_i2c_set_bus_speed() - set the speed of a bus
  192. *
  193. * @bus: Bus to adjust
  194. * @speed: Requested speed in Hz
  195. * @return 0 if OK, -EINVAL for invalid values
  196. */
  197. int dm_i2c_set_bus_speed(struct udevice *bus, unsigned int speed);
  198. /**
  199. * dm_i2c_get_bus_speed() - get the speed of a bus
  200. *
  201. * @bus: Bus to check
  202. * @return speed of selected I2C bus in Hz, -ve on error
  203. */
  204. int dm_i2c_get_bus_speed(struct udevice *bus);
  205. /**
  206. * i2c_set_chip_flags() - set flags for a chip
  207. *
  208. * Typically addresses are 7 bits, but for 10-bit addresses you should set
  209. * flags to DM_I2C_CHIP_10BIT. All accesses will then use 10-bit addressing.
  210. *
  211. * @dev: Chip to adjust
  212. * @flags: New flags
  213. * @return 0 if OK, -EINVAL if value is unsupported, other -ve value on error
  214. */
  215. int i2c_set_chip_flags(struct udevice *dev, uint flags);
  216. /**
  217. * i2c_get_chip_flags() - get flags for a chip
  218. *
  219. * @dev: Chip to check
  220. * @flagsp: Place to put flags
  221. * @return 0 if OK, other -ve value on error
  222. */
  223. int i2c_get_chip_flags(struct udevice *dev, uint *flagsp);
  224. /**
  225. * i2c_set_offset_len() - set the offset length for a chip
  226. *
  227. * The offset used to access a chip may be up to 4 bytes long. Typically it
  228. * is only 1 byte, which is enough for chips with 256 bytes of memory or
  229. * registers. The default value is 1, but you can call this function to
  230. * change it.
  231. *
  232. * @offset_len: New offset length value (typically 1 or 2)
  233. */
  234. int i2c_set_chip_offset_len(struct udevice *dev, uint offset_len);
  235. /**
  236. * i2c_get_offset_len() - get the offset length for a chip
  237. *
  238. * @return: Current offset length value (typically 1 or 2)
  239. */
  240. int i2c_get_chip_offset_len(struct udevice *dev);
  241. /**
  242. * i2c_deblock() - recover a bus that is in an unknown state
  243. *
  244. * See the deblock() method in 'struct dm_i2c_ops' for full information
  245. *
  246. * @bus: Bus to recover
  247. * @return 0 if OK, -ve on error
  248. */
  249. int i2c_deblock(struct udevice *bus);
  250. #ifdef CONFIG_DM_I2C_COMPAT
  251. /**
  252. * i2c_probe() - Compatibility function for driver model
  253. *
  254. * Calls dm_i2c_probe() on the current bus
  255. */
  256. int i2c_probe(uint8_t chip_addr);
  257. /**
  258. * i2c_read() - Compatibility function for driver model
  259. *
  260. * Calls dm_i2c_read() with the device corresponding to @chip_addr, and offset
  261. * set to @addr. @alen must match the current setting for the device.
  262. */
  263. int i2c_read(uint8_t chip_addr, unsigned int addr, int alen, uint8_t *buffer,
  264. int len);
  265. /**
  266. * i2c_write() - Compatibility function for driver model
  267. *
  268. * Calls dm_i2c_write() with the device corresponding to @chip_addr, and offset
  269. * set to @addr. @alen must match the current setting for the device.
  270. */
  271. int i2c_write(uint8_t chip_addr, unsigned int addr, int alen, uint8_t *buffer,
  272. int len);
  273. /**
  274. * i2c_get_bus_num_fdt() - Compatibility function for driver model
  275. *
  276. * @return the bus number associated with the given device tree node
  277. */
  278. int i2c_get_bus_num_fdt(int node);
  279. /**
  280. * i2c_get_bus_num() - Compatibility function for driver model
  281. *
  282. * @return the 'current' bus number
  283. */
  284. unsigned int i2c_get_bus_num(void);
  285. /**
  286. * i2c_set_bus_num() - Compatibility function for driver model
  287. *
  288. * Sets the 'current' bus
  289. */
  290. int i2c_set_bus_num(unsigned int bus);
  291. static inline void I2C_SET_BUS(unsigned int bus)
  292. {
  293. i2c_set_bus_num(bus);
  294. }
  295. static inline unsigned int I2C_GET_BUS(void)
  296. {
  297. return i2c_get_bus_num();
  298. }
  299. /**
  300. * i2c_init() - Compatibility function for driver model
  301. *
  302. * This function does nothing.
  303. */
  304. void i2c_init(int speed, int slaveaddr);
  305. /**
  306. * board_i2c_init() - Compatibility function for driver model
  307. *
  308. * @param blob Device tree blbo
  309. * @return the number of I2C bus
  310. */
  311. void board_i2c_init(const void *blob);
  312. /*
  313. * Compatibility functions for driver model.
  314. */
  315. uint8_t i2c_reg_read(uint8_t addr, uint8_t reg);
  316. void i2c_reg_write(uint8_t addr, uint8_t reg, uint8_t val);
  317. #endif
  318. /**
  319. * struct dm_i2c_ops - driver operations for I2C uclass
  320. *
  321. * Drivers should support these operations unless otherwise noted. These
  322. * operations are intended to be used by uclass code, not directly from
  323. * other code.
  324. */
  325. struct dm_i2c_ops {
  326. /**
  327. * xfer() - transfer a list of I2C messages
  328. *
  329. * @bus: Bus to read from
  330. * @msg: List of messages to transfer
  331. * @nmsgs: Number of messages in the list
  332. * @return 0 if OK, -EREMOTEIO if the slave did not ACK a byte,
  333. * -ECOMM if the speed cannot be supported, -EPROTO if the chip
  334. * flags cannot be supported, other -ve value on some other error
  335. */
  336. int (*xfer)(struct udevice *bus, struct i2c_msg *msg, int nmsgs);
  337. /**
  338. * probe_chip() - probe for the presense of a chip address
  339. *
  340. * This function is optional. If omitted, the uclass will send a zero
  341. * length message instead.
  342. *
  343. * @bus: Bus to probe
  344. * @chip_addr: Chip address to probe
  345. * @chip_flags: Probe flags (enum dm_i2c_chip_flags)
  346. * @return 0 if chip was found, -EREMOTEIO if not, -ENOSYS to fall back
  347. * to default probem other -ve value on error
  348. */
  349. int (*probe_chip)(struct udevice *bus, uint chip_addr, uint chip_flags);
  350. /**
  351. * set_bus_speed() - set the speed of a bus (optional)
  352. *
  353. * The bus speed value will be updated by the uclass if this function
  354. * does not return an error. This method is optional - if it is not
  355. * provided then the driver can read the speed from
  356. * dev_get_uclass_priv(bus)->speed_hz
  357. *
  358. * @bus: Bus to adjust
  359. * @speed: Requested speed in Hz
  360. * @return 0 if OK, -EINVAL for invalid values
  361. */
  362. int (*set_bus_speed)(struct udevice *bus, unsigned int speed);
  363. /**
  364. * get_bus_speed() - get the speed of a bus (optional)
  365. *
  366. * Normally this can be provided by the uclass, but if you want your
  367. * driver to check the bus speed by looking at the hardware, you can
  368. * implement that here. This method is optional. This method would
  369. * normally be expected to return dev_get_uclass_priv(bus)->speed_hz.
  370. *
  371. * @bus: Bus to check
  372. * @return speed of selected I2C bus in Hz, -ve on error
  373. */
  374. int (*get_bus_speed)(struct udevice *bus);
  375. /**
  376. * set_flags() - set the flags for a chip (optional)
  377. *
  378. * This is generally implemented by the uclass, but drivers can
  379. * check the value to ensure that unsupported options are not used.
  380. * This method is optional. If provided, this method will always be
  381. * called when the flags change.
  382. *
  383. * @dev: Chip to adjust
  384. * @flags: New flags value
  385. * @return 0 if OK, -EINVAL if value is unsupported
  386. */
  387. int (*set_flags)(struct udevice *dev, uint flags);
  388. /**
  389. * deblock() - recover a bus that is in an unknown state
  390. *
  391. * I2C is a synchronous protocol and resets of the processor in the
  392. * middle of an access can block the I2C Bus until a powerdown of
  393. * the full unit is done. This is because slaves can be stuck
  394. * waiting for addition bus transitions for a transaction that will
  395. * never complete. Resetting the I2C master does not help. The only
  396. * way is to force the bus through a series of transitions to make
  397. * sure that all slaves are done with the transaction. This method
  398. * performs this 'deblocking' if support by the driver.
  399. *
  400. * This method is optional.
  401. */
  402. int (*deblock)(struct udevice *bus);
  403. };
  404. #define i2c_get_ops(dev) ((struct dm_i2c_ops *)(dev)->driver->ops)
  405. /**
  406. * struct i2c_mux_ops - operations for an I2C mux
  407. *
  408. * The current mux state is expected to be stored in the mux itself since
  409. * it is the only thing that knows how to make things work. The mux can
  410. * record the current state and then avoid switching unless it is necessary.
  411. * So select() can be skipped if the mux is already in the correct state.
  412. * Also deselect() can be made a nop if required.
  413. */
  414. struct i2c_mux_ops {
  415. /**
  416. * select() - select one of of I2C buses attached to a mux
  417. *
  418. * This will be called when there is no bus currently selected by the
  419. * mux. This method does not need to deselect the old bus since
  420. * deselect() will be already have been called if necessary.
  421. *
  422. * @mux: Mux device
  423. * @bus: I2C bus to select
  424. * @channel: Channel number correponding to the bus to select
  425. * @return 0 if OK, -ve on error
  426. */
  427. int (*select)(struct udevice *mux, struct udevice *bus, uint channel);
  428. /**
  429. * deselect() - select one of of I2C buses attached to a mux
  430. *
  431. * This is used to deselect the currently selected I2C bus.
  432. *
  433. * @mux: Mux device
  434. * @bus: I2C bus to deselect
  435. * @channel: Channel number correponding to the bus to deselect
  436. * @return 0 if OK, -ve on error
  437. */
  438. int (*deselect)(struct udevice *mux, struct udevice *bus, uint channel);
  439. };
  440. #define i2c_mux_get_ops(dev) ((struct i2c_mux_ops *)(dev)->driver->ops)
  441. /**
  442. * i2c_get_chip() - get a device to use to access a chip on a bus
  443. *
  444. * This returns the device for the given chip address. The device can then
  445. * be used with calls to i2c_read(), i2c_write(), i2c_probe(), etc.
  446. *
  447. * @bus: Bus to examine
  448. * @chip_addr: Chip address for the new device
  449. * @offset_len: Length of a register offset in bytes (normally 1)
  450. * @devp: Returns pointer to new device if found or -ENODEV if not
  451. * found
  452. */
  453. int i2c_get_chip(struct udevice *bus, uint chip_addr, uint offset_len,
  454. struct udevice **devp);
  455. /**
  456. * i2c_get_chip_for_busnum() - get a device to use to access a chip on
  457. * a bus number
  458. *
  459. * This returns the device for the given chip address on a particular bus
  460. * number.
  461. *
  462. * @busnum: Bus number to examine
  463. * @chip_addr: Chip address for the new device
  464. * @offset_len: Length of a register offset in bytes (normally 1)
  465. * @devp: Returns pointer to new device if found or -ENODEV if not
  466. * found
  467. */
  468. int i2c_get_chip_for_busnum(int busnum, int chip_addr, uint offset_len,
  469. struct udevice **devp);
  470. /**
  471. * i2c_chip_ofdata_to_platdata() - Decode standard I2C platform data
  472. *
  473. * This decodes the chip address from a device tree node and puts it into
  474. * its dm_i2c_chip structure. This should be called in your driver's
  475. * ofdata_to_platdata() method.
  476. *
  477. * @blob: Device tree blob
  478. * @node: Node offset to read from
  479. * @spi: Place to put the decoded information
  480. */
  481. int i2c_chip_ofdata_to_platdata(struct udevice *dev, struct dm_i2c_chip *chip);
  482. /**
  483. * i2c_dump_msgs() - Dump a list of I2C messages
  484. *
  485. * This may be useful for debugging.
  486. *
  487. * @msg: Message list to dump
  488. * @nmsgs: Number of messages
  489. */
  490. void i2c_dump_msgs(struct i2c_msg *msg, int nmsgs);
  491. #ifndef CONFIG_DM_I2C
  492. /*
  493. * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING
  494. *
  495. * The implementation MUST NOT use static or global variables if the
  496. * I2C routines are used to read SDRAM configuration information
  497. * because this is done before the memories are initialized. Limited
  498. * use of stack-based variables are OK (the initial stack size is
  499. * limited).
  500. *
  501. * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING
  502. */
  503. /*
  504. * Configuration items.
  505. */
  506. #define I2C_RXTX_LEN 128 /* maximum tx/rx buffer length */
  507. #if !defined(CONFIG_SYS_I2C_MAX_HOPS)
  508. /* no muxes used bus = i2c adapters */
  509. #define CONFIG_SYS_I2C_DIRECT_BUS 1
  510. #define CONFIG_SYS_I2C_MAX_HOPS 0
  511. #define CONFIG_SYS_NUM_I2C_BUSES ll_entry_count(struct i2c_adapter, i2c)
  512. #else
  513. /* we use i2c muxes */
  514. #undef CONFIG_SYS_I2C_DIRECT_BUS
  515. #endif
  516. /* define the I2C bus number for RTC and DTT if not already done */
  517. #if !defined(CONFIG_SYS_RTC_BUS_NUM)
  518. #define CONFIG_SYS_RTC_BUS_NUM 0
  519. #endif
  520. #if !defined(CONFIG_SYS_SPD_BUS_NUM)
  521. #define CONFIG_SYS_SPD_BUS_NUM 0
  522. #endif
  523. struct i2c_adapter {
  524. void (*init)(struct i2c_adapter *adap, int speed,
  525. int slaveaddr);
  526. int (*probe)(struct i2c_adapter *adap, uint8_t chip);
  527. int (*read)(struct i2c_adapter *adap, uint8_t chip,
  528. uint addr, int alen, uint8_t *buffer,
  529. int len);
  530. int (*write)(struct i2c_adapter *adap, uint8_t chip,
  531. uint addr, int alen, uint8_t *buffer,
  532. int len);
  533. uint (*set_bus_speed)(struct i2c_adapter *adap,
  534. uint speed);
  535. int speed;
  536. int waitdelay;
  537. int slaveaddr;
  538. int init_done;
  539. int hwadapnr;
  540. char *name;
  541. };
  542. #define U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \
  543. _set_speed, _speed, _slaveaddr, _hwadapnr, _name) \
  544. { \
  545. .init = _init, \
  546. .probe = _probe, \
  547. .read = _read, \
  548. .write = _write, \
  549. .set_bus_speed = _set_speed, \
  550. .speed = _speed, \
  551. .slaveaddr = _slaveaddr, \
  552. .init_done = 0, \
  553. .hwadapnr = _hwadapnr, \
  554. .name = #_name \
  555. };
  556. #define U_BOOT_I2C_ADAP_COMPLETE(_name, _init, _probe, _read, _write, \
  557. _set_speed, _speed, _slaveaddr, _hwadapnr) \
  558. ll_entry_declare(struct i2c_adapter, _name, i2c) = \
  559. U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \
  560. _set_speed, _speed, _slaveaddr, _hwadapnr, _name);
  561. struct i2c_adapter *i2c_get_adapter(int index);
  562. #ifndef CONFIG_SYS_I2C_DIRECT_BUS
  563. struct i2c_mux {
  564. int id;
  565. char name[16];
  566. };
  567. struct i2c_next_hop {
  568. struct i2c_mux mux;
  569. uint8_t chip;
  570. uint8_t channel;
  571. };
  572. struct i2c_bus_hose {
  573. int adapter;
  574. struct i2c_next_hop next_hop[CONFIG_SYS_I2C_MAX_HOPS];
  575. };
  576. #define I2C_NULL_HOP {{-1, ""}, 0, 0}
  577. extern struct i2c_bus_hose i2c_bus[];
  578. #define I2C_ADAPTER(bus) i2c_bus[bus].adapter
  579. #else
  580. #define I2C_ADAPTER(bus) bus
  581. #endif
  582. #define I2C_BUS gd->cur_i2c_bus
  583. #define I2C_ADAP_NR(bus) i2c_get_adapter(I2C_ADAPTER(bus))
  584. #define I2C_ADAP I2C_ADAP_NR(gd->cur_i2c_bus)
  585. #define I2C_ADAP_HWNR (I2C_ADAP->hwadapnr)
  586. #ifndef CONFIG_SYS_I2C_DIRECT_BUS
  587. #define I2C_MUX_PCA9540_ID 1
  588. #define I2C_MUX_PCA9540 {I2C_MUX_PCA9540_ID, "PCA9540B"}
  589. #define I2C_MUX_PCA9542_ID 2
  590. #define I2C_MUX_PCA9542 {I2C_MUX_PCA9542_ID, "PCA9542A"}
  591. #define I2C_MUX_PCA9544_ID 3
  592. #define I2C_MUX_PCA9544 {I2C_MUX_PCA9544_ID, "PCA9544A"}
  593. #define I2C_MUX_PCA9547_ID 4
  594. #define I2C_MUX_PCA9547 {I2C_MUX_PCA9547_ID, "PCA9547A"}
  595. #define I2C_MUX_PCA9548_ID 5
  596. #define I2C_MUX_PCA9548 {I2C_MUX_PCA9548_ID, "PCA9548"}
  597. #endif
  598. #ifndef I2C_SOFT_DECLARATIONS
  599. # if (defined(CONFIG_AT91RM9200) || \
  600. defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9261) || \
  601. defined(CONFIG_AT91SAM9263))
  602. # define I2C_SOFT_DECLARATIONS at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA;
  603. # else
  604. # define I2C_SOFT_DECLARATIONS
  605. # endif
  606. #endif
  607. /*
  608. * Many boards/controllers/drivers don't support an I2C slave interface so
  609. * provide a default slave address for them for use in common code. A real
  610. * value for CONFIG_SYS_I2C_SLAVE should be defined for any board which does
  611. * support a slave interface.
  612. */
  613. #ifndef CONFIG_SYS_I2C_SLAVE
  614. #define CONFIG_SYS_I2C_SLAVE 0xfe
  615. #endif
  616. /*
  617. * Initialization, must be called once on start up, may be called
  618. * repeatedly to change the speed and slave addresses.
  619. */
  620. #ifdef CONFIG_SYS_I2C_EARLY_INIT
  621. void i2c_early_init_f(void);
  622. #endif
  623. void i2c_init(int speed, int slaveaddr);
  624. void i2c_init_board(void);
  625. #ifdef CONFIG_SYS_I2C
  626. /*
  627. * i2c_get_bus_num:
  628. *
  629. * Returns index of currently active I2C bus. Zero-based.
  630. */
  631. unsigned int i2c_get_bus_num(void);
  632. /*
  633. * i2c_set_bus_num:
  634. *
  635. * Change the active I2C bus. Subsequent read/write calls will
  636. * go to this one.
  637. *
  638. * bus - bus index, zero based
  639. *
  640. * Returns: 0 on success, not 0 on failure
  641. *
  642. */
  643. int i2c_set_bus_num(unsigned int bus);
  644. /*
  645. * i2c_init_all():
  646. *
  647. * Initializes all I2C adapters in the system. All i2c_adap structures must
  648. * be initialized beforehead with function pointers and data, including
  649. * speed and slaveaddr. Returns 0 on success, non-0 on failure.
  650. */
  651. void i2c_init_all(void);
  652. /*
  653. * Probe the given I2C chip address. Returns 0 if a chip responded,
  654. * not 0 on failure.
  655. */
  656. int i2c_probe(uint8_t chip);
  657. /*
  658. * Read/Write interface:
  659. * chip: I2C chip address, range 0..127
  660. * addr: Memory (register) address within the chip
  661. * alen: Number of bytes to use for addr (typically 1, 2 for larger
  662. * memories, 0 for register type devices with only one
  663. * register)
  664. * buffer: Where to read/write the data
  665. * len: How many bytes to read/write
  666. *
  667. * Returns: 0 on success, not 0 on failure
  668. */
  669. int i2c_read(uint8_t chip, unsigned int addr, int alen,
  670. uint8_t *buffer, int len);
  671. int i2c_write(uint8_t chip, unsigned int addr, int alen,
  672. uint8_t *buffer, int len);
  673. /*
  674. * Utility routines to read/write registers.
  675. */
  676. uint8_t i2c_reg_read(uint8_t addr, uint8_t reg);
  677. void i2c_reg_write(uint8_t addr, uint8_t reg, uint8_t val);
  678. /*
  679. * i2c_set_bus_speed:
  680. *
  681. * Change the speed of the active I2C bus
  682. *
  683. * speed - bus speed in Hz
  684. *
  685. * Returns: new bus speed
  686. *
  687. */
  688. unsigned int i2c_set_bus_speed(unsigned int speed);
  689. /*
  690. * i2c_get_bus_speed:
  691. *
  692. * Returns speed of currently active I2C bus in Hz
  693. */
  694. unsigned int i2c_get_bus_speed(void);
  695. #else
  696. /*
  697. * Probe the given I2C chip address. Returns 0 if a chip responded,
  698. * not 0 on failure.
  699. */
  700. int i2c_probe(uchar chip);
  701. /*
  702. * Read/Write interface:
  703. * chip: I2C chip address, range 0..127
  704. * addr: Memory (register) address within the chip
  705. * alen: Number of bytes to use for addr (typically 1, 2 for larger
  706. * memories, 0 for register type devices with only one
  707. * register)
  708. * buffer: Where to read/write the data
  709. * len: How many bytes to read/write
  710. *
  711. * Returns: 0 on success, not 0 on failure
  712. */
  713. int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len);
  714. int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len);
  715. /*
  716. * Utility routines to read/write registers.
  717. */
  718. static inline u8 i2c_reg_read(u8 addr, u8 reg)
  719. {
  720. u8 buf;
  721. #ifdef DEBUG
  722. printf("%s: addr=0x%02x, reg=0x%02x\n", __func__, addr, reg);
  723. #endif
  724. i2c_read(addr, reg, 1, &buf, 1);
  725. return buf;
  726. }
  727. static inline void i2c_reg_write(u8 addr, u8 reg, u8 val)
  728. {
  729. #ifdef DEBUG
  730. printf("%s: addr=0x%02x, reg=0x%02x, val=0x%02x\n",
  731. __func__, addr, reg, val);
  732. #endif
  733. i2c_write(addr, reg, 1, &val, 1);
  734. }
  735. /*
  736. * Functions for setting the current I2C bus and its speed
  737. */
  738. /*
  739. * i2c_set_bus_num:
  740. *
  741. * Change the active I2C bus. Subsequent read/write calls will
  742. * go to this one.
  743. *
  744. * bus - bus index, zero based
  745. *
  746. * Returns: 0 on success, not 0 on failure
  747. *
  748. */
  749. int i2c_set_bus_num(unsigned int bus);
  750. /*
  751. * i2c_get_bus_num:
  752. *
  753. * Returns index of currently active I2C bus. Zero-based.
  754. */
  755. unsigned int i2c_get_bus_num(void);
  756. /*
  757. * i2c_set_bus_speed:
  758. *
  759. * Change the speed of the active I2C bus
  760. *
  761. * speed - bus speed in Hz
  762. *
  763. * Returns: 0 on success, not 0 on failure
  764. *
  765. */
  766. int i2c_set_bus_speed(unsigned int);
  767. /*
  768. * i2c_get_bus_speed:
  769. *
  770. * Returns speed of currently active I2C bus in Hz
  771. */
  772. unsigned int i2c_get_bus_speed(void);
  773. #endif /* CONFIG_SYS_I2C */
  774. /*
  775. * only for backwardcompatibility, should go away if we switched
  776. * completely to new multibus support.
  777. */
  778. #if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS)
  779. # if !defined(CONFIG_SYS_MAX_I2C_BUS)
  780. # define CONFIG_SYS_MAX_I2C_BUS 2
  781. # endif
  782. # define I2C_MULTI_BUS 1
  783. #else
  784. # define CONFIG_SYS_MAX_I2C_BUS 1
  785. # define I2C_MULTI_BUS 0
  786. #endif
  787. /* NOTE: These two functions MUST be always_inline to avoid code growth! */
  788. static inline unsigned int I2C_GET_BUS(void) __attribute__((always_inline));
  789. static inline unsigned int I2C_GET_BUS(void)
  790. {
  791. return I2C_MULTI_BUS ? i2c_get_bus_num() : 0;
  792. }
  793. static inline void I2C_SET_BUS(unsigned int bus) __attribute__((always_inline));
  794. static inline void I2C_SET_BUS(unsigned int bus)
  795. {
  796. if (I2C_MULTI_BUS)
  797. i2c_set_bus_num(bus);
  798. }
  799. /* Multi I2C definitions */
  800. enum {
  801. I2C_0, I2C_1, I2C_2, I2C_3, I2C_4, I2C_5, I2C_6, I2C_7,
  802. I2C_8, I2C_9, I2C_10,
  803. };
  804. /**
  805. * Get FDT values for i2c bus.
  806. *
  807. * @param blob Device tree blbo
  808. * @return the number of I2C bus
  809. */
  810. void board_i2c_init(const void *blob);
  811. /**
  812. * Find the I2C bus number by given a FDT I2C node.
  813. *
  814. * @param blob Device tree blbo
  815. * @param node FDT I2C node to find
  816. * @return the number of I2C bus (zero based), or -1 on error
  817. */
  818. int i2c_get_bus_num_fdt(int node);
  819. /**
  820. * Reset the I2C bus represented by the given a FDT I2C node.
  821. *
  822. * @param blob Device tree blbo
  823. * @param node FDT I2C node to find
  824. * @return 0 if port was reset, -1 if not found
  825. */
  826. int i2c_reset_port_fdt(const void *blob, int node);
  827. #endif /* !CONFIG_DM_I2C */
  828. #endif /* _I2C_H_ */