iotrace.c 3.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (c) 2014 Google, Inc.
  4. */
  5. #define IOTRACE_IMPL
  6. #include <common.h>
  7. #include <mapmem.h>
  8. #include <asm/io.h>
  9. DECLARE_GLOBAL_DATA_PTR;
  10. /* Support up to the machine word length for now */
  11. typedef ulong iovalue_t;
  12. enum iotrace_flags {
  13. IOT_8 = 0,
  14. IOT_16,
  15. IOT_32,
  16. IOT_READ = 0 << 3,
  17. IOT_WRITE = 1 << 3,
  18. };
  19. /**
  20. * struct iotrace_record - Holds a single I/O trace record
  21. *
  22. * @flags: I/O access type
  23. * @addr: Address of access
  24. * @value: Value written or read
  25. */
  26. struct iotrace_record {
  27. enum iotrace_flags flags;
  28. phys_addr_t addr;
  29. iovalue_t value;
  30. };
  31. /**
  32. * struct iotrace - current trace status and checksum
  33. *
  34. * @start: Start address of iotrace buffer
  35. * @size: Size of iotrace buffer in bytes
  36. * @offset: Current write offset into iotrace buffer
  37. * @crc32: Current value of CRC chceksum of trace records
  38. * @enabled: true if enabled, false if disabled
  39. */
  40. static struct iotrace {
  41. ulong start;
  42. ulong size;
  43. ulong offset;
  44. u32 crc32;
  45. bool enabled;
  46. } iotrace;
  47. static void add_record(int flags, const void *ptr, ulong value)
  48. {
  49. struct iotrace_record srec, *rec = &srec;
  50. /*
  51. * We don't support iotrace before relocation. Since the trace buffer
  52. * is set up by a command, it can't be enabled at present. To change
  53. * this we would need to set the iotrace buffer at build-time. See
  54. * lib/trace.c for how this might be done if you are interested.
  55. */
  56. if (!(gd->flags & GD_FLG_RELOC) || !iotrace.enabled)
  57. return;
  58. /* Store it if there is room */
  59. if (iotrace.offset + sizeof(*rec) < iotrace.size) {
  60. rec = (struct iotrace_record *)map_sysmem(
  61. iotrace.start + iotrace.offset,
  62. sizeof(value));
  63. }
  64. rec->flags = flags;
  65. rec->addr = map_to_sysmem(ptr);
  66. rec->value = value;
  67. /* Update our checksum */
  68. iotrace.crc32 = crc32(iotrace.crc32, (unsigned char *)rec,
  69. sizeof(*rec));
  70. iotrace.offset += sizeof(struct iotrace_record);
  71. }
  72. u32 iotrace_readl(const void *ptr)
  73. {
  74. u32 v;
  75. v = readl(ptr);
  76. add_record(IOT_32 | IOT_READ, ptr, v);
  77. return v;
  78. }
  79. void iotrace_writel(ulong value, const void *ptr)
  80. {
  81. add_record(IOT_32 | IOT_WRITE, ptr, value);
  82. writel(value, ptr);
  83. }
  84. u16 iotrace_readw(const void *ptr)
  85. {
  86. u32 v;
  87. v = readw(ptr);
  88. add_record(IOT_16 | IOT_READ, ptr, v);
  89. return v;
  90. }
  91. void iotrace_writew(ulong value, const void *ptr)
  92. {
  93. add_record(IOT_16 | IOT_WRITE, ptr, value);
  94. writew(value, ptr);
  95. }
  96. u8 iotrace_readb(const void *ptr)
  97. {
  98. u32 v;
  99. v = readb(ptr);
  100. add_record(IOT_8 | IOT_READ, ptr, v);
  101. return v;
  102. }
  103. void iotrace_writeb(ulong value, const void *ptr)
  104. {
  105. add_record(IOT_8 | IOT_WRITE, ptr, value);
  106. writeb(value, ptr);
  107. }
  108. void iotrace_reset_checksum(void)
  109. {
  110. iotrace.crc32 = 0;
  111. }
  112. u32 iotrace_get_checksum(void)
  113. {
  114. return iotrace.crc32;
  115. }
  116. void iotrace_set_enabled(int enable)
  117. {
  118. iotrace.enabled = enable;
  119. }
  120. int iotrace_get_enabled(void)
  121. {
  122. return iotrace.enabled;
  123. }
  124. void iotrace_set_buffer(ulong start, ulong size)
  125. {
  126. iotrace.start = start;
  127. iotrace.size = size;
  128. iotrace.offset = 0;
  129. iotrace.crc32 = 0;
  130. }
  131. void iotrace_get_buffer(ulong *start, ulong *size, ulong *offset, ulong *count)
  132. {
  133. *start = iotrace.start;
  134. *size = iotrace.size;
  135. *offset = iotrace.offset;
  136. *count = iotrace.offset / sizeof(struct iotrace_record);
  137. }