ehci-rmobile.h 3.6 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * Copyright (C) 2013,2014 Renesas Electronics Corporation
  4. * Copyright (C) 2014 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
  5. */
  6. #ifndef __EHCI_RMOBILE_H__
  7. #define __EHCI_RMOBILE_H__
  8. /* Register offset */
  9. #define OHCI_OFFSET 0x00
  10. #define OHCI_SIZE 0x1000
  11. #define EHCI_OFFSET 0x1000
  12. #define EHCI_SIZE 0x1000
  13. #define EHCI_USBCMD (EHCI_OFFSET + 0x0020)
  14. /* USBCTR */
  15. #define DIRPD (1 << 8)
  16. #define PLL_RST (1 << 2)
  17. #define PCICLK_MASK (1 << 1)
  18. #define USBH_RST (1 << 0)
  19. /* CMND_STS */
  20. #define SERREN (1 << 8)
  21. #define PERREN (1 << 6)
  22. #define MASTEREN (1 << 2)
  23. #define MEMEN (1 << 1)
  24. /* PCIAHB_WIN1_CTR and PCIAHB_WIN2_CTR */
  25. #define PCIAHB_WIN_PREFETCH ((1 << 1)|(1 << 0))
  26. /* AHBPCI_WIN1_CTR */
  27. #define PCIWIN1_PCICMD ((1 << 3)|(1 << 1))
  28. #define AHB_CFG_AHBPCI 0x40000000
  29. #define AHB_CFG_HOST 0x80000000
  30. /* AHBPCI_WIN2_CTR */
  31. #define PCIWIN2_PCICMD ((1 << 2)|(1 << 1))
  32. /* PCI_INT_ENABLE */
  33. #define USBH_PMEEN (1 << 19)
  34. #define USBH_INTBEN (1 << 17)
  35. #define USBH_INTAEN (1 << 16)
  36. /* AHB_BUS_CTR */
  37. #define SMODE_READY_CTR (1 << 17)
  38. #define SMODE_READ_BURST (1 << 16)
  39. #define MMODE_HBUSREQ (1 << 7)
  40. #define MMODE_BOUNDARY ((1 << 6)|(1 << 5))
  41. #define MMODE_BURST_WIDTH ((1 << 4)|(1 << 3))
  42. #define MMODE_SINGLE_MODE ((1 << 4)|(1 << 3))
  43. #define MMODE_WR_INCR (1 << 2)
  44. #define MMODE_BYTE_BURST (1 << 1)
  45. #define MMODE_HTRANS (1 << 0)
  46. /* PCI_ARBITER_CTR */
  47. #define PCIBUS_PARK_TIMER 0x00FF0000
  48. #define PCIBUS_PARK_TIMER_SET 0x00070000
  49. #define PCIBP_MODE (1 << 12)
  50. #define PCIREQ7 (1 << 7)
  51. #define PCIREQ6 (1 << 6)
  52. #define PCIREQ5 (1 << 5)
  53. #define PCIREQ4 (1 << 4)
  54. #define PCIREQ3 (1 << 3)
  55. #define PCIREQ2 (1 << 2)
  56. #define PCIREQ1 (1 << 1)
  57. #define PCIREQ0 (1 << 0)
  58. #define SMSTPCR7 0xE615014C
  59. #define SMSTPCR703 (1 << 3)
  60. /* Init AHB master and slave functions of the host logic */
  61. #define AHB_BUS_CTR_INIT \
  62. (SMODE_READY_CTR | MMODE_HBUSREQ | MMODE_WR_INCR | \
  63. MMODE_BYTE_BURST | MMODE_HTRANS)
  64. #define USBCTR_WIN_SIZE_1GB 0x800
  65. /* PCI Configuration Registers */
  66. #define PCI_CONF_OHCI_OFFSET 0x10000
  67. #define PCI_CONF_EHCI_OFFSET 0x10100
  68. struct ahb_pciconf {
  69. u32 vid_did;
  70. u32 cmnd_sts;
  71. u32 rev;
  72. u32 cache_line;
  73. u32 basead;
  74. };
  75. /* PCI Configuration Registers for AHB-PCI Bridge Registers */
  76. #define PCI_CONF_AHBPCI_OFFSET 0x10000
  77. struct ahbconf_pci_bridge {
  78. u32 vid_did; /* 0x00 */
  79. u32 cmnd_sts;
  80. u32 revid_cc;
  81. u32 cls_lt_ht_bist;
  82. u32 basead; /* 0x10 */
  83. u32 win1_basead;
  84. u32 win2_basead;
  85. u32 dummy0[5];
  86. u32 ssvdi_ssid; /* 0x2C */
  87. u32 dummy1[4];
  88. u32 intr_line_pin;
  89. };
  90. /* AHB-PCI Bridge PCI Communication Registers */
  91. #define AHBPCI_OFFSET 0x10800
  92. struct ahbcom_pci_bridge {
  93. u32 pciahb_win1_ctr; /* 0x00 */
  94. u32 pciahb_win2_ctr;
  95. u32 pciahb_dct_ctr;
  96. u32 dummy0;
  97. u32 ahbpci_win1_ctr; /* 0x10 */
  98. u32 ahbpci_win2_ctr;
  99. u32 dummy1;
  100. u32 ahbpci_dct_ctr;
  101. u32 pci_int_enable; /* 0x20 */
  102. u32 pci_int_status;
  103. u32 dummy2[2];
  104. u32 ahb_bus_ctr; /* 0x30 */
  105. u32 usbctr;
  106. u32 dummy3[2];
  107. u32 pci_arbiter_ctr; /* 0x40 */
  108. u32 dummy4;
  109. u32 pci_unit_rev; /* 0x48 */
  110. };
  111. struct rmobile_ehci_reg {
  112. u32 hciversion; /* hciversion/caplength */
  113. u32 hcsparams; /* hcsparams */
  114. u32 hccparams; /* hccparams */
  115. u32 hcsp_portroute; /* hcsp_portroute */
  116. u32 usbcmd; /* usbcmd */
  117. u32 usbsts; /* usbsts */
  118. u32 usbintr; /* usbintr */
  119. u32 frindex; /* frindex */
  120. u32 ctrldssegment; /* ctrldssegment */
  121. u32 periodiclistbase; /* periodiclistbase */
  122. u32 asynclistaddr; /* asynclistaddr */
  123. u32 dummy[9];
  124. u32 configflag; /* configflag */
  125. u32 portsc; /* portsc */
  126. };
  127. #endif /* __EHCI_RMOBILE_H__ */