ds4510.h 2.5 KB

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  1. /*
  2. * Copyright 2008 Extreme Engineering Solutions, Inc.
  3. *
  4. * This program is free software; you can redistribute it and/or
  5. * modify it under the terms of the GNU General Public License
  6. * Version 2 as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope that it will be useful,
  9. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. *
  13. * You should have received a copy of the GNU General Public License
  14. * along with this program; if not, write to the Free Software
  15. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  16. * MA 02111-1307 USA
  17. */
  18. #ifndef __DS4510_H_
  19. #define __DS4510_H_
  20. /* General defines */
  21. #define DS4510_NUM_IO 0x04
  22. #define DS4510_IO_MASK ((1 << DS4510_NUM_IO) - 1)
  23. #define DS4510_EEPROM_PAGE_WRITE_DELAY_MS 20
  24. /* EEPROM from 0x00 - 0x39 */
  25. #define DS4510_EEPROM 0x00
  26. #define DS4510_EEPROM_SIZE 0x40
  27. #define DS4510_EEPROM_PAGE_SIZE 0x08
  28. #define DS4510_EEPROM_PAGE_OFFSET(x) ((x) & (DS4510_EEPROM_PAGE_SIZE - 1))
  29. /* SEEPROM from 0xf0 - 0xf7 */
  30. #define DS4510_SEEPROM 0xf0
  31. #define DS4510_SEEPROM_SIZE 0x08
  32. /* Registers overlapping SEEPROM from 0xf0 - 0xf7 */
  33. #define DS4510_PULLUP 0xF0
  34. #define DS4510_PULLUP_DIS 0x00
  35. #define DS4510_PULLUP_EN 0x01
  36. #define DS4510_RSTDELAY 0xF1
  37. #define DS4510_RSTDELAY_MASK 0x03
  38. #define DS4510_RSTDELAY_125 0x00
  39. #define DS4510_RSTDELAY_250 0x01
  40. #define DS4510_RSTDELAY_500 0x02
  41. #define DS4510_RSTDELAY_1000 0x03
  42. #define DS4510_IO3 0xF4
  43. #define DS4510_IO2 0xF5
  44. #define DS4510_IO1 0xF6
  45. #define DS4510_IO0 0xF7
  46. /* Status configuration registers from 0xf8 - 0xf9*/
  47. #define DS4510_IO_STATUS 0xF8
  48. #define DS4510_CFG 0xF9
  49. #define DS4510_CFG_READY 0x80
  50. #define DS4510_CFG_TRIP_POINT 0x40
  51. #define DS4510_CFG_RESET 0x20
  52. #define DS4510_CFG_SEE 0x10
  53. #define DS4510_CFG_SWRST 0x08
  54. /* SRAM from 0xfa - 0xff */
  55. #define DS4510_SRAM 0xfa
  56. #define DS4510_SRAM_SIZE 0x06
  57. int ds4510_mem_write(uint8_t chip, int offset, uint8_t *buf, int count);
  58. int ds4510_mem_read(uint8_t chip, int offset, uint8_t *buf, int count);
  59. int ds4510_see_write(uint8_t chip, uint8_t nv);
  60. int ds4510_rstdelay_write(uint8_t chip, uint8_t delay);
  61. int ds4510_pullup_write(uint8_t chip, uint8_t val);
  62. int ds4510_pullup_read(uint8_t chip);
  63. int ds4510_gpio_write(uint8_t chip, uint8_t val);
  64. int ds4510_gpio_read(uint8_t chip);
  65. int ds4510_gpio_read_val(uint8_t chip);
  66. #endif /* __DS4510_H_ */