trizepsiv.h 10 KB

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  1. /*
  2. * (C) Copyright 2007
  3. * Stefano Babic, DENX Gmbh, sbabic@denx.de
  4. *
  5. * (C) Copyright 2004
  6. * Robert Whaley, Applied Data Systems, Inc. rwhaley@applieddata.net
  7. *
  8. * (C) Copyright 2002
  9. * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
  10. *
  11. * (C) Copyright 2002
  12. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  13. * Marius Groeger <mgroeger@sysgo.de>
  14. *
  15. * Configuation settings for the LUBBOCK board.
  16. *
  17. * See file CREDITS for list of people who contributed to this
  18. * project.
  19. *
  20. * This program is free software; you can redistribute it and/or
  21. * modify it under the terms of the GNU General Public License as
  22. * published by the Free Software Foundation; either version 2 of
  23. * the License, or (at your option) any later version.
  24. *
  25. * This program is distributed in the hope that it will be useful,
  26. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  27. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  28. * GNU General Public License for more details.
  29. *
  30. * You should have received a copy of the GNU General Public License
  31. * along with this program; if not, write to the Free Software
  32. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  33. * MA 02111-1307 USA
  34. */
  35. #ifndef __CONFIG_H
  36. #define __CONFIG_H
  37. /*
  38. * High Level Configuration Options
  39. * (easy to change)
  40. */
  41. #define CONFIG_PXA27X 1 /* This is an PXA27x CPU */
  42. #define CONFIG_MMC 1
  43. #define BOARD_LATE_INIT 1
  44. #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
  45. /* we will never enable dcache, because we have to setup MMU first */
  46. #define CONFIG_SYS_NO_DCACHE
  47. #define RTC
  48. /*
  49. * Size of malloc() pool
  50. */
  51. #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
  52. #define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
  53. /*
  54. * Hardware drivers
  55. */
  56. /*
  57. * select serial console configuration
  58. */
  59. #define CONFIG_PXA_SERIAL
  60. #define CONFIG_SERIAL_MULTI
  61. #define CONFIG_FFUART 1 /* we use FFUART on Conxs */
  62. #define CONFIG_BTUART 1 /* we use BTUART on Conxs */
  63. #define CONFIG_STUART 1 /* we use STUART on Conxs */
  64. /* allow to overwrite serial and ethaddr */
  65. #define CONFIG_ENV_OVERWRITE
  66. #define CONFIG_BAUDRATE 38400
  67. #define CONFIG_DOS_PARTITION 1
  68. /*
  69. * Command line configuration.
  70. */
  71. #include <config_cmd_default.h>
  72. #define CONFIG_CMD_FAT
  73. #define CONFIG_CMD_IMLS
  74. #define CONFIG_CMD_PING
  75. #define CONFIG_CMD_USB
  76. /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
  77. #undef CONFIG_SHOW_BOOT_PROGRESS
  78. #define CONFIG_BOOTDELAY 3
  79. #define CONFIG_SERVERIP 192.168.1.99
  80. #define CONFIG_BOOTCOMMAND "run boot_flash"
  81. #define CONFIG_BOOTARGS "console=ttyS0,38400 ramdisk_size=12288"\
  82. " rw root=/dev/ram initrd=0xa0800000,5m"
  83. #define CONFIG_EXTRA_ENV_SETTINGS \
  84. "program_boot_mmc=" \
  85. "mw.b 0xa0010000 0xff 0x20000; " \
  86. "if mmcinit && " \
  87. "fatload mmc 0 0xa0010000 u-boot.bin; " \
  88. "then " \
  89. "protect off 0x0 0x1ffff; " \
  90. "erase 0x0 0x1ffff; " \
  91. "cp.b 0xa0010000 0x0 0x20000; " \
  92. "fi\0" \
  93. "program_uzImage_mmc=" \
  94. "mw.b 0xa0010000 0xff 0x180000; " \
  95. "if mmcinit && " \
  96. "fatload mmc 0 0xa0010000 uzImage; " \
  97. "then " \
  98. "protect off 0x40000 0x1bffff; " \
  99. "erase 0x40000 0x1bffff; " \
  100. "cp.b 0xa0010000 0x40000 0x180000; " \
  101. "fi\0" \
  102. "program_ramdisk_mmc=" \
  103. "mw.b 0xa0010000 0xff 0x500000; " \
  104. "if mmcinit && " \
  105. "fatload mmc 0 0xa0010000 ramdisk.gz; " \
  106. "then " \
  107. "protect off 0x1c0000 0x6bffff; " \
  108. "erase 0x1c0000 0x6bffff; " \
  109. "cp.b 0xa0010000 0x1c0000 0x500000; " \
  110. "fi\0" \
  111. "boot_mmc=" \
  112. "if mmcinit && " \
  113. "fatload mmc 0 0xa0030000 uzImage && " \
  114. "fatload mmc 0 0xa0800000 ramdisk.gz; " \
  115. "then " \
  116. "bootm 0xa0030000; " \
  117. "fi\0" \
  118. "boot_flash=" \
  119. "cp.b 0x1c0000 0xa0800000 0x500000; " \
  120. "bootm 0x40000\0" \
  121. #define CONFIG_SETUP_MEMORY_TAGS 1
  122. #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
  123. /* #define CONFIG_INITRD_TAG 1 */
  124. #if defined(CONFIG_CMD_KGDB)
  125. #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
  126. #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
  127. #endif
  128. /*
  129. * Miscellaneous configurable options
  130. */
  131. #define CONFIG_SYS_HUSH_PARSER 1
  132. #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
  133. #define CONFIG_SYS_LONGHELP /* undef to save memory */
  134. #ifdef CONFIG_SYS_HUSH_PARSER
  135. #define CONFIG_SYS_PROMPT "$ " /* Monitor Command Prompt */
  136. #else
  137. #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
  138. #endif
  139. #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
  140. #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
  141. #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
  142. #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
  143. #define CONFIG_SYS_DEVICE_NULLDEV 1
  144. #define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */
  145. #define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */
  146. #define CONFIG_SYS_LOAD_ADDR 0xa1000000 /* default load address */
  147. #define CONFIG_SYS_HZ 1000
  148. #define CONFIG_SYS_CPUSPEED 0x207 /* need to look more closely, I think this is Turbo = 2x, L=91Mhz */
  149. /* valid baudrates */
  150. #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
  151. #ifdef CONFIG_MMC
  152. #define CONFIG_PXA_MMC
  153. #define CONFIG_CMD_MMC
  154. #define CONFIG_SYS_MMC_BASE 0xF0000000
  155. #endif
  156. /*
  157. * Stack sizes
  158. *
  159. * The stack sizes are set up in start.S using the settings below
  160. */
  161. #define CONFIG_STACKSIZE (128*1024) /* regular stack */
  162. #ifdef CONFIG_USE_IRQ
  163. #define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
  164. #define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
  165. #endif
  166. /*
  167. * Physical Memory Map
  168. */
  169. #define CONFIG_NR_DRAM_BANKS 4 /* we have 2 banks of DRAM */
  170. #define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */
  171. #define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
  172. #define PHYS_SDRAM_2 0xa4000000 /* SDRAM Bank #2 */
  173. #define PHYS_SDRAM_2_SIZE 0x00000000 /* 0 MB */
  174. #define PHYS_SDRAM_3 0xa8000000 /* SDRAM Bank #3 */
  175. #define PHYS_SDRAM_3_SIZE 0x00000000 /* 0 MB */
  176. #define PHYS_SDRAM_4 0xac000000 /* SDRAM Bank #4 */
  177. #define PHYS_SDRAM_4_SIZE 0x00000000 /* 0 MB */
  178. #define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
  179. #define CONFIG_SYS_DRAM_BASE 0xa0000000
  180. #define CONFIG_SYS_DRAM_SIZE 0x04000000
  181. #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
  182. /*
  183. * GPIO settings
  184. */
  185. #define CONFIG_SYS_GPSR0_VAL 0x00018000
  186. #define CONFIG_SYS_GPSR1_VAL 0x00000000
  187. #define CONFIG_SYS_GPSR2_VAL 0x400dc000
  188. #define CONFIG_SYS_GPSR3_VAL 0x00000000
  189. #define CONFIG_SYS_GPCR0_VAL 0x00000000
  190. #define CONFIG_SYS_GPCR1_VAL 0x00000000
  191. #define CONFIG_SYS_GPCR2_VAL 0x00000000
  192. #define CONFIG_SYS_GPCR3_VAL 0x00000000
  193. #define CONFIG_SYS_GPDR0_VAL 0x00018000
  194. #define CONFIG_SYS_GPDR1_VAL 0x00028801
  195. #define CONFIG_SYS_GPDR2_VAL 0x520dc000
  196. #define CONFIG_SYS_GPDR3_VAL 0x0001E000
  197. #define CONFIG_SYS_GAFR0_L_VAL 0x801c0000
  198. #define CONFIG_SYS_GAFR0_U_VAL 0x00000013
  199. #define CONFIG_SYS_GAFR1_L_VAL 0x6990100A
  200. #define CONFIG_SYS_GAFR1_U_VAL 0x00000008
  201. #define CONFIG_SYS_GAFR2_L_VAL 0xA0000000
  202. #define CONFIG_SYS_GAFR2_U_VAL 0x010900F2
  203. #define CONFIG_SYS_GAFR3_L_VAL 0x54000003
  204. #define CONFIG_SYS_GAFR3_U_VAL 0x00002401
  205. #define CONFIG_SYS_GRER0_VAL 0x00000000
  206. #define CONFIG_SYS_GRER1_VAL 0x00000000
  207. #define CONFIG_SYS_GRER2_VAL 0x00000000
  208. #define CONFIG_SYS_GRER3_VAL 0x00000000
  209. #define CONFIG_SYS_GFER1_VAL 0x00000000
  210. #define CONFIG_SYS_GFER3_VAL 0x00000020
  211. #if CONFIG_POLARIS
  212. #define CONFIG_SYS_GFER0_VAL 0x00000001
  213. #define CONFIG_SYS_GFER2_VAL 0x00200000
  214. #else
  215. #define CONFIG_SYS_GFER0_VAL 0x00000000
  216. #define CONFIG_SYS_GFER2_VAL 0x00000000
  217. #endif
  218. #define CONFIG_SYS_PSSR_VAL 0x20 /* CHECK */
  219. /*
  220. * Clock settings
  221. */
  222. #define CONFIG_SYS_CKEN 0x01FFFFFF /* CHECK */
  223. #define CONFIG_SYS_CCCR 0x02000290 /* 520Mhz */
  224. /*
  225. * Memory settings
  226. */
  227. #define CONFIG_SYS_MSC0_VAL 0x4df84df0
  228. #define CONFIG_SYS_MSC1_VAL 0x7ff87ff4
  229. #if CONFIG_POLARIS
  230. #define CONFIG_SYS_MSC2_VAL 0xa2697ff8
  231. #else
  232. #define CONFIG_SYS_MSC2_VAL 0xa26936d4
  233. #endif
  234. #define CONFIG_SYS_MDCNFG_VAL 0x880009C9
  235. #define CONFIG_SYS_MDREFR_VAL 0x20ca201e
  236. #define CONFIG_SYS_MDMRS_VAL 0x00220022
  237. #define CONFIG_SYS_FLYCNFG_VAL 0x00000000
  238. #define CONFIG_SYS_SXCNFG_VAL 0x40044004
  239. /*
  240. * PCMCIA and CF Interfaces
  241. */
  242. #define CONFIG_SYS_MECR_VAL 0x00000001
  243. #define CONFIG_SYS_MCMEM0_VAL 0x00004204
  244. #define CONFIG_SYS_MCMEM1_VAL 0x00010204
  245. #define CONFIG_SYS_MCATT0_VAL 0x00010504
  246. #define CONFIG_SYS_MCATT1_VAL 0x00010504
  247. #define CONFIG_SYS_MCIO0_VAL 0x00008407
  248. #define CONFIG_SYS_MCIO1_VAL 0x0000c108
  249. #define CONFIG_NET_MULTI 1
  250. #define CONFIG_DRIVER_DM9000 1
  251. #if CONFIG_POLARIS
  252. #define CONFIG_DM9000_BASE 0x0C800000
  253. #else
  254. #define CONFIG_DM9000_BASE 0x08000000
  255. #endif
  256. #define DM9000_IO CONFIG_DM9000_BASE
  257. #define DM9000_DATA (CONFIG_DM9000_BASE+0x8004)
  258. #define CONFIG_USB_OHCI_NEW 1
  259. #define CONFIG_SYS_USB_OHCI_BOARD_INIT 1
  260. #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 3
  261. #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x4C000000
  262. #define CONFIG_SYS_USB_OHCI_SLOT_NAME "trizepsiv"
  263. #define CONFIG_USB_STORAGE 1
  264. #define CONFIG_SYS_USB_OHCI_CPU_INIT 1
  265. /*
  266. * FLASH and environment organization
  267. */
  268. #define CONFIG_SYS_FLASH_CFI
  269. #define CONFIG_FLASH_CFI_DRIVER 1
  270. #define CONFIG_SYS_MONITOR_BASE 0
  271. #define CONFIG_SYS_MONITOR_LEN 0x40000
  272. #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
  273. #define CONFIG_SYS_MAX_FLASH_SECT 4 + 255 /* max number of sectors on one chip */
  274. /* timeout values are in ticks */
  275. #define CONFIG_SYS_FLASH_ERASE_TOUT (25*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
  276. #define CONFIG_SYS_FLASH_WRITE_TOUT (25*CONFIG_SYS_HZ) /* Timeout for Flash Write */
  277. /* write flash less slowly */
  278. #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
  279. /* Unlock to be used with Intel chips */
  280. #define CONFIG_SYS_FLASH_PROTECTION 1
  281. /* Flash environment locations */
  282. #define CONFIG_ENV_IS_IN_FLASH 1
  283. #define CONFIG_ENV_ADDR (PHYS_FLASH_1 + CONFIG_SYS_MONITOR_LEN) /* Addr of Environment Sector */
  284. #define CONFIG_ENV_SIZE 0x40000 /* Total Size of Environment */
  285. #define CONFIG_ENV_SECT_SIZE 0x40000 /* Total Size of Environment Sector */
  286. /* Address and size of Redundant Environment Sector */
  287. #define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR+CONFIG_ENV_SECT_SIZE)
  288. #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
  289. #endif /* __CONFIG_H */