ppmc7xx.h 12 KB

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  1. /*
  2. * ppmc7xx.h
  3. * ---------
  4. *
  5. * Wind River PPMC 7xx/74xx board configuration file.
  6. *
  7. * By Richard Danter (richard.danter@windriver.com)
  8. * Copyright (C) 2005 Wind River Systems
  9. */
  10. #ifndef __CONFIG_H
  11. #define __CONFIG_H
  12. #define CONFIG_PPMC7XX
  13. /*===================================================================
  14. *
  15. * User configurable settings - Modify to your preference
  16. *
  17. *===================================================================
  18. */
  19. /*
  20. * Debug
  21. *
  22. * DEBUG - Define this is you want extra debug info
  23. * GTREGREAD - Required to build with debug
  24. * do_bdinfo - Required to build with debug
  25. */
  26. #ifdef DEBUG
  27. #define GTREGREAD(x) 0xFFFFFFFF
  28. #define do_bdinfo(a,b,c,d)
  29. #endif
  30. /*
  31. * CPU type
  32. *
  33. * CONFIG_7xx - We have a 750 or 755 CPU
  34. * CONFIG_74xx - We have a 7400 CPU
  35. * CONFIG_ALTIVEC - We have altivec enabled CPU (only 7400)
  36. * CONFIG_BUS_CLK - System bus clock in Hz
  37. */
  38. #define CONFIG_7xx
  39. #undef CONFIG_74xx
  40. #undef CONFIG_ALTIVEC
  41. #define CONFIG_BUS_CLK 66000000
  42. /*
  43. * Monitor configuration
  44. *
  45. * List of command sets to include in shell
  46. *
  47. * The following command sets have been tested and known to work:
  48. *
  49. * CMD_CACHE - Cache control commands
  50. * CMD_MEMORY - Memory display, change and test commands
  51. * CMD_FLASH - Erase and program flash
  52. * CMD_ENV - Environment commands
  53. * CMD_RUN - Run commands stored in env vars
  54. * CMD_ELF - Load ELF files
  55. * CMD_NET - Networking/file download commands
  56. * CMD_PIN - ICMP Echo Request command
  57. * CMD_PCI - PCI Bus scanning command
  58. */
  59. /*
  60. * BOOTP options
  61. */
  62. #define CONFIG_BOOTP_BOOTFILESIZE
  63. #define CONFIG_BOOTP_BOOTPATH
  64. #define CONFIG_BOOTP_GATEWAY
  65. #define CONFIG_BOOTP_HOSTNAME
  66. /*
  67. * Command line configuration.
  68. */
  69. #include <config_cmd_default.h>
  70. #define CONFIG_CMD_FLASH
  71. #define CONFIG_CMD_SAVEENV
  72. #define CONFIG_CMD_RUN
  73. #define CONFIG_CMD_ELF
  74. #define CONFIG_CMD_NET
  75. #define CONFIG_CMD_PING
  76. #define CONFIG_CMD_PCI
  77. #undef CONFIG_CMD_KGDB
  78. /*
  79. * Serial configuration
  80. *
  81. * CONFIG_CONS_INDEX - Serial console port number (COM1)
  82. * CONFIG_BAUDRATE - Serial speed
  83. */
  84. #define CONFIG_CONS_INDEX 1
  85. #define CONFIG_BAUDRATE 9600
  86. /*
  87. * PCI config
  88. *
  89. * CONFIG_PCI - Enable PCI bus
  90. * CONFIG_PCI_PNP - Enable Plug & Play support
  91. * CONFIG_PCI_SCAN_SHOW - Enable display of devices at startup
  92. */
  93. #define CONFIG_PCI
  94. #define CONFIG_PCI_PNP
  95. #undef CONFIG_PCI_SCAN_SHOW
  96. /*
  97. * Network config
  98. *
  99. * CONFIG_NET_MULTI - Support for multiple network interfaces
  100. * CONFIG_EEPRO100 - Intel 8255x Ethernet Controller
  101. * CONFIG_EEPRO100_SROM_WRITE - Enable writing to network card ROM
  102. */
  103. #define CONFIG_NET_MULTI
  104. #define CONFIG_EEPRO100
  105. #define CONFIG_EEPRO100_SROM_WRITE
  106. /*
  107. * Enable extra init functions
  108. *
  109. * CONFIG_MISC_INIT_F - Call pre-relocation init functions
  110. * CONFIG_MISC_INIT_R - Call post relocation init functions
  111. */
  112. #undef CONFIG_MISC_INIT_F
  113. #define CONFIG_MISC_INIT_R
  114. /*
  115. * Boot config
  116. *
  117. * CONFIG_BOOTCOMMAND - Command(s) to execute to auto-boot
  118. * CONFIG_BOOTDELAY - How long to wait before auto-boot (in sec)
  119. */
  120. #define CONFIG_BOOTCOMMAND \
  121. "bootp;" \
  122. "setenv bootargs root=/dev/nfs rw nfsroot=$(serverip):$(rootpath) " \
  123. "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname)::off;" \
  124. "bootm"
  125. #define CONFIG_BOOTDELAY 5
  126. /*===================================================================
  127. *
  128. * Board configuration settings - You should not need to modify these
  129. *
  130. *===================================================================
  131. */
  132. /*
  133. * Memory map
  134. *
  135. * This board runs in a standard CHRP (Map-B) configuration.
  136. *
  137. * Type Start End Size Width Chip Sel
  138. * ----------- ----------- ----------- ------- ------- --------
  139. * SDRAM 0x00000000 0x04000000 64MB 64b SDRAMCS0
  140. * User LED's 0x78000000 RCS3
  141. * UART 0x7C000000 RCS2
  142. * Mailbox 0xFF000000 RCS1
  143. * Flash 0xFFC00000 0xFFFFFFFF 4MB 64b RCS0
  144. *
  145. * Flash sectors are laid out as follows.
  146. *
  147. * Sector Start End Size Comments
  148. * ------- ----------- ----------- ------- -----------
  149. * 0 0xFFC00000 0xFFC3FFFF 256KB
  150. * 1 0xFFC40000 0xFFC7FFFF 256KB
  151. * 2 0xFFC80000 0xFFCBFFFF 256KB
  152. * 3 0xFFCC0000 0xFFCFFFFF 256KB
  153. * 4 0xFFD00000 0xFFD3FFFF 256KB
  154. * 5 0xFFD40000 0xFFD7FFFF 256KB
  155. * 6 0xFFD80000 0xFFDBFFFF 256KB
  156. * 7 0xFFDC0000 0xFFDFFFFF 256KB
  157. * 8 0xFFE00000 0xFFE3FFFF 256KB
  158. * 9 0xFFE40000 0xFFE7FFFF 256KB
  159. * 10 0xFFE80000 0xFFEBFFFF 256KB
  160. * 11 0xFFEC0000 0xFFEFFFFF 256KB
  161. * 12 0xFFF00000 0xFFF3FFFF 256KB U-Boot code here
  162. * 13 0xFFF40000 0xFFF7FFFF 256KB
  163. * 14 0xFFF80000 0xFFFBFFFF 256KB
  164. * 15 0xFFFC0000 0xFFFDFFFF 128KB
  165. * 16 0xFFFE0000 0xFFFE7FFF 32KB U-Boot env vars here
  166. * 17 0xFFFE8000 0xFFFEFFFF 32KB U-Boot backup copy of env vars here
  167. * 18 0xFFFF0000 0xFFFFFFFF 64KB
  168. */
  169. /*
  170. * SDRAM config - see memory map details above.
  171. *
  172. * CONFIG_SYS_SDRAM_BASE - Start address of SDRAM, this _must_ be zero!
  173. * CONFIG_SYS_SDRAM_SIZE - Total size of contiguous SDRAM bank(s)
  174. */
  175. #define CONFIG_SYS_SDRAM_BASE 0x00000000
  176. #define CONFIG_SYS_SDRAM_SIZE 0x04000000
  177. /*
  178. * Flash config - see memory map details above.
  179. *
  180. * CONFIG_SYS_FLASH_BASE - Start address of flash memory
  181. * CONFIG_SYS_FLASH_SIZE - Total size of contiguous flash mem
  182. * CONFIG_SYS_FLASH_ERASE_TOUT - Erase timeout in ms
  183. * CONFIG_SYS_FLASH_WRITE_TOUT - Write timeout in ms
  184. * CONFIG_SYS_MAX_FLASH_BANKS - Number of banks of flash on board
  185. * CONFIG_SYS_MAX_FLASH_SECT - Number of sectors in a bank
  186. */
  187. #define CONFIG_SYS_FLASH_BASE 0xFFC00000
  188. #define CONFIG_SYS_FLASH_SIZE 0x00400000
  189. #define CONFIG_SYS_FLASH_ERASE_TOUT 250000
  190. #define CONFIG_SYS_FLASH_WRITE_TOUT 5000
  191. #define CONFIG_SYS_MAX_FLASH_BANKS 1
  192. #define CONFIG_SYS_MAX_FLASH_SECT 19
  193. /*
  194. * Monitor config - see memory map details above
  195. *
  196. * CONFIG_SYS_MONITOR_BASE - Base address of monitor code
  197. * CONFIG_SYS_MALLOC_LEN - Size of malloc pool (128KB)
  198. */
  199. #define CONFIG_SYS_MONITOR_BASE TEXT_BASE
  200. #define CONFIG_SYS_MALLOC_LEN 0x20000
  201. /*
  202. * Command shell settings
  203. *
  204. * CONFIG_SYS_BARGSIZE - Boot Argument buffer size
  205. * CONFIG_SYS_BOOTMAPSZ - Size of app's mapped RAM at boot (Linux=8MB)
  206. * CONFIG_SYS_CBSIZE - Console Buffer (input) size
  207. * CONFIG_SYS_LOAD_ADDR - Default load address
  208. * CONFIG_SYS_LONGHELP - Provide more detailed help
  209. * CONFIG_SYS_MAXARGS - Number of args accepted by monitor commands
  210. * CONFIG_SYS_MEMTEST_START - Start address of test to run on RAM
  211. * CONFIG_SYS_MEMTEST_END - End address of RAM test
  212. * CONFIG_SYS_PBSIZE - Print Buffer (output) size
  213. * CONFIG_SYS_PROMPT - Prompt string
  214. */
  215. #define CONFIG_SYS_BARGSIZE 1024
  216. #define CONFIG_SYS_BOOTMAPSZ 0x800000
  217. #define CONFIG_SYS_CBSIZE 1024
  218. #define CONFIG_SYS_LOAD_ADDR 0x100000
  219. #define CONFIG_SYS_LONGHELP
  220. #define CONFIG_SYS_MAXARGS 16
  221. #define CONFIG_SYS_MEMTEST_START 0x00040000
  222. #define CONFIG_SYS_MEMTEST_END 0x00040100
  223. #define CONFIG_SYS_PBSIZE 1024
  224. #define CONFIG_SYS_PROMPT "=> "
  225. /*
  226. * Environment config - see memory map details above
  227. *
  228. * CONFIG_ENV_IS_IN_FLASH - The env variables are stored in flash
  229. * CONFIG_ENV_ADDR - Address of the sector containing env vars
  230. * CONFIG_ENV_SIZE - Ammount of RAM for env vars (used to save RAM, 4KB)
  231. * CONFIG_ENV_SECT_SIZE - Size of sector containing env vars (32KB)
  232. */
  233. #define CONFIG_ENV_IS_IN_FLASH 1
  234. #define CONFIG_ENV_ADDR 0xFFFE0000
  235. #define CONFIG_ENV_SIZE 0x1000
  236. #define CONFIG_ENV_ADDR_REDUND 0xFFFE8000
  237. #define CONFIG_ENV_SIZE_REDUND 0x1000
  238. #define CONFIG_ENV_SECT_SIZE 0x8000
  239. /*
  240. * Initial RAM config
  241. *
  242. * Since the main system RAM is initialised very early, we place the INIT_RAM
  243. * in the main system RAM just above the exception vectors. The contents are
  244. * copied to top of RAM by the init code.
  245. *
  246. * CONFIG_SYS_INIT_RAM_ADDR - Address of Init RAM, above exception vect
  247. * CONFIG_SYS_INIT_RAM_END - Size of Init RAM
  248. * CONFIG_SYS_GBL_DATA_SIZE - Ammount of RAM to reserve for global data
  249. * CONFIG_SYS_GBL_DATA_OFFSET - Start of global data, top of stack
  250. */
  251. #define CONFIG_SYS_INIT_RAM_ADDR (CONFIG_SYS_SDRAM_BASE + 0x4000)
  252. #define CONFIG_SYS_INIT_RAM_END 0x4000
  253. #define CONFIG_SYS_GBL_DATA_SIZE 128
  254. #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
  255. /*
  256. * Initial BAT config
  257. *
  258. * BAT0 - System SDRAM
  259. * BAT1 - LED's and Serial Port
  260. * BAT2 - PCI Memory
  261. * BAT3 - PCI I/O including Flash Memory
  262. */
  263. #define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE)
  264. #define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE | BATU_BL_64M | BATU_VS | BATU_VP)
  265. #define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L
  266. #define CONFIG_SYS_DBAT0U CONFIG_SYS_IBAT0U
  267. #define CONFIG_SYS_IBAT1L (0x70000000 | BATL_PP_RW | BATL_CACHEINHIBIT)
  268. #define CONFIG_SYS_IBAT1U (0x70000000 | BATU_BL_256M | BATU_VS | BATU_VP)
  269. #define CONFIG_SYS_DBAT1L (0x70000000 | BATL_PP_RW | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
  270. #define CONFIG_SYS_DBAT1U (0x70000000 | BATU_BL_256M | BATU_VS | BATU_VP)
  271. #define CONFIG_SYS_IBAT2L (0x80000000 | BATL_PP_RW | BATL_CACHEINHIBIT)
  272. #define CONFIG_SYS_IBAT2U (0x80000000 | BATU_BL_256M | BATU_VS | BATU_VP)
  273. #define CONFIG_SYS_DBAT2L (0x80000000 | BATL_PP_RW | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
  274. #define CONFIG_SYS_DBAT2U (0x80000000 | BATU_BL_256M | BATU_VS | BATU_VP)
  275. #define CONFIG_SYS_IBAT3L (0xF0000000 | BATL_PP_RW | BATL_CACHEINHIBIT)
  276. #define CONFIG_SYS_IBAT3U (0xF0000000 | BATU_BL_256M | BATU_VS | BATU_VP)
  277. #define CONFIG_SYS_DBAT3L (0xF0000000 | BATL_PP_RW | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
  278. #define CONFIG_SYS_DBAT3U (0xF0000000 | BATU_BL_256M | BATU_VS | BATU_VP)
  279. /*
  280. * Cache config
  281. *
  282. * CONFIG_SYS_CACHELINE_SIZE - Size of a cache line (CPU specific)
  283. * CONFIG_SYS_L2 - L2 cache enabled if defined
  284. * L2_INIT - L2 cache init flags
  285. * L2_ENABLE - L2 cache enable flags
  286. */
  287. #define CONFIG_SYS_CACHELINE_SIZE 32
  288. #undef CONFIG_SYS_L2
  289. #define L2_INIT 0
  290. #define L2_ENABLE 0
  291. /*
  292. * Clocks config
  293. *
  294. * CONFIG_SYS_BUS_CLK - Bus clock frequency in Hz
  295. * CONFIG_SYS_HZ - Decrementer freq in Hz
  296. */
  297. #define CONFIG_SYS_BUS_CLK CONFIG_BUS_CLK
  298. #define CONFIG_SYS_HZ 1000
  299. /*
  300. * Serial port config
  301. *
  302. * CONFIG_SYS_BAUDRATE_TABLE - List of valid baud rates
  303. * CONFIG_SYS_NS16550 - Include the NS16550 driver
  304. * CONFIG_SYS_NS16550_SERIAL - Include the serial (wrapper) driver
  305. * CONFIG_SYS_NS16550_CLK - Frequency of reference clock
  306. * CONFIG_SYS_NS16550_REG_SIZE - 64-bit accesses to 8-bit port
  307. * CONFIG_SYS_NS16550_COM1 - Base address of 1st serial port
  308. */
  309. #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
  310. #define CONFIG_SYS_NS16550
  311. #define CONFIG_SYS_NS16550_SERIAL
  312. #define CONFIG_SYS_NS16550_CLK 3686400
  313. #define CONFIG_SYS_NS16550_REG_SIZE -8
  314. #define CONFIG_SYS_NS16550_COM1 0x7C000000
  315. /*
  316. * PCI Config - Address Map B (CHRP)
  317. */
  318. #define CONFIG_SYS_PCI_MEMORY_BUS 0x00000000
  319. #define CONFIG_SYS_PCI_MEMORY_PHYS 0x00000000
  320. #define CONFIG_SYS_PCI_MEMORY_SIZE 0x40000000
  321. #define CONFIG_SYS_PCI_MEM_BUS 0x80000000
  322. #define CONFIG_SYS_PCI_MEM_PHYS 0x80000000
  323. #define CONFIG_SYS_PCI_MEM_SIZE 0x7D000000
  324. #define CONFIG_SYS_ISA_MEM_BUS 0x00000000
  325. #define CONFIG_SYS_ISA_MEM_PHYS 0xFD000000
  326. #define CONFIG_SYS_ISA_MEM_SIZE 0x01000000
  327. #define CONFIG_SYS_PCI_IO_BUS 0x00800000
  328. #define CONFIG_SYS_PCI_IO_PHYS 0xFE800000
  329. #define CONFIG_SYS_PCI_IO_SIZE 0x00400000
  330. #define CONFIG_SYS_ISA_IO_BUS 0x00000000
  331. #define CONFIG_SYS_ISA_IO_PHYS 0xFE000000
  332. #define CONFIG_SYS_ISA_IO_SIZE 0x00800000
  333. #define CONFIG_SYS_ISA_IO_BASE_ADDRESS CONFIG_SYS_ISA_IO_PHYS
  334. #define CONFIG_SYS_ISA_IO CONFIG_SYS_ISA_IO_PHYS
  335. #define CONFIG_SYS_60X_PCI_IO_OFFSET CONFIG_SYS_ISA_IO_PHYS
  336. /*
  337. * Extra init functions
  338. *
  339. * CONFIG_SYS_BOARD_ASM_INIT - Call assembly init code
  340. */
  341. #define CONFIG_SYS_BOARD_ASM_INIT
  342. /*
  343. * Boot flags
  344. *
  345. * BOOTFLAG_COLD - Indicates a power-on boot
  346. * BOOTFLAG_WARM - Indicates a software reset
  347. */
  348. #define BOOTFLAG_COLD 0x01
  349. #define BOOTFLAG_WARM 0x02
  350. #endif /* __CONFIG_H */