EB+MCF-EV123.h 9.5 KB

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  1. /*
  2. * Configuation settings for the BuS EB+MCF-EV123 boards.
  3. *
  4. * (C) Copyright 2005-2009 BuS Elektronik GmbH & Co.KG <esw@bus-elektonik.de>
  5. *
  6. * See file CREDITS for list of people who contributed to this
  7. * project.
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License as
  11. * published by the Free Software Foundation; either version 2 of
  12. * the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  22. * MA 02111-1307 USA
  23. */
  24. #ifndef _CONFIG_EB_MCF_EV123_H_
  25. #define _CONFIG_EB_MCF_EV123_H_
  26. #undef CONFIG_SYS_HALT_BEFOR_RAM_JUMP
  27. /*----------------------------------------------------------------------*
  28. * High Level Configuration Options (easy to change) *
  29. *----------------------------------------------------------------------*/
  30. #define CONFIG_MCF52x2 /* define processor family */
  31. #define CONFIG_M5282 /* define processor type */
  32. #define CONFIG_EB_MCF_EV123
  33. #define CONFIG_MISC_INIT_R
  34. #define CONFIG_MCFUART
  35. #define CONFIG_SYS_UART_PORT (0)
  36. #define CONFIG_BAUDRATE 9600
  37. #define CONFIG_SYS_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
  38. #undef CONFIG_MONITOR_IS_IN_RAM /* starts uboot direct */
  39. #define CONFIG_BOOTCOMMAND "printenv"
  40. /*----------------------------------------------------------------------*
  41. * Options *
  42. *----------------------------------------------------------------------*/
  43. #define CONFIG_BOOT_RETRY_TIME -1
  44. #define CONFIG_RESET_TO_RETRY
  45. #define CONFIG_SPLASH_SCREEN
  46. /*----------------------------------------------------------------------*
  47. * Configuration for environment *
  48. * Environment is in the second sector of the first 256k of flash *
  49. *----------------------------------------------------------------------*/
  50. #ifndef CONFIG_MONITOR_IS_IN_RAM
  51. #define CONFIG_ENV_ADDR 0xF003C000 /* End of 256K */
  52. #define CONFIG_ENV_SECT_SIZE 0x4000
  53. #define CONFIG_ENV_IS_IN_FLASH 1
  54. #else
  55. #define CONFIG_ENV_ADDR 0xFFE04000
  56. #define CONFIG_ENV_SECT_SIZE 0x2000
  57. #define CONFIG_ENV_IS_IN_FLASH 1
  58. #endif
  59. /*
  60. * BOOTP options
  61. */
  62. #define CONFIG_BOOTP_BOOTFILESIZE
  63. #define CONFIG_BOOTP_BOOTPATH
  64. #define CONFIG_BOOTP_GATEWAY
  65. #define CONFIG_BOOTP_HOSTNAME
  66. /*
  67. * Command line configuration.
  68. */
  69. #include <config_cmd_default.h>
  70. #undef CONFIG_CMD_LOADB
  71. #define CONFIG_CMD_MII
  72. #define CONFIG_CMD_NET
  73. #define CONFIG_MCFTMR
  74. #define CONFIG_BOOTDELAY 5
  75. #define CONFIG_HUSH_PARSER
  76. #define CONFIG_SYS_PROMPT "\nEV123 U-Boot> "
  77. #define CONFIG_SYS_LONGHELP 1
  78. #if defined(CONFIG_CMD_KGDB)
  79. #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
  80. #else
  81. #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
  82. #endif
  83. #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
  84. #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
  85. #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
  86. #define CONFIG_SYS_LOAD_ADDR 0x20000
  87. #define CONFIG_SYS_MEMTEST_START 0x100000
  88. #define CONFIG_SYS_MEMTEST_END 0x400000
  89. /*#define CONFIG_SYS_DRAM_TEST 1 */
  90. #undef CONFIG_SYS_DRAM_TEST
  91. /*----------------------------------------------------------------------*
  92. * Clock and PLL Configuration *
  93. *----------------------------------------------------------------------*/
  94. #define CONFIG_SYS_HZ 10000000
  95. #define CONFIG_SYS_CLK 58982400 /* 9,8304MHz * 6 */
  96. /* PLL Configuration: Ext Clock * 6 (see table 9-4 of MCF user manual) */
  97. #define CONFIG_SYS_MFD 0x01 /* PLL Multiplication Factor Devider */
  98. #define CONFIG_SYS_RFD 0x00 /* PLL Reduce Frecuency Devider */
  99. /*----------------------------------------------------------------------*
  100. * Network *
  101. *----------------------------------------------------------------------*/
  102. #define CONFIG_MCFFEC
  103. #define CONFIG_NET_MULTI 1
  104. #define CONFIG_MII 1
  105. #define CONFIG_MII_INIT 1
  106. #define CONFIG_SYS_DISCOVER_PHY
  107. #define CONFIG_SYS_RX_ETH_BUFFER 8
  108. #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
  109. #define CONFIG_SYS_FEC0_PINMUX 0
  110. #define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE
  111. #define MCFFEC_TOUT_LOOP 50000
  112. #define CONFIG_ETHADDR 00:CF:52:82:EB:01
  113. #define CONFIG_OVERWRITE_ETHADDR_ONCE
  114. /*-------------------------------------------------------------------------
  115. * Low Level Configuration Settings
  116. * (address mappings, register initial values, etc.)
  117. * You should know what you are doing if you make changes here.
  118. *-----------------------------------------------------------------------*/
  119. #define CONFIG_SYS_MBAR 0x40000000
  120. /*-----------------------------------------------------------------------
  121. * Definitions for initial stack pointer and data area (in DPRAM)
  122. *-----------------------------------------------------------------------*/
  123. #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000
  124. #define CONFIG_SYS_INIT_RAM_END 0x10000
  125. #define CONFIG_SYS_GBL_DATA_SIZE 64
  126. #define CONFIG_SYS_GBL_DATA_OFFSET \
  127. (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
  128. #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
  129. /*-----------------------------------------------------------------------
  130. * Start addresses for the final memory configuration
  131. * (Set up by the startup code)
  132. * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
  133. */
  134. #define CONFIG_SYS_SDRAM_BASE1 0x00000000
  135. #define CONFIG_SYS_SDRAM_SIZE1 16 /* SDRAM size in MB */
  136. #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_SDRAM_BASE1
  137. #define CONFIG_SYS_SDRAM_SIZE CONFIG_SYS_SDRAM_SIZE1
  138. /* If M5282 port is fully implemented the monitor base will be behind
  139. * the vector table. */
  140. #if (TEXT_BASE != CONFIG_SYS_INT_FLASH_BASE)
  141. #define CONFIG_SYS_MONITOR_BASE (TEXT_BASE + 0x400)
  142. #else
  143. #define CONFIG_SYS_MONITOR_BASE (TEXT_BASE + 0x418) /* 24 Byte for CFM-Config */
  144. #endif
  145. #define CONFIG_SYS_MONITOR_LEN 0x20000
  146. #define CONFIG_SYS_MALLOC_LEN (256 << 10)
  147. #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024
  148. /*
  149. * For booting Linux, the board info and command line data
  150. * have to be in the first 8 MB of memory, since this is
  151. * the maximum mapped by the Linux kernel during initialization ??
  152. */
  153. #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
  154. /*-----------------------------------------------------------------------
  155. * FLASH organization
  156. */
  157. #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE
  158. #define CONFIG_SYS_INT_FLASH_BASE 0xF0000000
  159. #define CONFIG_SYS_INT_FLASH_ENABLE 0x21
  160. #define CONFIG_SYS_MAX_FLASH_SECT 35
  161. #define CONFIG_SYS_MAX_FLASH_BANKS 2
  162. #define CONFIG_SYS_FLASH_ERASE_TOUT 10000000
  163. #define CONFIG_SYS_FLASH_PROTECTION
  164. /*-----------------------------------------------------------------------
  165. * Cache Configuration
  166. */
  167. #define CONFIG_SYS_CACHELINE_SIZE 16
  168. #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
  169. CONFIG_SYS_INIT_RAM_END - 8)
  170. #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
  171. CONFIG_SYS_INIT_RAM_END - 4)
  172. #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV + CF_CACR_DCM)
  173. #define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \
  174. CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
  175. CF_ACR_EN | CF_ACR_SM_ALL)
  176. #define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_DISD | \
  177. CF_CACR_CEIB | CF_CACR_DBWE | \
  178. CF_CACR_EUSP)
  179. /*-----------------------------------------------------------------------
  180. * Memory bank definitions
  181. */
  182. #define CONFIG_SYS_CS0_BASE 0xFFE00000
  183. #define CONFIG_SYS_CS0_CTRL 0x00001980
  184. #define CONFIG_SYS_CS0_MASK 0x001F0001
  185. #define CONFIG_SYS_CS3_BASE 0xE0000000
  186. #define CONFIG_SYS_CS0_CTRL 0x00001980
  187. #define CONFIG_SYS_CS3_MASK 0x000F0001
  188. /*-----------------------------------------------------------------------
  189. * Port configuration
  190. */
  191. #define CONFIG_SYS_PACNT 0x0000000 /* Port A D[31:24] */
  192. #define CONFIG_SYS_PADDR 0x0000000
  193. #define CONFIG_SYS_PADAT 0x0000000
  194. #define CONFIG_SYS_PBCNT 0x0000000 /* Port B D[23:16] */
  195. #define CONFIG_SYS_PBDDR 0x0000000
  196. #define CONFIG_SYS_PBDAT 0x0000000
  197. #define CONFIG_SYS_PCCNT 0x0000000 /* Port C D[15:08] */
  198. #define CONFIG_SYS_PCDDR 0x0000000
  199. #define CONFIG_SYS_PCDAT 0x0000000
  200. #define CONFIG_SYS_PDCNT 0x0000000 /* Port D D[07:00] */
  201. #define CONFIG_SYS_PCDDR 0x0000000
  202. #define CONFIG_SYS_PCDAT 0x0000000
  203. #define CONFIG_SYS_PEHLPAR 0xC0
  204. #define CONFIG_SYS_PUAPAR 0x0F
  205. #define CONFIG_SYS_DDRUA 0x05
  206. #define CONFIG_SYS_PJPAR 0xFF
  207. /*-----------------------------------------------------------------------
  208. * VIDEO configuration
  209. */
  210. #define CONFIG_VIDEO
  211. #ifdef CONFIG_VIDEO
  212. #define CONFIG_VIDEO_VCXK 1
  213. #define CONFIG_SYS_VCXK_DEFAULT_LINEALIGN 2
  214. #define CONFIG_SYS_VCXK_DOUBLEBUFFERED 1
  215. #define CONFIG_SYS_VCXK_BASE CONFIG_SYS_CS3_BASE
  216. #define CONFIG_SYS_VCXK_AUTODETECT 1
  217. #define CONFIG_SYS_VCXK_ACKNOWLEDGE_PORT MCFGPTB_GPTPORT
  218. #define CONFIG_SYS_VCXK_ACKNOWLEDGE_DDR MCFGPTB_GPTDDR
  219. #define CONFIG_SYS_VCXK_ACKNOWLEDGE_PIN 0x0001
  220. #define CONFIG_SYS_VCXK_ENABLE_PORT MCFGPTB_GPTPORT
  221. #define CONFIG_SYS_VCXK_ENABLE_DDR MCFGPTB_GPTDDR
  222. #define CONFIG_SYS_VCXK_ENABLE_PIN 0x0002
  223. #define CONFIG_SYS_VCXK_REQUEST_PORT MCFGPTB_GPTPORT
  224. #define CONFIG_SYS_VCXK_REQUEST_DDR MCFGPTB_GPTDDR
  225. #define CONFIG_SYS_VCXK_REQUEST_PIN 0x0004
  226. #define CONFIG_SYS_VCXK_INVERT_PORT MCFGPIO_PORTE
  227. #define CONFIG_SYS_VCXK_INVERT_DDR MCFGPIO_DDRE
  228. #define CONFIG_SYS_VCXK_INVERT_PIN MCFGPIO_PORT2
  229. #endif /* CONFIG_VIDEO */
  230. #endif /* _CONFIG_M5282EVB_H */
  231. /*---------------------------------------------------------------------*/