Makefile.build 14 KB

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  1. # ==========================================================================
  2. # Building
  3. # ==========================================================================
  4. #
  5. # SPDX-License-Identifier: GPL-2.0
  6. #
  7. # Modified for U-Boot
  8. prefix := tpl
  9. src := $(patsubst $(prefix)/%,%,$(obj))
  10. ifeq ($(obj),$(src))
  11. prefix := spl
  12. src := $(patsubst $(prefix)/%,%,$(obj))
  13. ifeq ($(obj),$(src))
  14. prefix := .
  15. endif
  16. endif
  17. PHONY := __build
  18. __build:
  19. # Init all relevant variables used in kbuild files so
  20. # 1) they have correct type
  21. # 2) they do not inherit any value from the environment
  22. obj-y :=
  23. obj-m :=
  24. lib-y :=
  25. lib-m :=
  26. always :=
  27. targets :=
  28. subdir-y :=
  29. subdir-m :=
  30. EXTRA_AFLAGS :=
  31. EXTRA_CFLAGS :=
  32. EXTRA_CPPFLAGS :=
  33. EXTRA_LDFLAGS :=
  34. asflags-y :=
  35. ccflags-y :=
  36. cppflags-y :=
  37. ldflags-y :=
  38. subdir-asflags-y :=
  39. subdir-ccflags-y :=
  40. # Read auto.conf if it exists, otherwise ignore
  41. # Modified for U-Boot
  42. -include include/config/auto.conf
  43. -include $(prefix)/include/autoconf.mk
  44. include scripts/Makefile.uncmd_spl
  45. include scripts/Kbuild.include
  46. # For backward compatibility check that these variables do not change
  47. save-cflags := $(CFLAGS)
  48. # The filename Kbuild has precedence over Makefile
  49. kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
  50. kbuild-file := $(if $(wildcard $(kbuild-dir)/Kbuild),$(kbuild-dir)/Kbuild,$(kbuild-dir)/Makefile)
  51. include $(kbuild-file)
  52. # Added for U-Boot
  53. asflags-y += $(PLATFORM_CPPFLAGS)
  54. ccflags-y += $(PLATFORM_CPPFLAGS)
  55. cppflags-y += $(PLATFORM_CPPFLAGS)
  56. # If the save-* variables changed error out
  57. ifeq ($(KBUILD_NOPEDANTIC),)
  58. ifneq ("$(save-cflags)","$(CFLAGS)")
  59. $(error CFLAGS was changed in "$(kbuild-file)". Fix it to use ccflags-y)
  60. endif
  61. endif
  62. include scripts/Makefile.lib
  63. ifdef host-progs
  64. ifneq ($(hostprogs-y),$(host-progs))
  65. $(warning kbuild: $(obj)/Makefile - Usage of host-progs is deprecated. Please replace with hostprogs-y!)
  66. hostprogs-y += $(host-progs)
  67. endif
  68. endif
  69. # Do not include host rules unless needed
  70. ifneq ($(hostprogs-y)$(hostprogs-m),)
  71. include scripts/Makefile.host
  72. endif
  73. # Uncommented for U-Boot
  74. # We need to create output dicrectory for SPL and TPL even for in-tree build
  75. #ifneq ($(KBUILD_SRC),)
  76. # Create output directory if not already present
  77. _dummy := $(shell [ -d $(obj) ] || mkdir -p $(obj))
  78. # Create directories for object files if directory does not exist
  79. # Needed when obj-y := dir/file.o syntax is used
  80. _dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d)))
  81. #endif
  82. ifndef obj
  83. $(warning kbuild: Makefile.build is included improperly)
  84. endif
  85. # ===========================================================================
  86. ifneq ($(strip $(lib-y) $(lib-m) $(lib-)),)
  87. lib-target := $(obj)/lib.a
  88. endif
  89. ifneq ($(strip $(obj-y) $(obj-m) $(obj-) $(subdir-m) $(lib-target)),)
  90. builtin-target := $(obj)/built-in.o
  91. endif
  92. modorder-target := $(obj)/modules.order
  93. # We keep a list of all modules in $(MODVERDIR)
  94. __build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
  95. $(if $(KBUILD_MODULES),$(obj-m) $(modorder-target)) \
  96. $(subdir-ym) $(always)
  97. @:
  98. # Linus' kernel sanity checking tool
  99. ifneq ($(KBUILD_CHECKSRC),0)
  100. ifeq ($(KBUILD_CHECKSRC),2)
  101. quiet_cmd_force_checksrc = CHECK $<
  102. cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
  103. else
  104. quiet_cmd_checksrc = CHECK $<
  105. cmd_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
  106. endif
  107. endif
  108. # Do section mismatch analysis for each module/built-in.o
  109. ifdef CONFIG_DEBUG_SECTION_MISMATCH
  110. cmd_secanalysis = ; scripts/mod/modpost $@
  111. endif
  112. # Compile C sources (.c)
  113. # ---------------------------------------------------------------------------
  114. # Default is built-in, unless we know otherwise
  115. modkern_cflags = \
  116. $(if $(part-of-module), \
  117. $(KBUILD_CFLAGS_MODULE) $(CFLAGS_MODULE), \
  118. $(KBUILD_CFLAGS_KERNEL) $(CFLAGS_KERNEL))
  119. quiet_modtag := $(empty) $(empty)
  120. $(real-objs-m) : part-of-module := y
  121. $(real-objs-m:.o=.i) : part-of-module := y
  122. $(real-objs-m:.o=.s) : part-of-module := y
  123. $(real-objs-m:.o=.lst): part-of-module := y
  124. $(real-objs-m) : quiet_modtag := [M]
  125. $(real-objs-m:.o=.i) : quiet_modtag := [M]
  126. $(real-objs-m:.o=.s) : quiet_modtag := [M]
  127. $(real-objs-m:.o=.lst): quiet_modtag := [M]
  128. $(obj-m) : quiet_modtag := [M]
  129. # Default for not multi-part modules
  130. modname = $(basetarget)
  131. $(multi-objs-m) : modname = $(modname-multi)
  132. $(multi-objs-m:.o=.i) : modname = $(modname-multi)
  133. $(multi-objs-m:.o=.s) : modname = $(modname-multi)
  134. $(multi-objs-m:.o=.lst) : modname = $(modname-multi)
  135. $(multi-objs-y) : modname = $(modname-multi)
  136. $(multi-objs-y:.o=.i) : modname = $(modname-multi)
  137. $(multi-objs-y:.o=.s) : modname = $(modname-multi)
  138. $(multi-objs-y:.o=.lst) : modname = $(modname-multi)
  139. quiet_cmd_cc_s_c = CC $(quiet_modtag) $@
  140. cmd_cc_s_c = $(CC) $(c_flags) $(DISABLE_LTO) -fverbose-asm -S -o $@ $<
  141. $(obj)/%.s: $(src)/%.c FORCE
  142. $(call if_changed_dep,cc_s_c)
  143. quiet_cmd_cc_i_c = CPP $(quiet_modtag) $@
  144. cmd_cc_i_c = $(CPP) $(c_flags) -o $@ $<
  145. $(obj)/%.i: $(src)/%.c FORCE
  146. $(call if_changed_dep,cc_i_c)
  147. cmd_gensymtypes = \
  148. $(CPP) -D__GENKSYMS__ $(c_flags) $< | \
  149. $(GENKSYMS) $(if $(1), -T $(2)) \
  150. $(patsubst y,-s _,$(CONFIG_HAVE_UNDERSCORE_SYMBOL_PREFIX)) \
  151. $(if $(KBUILD_PRESERVE),-p) \
  152. -r $(firstword $(wildcard $(2:.symtypes=.symref) /dev/null))
  153. quiet_cmd_cc_symtypes_c = SYM $(quiet_modtag) $@
  154. cmd_cc_symtypes_c = \
  155. set -e; \
  156. $(call cmd_gensymtypes,true,$@) >/dev/null; \
  157. test -s $@ || rm -f $@
  158. $(obj)/%.symtypes : $(src)/%.c FORCE
  159. $(call cmd,cc_symtypes_c)
  160. # C (.c) files
  161. # The C file is compiled and updated dependency information is generated.
  162. # (See cmd_cc_o_c + relevant part of rule_cc_o_c)
  163. quiet_cmd_cc_o_c = CC $(quiet_modtag) $@
  164. ifndef CONFIG_MODVERSIONS
  165. cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
  166. else
  167. # When module versioning is enabled the following steps are executed:
  168. # o compile a .tmp_<file>.o from <file>.c
  169. # o if .tmp_<file>.o doesn't contain a __ksymtab version, i.e. does
  170. # not export symbols, we just rename .tmp_<file>.o to <file>.o and
  171. # are done.
  172. # o otherwise, we calculate symbol versions using the good old
  173. # genksyms on the preprocessed source and postprocess them in a way
  174. # that they are usable as a linker script
  175. # o generate <file>.o from .tmp_<file>.o using the linker to
  176. # replace the unresolved symbols __crc_exported_symbol with
  177. # the actual value of the checksum generated by genksyms
  178. cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $<
  179. cmd_modversions = \
  180. if $(OBJDUMP) -h $(@D)/.tmp_$(@F) | grep -q __ksymtab; then \
  181. $(call cmd_gensymtypes,$(KBUILD_SYMTYPES),$(@:.o=.symtypes)) \
  182. > $(@D)/.tmp_$(@F:.o=.ver); \
  183. \
  184. $(LD) $(LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F) \
  185. -T $(@D)/.tmp_$(@F:.o=.ver); \
  186. rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver); \
  187. else \
  188. mv -f $(@D)/.tmp_$(@F) $@; \
  189. fi;
  190. endif
  191. ifdef CONFIG_FTRACE_MCOUNT_RECORD
  192. ifdef BUILD_C_RECORDMCOUNT
  193. ifeq ("$(origin RECORDMCOUNT_WARN)", "command line")
  194. RECORDMCOUNT_FLAGS = -w
  195. endif
  196. # Due to recursion, we must skip empty.o.
  197. # The empty.o file is created in the make process in order to determine
  198. # the target endianness and word size. It is made before all other C
  199. # files, including recordmcount.
  200. sub_cmd_record_mcount = \
  201. if [ $(@) != "scripts/mod/empty.o" ]; then \
  202. $(objtree)/scripts/recordmcount $(RECORDMCOUNT_FLAGS) "$(@)"; \
  203. fi;
  204. recordmcount_source := $(srctree)/scripts/recordmcount.c \
  205. $(srctree)/scripts/recordmcount.h
  206. else
  207. sub_cmd_record_mcount = set -e ; perl $(srctree)/scripts/recordmcount.pl "$(ARCH)" \
  208. "$(if $(CONFIG_CPU_BIG_ENDIAN),big,little)" \
  209. "$(if $(CONFIG_64BIT),64,32)" \
  210. "$(OBJDUMP)" "$(OBJCOPY)" "$(CC) $(KBUILD_CFLAGS)" \
  211. "$(LD)" "$(NM)" "$(RM)" "$(MV)" \
  212. "$(if $(part-of-module),1,0)" "$(@)";
  213. recordmcount_source := $(srctree)/scripts/recordmcount.pl
  214. endif
  215. cmd_record_mcount = \
  216. if [ "$(findstring $(CC_FLAGS_FTRACE),$(_c_flags))" = \
  217. "$(CC_FLAGS_FTRACE)" ]; then \
  218. $(sub_cmd_record_mcount) \
  219. fi;
  220. endif
  221. define rule_cc_o_c
  222. $(call echo-cmd,checksrc) $(cmd_checksrc) \
  223. $(call echo-cmd,cc_o_c) $(cmd_cc_o_c); \
  224. $(cmd_modversions) \
  225. $(call echo-cmd,record_mcount) \
  226. $(cmd_record_mcount) \
  227. scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,cc_o_c)' > \
  228. $(dot-target).tmp; \
  229. rm -f $(depfile); \
  230. mv -f $(dot-target).tmp $(dot-target).cmd
  231. endef
  232. # Built-in and composite module parts
  233. $(obj)/%.o: $(src)/%.c $(recordmcount_source) FORCE
  234. $(call cmd,force_checksrc)
  235. $(call if_changed_rule,cc_o_c)
  236. # Single-part modules are special since we need to mark them in $(MODVERDIR)
  237. $(single-used-m): $(obj)/%.o: $(src)/%.c $(recordmcount_source) FORCE
  238. $(call cmd,force_checksrc)
  239. $(call if_changed_rule,cc_o_c)
  240. @{ echo $(@:.o=.ko); echo $@; } > $(MODVERDIR)/$(@F:.o=.mod)
  241. quiet_cmd_cc_lst_c = MKLST $@
  242. cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \
  243. $(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \
  244. System.map $(OBJDUMP) > $@
  245. $(obj)/%.lst: $(src)/%.c FORCE
  246. $(call if_changed_dep,cc_lst_c)
  247. # Compile assembler sources (.S)
  248. # ---------------------------------------------------------------------------
  249. modkern_aflags := $(KBUILD_AFLAGS_KERNEL) $(AFLAGS_KERNEL)
  250. $(real-objs-m) : modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
  251. $(real-objs-m:.o=.s): modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
  252. quiet_cmd_as_s_S = CPP $(quiet_modtag) $@
  253. cmd_as_s_S = $(CPP) $(a_flags) -o $@ $<
  254. $(obj)/%.s: $(src)/%.S FORCE
  255. $(call if_changed_dep,as_s_S)
  256. quiet_cmd_as_o_S = AS $(quiet_modtag) $@
  257. cmd_as_o_S = $(CC) $(a_flags) -c -o $@ $<
  258. $(obj)/%.o: $(src)/%.S FORCE
  259. $(call if_changed_dep,as_o_S)
  260. targets += $(real-objs-y) $(real-objs-m) $(lib-y)
  261. targets += $(extra-y) $(MAKECMDGOALS) $(always)
  262. # Linker scripts preprocessor (.lds.S -> .lds)
  263. # ---------------------------------------------------------------------------
  264. quiet_cmd_cpp_lds_S = LDS $@
  265. cmd_cpp_lds_S = $(CPP) $(cpp_flags) -P -C -U$(ARCH) \
  266. -D__ASSEMBLY__ -DLINKER_SCRIPT -o $@ $<
  267. $(obj)/%.lds: $(src)/%.lds.S FORCE
  268. $(call if_changed_dep,cpp_lds_S)
  269. # ASN.1 grammar
  270. # ---------------------------------------------------------------------------
  271. quiet_cmd_asn1_compiler = ASN.1 $@
  272. cmd_asn1_compiler = $(objtree)/scripts/asn1_compiler $< \
  273. $(subst .h,.c,$@) $(subst .c,.h,$@)
  274. .PRECIOUS: $(objtree)/$(obj)/%-asn1.c $(objtree)/$(obj)/%-asn1.h
  275. $(obj)/%-asn1.c $(obj)/%-asn1.h: $(src)/%.asn1 $(objtree)/scripts/asn1_compiler
  276. $(call cmd,asn1_compiler)
  277. # Build the compiled-in targets
  278. # ---------------------------------------------------------------------------
  279. # To build objects in subdirs, we need to descend into the directories
  280. $(sort $(subdir-obj-y)): $(subdir-ym) ;
  281. #
  282. # Rule to compile a set of .o files into one .o file
  283. #
  284. ifdef builtin-target
  285. quiet_cmd_link_o_target = LD $@
  286. # If the list of objects to link is empty, just create an empty built-in.o
  287. cmd_link_o_target = $(if $(strip $(obj-y)),\
  288. $(LD) $(ld_flags) -r -o $@ $(filter $(obj-y), $^) \
  289. $(cmd_secanalysis),\
  290. rm -f $@; $(AR) rcs$(KBUILD_ARFLAGS) $@)
  291. $(builtin-target): $(obj-y) FORCE
  292. $(call if_changed,link_o_target)
  293. targets += $(builtin-target)
  294. endif # builtin-target
  295. #
  296. # Rule to create modules.order file
  297. #
  298. # Create commands to either record .ko file or cat modules.order from
  299. # a subdirectory
  300. modorder-cmds = \
  301. $(foreach m, $(modorder), \
  302. $(if $(filter %/modules.order, $m), \
  303. cat $m;, echo kernel/$m;))
  304. $(modorder-target): $(subdir-ym) FORCE
  305. $(Q)(cat /dev/null; $(modorder-cmds)) > $@
  306. #
  307. # Rule to compile a set of .o files into one .a file
  308. #
  309. ifdef lib-target
  310. quiet_cmd_link_l_target = AR $@
  311. cmd_link_l_target = rm -f $@; $(AR) rcs$(KBUILD_ARFLAGS) $@ $(lib-y)
  312. $(lib-target): $(lib-y) FORCE
  313. $(call if_changed,link_l_target)
  314. targets += $(lib-target)
  315. endif
  316. #
  317. # Rule to link composite objects
  318. #
  319. # Composite objects are specified in kbuild makefile as follows:
  320. # <composite-object>-objs := <list of .o files>
  321. # or
  322. # <composite-object>-y := <list of .o files>
  323. link_multi_deps = \
  324. $(filter $(addprefix $(obj)/, \
  325. $($(subst $(obj)/,,$(@:.o=-objs))) \
  326. $($(subst $(obj)/,,$(@:.o=-y)))), $^)
  327. quiet_cmd_link_multi-y = LD $@
  328. cmd_link_multi-y = $(LD) $(ld_flags) -r -o $@ $(link_multi_deps) $(cmd_secanalysis)
  329. quiet_cmd_link_multi-m = LD [M] $@
  330. cmd_link_multi-m = $(cmd_link_multi-y)
  331. $(multi-used-y): FORCE
  332. $(call if_changed,link_multi-y)
  333. $(call multi_depend, $(multi-used-y), .o, -objs -y)
  334. $(multi-used-m): FORCE
  335. $(call if_changed,link_multi-m)
  336. @{ echo $(@:.o=.ko); echo $(link_multi_deps); } > $(MODVERDIR)/$(@F:.o=.mod)
  337. $(call multi_depend, $(multi-used-m), .o, -objs -y)
  338. targets += $(multi-used-y) $(multi-used-m)
  339. # Descending
  340. # ---------------------------------------------------------------------------
  341. PHONY += $(subdir-ym)
  342. $(subdir-ym):
  343. $(Q)$(MAKE) $(build)=$@
  344. # Add FORCE to the prequisites of a target to force it to be always rebuilt.
  345. # ---------------------------------------------------------------------------
  346. PHONY += FORCE
  347. FORCE:
  348. # Read all saved command lines and dependencies for the $(targets) we
  349. # may be building above, using $(if_changed{,_dep}). As an
  350. # optimization, we don't need to read them if the target does not
  351. # exist, we will rebuild anyway in that case.
  352. targets := $(wildcard $(sort $(targets)))
  353. cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))
  354. ifneq ($(cmd_files),)
  355. include $(cmd_files)
  356. endif
  357. # Declare the contents of the .PHONY variable as phony. We keep that
  358. # information in a variable se we can use it in if_changed and friends.
  359. .PHONY: $(PHONY)