cfi_flash.c 64 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2002-2004
  4. * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
  5. *
  6. * Copyright (C) 2003 Arabella Software Ltd.
  7. * Yuli Barcohen <yuli@arabellasw.com>
  8. *
  9. * Copyright (C) 2004
  10. * Ed Okerson
  11. *
  12. * Copyright (C) 2006
  13. * Tolunay Orkun <listmember@orkun.us>
  14. */
  15. /* The DEBUG define must be before common to enable debugging */
  16. /* #define DEBUG */
  17. #include <common.h>
  18. #include <console.h>
  19. #include <dm.h>
  20. #include <env.h>
  21. #include <errno.h>
  22. #include <fdt_support.h>
  23. #include <asm/processor.h>
  24. #include <asm/io.h>
  25. #include <asm/byteorder.h>
  26. #include <asm/unaligned.h>
  27. #include <env_internal.h>
  28. #include <mtd/cfi_flash.h>
  29. #include <watchdog.h>
  30. /*
  31. * This file implements a Common Flash Interface (CFI) driver for
  32. * U-Boot.
  33. *
  34. * The width of the port and the width of the chips are determined at
  35. * initialization. These widths are used to calculate the address for
  36. * access CFI data structures.
  37. *
  38. * References
  39. * JEDEC Standard JESD68 - Common Flash Interface (CFI)
  40. * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
  41. * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
  42. * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
  43. * AMD CFI Specification, Release 2.0 December 1, 2001
  44. * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
  45. * Device IDs, Publication Number 25538 Revision A, November 8, 2001
  46. *
  47. * Define CONFIG_SYS_WRITE_SWAPPED_DATA, if you have to swap the Bytes between
  48. * reading and writing ... (yes there is such a Hardware).
  49. */
  50. DECLARE_GLOBAL_DATA_PTR;
  51. static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT };
  52. #ifdef CONFIG_FLASH_CFI_MTD
  53. static uint flash_verbose = 1;
  54. #else
  55. #define flash_verbose 1
  56. #endif
  57. flash_info_t flash_info[CFI_MAX_FLASH_BANKS]; /* FLASH chips info */
  58. /*
  59. * Check if chip width is defined. If not, start detecting with 8bit.
  60. */
  61. #ifndef CONFIG_SYS_FLASH_CFI_WIDTH
  62. #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
  63. #endif
  64. #ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
  65. #define __maybe_weak __weak
  66. #else
  67. #define __maybe_weak static
  68. #endif
  69. /*
  70. * 0xffff is an undefined value for the configuration register. When
  71. * this value is returned, the configuration register shall not be
  72. * written at all (default mode).
  73. */
  74. static u16 cfi_flash_config_reg(int i)
  75. {
  76. #ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
  77. return ((u16 [])CONFIG_SYS_CFI_FLASH_CONFIG_REGS)[i];
  78. #else
  79. return 0xffff;
  80. #endif
  81. }
  82. #if defined(CONFIG_SYS_MAX_FLASH_BANKS_DETECT)
  83. int cfi_flash_num_flash_banks = CONFIG_SYS_MAX_FLASH_BANKS_DETECT;
  84. #else
  85. int cfi_flash_num_flash_banks;
  86. #endif
  87. #ifdef CONFIG_CFI_FLASH /* for driver model */
  88. static void cfi_flash_init_dm(void)
  89. {
  90. struct udevice *dev;
  91. cfi_flash_num_flash_banks = 0;
  92. /*
  93. * The uclass_first_device() will probe the first device and
  94. * uclass_next_device() will probe the rest if they exist. So
  95. * that cfi_flash_probe() will get called assigning the base
  96. * addresses that are available.
  97. */
  98. for (uclass_first_device(UCLASS_MTD, &dev);
  99. dev;
  100. uclass_next_device(&dev)) {
  101. }
  102. }
  103. phys_addr_t cfi_flash_bank_addr(int i)
  104. {
  105. return flash_info[i].base;
  106. }
  107. #else
  108. __weak phys_addr_t cfi_flash_bank_addr(int i)
  109. {
  110. return ((phys_addr_t [])CONFIG_SYS_FLASH_BANKS_LIST)[i];
  111. }
  112. #endif
  113. __weak unsigned long cfi_flash_bank_size(int i)
  114. {
  115. #ifdef CONFIG_SYS_FLASH_BANKS_SIZES
  116. return ((unsigned long [])CONFIG_SYS_FLASH_BANKS_SIZES)[i];
  117. #else
  118. return 0;
  119. #endif
  120. }
  121. __maybe_weak void flash_write8(u8 value, void *addr)
  122. {
  123. __raw_writeb(value, addr);
  124. }
  125. __maybe_weak void flash_write16(u16 value, void *addr)
  126. {
  127. __raw_writew(value, addr);
  128. }
  129. __maybe_weak void flash_write32(u32 value, void *addr)
  130. {
  131. __raw_writel(value, addr);
  132. }
  133. __maybe_weak void flash_write64(u64 value, void *addr)
  134. {
  135. /* No architectures currently implement __raw_writeq() */
  136. *(volatile u64 *)addr = value;
  137. }
  138. __maybe_weak u8 flash_read8(void *addr)
  139. {
  140. return __raw_readb(addr);
  141. }
  142. __maybe_weak u16 flash_read16(void *addr)
  143. {
  144. return __raw_readw(addr);
  145. }
  146. __maybe_weak u32 flash_read32(void *addr)
  147. {
  148. return __raw_readl(addr);
  149. }
  150. __maybe_weak u64 flash_read64(void *addr)
  151. {
  152. /* No architectures currently implement __raw_readq() */
  153. return *(volatile u64 *)addr;
  154. }
  155. /*-----------------------------------------------------------------------
  156. */
  157. #if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || \
  158. (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE)
  159. static flash_info_t *flash_get_info(ulong base)
  160. {
  161. int i;
  162. flash_info_t *info;
  163. for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
  164. info = &flash_info[i];
  165. if (info->size && info->start[0] <= base &&
  166. base <= info->start[0] + info->size - 1)
  167. return info;
  168. }
  169. return NULL;
  170. }
  171. #endif
  172. unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect)
  173. {
  174. if (sect != (info->sector_count - 1))
  175. return info->start[sect + 1] - info->start[sect];
  176. else
  177. return info->start[0] + info->size - info->start[sect];
  178. }
  179. /*-----------------------------------------------------------------------
  180. * create an address based on the offset and the port width
  181. */
  182. static inline void *
  183. flash_map(flash_info_t *info, flash_sect_t sect, uint offset)
  184. {
  185. unsigned int byte_offset = offset * info->portwidth;
  186. return (void *)(info->start[sect] + byte_offset);
  187. }
  188. static inline void flash_unmap(flash_info_t *info, flash_sect_t sect,
  189. unsigned int offset, void *addr)
  190. {
  191. }
  192. /*-----------------------------------------------------------------------
  193. * make a proper sized command based on the port and chip widths
  194. */
  195. static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf)
  196. {
  197. int i;
  198. int cword_offset;
  199. int cp_offset;
  200. #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  201. u32 cmd_le = cpu_to_le32(cmd);
  202. #endif
  203. uchar val;
  204. uchar *cp = (uchar *) cmdbuf;
  205. for (i = info->portwidth; i > 0; i--) {
  206. cword_offset = (info->portwidth - i) % info->chipwidth;
  207. #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  208. cp_offset = info->portwidth - i;
  209. val = *((uchar *)&cmd_le + cword_offset);
  210. #else
  211. cp_offset = i - 1;
  212. val = *((uchar *)&cmd + sizeof(u32) - cword_offset - 1);
  213. #endif
  214. cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val;
  215. }
  216. }
  217. #ifdef DEBUG
  218. /*-----------------------------------------------------------------------
  219. * Debug support
  220. */
  221. static void print_longlong(char *str, unsigned long long data)
  222. {
  223. int i;
  224. char *cp;
  225. cp = (char *)&data;
  226. for (i = 0; i < 8; i++)
  227. sprintf(&str[i * 2], "%2.2x", *cp++);
  228. }
  229. static void flash_printqry(struct cfi_qry *qry)
  230. {
  231. u8 *p = (u8 *)qry;
  232. int x, y;
  233. for (x = 0; x < sizeof(struct cfi_qry); x += 16) {
  234. debug("%02x : ", x);
  235. for (y = 0; y < 16; y++)
  236. debug("%2.2x ", p[x + y]);
  237. debug(" ");
  238. for (y = 0; y < 16; y++) {
  239. unsigned char c = p[x + y];
  240. if (c >= 0x20 && c <= 0x7e)
  241. debug("%c", c);
  242. else
  243. debug(".");
  244. }
  245. debug("\n");
  246. }
  247. }
  248. #endif
  249. /*-----------------------------------------------------------------------
  250. * read a character at a port width address
  251. */
  252. static inline uchar flash_read_uchar(flash_info_t *info, uint offset)
  253. {
  254. uchar *cp;
  255. uchar retval;
  256. cp = flash_map(info, 0, offset);
  257. #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  258. retval = flash_read8(cp);
  259. #else
  260. retval = flash_read8(cp + info->portwidth - 1);
  261. #endif
  262. flash_unmap(info, 0, offset, cp);
  263. return retval;
  264. }
  265. /*-----------------------------------------------------------------------
  266. * read a word at a port width address, assume 16bit bus
  267. */
  268. static inline ushort flash_read_word(flash_info_t *info, uint offset)
  269. {
  270. ushort *addr, retval;
  271. addr = flash_map(info, 0, offset);
  272. retval = flash_read16(addr);
  273. flash_unmap(info, 0, offset, addr);
  274. return retval;
  275. }
  276. /*-----------------------------------------------------------------------
  277. * read a long word by picking the least significant byte of each maximum
  278. * port size word. Swap for ppc format.
  279. */
  280. static ulong flash_read_long (flash_info_t *info, flash_sect_t sect,
  281. uint offset)
  282. {
  283. uchar *addr;
  284. ulong retval;
  285. #ifdef DEBUG
  286. int x;
  287. #endif
  288. addr = flash_map(info, sect, offset);
  289. #ifdef DEBUG
  290. debug("long addr is at %p info->portwidth = %d\n", addr,
  291. info->portwidth);
  292. for (x = 0; x < 4 * info->portwidth; x++)
  293. debug("addr[%x] = 0x%x\n", x, flash_read8(addr + x));
  294. #endif
  295. #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  296. retval = ((flash_read8(addr) << 16) |
  297. (flash_read8(addr + info->portwidth) << 24) |
  298. (flash_read8(addr + 2 * info->portwidth)) |
  299. (flash_read8(addr + 3 * info->portwidth) << 8));
  300. #else
  301. retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) |
  302. (flash_read8(addr + info->portwidth - 1) << 16) |
  303. (flash_read8(addr + 4 * info->portwidth - 1) << 8) |
  304. (flash_read8(addr + 3 * info->portwidth - 1)));
  305. #endif
  306. flash_unmap(info, sect, offset, addr);
  307. return retval;
  308. }
  309. /*
  310. * Write a proper sized command to the correct address
  311. */
  312. static void flash_write_cmd(flash_info_t *info, flash_sect_t sect,
  313. uint offset, u32 cmd)
  314. {
  315. void *addr;
  316. cfiword_t cword;
  317. addr = flash_map(info, sect, offset);
  318. flash_make_cmd(info, cmd, &cword);
  319. switch (info->portwidth) {
  320. case FLASH_CFI_8BIT:
  321. debug("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd,
  322. cword.w8, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  323. flash_write8(cword.w8, addr);
  324. break;
  325. case FLASH_CFI_16BIT:
  326. debug("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr,
  327. cmd, cword.w16,
  328. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  329. flash_write16(cword.w16, addr);
  330. break;
  331. case FLASH_CFI_32BIT:
  332. debug("fwc addr %p cmd %x %8.8x 32bit x %d bit\n", addr,
  333. cmd, cword.w32,
  334. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  335. flash_write32(cword.w32, addr);
  336. break;
  337. case FLASH_CFI_64BIT:
  338. #ifdef DEBUG
  339. {
  340. char str[20];
  341. print_longlong(str, cword.w64);
  342. debug("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
  343. addr, cmd, str,
  344. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  345. }
  346. #endif
  347. flash_write64(cword.w64, addr);
  348. break;
  349. }
  350. /* Ensure all the instructions are fully finished */
  351. sync();
  352. flash_unmap(info, sect, offset, addr);
  353. }
  354. static void flash_unlock_seq(flash_info_t *info, flash_sect_t sect)
  355. {
  356. flash_write_cmd(info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START);
  357. flash_write_cmd(info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK);
  358. }
  359. /*-----------------------------------------------------------------------
  360. */
  361. static int flash_isequal(flash_info_t *info, flash_sect_t sect, uint offset,
  362. uchar cmd)
  363. {
  364. void *addr;
  365. cfiword_t cword;
  366. int retval;
  367. addr = flash_map(info, sect, offset);
  368. flash_make_cmd(info, cmd, &cword);
  369. debug("is= cmd %x(%c) addr %p ", cmd, cmd, addr);
  370. switch (info->portwidth) {
  371. case FLASH_CFI_8BIT:
  372. debug("is= %x %x\n", flash_read8(addr), cword.w8);
  373. retval = (flash_read8(addr) == cword.w8);
  374. break;
  375. case FLASH_CFI_16BIT:
  376. debug("is= %4.4x %4.4x\n", flash_read16(addr), cword.w16);
  377. retval = (flash_read16(addr) == cword.w16);
  378. break;
  379. case FLASH_CFI_32BIT:
  380. debug("is= %8.8x %8.8x\n", flash_read32(addr), cword.w32);
  381. retval = (flash_read32(addr) == cword.w32);
  382. break;
  383. case FLASH_CFI_64BIT:
  384. #ifdef DEBUG
  385. {
  386. char str1[20];
  387. char str2[20];
  388. print_longlong(str1, flash_read64(addr));
  389. print_longlong(str2, cword.w64);
  390. debug("is= %s %s\n", str1, str2);
  391. }
  392. #endif
  393. retval = (flash_read64(addr) == cword.w64);
  394. break;
  395. default:
  396. retval = 0;
  397. break;
  398. }
  399. flash_unmap(info, sect, offset, addr);
  400. return retval;
  401. }
  402. /*-----------------------------------------------------------------------
  403. */
  404. static int flash_isset(flash_info_t *info, flash_sect_t sect, uint offset,
  405. uchar cmd)
  406. {
  407. void *addr;
  408. cfiword_t cword;
  409. int retval;
  410. addr = flash_map(info, sect, offset);
  411. flash_make_cmd(info, cmd, &cword);
  412. switch (info->portwidth) {
  413. case FLASH_CFI_8BIT:
  414. retval = ((flash_read8(addr) & cword.w8) == cword.w8);
  415. break;
  416. case FLASH_CFI_16BIT:
  417. retval = ((flash_read16(addr) & cword.w16) == cword.w16);
  418. break;
  419. case FLASH_CFI_32BIT:
  420. retval = ((flash_read32(addr) & cword.w32) == cword.w32);
  421. break;
  422. case FLASH_CFI_64BIT:
  423. retval = ((flash_read64(addr) & cword.w64) == cword.w64);
  424. break;
  425. default:
  426. retval = 0;
  427. break;
  428. }
  429. flash_unmap(info, sect, offset, addr);
  430. return retval;
  431. }
  432. /*-----------------------------------------------------------------------
  433. */
  434. static int flash_toggle(flash_info_t *info, flash_sect_t sect, uint offset,
  435. uchar cmd)
  436. {
  437. u8 *addr;
  438. cfiword_t cword;
  439. int retval;
  440. addr = flash_map(info, sect, offset);
  441. flash_make_cmd(info, cmd, &cword);
  442. switch (info->portwidth) {
  443. case FLASH_CFI_8BIT:
  444. retval = flash_read8(addr) != flash_read8(addr);
  445. break;
  446. case FLASH_CFI_16BIT:
  447. retval = flash_read16(addr) != flash_read16(addr);
  448. break;
  449. case FLASH_CFI_32BIT:
  450. retval = flash_read32(addr) != flash_read32(addr);
  451. break;
  452. case FLASH_CFI_64BIT:
  453. retval = ((flash_read32(addr) != flash_read32(addr)) ||
  454. (flash_read32(addr + 4) != flash_read32(addr + 4)));
  455. break;
  456. default:
  457. retval = 0;
  458. break;
  459. }
  460. flash_unmap(info, sect, offset, addr);
  461. return retval;
  462. }
  463. /*
  464. * flash_is_busy - check to see if the flash is busy
  465. *
  466. * This routine checks the status of the chip and returns true if the
  467. * chip is busy.
  468. */
  469. static int flash_is_busy(flash_info_t *info, flash_sect_t sect)
  470. {
  471. int retval;
  472. switch (info->vendor) {
  473. case CFI_CMDSET_INTEL_PROG_REGIONS:
  474. case CFI_CMDSET_INTEL_STANDARD:
  475. case CFI_CMDSET_INTEL_EXTENDED:
  476. retval = !flash_isset(info, sect, 0, FLASH_STATUS_DONE);
  477. break;
  478. case CFI_CMDSET_AMD_STANDARD:
  479. case CFI_CMDSET_AMD_EXTENDED:
  480. #ifdef CONFIG_FLASH_CFI_LEGACY
  481. case CFI_CMDSET_AMD_LEGACY:
  482. #endif
  483. if (info->sr_supported) {
  484. flash_write_cmd(info, sect, info->addr_unlock1,
  485. FLASH_CMD_READ_STATUS);
  486. retval = !flash_isset(info, sect, 0,
  487. FLASH_STATUS_DONE);
  488. } else {
  489. retval = flash_toggle(info, sect, 0,
  490. AMD_STATUS_TOGGLE);
  491. }
  492. break;
  493. default:
  494. retval = 0;
  495. }
  496. debug("%s: %d\n", __func__, retval);
  497. return retval;
  498. }
  499. /*-----------------------------------------------------------------------
  500. * wait for XSR.7 to be set. Time out with an error if it does not.
  501. * This routine does not set the flash to read-array mode.
  502. */
  503. static int flash_status_check(flash_info_t *info, flash_sect_t sector,
  504. ulong tout, char *prompt)
  505. {
  506. ulong start;
  507. #if CONFIG_SYS_HZ != 1000
  508. /* Avoid overflow for large HZ */
  509. if ((ulong)CONFIG_SYS_HZ > 100000)
  510. tout *= (ulong)CONFIG_SYS_HZ / 1000;
  511. else
  512. tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
  513. #endif
  514. /* Wait for command completion */
  515. #ifdef CONFIG_SYS_LOW_RES_TIMER
  516. reset_timer();
  517. #endif
  518. start = get_timer(0);
  519. WATCHDOG_RESET();
  520. while (flash_is_busy(info, sector)) {
  521. if (get_timer(start) > tout) {
  522. printf("Flash %s timeout at address %lx data %lx\n",
  523. prompt, info->start[sector],
  524. flash_read_long(info, sector, 0));
  525. flash_write_cmd(info, sector, 0, info->cmd_reset);
  526. udelay(1);
  527. return ERR_TIMEOUT;
  528. }
  529. udelay(1); /* also triggers watchdog */
  530. }
  531. return ERR_OK;
  532. }
  533. /*-----------------------------------------------------------------------
  534. * Wait for XSR.7 to be set, if it times out print an error, otherwise
  535. * do a full status check.
  536. *
  537. * This routine sets the flash to read-array mode.
  538. */
  539. static int flash_full_status_check(flash_info_t *info, flash_sect_t sector,
  540. ulong tout, char *prompt)
  541. {
  542. int retcode;
  543. retcode = flash_status_check(info, sector, tout, prompt);
  544. switch (info->vendor) {
  545. case CFI_CMDSET_INTEL_PROG_REGIONS:
  546. case CFI_CMDSET_INTEL_EXTENDED:
  547. case CFI_CMDSET_INTEL_STANDARD:
  548. if (retcode == ERR_OK &&
  549. !flash_isset(info, sector, 0, FLASH_STATUS_DONE)) {
  550. retcode = ERR_INVAL;
  551. printf("Flash %s error at address %lx\n", prompt,
  552. info->start[sector]);
  553. if (flash_isset(info, sector, 0, FLASH_STATUS_ECLBS |
  554. FLASH_STATUS_PSLBS)) {
  555. puts("Command Sequence Error.\n");
  556. } else if (flash_isset(info, sector, 0,
  557. FLASH_STATUS_ECLBS)) {
  558. puts("Block Erase Error.\n");
  559. retcode = ERR_NOT_ERASED;
  560. } else if (flash_isset(info, sector, 0,
  561. FLASH_STATUS_PSLBS)) {
  562. puts("Locking Error\n");
  563. }
  564. if (flash_isset(info, sector, 0, FLASH_STATUS_DPS)) {
  565. puts("Block locked.\n");
  566. retcode = ERR_PROTECTED;
  567. }
  568. if (flash_isset(info, sector, 0, FLASH_STATUS_VPENS))
  569. puts("Vpp Low Error.\n");
  570. }
  571. flash_write_cmd(info, sector, 0, info->cmd_reset);
  572. udelay(1);
  573. break;
  574. default:
  575. break;
  576. }
  577. return retcode;
  578. }
  579. static int use_flash_status_poll(flash_info_t *info)
  580. {
  581. #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
  582. if (info->vendor == CFI_CMDSET_AMD_EXTENDED ||
  583. info->vendor == CFI_CMDSET_AMD_STANDARD)
  584. return 1;
  585. #endif
  586. return 0;
  587. }
  588. static int flash_status_poll(flash_info_t *info, void *src, void *dst,
  589. ulong tout, char *prompt)
  590. {
  591. #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
  592. ulong start;
  593. int ready;
  594. #if CONFIG_SYS_HZ != 1000
  595. /* Avoid overflow for large HZ */
  596. if ((ulong)CONFIG_SYS_HZ > 100000)
  597. tout *= (ulong)CONFIG_SYS_HZ / 1000;
  598. else
  599. tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
  600. #endif
  601. /* Wait for command completion */
  602. #ifdef CONFIG_SYS_LOW_RES_TIMER
  603. reset_timer();
  604. #endif
  605. start = get_timer(0);
  606. WATCHDOG_RESET();
  607. while (1) {
  608. switch (info->portwidth) {
  609. case FLASH_CFI_8BIT:
  610. ready = flash_read8(dst) == flash_read8(src);
  611. break;
  612. case FLASH_CFI_16BIT:
  613. ready = flash_read16(dst) == flash_read16(src);
  614. break;
  615. case FLASH_CFI_32BIT:
  616. ready = flash_read32(dst) == flash_read32(src);
  617. break;
  618. case FLASH_CFI_64BIT:
  619. ready = flash_read64(dst) == flash_read64(src);
  620. break;
  621. default:
  622. ready = 0;
  623. break;
  624. }
  625. if (ready)
  626. break;
  627. if (get_timer(start) > tout) {
  628. printf("Flash %s timeout at address %lx data %lx\n",
  629. prompt, (ulong)dst, (ulong)flash_read8(dst));
  630. return ERR_TIMEOUT;
  631. }
  632. udelay(1); /* also triggers watchdog */
  633. }
  634. #endif /* CONFIG_SYS_CFI_FLASH_STATUS_POLL */
  635. return ERR_OK;
  636. }
  637. /*-----------------------------------------------------------------------
  638. */
  639. static void flash_add_byte(flash_info_t *info, cfiword_t *cword, uchar c)
  640. {
  641. #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  642. unsigned short w;
  643. unsigned int l;
  644. unsigned long long ll;
  645. #endif
  646. switch (info->portwidth) {
  647. case FLASH_CFI_8BIT:
  648. cword->w8 = c;
  649. break;
  650. case FLASH_CFI_16BIT:
  651. #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  652. w = c;
  653. w <<= 8;
  654. cword->w16 = (cword->w16 >> 8) | w;
  655. #else
  656. cword->w16 = (cword->w16 << 8) | c;
  657. #endif
  658. break;
  659. case FLASH_CFI_32BIT:
  660. #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  661. l = c;
  662. l <<= 24;
  663. cword->w32 = (cword->w32 >> 8) | l;
  664. #else
  665. cword->w32 = (cword->w32 << 8) | c;
  666. #endif
  667. break;
  668. case FLASH_CFI_64BIT:
  669. #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  670. ll = c;
  671. ll <<= 56;
  672. cword->w64 = (cword->w64 >> 8) | ll;
  673. #else
  674. cword->w64 = (cword->w64 << 8) | c;
  675. #endif
  676. break;
  677. }
  678. }
  679. /*
  680. * Loop through the sector table starting from the previously found sector.
  681. * Searches forwards or backwards, dependent on the passed address.
  682. */
  683. static flash_sect_t find_sector(flash_info_t *info, ulong addr)
  684. {
  685. static flash_sect_t saved_sector; /* previously found sector */
  686. static flash_info_t *saved_info; /* previously used flash bank */
  687. flash_sect_t sector = saved_sector;
  688. if (info != saved_info || sector >= info->sector_count)
  689. sector = 0;
  690. while ((sector < info->sector_count - 1) &&
  691. (info->start[sector] < addr))
  692. sector++;
  693. while ((info->start[sector] > addr) && (sector > 0))
  694. /*
  695. * also decrements the sector in case of an overshot
  696. * in the first loop
  697. */
  698. sector--;
  699. saved_sector = sector;
  700. saved_info = info;
  701. return sector;
  702. }
  703. /*-----------------------------------------------------------------------
  704. */
  705. static int flash_write_cfiword(flash_info_t *info, ulong dest, cfiword_t cword)
  706. {
  707. void *dstaddr = (void *)dest;
  708. int flag;
  709. flash_sect_t sect = 0;
  710. char sect_found = 0;
  711. /* Check if Flash is (sufficiently) erased */
  712. switch (info->portwidth) {
  713. case FLASH_CFI_8BIT:
  714. flag = ((flash_read8(dstaddr) & cword.w8) == cword.w8);
  715. break;
  716. case FLASH_CFI_16BIT:
  717. flag = ((flash_read16(dstaddr) & cword.w16) == cword.w16);
  718. break;
  719. case FLASH_CFI_32BIT:
  720. flag = ((flash_read32(dstaddr) & cword.w32) == cword.w32);
  721. break;
  722. case FLASH_CFI_64BIT:
  723. flag = ((flash_read64(dstaddr) & cword.w64) == cword.w64);
  724. break;
  725. default:
  726. flag = 0;
  727. break;
  728. }
  729. if (!flag)
  730. return ERR_NOT_ERASED;
  731. /* Disable interrupts which might cause a timeout here */
  732. flag = disable_interrupts();
  733. switch (info->vendor) {
  734. case CFI_CMDSET_INTEL_PROG_REGIONS:
  735. case CFI_CMDSET_INTEL_EXTENDED:
  736. case CFI_CMDSET_INTEL_STANDARD:
  737. flash_write_cmd(info, 0, 0, FLASH_CMD_CLEAR_STATUS);
  738. flash_write_cmd(info, 0, 0, FLASH_CMD_WRITE);
  739. break;
  740. case CFI_CMDSET_AMD_EXTENDED:
  741. case CFI_CMDSET_AMD_STANDARD:
  742. sect = find_sector(info, dest);
  743. flash_unlock_seq(info, sect);
  744. flash_write_cmd(info, sect, info->addr_unlock1, AMD_CMD_WRITE);
  745. sect_found = 1;
  746. break;
  747. #ifdef CONFIG_FLASH_CFI_LEGACY
  748. case CFI_CMDSET_AMD_LEGACY:
  749. sect = find_sector(info, dest);
  750. flash_unlock_seq(info, 0);
  751. flash_write_cmd(info, 0, info->addr_unlock1, AMD_CMD_WRITE);
  752. sect_found = 1;
  753. break;
  754. #endif
  755. }
  756. switch (info->portwidth) {
  757. case FLASH_CFI_8BIT:
  758. flash_write8(cword.w8, dstaddr);
  759. break;
  760. case FLASH_CFI_16BIT:
  761. flash_write16(cword.w16, dstaddr);
  762. break;
  763. case FLASH_CFI_32BIT:
  764. flash_write32(cword.w32, dstaddr);
  765. break;
  766. case FLASH_CFI_64BIT:
  767. flash_write64(cword.w64, dstaddr);
  768. break;
  769. }
  770. /* re-enable interrupts if necessary */
  771. if (flag)
  772. enable_interrupts();
  773. if (!sect_found)
  774. sect = find_sector(info, dest);
  775. if (use_flash_status_poll(info))
  776. return flash_status_poll(info, &cword, dstaddr,
  777. info->write_tout, "write");
  778. else
  779. return flash_full_status_check(info, sect,
  780. info->write_tout, "write");
  781. }
  782. #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
  783. static int flash_write_cfibuffer(flash_info_t *info, ulong dest, uchar *cp,
  784. int len)
  785. {
  786. flash_sect_t sector;
  787. int cnt;
  788. int retcode;
  789. u8 *src = cp;
  790. u8 *dst = (u8 *)dest;
  791. u8 *dst2 = dst;
  792. int flag = 1;
  793. uint offset = 0;
  794. unsigned int shift;
  795. uchar write_cmd;
  796. switch (info->portwidth) {
  797. case FLASH_CFI_8BIT:
  798. shift = 0;
  799. break;
  800. case FLASH_CFI_16BIT:
  801. shift = 1;
  802. break;
  803. case FLASH_CFI_32BIT:
  804. shift = 2;
  805. break;
  806. case FLASH_CFI_64BIT:
  807. shift = 3;
  808. break;
  809. default:
  810. retcode = ERR_INVAL;
  811. goto out_unmap;
  812. }
  813. cnt = len >> shift;
  814. while ((cnt-- > 0) && (flag == 1)) {
  815. switch (info->portwidth) {
  816. case FLASH_CFI_8BIT:
  817. flag = ((flash_read8(dst2) & flash_read8(src)) ==
  818. flash_read8(src));
  819. src += 1, dst2 += 1;
  820. break;
  821. case FLASH_CFI_16BIT:
  822. flag = ((flash_read16(dst2) & flash_read16(src)) ==
  823. flash_read16(src));
  824. src += 2, dst2 += 2;
  825. break;
  826. case FLASH_CFI_32BIT:
  827. flag = ((flash_read32(dst2) & flash_read32(src)) ==
  828. flash_read32(src));
  829. src += 4, dst2 += 4;
  830. break;
  831. case FLASH_CFI_64BIT:
  832. flag = ((flash_read64(dst2) & flash_read64(src)) ==
  833. flash_read64(src));
  834. src += 8, dst2 += 8;
  835. break;
  836. }
  837. }
  838. if (!flag) {
  839. retcode = ERR_NOT_ERASED;
  840. goto out_unmap;
  841. }
  842. src = cp;
  843. sector = find_sector(info, dest);
  844. switch (info->vendor) {
  845. case CFI_CMDSET_INTEL_PROG_REGIONS:
  846. case CFI_CMDSET_INTEL_STANDARD:
  847. case CFI_CMDSET_INTEL_EXTENDED:
  848. write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ?
  849. FLASH_CMD_WRITE_BUFFER_PROG :
  850. FLASH_CMD_WRITE_TO_BUFFER;
  851. flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
  852. flash_write_cmd(info, sector, 0, FLASH_CMD_READ_STATUS);
  853. flash_write_cmd(info, sector, 0, write_cmd);
  854. retcode = flash_status_check(info, sector,
  855. info->buffer_write_tout,
  856. "write to buffer");
  857. if (retcode == ERR_OK) {
  858. /* reduce the number of loops by the width of
  859. * the port
  860. */
  861. cnt = len >> shift;
  862. flash_write_cmd(info, sector, 0, cnt - 1);
  863. while (cnt-- > 0) {
  864. switch (info->portwidth) {
  865. case FLASH_CFI_8BIT:
  866. flash_write8(flash_read8(src), dst);
  867. src += 1, dst += 1;
  868. break;
  869. case FLASH_CFI_16BIT:
  870. flash_write16(flash_read16(src), dst);
  871. src += 2, dst += 2;
  872. break;
  873. case FLASH_CFI_32BIT:
  874. flash_write32(flash_read32(src), dst);
  875. src += 4, dst += 4;
  876. break;
  877. case FLASH_CFI_64BIT:
  878. flash_write64(flash_read64(src), dst);
  879. src += 8, dst += 8;
  880. break;
  881. default:
  882. retcode = ERR_INVAL;
  883. goto out_unmap;
  884. }
  885. }
  886. flash_write_cmd(info, sector, 0,
  887. FLASH_CMD_WRITE_BUFFER_CONFIRM);
  888. retcode = flash_full_status_check(
  889. info, sector, info->buffer_write_tout,
  890. "buffer write");
  891. }
  892. break;
  893. case CFI_CMDSET_AMD_STANDARD:
  894. case CFI_CMDSET_AMD_EXTENDED:
  895. flash_unlock_seq(info, sector);
  896. #ifdef CONFIG_FLASH_SPANSION_S29WS_N
  897. offset = ((unsigned long)dst - info->start[sector]) >> shift;
  898. #endif
  899. flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER);
  900. cnt = len >> shift;
  901. flash_write_cmd(info, sector, offset, cnt - 1);
  902. switch (info->portwidth) {
  903. case FLASH_CFI_8BIT:
  904. while (cnt-- > 0) {
  905. flash_write8(flash_read8(src), dst);
  906. src += 1, dst += 1;
  907. }
  908. break;
  909. case FLASH_CFI_16BIT:
  910. while (cnt-- > 0) {
  911. flash_write16(flash_read16(src), dst);
  912. src += 2, dst += 2;
  913. }
  914. break;
  915. case FLASH_CFI_32BIT:
  916. while (cnt-- > 0) {
  917. flash_write32(flash_read32(src), dst);
  918. src += 4, dst += 4;
  919. }
  920. break;
  921. case FLASH_CFI_64BIT:
  922. while (cnt-- > 0) {
  923. flash_write64(flash_read64(src), dst);
  924. src += 8, dst += 8;
  925. }
  926. break;
  927. default:
  928. retcode = ERR_INVAL;
  929. goto out_unmap;
  930. }
  931. flash_write_cmd(info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
  932. if (use_flash_status_poll(info))
  933. retcode = flash_status_poll(info, src - (1 << shift),
  934. dst - (1 << shift),
  935. info->buffer_write_tout,
  936. "buffer write");
  937. else
  938. retcode = flash_full_status_check(info, sector,
  939. info->buffer_write_tout,
  940. "buffer write");
  941. break;
  942. default:
  943. debug("Unknown Command Set\n");
  944. retcode = ERR_INVAL;
  945. break;
  946. }
  947. out_unmap:
  948. return retcode;
  949. }
  950. #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
  951. /*-----------------------------------------------------------------------
  952. */
  953. int flash_erase(flash_info_t *info, int s_first, int s_last)
  954. {
  955. int rcode = 0;
  956. int prot;
  957. flash_sect_t sect;
  958. int st;
  959. if (info->flash_id != FLASH_MAN_CFI) {
  960. puts("Can't erase unknown flash type - aborted\n");
  961. return 1;
  962. }
  963. if (s_first < 0 || s_first > s_last) {
  964. puts("- no sectors to erase\n");
  965. return 1;
  966. }
  967. prot = 0;
  968. for (sect = s_first; sect <= s_last; ++sect)
  969. if (info->protect[sect])
  970. prot++;
  971. if (prot) {
  972. printf("- Warning: %d protected sectors will not be erased!\n",
  973. prot);
  974. } else if (flash_verbose) {
  975. putc('\n');
  976. }
  977. for (sect = s_first; sect <= s_last; sect++) {
  978. if (ctrlc()) {
  979. printf("\n");
  980. return 1;
  981. }
  982. if (info->protect[sect] == 0) { /* not protected */
  983. #ifdef CONFIG_SYS_FLASH_CHECK_BLANK_BEFORE_ERASE
  984. int k;
  985. int size;
  986. int erased;
  987. u32 *flash;
  988. /*
  989. * Check if whole sector is erased
  990. */
  991. size = flash_sector_size(info, sect);
  992. erased = 1;
  993. flash = (u32 *)info->start[sect];
  994. /* divide by 4 for longword access */
  995. size = size >> 2;
  996. for (k = 0; k < size; k++) {
  997. if (flash_read32(flash++) != 0xffffffff) {
  998. erased = 0;
  999. break;
  1000. }
  1001. }
  1002. if (erased) {
  1003. if (flash_verbose)
  1004. putc(',');
  1005. continue;
  1006. }
  1007. #endif
  1008. switch (info->vendor) {
  1009. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1010. case CFI_CMDSET_INTEL_STANDARD:
  1011. case CFI_CMDSET_INTEL_EXTENDED:
  1012. flash_write_cmd(info, sect, 0,
  1013. FLASH_CMD_CLEAR_STATUS);
  1014. flash_write_cmd(info, sect, 0,
  1015. FLASH_CMD_BLOCK_ERASE);
  1016. flash_write_cmd(info, sect, 0,
  1017. FLASH_CMD_ERASE_CONFIRM);
  1018. break;
  1019. case CFI_CMDSET_AMD_STANDARD:
  1020. case CFI_CMDSET_AMD_EXTENDED:
  1021. flash_unlock_seq(info, sect);
  1022. flash_write_cmd(info, sect,
  1023. info->addr_unlock1,
  1024. AMD_CMD_ERASE_START);
  1025. flash_unlock_seq(info, sect);
  1026. flash_write_cmd(info, sect, 0,
  1027. info->cmd_erase_sector);
  1028. break;
  1029. #ifdef CONFIG_FLASH_CFI_LEGACY
  1030. case CFI_CMDSET_AMD_LEGACY:
  1031. flash_unlock_seq(info, 0);
  1032. flash_write_cmd(info, 0, info->addr_unlock1,
  1033. AMD_CMD_ERASE_START);
  1034. flash_unlock_seq(info, 0);
  1035. flash_write_cmd(info, sect, 0,
  1036. AMD_CMD_ERASE_SECTOR);
  1037. break;
  1038. #endif
  1039. default:
  1040. debug("Unknown flash vendor %d\n",
  1041. info->vendor);
  1042. break;
  1043. }
  1044. if (use_flash_status_poll(info)) {
  1045. cfiword_t cword;
  1046. void *dest;
  1047. cword.w64 = 0xffffffffffffffffULL;
  1048. dest = flash_map(info, sect, 0);
  1049. st = flash_status_poll(info, &cword, dest,
  1050. info->erase_blk_tout,
  1051. "erase");
  1052. flash_unmap(info, sect, 0, dest);
  1053. } else {
  1054. st = flash_full_status_check(info, sect,
  1055. info->erase_blk_tout,
  1056. "erase");
  1057. }
  1058. if (st)
  1059. rcode = 1;
  1060. else if (flash_verbose)
  1061. putc('.');
  1062. }
  1063. }
  1064. if (flash_verbose)
  1065. puts(" done\n");
  1066. return rcode;
  1067. }
  1068. #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
  1069. static int sector_erased(flash_info_t *info, int i)
  1070. {
  1071. int k;
  1072. int size;
  1073. u32 *flash;
  1074. /*
  1075. * Check if whole sector is erased
  1076. */
  1077. size = flash_sector_size(info, i);
  1078. flash = (u32 *)info->start[i];
  1079. /* divide by 4 for longword access */
  1080. size = size >> 2;
  1081. for (k = 0; k < size; k++) {
  1082. if (flash_read32(flash++) != 0xffffffff)
  1083. return 0; /* not erased */
  1084. }
  1085. return 1; /* erased */
  1086. }
  1087. #endif /* CONFIG_SYS_FLASH_EMPTY_INFO */
  1088. void flash_print_info(flash_info_t *info)
  1089. {
  1090. int i;
  1091. if (info->flash_id != FLASH_MAN_CFI) {
  1092. puts("missing or unknown FLASH type\n");
  1093. return;
  1094. }
  1095. printf("%s flash (%d x %d)",
  1096. info->name,
  1097. (info->portwidth << 3), (info->chipwidth << 3));
  1098. if (info->size < 1024 * 1024)
  1099. printf(" Size: %ld kB in %d Sectors\n",
  1100. info->size >> 10, info->sector_count);
  1101. else
  1102. printf(" Size: %ld MB in %d Sectors\n",
  1103. info->size >> 20, info->sector_count);
  1104. printf(" ");
  1105. switch (info->vendor) {
  1106. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1107. printf("Intel Prog Regions");
  1108. break;
  1109. case CFI_CMDSET_INTEL_STANDARD:
  1110. printf("Intel Standard");
  1111. break;
  1112. case CFI_CMDSET_INTEL_EXTENDED:
  1113. printf("Intel Extended");
  1114. break;
  1115. case CFI_CMDSET_AMD_STANDARD:
  1116. printf("AMD Standard");
  1117. break;
  1118. case CFI_CMDSET_AMD_EXTENDED:
  1119. printf("AMD Extended");
  1120. break;
  1121. #ifdef CONFIG_FLASH_CFI_LEGACY
  1122. case CFI_CMDSET_AMD_LEGACY:
  1123. printf("AMD Legacy");
  1124. break;
  1125. #endif
  1126. default:
  1127. printf("Unknown (%d)", info->vendor);
  1128. break;
  1129. }
  1130. printf(" command set, Manufacturer ID: 0x%02X, Device ID: 0x",
  1131. info->manufacturer_id);
  1132. printf(info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
  1133. info->device_id);
  1134. if ((info->device_id & 0xff) == 0x7E) {
  1135. printf(info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
  1136. info->device_id2);
  1137. }
  1138. if (info->vendor == CFI_CMDSET_AMD_STANDARD && info->legacy_unlock)
  1139. printf("\n Advanced Sector Protection (PPB) enabled");
  1140. printf("\n Erase timeout: %ld ms, write timeout: %ld ms\n",
  1141. info->erase_blk_tout, info->write_tout);
  1142. if (info->buffer_size > 1) {
  1143. printf(" Buffer write timeout: %ld ms, ",
  1144. info->buffer_write_tout);
  1145. printf("buffer size: %d bytes\n", info->buffer_size);
  1146. }
  1147. puts("\n Sector Start Addresses:");
  1148. for (i = 0; i < info->sector_count; ++i) {
  1149. if (ctrlc())
  1150. break;
  1151. if ((i % 5) == 0)
  1152. putc('\n');
  1153. #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
  1154. /* print empty and read-only info */
  1155. printf(" %08lX %c %s ",
  1156. info->start[i],
  1157. sector_erased(info, i) ? 'E' : ' ',
  1158. info->protect[i] ? "RO" : " ");
  1159. #else /* ! CONFIG_SYS_FLASH_EMPTY_INFO */
  1160. printf(" %08lX %s ",
  1161. info->start[i],
  1162. info->protect[i] ? "RO" : " ");
  1163. #endif
  1164. }
  1165. putc('\n');
  1166. }
  1167. /*-----------------------------------------------------------------------
  1168. * This is used in a few places in write_buf() to show programming
  1169. * progress. Making it a function is nasty because it needs to do side
  1170. * effect updates to digit and dots. Repeated code is nasty too, so
  1171. * we define it once here.
  1172. */
  1173. #ifdef CONFIG_FLASH_SHOW_PROGRESS
  1174. #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \
  1175. if (flash_verbose) { \
  1176. dots -= dots_sub; \
  1177. if (scale > 0 && dots <= 0) { \
  1178. if ((digit % 5) == 0) \
  1179. printf("%d", digit / 5); \
  1180. else \
  1181. putc('.'); \
  1182. digit--; \
  1183. dots += scale; \
  1184. } \
  1185. }
  1186. #else
  1187. #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub)
  1188. #endif
  1189. /*-----------------------------------------------------------------------
  1190. * Copy memory to flash, returns:
  1191. * 0 - OK
  1192. * 1 - write timeout
  1193. * 2 - Flash not erased
  1194. */
  1195. int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
  1196. {
  1197. ulong wp;
  1198. uchar *p;
  1199. int aln;
  1200. cfiword_t cword;
  1201. int i, rc;
  1202. #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
  1203. int buffered_size;
  1204. #endif
  1205. #ifdef CONFIG_FLASH_SHOW_PROGRESS
  1206. int digit = CONFIG_FLASH_SHOW_PROGRESS;
  1207. int scale = 0;
  1208. int dots = 0;
  1209. /*
  1210. * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes.
  1211. */
  1212. if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) {
  1213. scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) /
  1214. CONFIG_FLASH_SHOW_PROGRESS);
  1215. }
  1216. #endif
  1217. /* get lower aligned address */
  1218. wp = (addr & ~(info->portwidth - 1));
  1219. /* handle unaligned start */
  1220. aln = addr - wp;
  1221. if (aln != 0) {
  1222. cword.w32 = 0;
  1223. p = (uchar *)wp;
  1224. for (i = 0; i < aln; ++i)
  1225. flash_add_byte(info, &cword, flash_read8(p + i));
  1226. for (; (i < info->portwidth) && (cnt > 0); i++) {
  1227. flash_add_byte(info, &cword, *src++);
  1228. cnt--;
  1229. }
  1230. for (; (cnt == 0) && (i < info->portwidth); ++i)
  1231. flash_add_byte(info, &cword, flash_read8(p + i));
  1232. rc = flash_write_cfiword(info, wp, cword);
  1233. if (rc != 0)
  1234. return rc;
  1235. wp += i;
  1236. FLASH_SHOW_PROGRESS(scale, dots, digit, i);
  1237. }
  1238. /* handle the aligned part */
  1239. #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
  1240. buffered_size = (info->portwidth / info->chipwidth);
  1241. buffered_size *= info->buffer_size;
  1242. while (cnt >= info->portwidth) {
  1243. /* prohibit buffer write when buffer_size is 1 */
  1244. if (info->buffer_size == 1) {
  1245. cword.w32 = 0;
  1246. for (i = 0; i < info->portwidth; i++)
  1247. flash_add_byte(info, &cword, *src++);
  1248. rc = flash_write_cfiword(info, wp, cword);
  1249. if (rc != 0)
  1250. return rc;
  1251. wp += info->portwidth;
  1252. cnt -= info->portwidth;
  1253. continue;
  1254. }
  1255. /* write buffer until next buffered_size aligned boundary */
  1256. i = buffered_size - (wp % buffered_size);
  1257. if (i > cnt)
  1258. i = cnt;
  1259. rc = flash_write_cfibuffer(info, wp, src, i);
  1260. if (rc != ERR_OK)
  1261. return rc;
  1262. i -= i & (info->portwidth - 1);
  1263. wp += i;
  1264. src += i;
  1265. cnt -= i;
  1266. FLASH_SHOW_PROGRESS(scale, dots, digit, i);
  1267. /* Only check every once in a while */
  1268. if ((cnt & 0xFFFF) < buffered_size && ctrlc())
  1269. return ERR_ABORTED;
  1270. }
  1271. #else
  1272. while (cnt >= info->portwidth) {
  1273. cword.w32 = 0;
  1274. for (i = 0; i < info->portwidth; i++)
  1275. flash_add_byte(info, &cword, *src++);
  1276. rc = flash_write_cfiword(info, wp, cword);
  1277. if (rc != 0)
  1278. return rc;
  1279. wp += info->portwidth;
  1280. cnt -= info->portwidth;
  1281. FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth);
  1282. /* Only check every once in a while */
  1283. if ((cnt & 0xFFFF) < info->portwidth && ctrlc())
  1284. return ERR_ABORTED;
  1285. }
  1286. #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
  1287. if (cnt == 0)
  1288. return (0);
  1289. /*
  1290. * handle unaligned tail bytes
  1291. */
  1292. cword.w32 = 0;
  1293. p = (uchar *)wp;
  1294. for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) {
  1295. flash_add_byte(info, &cword, *src++);
  1296. --cnt;
  1297. }
  1298. for (; i < info->portwidth; ++i)
  1299. flash_add_byte(info, &cword, flash_read8(p + i));
  1300. return flash_write_cfiword(info, wp, cword);
  1301. }
  1302. static inline int manufact_match(flash_info_t *info, u32 manu)
  1303. {
  1304. return info->manufacturer_id == ((manu & FLASH_VENDMASK) >> 16);
  1305. }
  1306. /*-----------------------------------------------------------------------
  1307. */
  1308. #ifdef CONFIG_SYS_FLASH_PROTECTION
  1309. static int cfi_protect_bugfix(flash_info_t *info, long sector, int prot)
  1310. {
  1311. if (manufact_match(info, INTEL_MANUFACT) &&
  1312. info->device_id == NUMONYX_256MBIT) {
  1313. /*
  1314. * see errata called
  1315. * "Numonyx Axcell P33/P30 Specification Update" :)
  1316. */
  1317. flash_write_cmd(info, sector, 0, FLASH_CMD_READ_ID);
  1318. if (!flash_isequal(info, sector, FLASH_OFFSET_PROTECT,
  1319. prot)) {
  1320. /*
  1321. * cmd must come before FLASH_CMD_PROTECT + 20us
  1322. * Disable interrupts which might cause a timeout here.
  1323. */
  1324. int flag = disable_interrupts();
  1325. unsigned short cmd;
  1326. if (prot)
  1327. cmd = FLASH_CMD_PROTECT_SET;
  1328. else
  1329. cmd = FLASH_CMD_PROTECT_CLEAR;
  1330. flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT);
  1331. flash_write_cmd(info, sector, 0, cmd);
  1332. /* re-enable interrupts if necessary */
  1333. if (flag)
  1334. enable_interrupts();
  1335. }
  1336. return 1;
  1337. }
  1338. return 0;
  1339. }
  1340. int flash_real_protect(flash_info_t *info, long sector, int prot)
  1341. {
  1342. int retcode = 0;
  1343. switch (info->vendor) {
  1344. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1345. case CFI_CMDSET_INTEL_STANDARD:
  1346. case CFI_CMDSET_INTEL_EXTENDED:
  1347. if (!cfi_protect_bugfix(info, sector, prot)) {
  1348. flash_write_cmd(info, sector, 0,
  1349. FLASH_CMD_CLEAR_STATUS);
  1350. flash_write_cmd(info, sector, 0,
  1351. FLASH_CMD_PROTECT);
  1352. if (prot)
  1353. flash_write_cmd(info, sector, 0,
  1354. FLASH_CMD_PROTECT_SET);
  1355. else
  1356. flash_write_cmd(info, sector, 0,
  1357. FLASH_CMD_PROTECT_CLEAR);
  1358. }
  1359. break;
  1360. case CFI_CMDSET_AMD_EXTENDED:
  1361. case CFI_CMDSET_AMD_STANDARD:
  1362. /* U-Boot only checks the first byte */
  1363. if (manufact_match(info, ATM_MANUFACT)) {
  1364. if (prot) {
  1365. flash_unlock_seq(info, 0);
  1366. flash_write_cmd(info, 0,
  1367. info->addr_unlock1,
  1368. ATM_CMD_SOFTLOCK_START);
  1369. flash_unlock_seq(info, 0);
  1370. flash_write_cmd(info, sector, 0,
  1371. ATM_CMD_LOCK_SECT);
  1372. } else {
  1373. flash_write_cmd(info, 0,
  1374. info->addr_unlock1,
  1375. AMD_CMD_UNLOCK_START);
  1376. if (info->device_id == ATM_ID_BV6416)
  1377. flash_write_cmd(info, sector,
  1378. 0, ATM_CMD_UNLOCK_SECT);
  1379. }
  1380. }
  1381. if (info->legacy_unlock) {
  1382. int flag = disable_interrupts();
  1383. int lock_flag;
  1384. flash_unlock_seq(info, 0);
  1385. flash_write_cmd(info, 0, info->addr_unlock1,
  1386. AMD_CMD_SET_PPB_ENTRY);
  1387. lock_flag = flash_isset(info, sector, 0, 0x01);
  1388. if (prot) {
  1389. if (lock_flag) {
  1390. flash_write_cmd(info, sector, 0,
  1391. AMD_CMD_PPB_LOCK_BC1);
  1392. flash_write_cmd(info, sector, 0,
  1393. AMD_CMD_PPB_LOCK_BC2);
  1394. }
  1395. debug("sector %ld %slocked\n", sector,
  1396. lock_flag ? "" : "already ");
  1397. } else {
  1398. if (!lock_flag) {
  1399. debug("unlock %ld\n", sector);
  1400. flash_write_cmd(info, 0, 0,
  1401. AMD_CMD_PPB_UNLOCK_BC1);
  1402. flash_write_cmd(info, 0, 0,
  1403. AMD_CMD_PPB_UNLOCK_BC2);
  1404. }
  1405. debug("sector %ld %sunlocked\n", sector,
  1406. !lock_flag ? "" : "already ");
  1407. }
  1408. if (flag)
  1409. enable_interrupts();
  1410. if (flash_status_check(info, sector,
  1411. info->erase_blk_tout,
  1412. prot ? "protect" : "unprotect"))
  1413. printf("status check error\n");
  1414. flash_write_cmd(info, 0, 0,
  1415. AMD_CMD_SET_PPB_EXIT_BC1);
  1416. flash_write_cmd(info, 0, 0,
  1417. AMD_CMD_SET_PPB_EXIT_BC2);
  1418. }
  1419. break;
  1420. #ifdef CONFIG_FLASH_CFI_LEGACY
  1421. case CFI_CMDSET_AMD_LEGACY:
  1422. flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
  1423. flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT);
  1424. if (prot)
  1425. flash_write_cmd(info, sector, 0,
  1426. FLASH_CMD_PROTECT_SET);
  1427. else
  1428. flash_write_cmd(info, sector, 0,
  1429. FLASH_CMD_PROTECT_CLEAR);
  1430. #endif
  1431. };
  1432. /*
  1433. * Flash needs to be in status register read mode for
  1434. * flash_full_status_check() to work correctly
  1435. */
  1436. flash_write_cmd(info, sector, 0, FLASH_CMD_READ_STATUS);
  1437. retcode = flash_full_status_check(info, sector, info->erase_blk_tout,
  1438. prot ? "protect" : "unprotect");
  1439. if (retcode == 0) {
  1440. info->protect[sector] = prot;
  1441. /*
  1442. * On some of Intel's flash chips (marked via legacy_unlock)
  1443. * unprotect unprotects all locking.
  1444. */
  1445. if (prot == 0 && info->legacy_unlock) {
  1446. flash_sect_t i;
  1447. for (i = 0; i < info->sector_count; i++) {
  1448. if (info->protect[i])
  1449. flash_real_protect(info, i, 1);
  1450. }
  1451. }
  1452. }
  1453. return retcode;
  1454. }
  1455. /*-----------------------------------------------------------------------
  1456. * flash_read_user_serial - read the OneTimeProgramming cells
  1457. */
  1458. void flash_read_user_serial(flash_info_t *info, void *buffer, int offset,
  1459. int len)
  1460. {
  1461. uchar *src;
  1462. uchar *dst;
  1463. dst = buffer;
  1464. src = flash_map(info, 0, FLASH_OFFSET_USER_PROTECTION);
  1465. flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
  1466. memcpy(dst, src + offset, len);
  1467. flash_write_cmd(info, 0, 0, info->cmd_reset);
  1468. udelay(1);
  1469. flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src);
  1470. }
  1471. /*
  1472. * flash_read_factory_serial - read the device Id from the protection area
  1473. */
  1474. void flash_read_factory_serial(flash_info_t *info, void *buffer, int offset,
  1475. int len)
  1476. {
  1477. uchar *src;
  1478. src = flash_map(info, 0, FLASH_OFFSET_INTEL_PROTECTION);
  1479. flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
  1480. memcpy(buffer, src + offset, len);
  1481. flash_write_cmd(info, 0, 0, info->cmd_reset);
  1482. udelay(1);
  1483. flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src);
  1484. }
  1485. #endif /* CONFIG_SYS_FLASH_PROTECTION */
  1486. /*-----------------------------------------------------------------------
  1487. * Reverse the order of the erase regions in the CFI QRY structure.
  1488. * This is needed for chips that are either a) correctly detected as
  1489. * top-boot, or b) buggy.
  1490. */
  1491. static void cfi_reverse_geometry(struct cfi_qry *qry)
  1492. {
  1493. unsigned int i, j;
  1494. u32 tmp;
  1495. for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) {
  1496. tmp = get_unaligned(&qry->erase_region_info[i]);
  1497. put_unaligned(get_unaligned(&qry->erase_region_info[j]),
  1498. &qry->erase_region_info[i]);
  1499. put_unaligned(tmp, &qry->erase_region_info[j]);
  1500. }
  1501. }
  1502. /*-----------------------------------------------------------------------
  1503. * read jedec ids from device and set corresponding fields in info struct
  1504. *
  1505. * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
  1506. *
  1507. */
  1508. static void cmdset_intel_read_jedec_ids(flash_info_t *info)
  1509. {
  1510. flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
  1511. udelay(1);
  1512. flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
  1513. udelay(1000); /* some flash are slow to respond */
  1514. info->manufacturer_id = flash_read_uchar(info,
  1515. FLASH_OFFSET_MANUFACTURER_ID);
  1516. info->device_id = (info->chipwidth == FLASH_CFI_16BIT) ?
  1517. flash_read_word(info, FLASH_OFFSET_DEVICE_ID) :
  1518. flash_read_uchar(info, FLASH_OFFSET_DEVICE_ID);
  1519. flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
  1520. }
  1521. static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry)
  1522. {
  1523. info->cmd_reset = FLASH_CMD_RESET;
  1524. cmdset_intel_read_jedec_ids(info);
  1525. flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
  1526. #ifdef CONFIG_SYS_FLASH_PROTECTION
  1527. /* read legacy lock/unlock bit from intel flash */
  1528. if (info->ext_addr) {
  1529. info->legacy_unlock =
  1530. flash_read_uchar(info, info->ext_addr + 5) & 0x08;
  1531. }
  1532. #endif
  1533. return 0;
  1534. }
  1535. static void cmdset_amd_read_jedec_ids(flash_info_t *info)
  1536. {
  1537. ushort bank_id = 0;
  1538. uchar manu_id;
  1539. uchar feature;
  1540. flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
  1541. flash_unlock_seq(info, 0);
  1542. flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
  1543. udelay(1000); /* some flash are slow to respond */
  1544. manu_id = flash_read_uchar(info, FLASH_OFFSET_MANUFACTURER_ID);
  1545. /* JEDEC JEP106Z specifies ID codes up to bank 7 */
  1546. while (manu_id == FLASH_CONTINUATION_CODE && bank_id < 0x800) {
  1547. bank_id += 0x100;
  1548. manu_id = flash_read_uchar(info,
  1549. bank_id | FLASH_OFFSET_MANUFACTURER_ID);
  1550. }
  1551. info->manufacturer_id = manu_id;
  1552. debug("info->ext_addr = 0x%x, cfi_version = 0x%x\n",
  1553. info->ext_addr, info->cfi_version);
  1554. if (info->ext_addr && info->cfi_version >= 0x3134) {
  1555. /* read software feature (at 0x53) */
  1556. feature = flash_read_uchar(info, info->ext_addr + 0x13);
  1557. debug("feature = 0x%x\n", feature);
  1558. info->sr_supported = feature & 0x1;
  1559. }
  1560. switch (info->chipwidth) {
  1561. case FLASH_CFI_8BIT:
  1562. info->device_id = flash_read_uchar(info,
  1563. FLASH_OFFSET_DEVICE_ID);
  1564. if (info->device_id == 0x7E) {
  1565. /* AMD 3-byte (expanded) device ids */
  1566. info->device_id2 = flash_read_uchar(info,
  1567. FLASH_OFFSET_DEVICE_ID2);
  1568. info->device_id2 <<= 8;
  1569. info->device_id2 |= flash_read_uchar(info,
  1570. FLASH_OFFSET_DEVICE_ID3);
  1571. }
  1572. break;
  1573. case FLASH_CFI_16BIT:
  1574. info->device_id = flash_read_word(info,
  1575. FLASH_OFFSET_DEVICE_ID);
  1576. if ((info->device_id & 0xff) == 0x7E) {
  1577. /* AMD 3-byte (expanded) device ids */
  1578. info->device_id2 = flash_read_uchar(info,
  1579. FLASH_OFFSET_DEVICE_ID2);
  1580. info->device_id2 <<= 8;
  1581. info->device_id2 |= flash_read_uchar(info,
  1582. FLASH_OFFSET_DEVICE_ID3);
  1583. }
  1584. break;
  1585. default:
  1586. break;
  1587. }
  1588. flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
  1589. udelay(1);
  1590. }
  1591. static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry)
  1592. {
  1593. info->cmd_reset = AMD_CMD_RESET;
  1594. info->cmd_erase_sector = AMD_CMD_ERASE_SECTOR;
  1595. cmdset_amd_read_jedec_ids(info);
  1596. flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
  1597. #ifdef CONFIG_SYS_FLASH_PROTECTION
  1598. if (info->ext_addr) {
  1599. /* read sector protect/unprotect scheme (at 0x49) */
  1600. if (flash_read_uchar(info, info->ext_addr + 9) == 0x8)
  1601. info->legacy_unlock = 1;
  1602. }
  1603. #endif
  1604. return 0;
  1605. }
  1606. #ifdef CONFIG_FLASH_CFI_LEGACY
  1607. static void flash_read_jedec_ids(flash_info_t *info)
  1608. {
  1609. info->manufacturer_id = 0;
  1610. info->device_id = 0;
  1611. info->device_id2 = 0;
  1612. switch (info->vendor) {
  1613. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1614. case CFI_CMDSET_INTEL_STANDARD:
  1615. case CFI_CMDSET_INTEL_EXTENDED:
  1616. cmdset_intel_read_jedec_ids(info);
  1617. break;
  1618. case CFI_CMDSET_AMD_STANDARD:
  1619. case CFI_CMDSET_AMD_EXTENDED:
  1620. cmdset_amd_read_jedec_ids(info);
  1621. break;
  1622. default:
  1623. break;
  1624. }
  1625. }
  1626. /*-----------------------------------------------------------------------
  1627. * Call board code to request info about non-CFI flash.
  1628. * board_flash_get_legacy needs to fill in at least:
  1629. * info->portwidth, info->chipwidth and info->interface for Jedec probing.
  1630. */
  1631. static int flash_detect_legacy(phys_addr_t base, int banknum)
  1632. {
  1633. flash_info_t *info = &flash_info[banknum];
  1634. if (board_flash_get_legacy(base, banknum, info)) {
  1635. /* board code may have filled info completely. If not, we
  1636. * use JEDEC ID probing.
  1637. */
  1638. if (!info->vendor) {
  1639. int modes[] = {
  1640. CFI_CMDSET_AMD_STANDARD,
  1641. CFI_CMDSET_INTEL_STANDARD
  1642. };
  1643. int i;
  1644. for (i = 0; i < ARRAY_SIZE(modes); i++) {
  1645. info->vendor = modes[i];
  1646. info->start[0] =
  1647. (ulong)map_physmem(base,
  1648. info->portwidth,
  1649. MAP_NOCACHE);
  1650. if (info->portwidth == FLASH_CFI_8BIT &&
  1651. info->interface == FLASH_CFI_X8X16) {
  1652. info->addr_unlock1 = 0x2AAA;
  1653. info->addr_unlock2 = 0x5555;
  1654. } else {
  1655. info->addr_unlock1 = 0x5555;
  1656. info->addr_unlock2 = 0x2AAA;
  1657. }
  1658. flash_read_jedec_ids(info);
  1659. debug("JEDEC PROBE: ID %x %x %x\n",
  1660. info->manufacturer_id,
  1661. info->device_id,
  1662. info->device_id2);
  1663. if (jedec_flash_match(info, info->start[0]))
  1664. break;
  1665. unmap_physmem((void *)info->start[0],
  1666. info->portwidth);
  1667. }
  1668. }
  1669. switch (info->vendor) {
  1670. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1671. case CFI_CMDSET_INTEL_STANDARD:
  1672. case CFI_CMDSET_INTEL_EXTENDED:
  1673. info->cmd_reset = FLASH_CMD_RESET;
  1674. break;
  1675. case CFI_CMDSET_AMD_STANDARD:
  1676. case CFI_CMDSET_AMD_EXTENDED:
  1677. case CFI_CMDSET_AMD_LEGACY:
  1678. info->cmd_reset = AMD_CMD_RESET;
  1679. break;
  1680. }
  1681. info->flash_id = FLASH_MAN_CFI;
  1682. return 1;
  1683. }
  1684. return 0; /* use CFI */
  1685. }
  1686. #else
  1687. static inline int flash_detect_legacy(phys_addr_t base, int banknum)
  1688. {
  1689. return 0; /* use CFI */
  1690. }
  1691. #endif
  1692. /*-----------------------------------------------------------------------
  1693. * detect if flash is compatible with the Common Flash Interface (CFI)
  1694. * http://www.jedec.org/download/search/jesd68.pdf
  1695. */
  1696. static void flash_read_cfi(flash_info_t *info, void *buf, unsigned int start,
  1697. size_t len)
  1698. {
  1699. u8 *p = buf;
  1700. unsigned int i;
  1701. for (i = 0; i < len; i++)
  1702. p[i] = flash_read_uchar(info, start + i);
  1703. }
  1704. static void __flash_cmd_reset(flash_info_t *info)
  1705. {
  1706. /*
  1707. * We do not yet know what kind of commandset to use, so we issue
  1708. * the reset command in both Intel and AMD variants, in the hope
  1709. * that AMD flash roms ignore the Intel command.
  1710. */
  1711. flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
  1712. udelay(1);
  1713. flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
  1714. }
  1715. void flash_cmd_reset(flash_info_t *info)
  1716. __attribute__((weak, alias("__flash_cmd_reset")));
  1717. static int __flash_detect_cfi(flash_info_t *info, struct cfi_qry *qry)
  1718. {
  1719. int cfi_offset;
  1720. /* Issue FLASH reset command */
  1721. flash_cmd_reset(info);
  1722. for (cfi_offset = 0; cfi_offset < ARRAY_SIZE(flash_offset_cfi);
  1723. cfi_offset++) {
  1724. flash_write_cmd(info, 0, flash_offset_cfi[cfi_offset],
  1725. FLASH_CMD_CFI);
  1726. if (flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP, 'Q') &&
  1727. flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R') &&
  1728. flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
  1729. flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP,
  1730. sizeof(struct cfi_qry));
  1731. info->interface = le16_to_cpu(qry->interface_desc);
  1732. info->cfi_offset = flash_offset_cfi[cfi_offset];
  1733. debug("device interface is %d\n",
  1734. info->interface);
  1735. debug("found port %d chip %d ",
  1736. info->portwidth, info->chipwidth);
  1737. debug("port %d bits chip %d bits\n",
  1738. info->portwidth << CFI_FLASH_SHIFT_WIDTH,
  1739. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  1740. /* calculate command offsets as in the Linux driver */
  1741. info->addr_unlock1 = 0x555;
  1742. info->addr_unlock2 = 0x2aa;
  1743. /*
  1744. * modify the unlock address if we are
  1745. * in compatibility mode
  1746. */
  1747. if (/* x8/x16 in x8 mode */
  1748. (info->chipwidth == FLASH_CFI_BY8 &&
  1749. info->interface == FLASH_CFI_X8X16) ||
  1750. /* x16/x32 in x16 mode */
  1751. (info->chipwidth == FLASH_CFI_BY16 &&
  1752. info->interface == FLASH_CFI_X16X32)) {
  1753. info->addr_unlock1 = 0xaaa;
  1754. info->addr_unlock2 = 0x555;
  1755. }
  1756. info->name = "CFI conformant";
  1757. return 1;
  1758. }
  1759. }
  1760. return 0;
  1761. }
  1762. static int flash_detect_cfi(flash_info_t *info, struct cfi_qry *qry)
  1763. {
  1764. debug("flash detect cfi\n");
  1765. for (info->portwidth = CONFIG_SYS_FLASH_CFI_WIDTH;
  1766. info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
  1767. for (info->chipwidth = FLASH_CFI_BY8;
  1768. info->chipwidth <= info->portwidth;
  1769. info->chipwidth <<= 1)
  1770. if (__flash_detect_cfi(info, qry))
  1771. return 1;
  1772. }
  1773. debug("not found\n");
  1774. return 0;
  1775. }
  1776. /*
  1777. * Manufacturer-specific quirks. Add workarounds for geometry
  1778. * reversal, etc. here.
  1779. */
  1780. static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry)
  1781. {
  1782. /* check if flash geometry needs reversal */
  1783. if (qry->num_erase_regions > 1) {
  1784. /* reverse geometry if top boot part */
  1785. if (info->cfi_version < 0x3131) {
  1786. /* CFI < 1.1, try to guess from device id */
  1787. if ((info->device_id & 0x80) != 0)
  1788. cfi_reverse_geometry(qry);
  1789. } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
  1790. /* CFI >= 1.1, deduct from top/bottom flag */
  1791. /* note: ext_addr is valid since cfi_version > 0 */
  1792. cfi_reverse_geometry(qry);
  1793. }
  1794. }
  1795. }
  1796. static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry)
  1797. {
  1798. int reverse_geometry = 0;
  1799. /* Check the "top boot" bit in the PRI */
  1800. if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1))
  1801. reverse_geometry = 1;
  1802. /* AT49BV6416(T) list the erase regions in the wrong order.
  1803. * However, the device ID is identical with the non-broken
  1804. * AT49BV642D they differ in the high byte.
  1805. */
  1806. if (info->device_id == 0xd6 || info->device_id == 0xd2)
  1807. reverse_geometry = !reverse_geometry;
  1808. if (reverse_geometry)
  1809. cfi_reverse_geometry(qry);
  1810. }
  1811. static void flash_fixup_stm(flash_info_t *info, struct cfi_qry *qry)
  1812. {
  1813. /* check if flash geometry needs reversal */
  1814. if (qry->num_erase_regions > 1) {
  1815. /* reverse geometry if top boot part */
  1816. if (info->cfi_version < 0x3131) {
  1817. /* CFI < 1.1, guess by device id */
  1818. if (info->device_id == 0x22CA || /* M29W320DT */
  1819. info->device_id == 0x2256 || /* M29W320ET */
  1820. info->device_id == 0x22D7) { /* M29W800DT */
  1821. cfi_reverse_geometry(qry);
  1822. }
  1823. } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
  1824. /* CFI >= 1.1, deduct from top/bottom flag */
  1825. /* note: ext_addr is valid since cfi_version > 0 */
  1826. cfi_reverse_geometry(qry);
  1827. }
  1828. }
  1829. }
  1830. static void flash_fixup_sst(flash_info_t *info, struct cfi_qry *qry)
  1831. {
  1832. /*
  1833. * SST, for many recent nor parallel flashes, says they are
  1834. * CFI-conformant. This is not true, since qry struct.
  1835. * reports a std. AMD command set (0x0002), while SST allows to
  1836. * erase two different sector sizes for the same memory.
  1837. * 64KB sector (SST call it block) needs 0x30 to be erased.
  1838. * 4KB sector (SST call it sector) needs 0x50 to be erased.
  1839. * Since CFI query detect the 4KB number of sectors, users expects
  1840. * a sector granularity of 4KB, and it is here set.
  1841. */
  1842. if (info->device_id == 0x5D23 || /* SST39VF3201B */
  1843. info->device_id == 0x5C23) { /* SST39VF3202B */
  1844. /* set sector granularity to 4KB */
  1845. info->cmd_erase_sector = 0x50;
  1846. }
  1847. }
  1848. static void flash_fixup_num(flash_info_t *info, struct cfi_qry *qry)
  1849. {
  1850. /*
  1851. * The M29EW devices seem to report the CFI information wrong
  1852. * when it's in 8 bit mode.
  1853. * There's an app note from Numonyx on this issue.
  1854. * So adjust the buffer size for M29EW while operating in 8-bit mode
  1855. */
  1856. if (qry->max_buf_write_size > 0x8 &&
  1857. info->device_id == 0x7E &&
  1858. (info->device_id2 == 0x2201 ||
  1859. info->device_id2 == 0x2301 ||
  1860. info->device_id2 == 0x2801 ||
  1861. info->device_id2 == 0x4801)) {
  1862. debug("Adjusted buffer size on Numonyx flash");
  1863. debug(" M29EW family in 8 bit mode\n");
  1864. qry->max_buf_write_size = 0x8;
  1865. }
  1866. }
  1867. /*
  1868. * The following code cannot be run from FLASH!
  1869. *
  1870. */
  1871. ulong flash_get_size(phys_addr_t base, int banknum)
  1872. {
  1873. flash_info_t *info = &flash_info[banknum];
  1874. int i, j;
  1875. flash_sect_t sect_cnt;
  1876. phys_addr_t sector;
  1877. unsigned long tmp;
  1878. int size_ratio;
  1879. uchar num_erase_regions;
  1880. int erase_region_size;
  1881. int erase_region_count;
  1882. struct cfi_qry qry;
  1883. unsigned long max_size;
  1884. memset(&qry, 0, sizeof(qry));
  1885. info->ext_addr = 0;
  1886. info->cfi_version = 0;
  1887. #ifdef CONFIG_SYS_FLASH_PROTECTION
  1888. info->legacy_unlock = 0;
  1889. #endif
  1890. info->start[0] = (ulong)map_physmem(base, info->portwidth, MAP_NOCACHE);
  1891. if (flash_detect_cfi(info, &qry)) {
  1892. info->vendor = le16_to_cpu(get_unaligned(&qry.p_id));
  1893. info->ext_addr = le16_to_cpu(get_unaligned(&qry.p_adr));
  1894. num_erase_regions = qry.num_erase_regions;
  1895. if (info->ext_addr) {
  1896. info->cfi_version = (ushort)flash_read_uchar(info,
  1897. info->ext_addr + 3) << 8;
  1898. info->cfi_version |= (ushort)flash_read_uchar(info,
  1899. info->ext_addr + 4);
  1900. }
  1901. #ifdef DEBUG
  1902. flash_printqry(&qry);
  1903. #endif
  1904. switch (info->vendor) {
  1905. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1906. case CFI_CMDSET_INTEL_STANDARD:
  1907. case CFI_CMDSET_INTEL_EXTENDED:
  1908. cmdset_intel_init(info, &qry);
  1909. break;
  1910. case CFI_CMDSET_AMD_STANDARD:
  1911. case CFI_CMDSET_AMD_EXTENDED:
  1912. cmdset_amd_init(info, &qry);
  1913. break;
  1914. default:
  1915. printf("CFI: Unknown command set 0x%x\n",
  1916. info->vendor);
  1917. /*
  1918. * Unfortunately, this means we don't know how
  1919. * to get the chip back to Read mode. Might
  1920. * as well try an Intel-style reset...
  1921. */
  1922. flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
  1923. return 0;
  1924. }
  1925. /* Do manufacturer-specific fixups */
  1926. switch (info->manufacturer_id) {
  1927. case 0x0001: /* AMD */
  1928. case 0x0037: /* AMIC */
  1929. flash_fixup_amd(info, &qry);
  1930. break;
  1931. case 0x001f:
  1932. flash_fixup_atmel(info, &qry);
  1933. break;
  1934. case 0x0020:
  1935. flash_fixup_stm(info, &qry);
  1936. break;
  1937. case 0x00bf: /* SST */
  1938. flash_fixup_sst(info, &qry);
  1939. break;
  1940. case 0x0089: /* Numonyx */
  1941. flash_fixup_num(info, &qry);
  1942. break;
  1943. }
  1944. debug("manufacturer is %d\n", info->vendor);
  1945. debug("manufacturer id is 0x%x\n", info->manufacturer_id);
  1946. debug("device id is 0x%x\n", info->device_id);
  1947. debug("device id2 is 0x%x\n", info->device_id2);
  1948. debug("cfi version is 0x%04x\n", info->cfi_version);
  1949. size_ratio = info->portwidth / info->chipwidth;
  1950. /* if the chip is x8/x16 reduce the ratio by half */
  1951. if (info->interface == FLASH_CFI_X8X16 &&
  1952. info->chipwidth == FLASH_CFI_BY8) {
  1953. size_ratio >>= 1;
  1954. }
  1955. debug("size_ratio %d port %d bits chip %d bits\n",
  1956. size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
  1957. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  1958. info->size = 1 << qry.dev_size;
  1959. /* multiply the size by the number of chips */
  1960. info->size *= size_ratio;
  1961. max_size = cfi_flash_bank_size(banknum);
  1962. if (max_size && info->size > max_size) {
  1963. debug("[truncated from %ldMiB]", info->size >> 20);
  1964. info->size = max_size;
  1965. }
  1966. debug("found %d erase regions\n", num_erase_regions);
  1967. sect_cnt = 0;
  1968. sector = base;
  1969. for (i = 0; i < num_erase_regions; i++) {
  1970. if (i > NUM_ERASE_REGIONS) {
  1971. printf("%d erase regions found, only %d used\n",
  1972. num_erase_regions, NUM_ERASE_REGIONS);
  1973. break;
  1974. }
  1975. tmp = le32_to_cpu(get_unaligned(
  1976. &qry.erase_region_info[i]));
  1977. debug("erase region %u: 0x%08lx\n", i, tmp);
  1978. erase_region_count = (tmp & 0xffff) + 1;
  1979. tmp >>= 16;
  1980. erase_region_size =
  1981. (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
  1982. debug("erase_region_count = %d ", erase_region_count);
  1983. debug("erase_region_size = %d\n", erase_region_size);
  1984. for (j = 0; j < erase_region_count; j++) {
  1985. if (sector - base >= info->size)
  1986. break;
  1987. if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) {
  1988. printf("ERROR: too many flash sectors\n");
  1989. break;
  1990. }
  1991. info->start[sect_cnt] =
  1992. (ulong)map_physmem(sector,
  1993. info->portwidth,
  1994. MAP_NOCACHE);
  1995. sector += (erase_region_size * size_ratio);
  1996. /*
  1997. * Only read protection status from
  1998. * supported devices (intel...)
  1999. */
  2000. switch (info->vendor) {
  2001. case CFI_CMDSET_INTEL_PROG_REGIONS:
  2002. case CFI_CMDSET_INTEL_EXTENDED:
  2003. case CFI_CMDSET_INTEL_STANDARD:
  2004. /*
  2005. * Set flash to read-id mode. Otherwise
  2006. * reading protected status is not
  2007. * guaranteed.
  2008. */
  2009. flash_write_cmd(info, sect_cnt, 0,
  2010. FLASH_CMD_READ_ID);
  2011. info->protect[sect_cnt] =
  2012. flash_isset(info, sect_cnt,
  2013. FLASH_OFFSET_PROTECT,
  2014. FLASH_STATUS_PROTECT);
  2015. flash_write_cmd(info, sect_cnt, 0,
  2016. FLASH_CMD_RESET);
  2017. break;
  2018. case CFI_CMDSET_AMD_EXTENDED:
  2019. case CFI_CMDSET_AMD_STANDARD:
  2020. if (!info->legacy_unlock) {
  2021. /* default: not protected */
  2022. info->protect[sect_cnt] = 0;
  2023. break;
  2024. }
  2025. /* Read protection (PPB) from sector */
  2026. flash_write_cmd(info, 0, 0,
  2027. info->cmd_reset);
  2028. flash_unlock_seq(info, 0);
  2029. flash_write_cmd(info, 0,
  2030. info->addr_unlock1,
  2031. FLASH_CMD_READ_ID);
  2032. info->protect[sect_cnt] =
  2033. flash_isset(
  2034. info, sect_cnt,
  2035. FLASH_OFFSET_PROTECT,
  2036. FLASH_STATUS_PROTECT);
  2037. break;
  2038. default:
  2039. /* default: not protected */
  2040. info->protect[sect_cnt] = 0;
  2041. }
  2042. sect_cnt++;
  2043. }
  2044. }
  2045. info->sector_count = sect_cnt;
  2046. info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size);
  2047. tmp = 1 << qry.block_erase_timeout_typ;
  2048. info->erase_blk_tout = tmp *
  2049. (1 << qry.block_erase_timeout_max);
  2050. tmp = (1 << qry.buf_write_timeout_typ) *
  2051. (1 << qry.buf_write_timeout_max);
  2052. /* round up when converting to ms */
  2053. info->buffer_write_tout = (tmp + 999) / 1000;
  2054. tmp = (1 << qry.word_write_timeout_typ) *
  2055. (1 << qry.word_write_timeout_max);
  2056. /* round up when converting to ms */
  2057. info->write_tout = (tmp + 999) / 1000;
  2058. info->flash_id = FLASH_MAN_CFI;
  2059. if (info->interface == FLASH_CFI_X8X16 &&
  2060. info->chipwidth == FLASH_CFI_BY8) {
  2061. /* XXX - Need to test on x8/x16 in parallel. */
  2062. info->portwidth >>= 1;
  2063. }
  2064. flash_write_cmd(info, 0, 0, info->cmd_reset);
  2065. }
  2066. return (info->size);
  2067. }
  2068. #ifdef CONFIG_FLASH_CFI_MTD
  2069. void flash_set_verbose(uint v)
  2070. {
  2071. flash_verbose = v;
  2072. }
  2073. #endif
  2074. static void cfi_flash_set_config_reg(u32 base, u16 val)
  2075. {
  2076. #ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
  2077. /*
  2078. * Only set this config register if really defined
  2079. * to a valid value (0xffff is invalid)
  2080. */
  2081. if (val == 0xffff)
  2082. return;
  2083. /*
  2084. * Set configuration register. Data is "encrypted" in the 16 lower
  2085. * address bits.
  2086. */
  2087. flash_write16(FLASH_CMD_SETUP, (void *)(base + (val << 1)));
  2088. flash_write16(FLASH_CMD_SET_CR_CONFIRM, (void *)(base + (val << 1)));
  2089. /*
  2090. * Finally issue reset-command to bring device back to
  2091. * read-array mode
  2092. */
  2093. flash_write16(FLASH_CMD_RESET, (void *)base);
  2094. #endif
  2095. }
  2096. /*-----------------------------------------------------------------------
  2097. */
  2098. static void flash_protect_default(void)
  2099. {
  2100. #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
  2101. int i;
  2102. struct apl_s {
  2103. ulong start;
  2104. ulong size;
  2105. } apl[] = CONFIG_SYS_FLASH_AUTOPROTECT_LIST;
  2106. #endif
  2107. /* Monitor protection ON by default */
  2108. #if (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) && \
  2109. (!defined(CONFIG_MONITOR_IS_IN_RAM))
  2110. flash_protect(FLAG_PROTECT_SET,
  2111. CONFIG_SYS_MONITOR_BASE,
  2112. CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
  2113. flash_get_info(CONFIG_SYS_MONITOR_BASE));
  2114. #endif
  2115. /* Environment protection ON by default */
  2116. #ifdef CONFIG_ENV_IS_IN_FLASH
  2117. flash_protect(FLAG_PROTECT_SET,
  2118. CONFIG_ENV_ADDR,
  2119. CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
  2120. flash_get_info(CONFIG_ENV_ADDR));
  2121. #endif
  2122. /* Redundant environment protection ON by default */
  2123. #ifdef CONFIG_ENV_ADDR_REDUND
  2124. flash_protect(FLAG_PROTECT_SET,
  2125. CONFIG_ENV_ADDR_REDUND,
  2126. CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
  2127. flash_get_info(CONFIG_ENV_ADDR_REDUND));
  2128. #endif
  2129. #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
  2130. for (i = 0; i < ARRAY_SIZE(apl); i++) {
  2131. debug("autoprotecting from %08lx to %08lx\n",
  2132. apl[i].start, apl[i].start + apl[i].size - 1);
  2133. flash_protect(FLAG_PROTECT_SET,
  2134. apl[i].start,
  2135. apl[i].start + apl[i].size - 1,
  2136. flash_get_info(apl[i].start));
  2137. }
  2138. #endif
  2139. }
  2140. unsigned long flash_init(void)
  2141. {
  2142. unsigned long size = 0;
  2143. int i;
  2144. #ifdef CONFIG_SYS_FLASH_PROTECTION
  2145. /* read environment from EEPROM */
  2146. char s[64];
  2147. env_get_f("unlock", s, sizeof(s));
  2148. #endif
  2149. #ifdef CONFIG_CFI_FLASH /* for driver model */
  2150. cfi_flash_init_dm();
  2151. #endif
  2152. /* Init: no FLASHes known */
  2153. for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
  2154. flash_info[i].flash_id = FLASH_UNKNOWN;
  2155. /* Optionally write flash configuration register */
  2156. cfi_flash_set_config_reg(cfi_flash_bank_addr(i),
  2157. cfi_flash_config_reg(i));
  2158. if (!flash_detect_legacy(cfi_flash_bank_addr(i), i))
  2159. flash_get_size(cfi_flash_bank_addr(i), i);
  2160. size += flash_info[i].size;
  2161. if (flash_info[i].flash_id == FLASH_UNKNOWN) {
  2162. #ifndef CONFIG_SYS_FLASH_QUIET_TEST
  2163. printf("## Unknown flash on Bank %d ", i + 1);
  2164. printf("- Size = 0x%08lx = %ld MB\n",
  2165. flash_info[i].size,
  2166. flash_info[i].size >> 20);
  2167. #endif /* CONFIG_SYS_FLASH_QUIET_TEST */
  2168. }
  2169. #ifdef CONFIG_SYS_FLASH_PROTECTION
  2170. else if (strcmp(s, "yes") == 0) {
  2171. /*
  2172. * Only the U-Boot image and it's environment
  2173. * is protected, all other sectors are
  2174. * unprotected (unlocked) if flash hardware
  2175. * protection is used (CONFIG_SYS_FLASH_PROTECTION)
  2176. * and the environment variable "unlock" is
  2177. * set to "yes".
  2178. */
  2179. if (flash_info[i].legacy_unlock) {
  2180. int k;
  2181. /*
  2182. * Disable legacy_unlock temporarily,
  2183. * since flash_real_protect would
  2184. * relock all other sectors again
  2185. * otherwise.
  2186. */
  2187. flash_info[i].legacy_unlock = 0;
  2188. /*
  2189. * Legacy unlocking (e.g. Intel J3) ->
  2190. * unlock only one sector. This will
  2191. * unlock all sectors.
  2192. */
  2193. flash_real_protect(&flash_info[i], 0, 0);
  2194. flash_info[i].legacy_unlock = 1;
  2195. /*
  2196. * Manually mark other sectors as
  2197. * unlocked (unprotected)
  2198. */
  2199. for (k = 1; k < flash_info[i].sector_count; k++)
  2200. flash_info[i].protect[k] = 0;
  2201. } else {
  2202. /*
  2203. * No legancy unlocking -> unlock all sectors
  2204. */
  2205. flash_protect(FLAG_PROTECT_CLEAR,
  2206. flash_info[i].start[0],
  2207. flash_info[i].start[0]
  2208. + flash_info[i].size - 1,
  2209. &flash_info[i]);
  2210. }
  2211. }
  2212. #endif /* CONFIG_SYS_FLASH_PROTECTION */
  2213. }
  2214. flash_protect_default();
  2215. #ifdef CONFIG_FLASH_CFI_MTD
  2216. cfi_mtd_init();
  2217. #endif
  2218. return (size);
  2219. }
  2220. #ifdef CONFIG_CFI_FLASH /* for driver model */
  2221. static int cfi_flash_probe(struct udevice *dev)
  2222. {
  2223. const fdt32_t *cell;
  2224. int addrc, sizec;
  2225. int len, idx;
  2226. addrc = dev_read_addr_cells(dev);
  2227. sizec = dev_read_size_cells(dev);
  2228. /* decode regs; there may be multiple reg tuples. */
  2229. cell = dev_read_prop(dev, "reg", &len);
  2230. if (!cell)
  2231. return -ENOENT;
  2232. idx = 0;
  2233. len /= sizeof(fdt32_t);
  2234. while (idx < len) {
  2235. phys_addr_t addr;
  2236. addr = dev_translate_address(dev, cell + idx);
  2237. flash_info[cfi_flash_num_flash_banks].dev = dev;
  2238. flash_info[cfi_flash_num_flash_banks].base = addr;
  2239. cfi_flash_num_flash_banks++;
  2240. idx += addrc + sizec;
  2241. }
  2242. gd->bd->bi_flashstart = flash_info[0].base;
  2243. return 0;
  2244. }
  2245. static const struct udevice_id cfi_flash_ids[] = {
  2246. { .compatible = "cfi-flash" },
  2247. { .compatible = "jedec-flash" },
  2248. {}
  2249. };
  2250. U_BOOT_DRIVER(cfi_flash) = {
  2251. .name = "cfi_flash",
  2252. .id = UCLASS_MTD,
  2253. .of_match = cfi_flash_ids,
  2254. .probe = cfi_flash_probe,
  2255. };
  2256. #endif /* CONFIG_CFI_FLASH */