stm32mp1.c 19 KB

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  1. // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
  2. /*
  3. * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
  4. */
  5. #include <common.h>
  6. #include <adc.h>
  7. #include <bootm.h>
  8. #include <config.h>
  9. #include <clk.h>
  10. #include <dm.h>
  11. #include <env.h>
  12. #include <env_internal.h>
  13. #include <g_dnl.h>
  14. #include <generic-phy.h>
  15. #include <i2c.h>
  16. #include <led.h>
  17. #include <misc.h>
  18. #include <mtd.h>
  19. #include <mtd_node.h>
  20. #include <phy.h>
  21. #include <reset.h>
  22. #include <syscon.h>
  23. #include <usb.h>
  24. #include <asm/io.h>
  25. #include <asm/gpio.h>
  26. #include <asm/arch/stm32.h>
  27. #include <asm/arch/sys_proto.h>
  28. #include <jffs2/load_kernel.h>
  29. #include <power/regulator.h>
  30. #include <usb/dwc2_udc.h>
  31. /* SYSCFG registers */
  32. #define SYSCFG_BOOTR 0x00
  33. #define SYSCFG_PMCSETR 0x04
  34. #define SYSCFG_IOCTRLSETR 0x18
  35. #define SYSCFG_ICNR 0x1C
  36. #define SYSCFG_CMPCR 0x20
  37. #define SYSCFG_CMPENSETR 0x24
  38. #define SYSCFG_PMCCLRR 0x44
  39. #define SYSCFG_BOOTR_BOOT_MASK GENMASK(2, 0)
  40. #define SYSCFG_BOOTR_BOOTPD_SHIFT 4
  41. #define SYSCFG_IOCTRLSETR_HSLVEN_TRACE BIT(0)
  42. #define SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI BIT(1)
  43. #define SYSCFG_IOCTRLSETR_HSLVEN_ETH BIT(2)
  44. #define SYSCFG_IOCTRLSETR_HSLVEN_SDMMC BIT(3)
  45. #define SYSCFG_IOCTRLSETR_HSLVEN_SPI BIT(4)
  46. #define SYSCFG_CMPCR_SW_CTRL BIT(1)
  47. #define SYSCFG_CMPCR_READY BIT(8)
  48. #define SYSCFG_CMPENSETR_MPU_EN BIT(0)
  49. #define SYSCFG_PMCSETR_ETH_CLK_SEL BIT(16)
  50. #define SYSCFG_PMCSETR_ETH_REF_CLK_SEL BIT(17)
  51. #define SYSCFG_PMCSETR_ETH_SELMII BIT(20)
  52. #define SYSCFG_PMCSETR_ETH_SEL_MASK GENMASK(23, 21)
  53. #define SYSCFG_PMCSETR_ETH_SEL_GMII_MII 0
  54. #define SYSCFG_PMCSETR_ETH_SEL_RGMII BIT(21)
  55. #define SYSCFG_PMCSETR_ETH_SEL_RMII BIT(23)
  56. /*
  57. * Get a global data pointer
  58. */
  59. DECLARE_GLOBAL_DATA_PTR;
  60. #define USB_LOW_THRESHOLD_UV 200000
  61. #define USB_WARNING_LOW_THRESHOLD_UV 660000
  62. #define USB_START_LOW_THRESHOLD_UV 1230000
  63. #define USB_START_HIGH_THRESHOLD_UV 2150000
  64. int checkboard(void)
  65. {
  66. int ret;
  67. char *mode;
  68. u32 otp;
  69. struct udevice *dev;
  70. const char *fdt_compat;
  71. int fdt_compat_len;
  72. if (IS_ENABLED(CONFIG_STM32MP1_OPTEE))
  73. mode = "trusted with OP-TEE";
  74. else if (IS_ENABLED(CONFIG_STM32MP1_TRUSTED))
  75. mode = "trusted";
  76. else
  77. mode = "basic";
  78. printf("Board: stm32mp1 in %s mode", mode);
  79. fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible",
  80. &fdt_compat_len);
  81. if (fdt_compat && fdt_compat_len)
  82. printf(" (%s)", fdt_compat);
  83. puts("\n");
  84. ret = uclass_get_device_by_driver(UCLASS_MISC,
  85. DM_GET_DRIVER(stm32mp_bsec),
  86. &dev);
  87. if (!ret)
  88. ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD),
  89. &otp, sizeof(otp));
  90. if (!ret && otp) {
  91. printf("Board: MB%04x Var%d Rev.%c-%02d\n",
  92. otp >> 16,
  93. (otp >> 12) & 0xF,
  94. ((otp >> 8) & 0xF) - 1 + 'A',
  95. otp & 0xF);
  96. }
  97. return 0;
  98. }
  99. static void board_key_check(void)
  100. {
  101. #if defined(CONFIG_FASTBOOT) || defined(CONFIG_CMD_STM32PROG)
  102. ofnode node;
  103. struct gpio_desc gpio;
  104. enum forced_boot_mode boot_mode = BOOT_NORMAL;
  105. node = ofnode_path("/config");
  106. if (!ofnode_valid(node)) {
  107. debug("%s: no /config node?\n", __func__);
  108. return;
  109. }
  110. #ifdef CONFIG_FASTBOOT
  111. if (gpio_request_by_name_nodev(node, "st,fastboot-gpios", 0,
  112. &gpio, GPIOD_IS_IN)) {
  113. debug("%s: could not find a /config/st,fastboot-gpios\n",
  114. __func__);
  115. } else {
  116. if (dm_gpio_get_value(&gpio)) {
  117. puts("Fastboot key pressed, ");
  118. boot_mode = BOOT_FASTBOOT;
  119. }
  120. dm_gpio_free(NULL, &gpio);
  121. }
  122. #endif
  123. #ifdef CONFIG_CMD_STM32PROG
  124. if (gpio_request_by_name_nodev(node, "st,stm32prog-gpios", 0,
  125. &gpio, GPIOD_IS_IN)) {
  126. debug("%s: could not find a /config/st,stm32prog-gpios\n",
  127. __func__);
  128. } else {
  129. if (dm_gpio_get_value(&gpio)) {
  130. puts("STM32Programmer key pressed, ");
  131. boot_mode = BOOT_STM32PROG;
  132. }
  133. dm_gpio_free(NULL, &gpio);
  134. }
  135. #endif
  136. if (boot_mode != BOOT_NORMAL) {
  137. puts("entering download mode...\n");
  138. clrsetbits_le32(TAMP_BOOT_CONTEXT,
  139. TAMP_BOOT_FORCED_MASK,
  140. boot_mode);
  141. }
  142. #endif
  143. }
  144. #if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
  145. /* STMicroelectronics STUSB1600 Type-C controller */
  146. #define STUSB1600_CC_CONNECTION_STATUS 0x0E
  147. /* STUSB1600_CC_CONNECTION_STATUS bitfields */
  148. #define STUSB1600_CC_ATTACH BIT(0)
  149. static int stusb1600_init(struct udevice **dev_stusb1600)
  150. {
  151. ofnode node;
  152. struct udevice *dev, *bus;
  153. int ret;
  154. u32 chip_addr;
  155. *dev_stusb1600 = NULL;
  156. /* if node stusb1600 is present, means DK1 or DK2 board */
  157. node = ofnode_by_compatible(ofnode_null(), "st,stusb1600");
  158. if (!ofnode_valid(node))
  159. return -ENODEV;
  160. ret = ofnode_read_u32(node, "reg", &chip_addr);
  161. if (ret)
  162. return -EINVAL;
  163. ret = uclass_get_device_by_ofnode(UCLASS_I2C, ofnode_get_parent(node),
  164. &bus);
  165. if (ret) {
  166. printf("bus for stusb1600 not found\n");
  167. return -ENODEV;
  168. }
  169. ret = dm_i2c_probe(bus, chip_addr, 0, &dev);
  170. if (!ret)
  171. *dev_stusb1600 = dev;
  172. return ret;
  173. }
  174. static int stusb1600_cable_connected(struct udevice *dev)
  175. {
  176. u8 status;
  177. if (dm_i2c_read(dev, STUSB1600_CC_CONNECTION_STATUS, &status, 1))
  178. return 0;
  179. return status & STUSB1600_CC_ATTACH;
  180. }
  181. #include <usb/dwc2_udc.h>
  182. int g_dnl_board_usb_cable_connected(void)
  183. {
  184. struct udevice *stusb1600;
  185. struct udevice *dwc2_udc_otg;
  186. int ret;
  187. if (!stusb1600_init(&stusb1600))
  188. return stusb1600_cable_connected(stusb1600);
  189. ret = uclass_get_device_by_driver(UCLASS_USB_GADGET_GENERIC,
  190. DM_GET_DRIVER(dwc2_udc_otg),
  191. &dwc2_udc_otg);
  192. if (!ret)
  193. debug("dwc2_udc_otg init failed\n");
  194. return dwc2_udc_B_session_valid(dwc2_udc_otg);
  195. }
  196. #endif /* CONFIG_USB_GADGET */
  197. static int get_led(struct udevice **dev, char *led_string)
  198. {
  199. char *led_name;
  200. int ret;
  201. led_name = fdtdec_get_config_string(gd->fdt_blob, led_string);
  202. if (!led_name) {
  203. pr_debug("%s: could not find %s config string\n",
  204. __func__, led_string);
  205. return -ENOENT;
  206. }
  207. ret = led_get_by_label(led_name, dev);
  208. if (ret) {
  209. debug("%s: get=%d\n", __func__, ret);
  210. return ret;
  211. }
  212. return 0;
  213. }
  214. static int setup_led(enum led_state_t cmd)
  215. {
  216. struct udevice *dev;
  217. int ret;
  218. ret = get_led(&dev, "u-boot,boot-led");
  219. if (ret)
  220. return ret;
  221. ret = led_set_state(dev, cmd);
  222. return ret;
  223. }
  224. static int board_check_usb_power(void)
  225. {
  226. struct ofnode_phandle_args adc_args;
  227. struct udevice *adc;
  228. struct udevice *led;
  229. ofnode node;
  230. unsigned int raw;
  231. int max_uV = 0;
  232. int min_uV = USB_START_HIGH_THRESHOLD_UV;
  233. int ret, uV, adc_count;
  234. u32 nb_blink;
  235. u8 i;
  236. node = ofnode_path("/config");
  237. if (!ofnode_valid(node)) {
  238. debug("%s: no /config node?\n", __func__);
  239. return -ENOENT;
  240. }
  241. /*
  242. * Retrieve the ADC channels devices and get measurement
  243. * for each of them
  244. */
  245. adc_count = ofnode_count_phandle_with_args(node, "st,adc_usb_pd",
  246. "#io-channel-cells");
  247. if (adc_count < 0) {
  248. if (adc_count == -ENOENT)
  249. return 0;
  250. pr_err("%s: can't find adc channel (%d)\n", __func__,
  251. adc_count);
  252. return adc_count;
  253. }
  254. for (i = 0; i < adc_count; i++) {
  255. if (ofnode_parse_phandle_with_args(node, "st,adc_usb_pd",
  256. "#io-channel-cells", 0, i,
  257. &adc_args)) {
  258. pr_debug("%s: can't find /config/st,adc_usb_pd\n",
  259. __func__);
  260. return 0;
  261. }
  262. ret = uclass_get_device_by_ofnode(UCLASS_ADC, adc_args.node,
  263. &adc);
  264. if (ret) {
  265. pr_err("%s: Can't get adc device(%d)\n", __func__,
  266. ret);
  267. return ret;
  268. }
  269. ret = adc_channel_single_shot(adc->name, adc_args.args[0],
  270. &raw);
  271. if (ret) {
  272. pr_err("%s: single shot failed for %s[%d]!\n",
  273. __func__, adc->name, adc_args.args[0]);
  274. return ret;
  275. }
  276. /* Convert to uV */
  277. if (!adc_raw_to_uV(adc, raw, &uV)) {
  278. if (uV > max_uV)
  279. max_uV = uV;
  280. if (uV < min_uV)
  281. min_uV = uV;
  282. pr_debug("%s: %s[%02d] = %u, %d uV\n", __func__,
  283. adc->name, adc_args.args[0], raw, uV);
  284. } else {
  285. pr_err("%s: Can't get uV value for %s[%d]\n",
  286. __func__, adc->name, adc_args.args[0]);
  287. }
  288. }
  289. /*
  290. * If highest value is inside 1.23 Volts and 2.10 Volts, that means
  291. * board is plugged on an USB-C 3A power supply and boot process can
  292. * continue.
  293. */
  294. if (max_uV > USB_START_LOW_THRESHOLD_UV &&
  295. max_uV <= USB_START_HIGH_THRESHOLD_UV &&
  296. min_uV <= USB_LOW_THRESHOLD_UV)
  297. return 0;
  298. pr_err("****************************************************\n");
  299. /*
  300. * If highest and lowest value are either both below
  301. * USB_LOW_THRESHOLD_UV or both above USB_LOW_THRESHOLD_UV, that
  302. * means USB TYPE-C is in unattached mode, this is an issue, make
  303. * u-boot,error-led blinking and stop boot process.
  304. */
  305. if ((max_uV > USB_LOW_THRESHOLD_UV &&
  306. min_uV > USB_LOW_THRESHOLD_UV) ||
  307. (max_uV <= USB_LOW_THRESHOLD_UV &&
  308. min_uV <= USB_LOW_THRESHOLD_UV)) {
  309. pr_err("* ERROR USB TYPE-C connection in unattached mode *\n");
  310. pr_err("* Check that USB TYPE-C cable is correctly plugged *\n");
  311. /* with 125ms interval, led will blink for 17.02 years ....*/
  312. nb_blink = U32_MAX;
  313. }
  314. if (max_uV > USB_LOW_THRESHOLD_UV &&
  315. max_uV <= USB_WARNING_LOW_THRESHOLD_UV &&
  316. min_uV <= USB_LOW_THRESHOLD_UV) {
  317. pr_err("* WARNING 500mA power supply detected *\n");
  318. nb_blink = 2;
  319. }
  320. if (max_uV > USB_WARNING_LOW_THRESHOLD_UV &&
  321. max_uV <= USB_START_LOW_THRESHOLD_UV &&
  322. min_uV <= USB_LOW_THRESHOLD_UV) {
  323. pr_err("* WARNING 1.5mA power supply detected *\n");
  324. nb_blink = 3;
  325. }
  326. /*
  327. * If highest value is above 2.15 Volts that means that the USB TypeC
  328. * supplies more than 3 Amp, this is not compliant with TypeC specification
  329. */
  330. if (max_uV > USB_START_HIGH_THRESHOLD_UV) {
  331. pr_err("* USB TYPE-C charger not compliant with *\n");
  332. pr_err("* specification *\n");
  333. pr_err("****************************************************\n\n");
  334. /* with 125ms interval, led will blink for 17.02 years ....*/
  335. nb_blink = U32_MAX;
  336. } else {
  337. pr_err("* Current too low, use a 3A power supply! *\n");
  338. pr_err("****************************************************\n\n");
  339. }
  340. ret = get_led(&led, "u-boot,error-led");
  341. if (ret) {
  342. /* in unattached case, the boot process must be stopped */
  343. if (nb_blink == U32_MAX)
  344. hang();
  345. return ret;
  346. }
  347. /* make u-boot,error-led blinking */
  348. for (i = 0; i < nb_blink * 2; i++) {
  349. led_set_state(led, LEDST_TOGGLE);
  350. mdelay(125);
  351. }
  352. led_set_state(led, LEDST_ON);
  353. return 0;
  354. }
  355. static void sysconf_init(void)
  356. {
  357. #ifndef CONFIG_STM32MP1_TRUSTED
  358. u8 *syscfg;
  359. #ifdef CONFIG_DM_REGULATOR
  360. struct udevice *pwr_dev;
  361. struct udevice *pwr_reg;
  362. struct udevice *dev;
  363. int ret;
  364. u32 otp = 0;
  365. #endif
  366. u32 bootr;
  367. syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
  368. /* interconnect update : select master using the port 1 */
  369. /* LTDC = AXI_M9 */
  370. /* GPU = AXI_M8 */
  371. /* today information is hardcoded in U-Boot */
  372. writel(BIT(9), syscfg + SYSCFG_ICNR);
  373. /* disable Pull-Down for boot pin connected to VDD */
  374. bootr = readl(syscfg + SYSCFG_BOOTR);
  375. bootr &= ~(SYSCFG_BOOTR_BOOT_MASK << SYSCFG_BOOTR_BOOTPD_SHIFT);
  376. bootr |= (bootr & SYSCFG_BOOTR_BOOT_MASK) << SYSCFG_BOOTR_BOOTPD_SHIFT;
  377. writel(bootr, syscfg + SYSCFG_BOOTR);
  378. #ifdef CONFIG_DM_REGULATOR
  379. /* High Speed Low Voltage Pad mode Enable for SPI, SDMMC, ETH, QSPI
  380. * and TRACE. Needed above ~50MHz and conditioned by AFMUX selection.
  381. * The customer will have to disable this for low frequencies
  382. * or if AFMUX is selected but the function not used, typically for
  383. * TRACE. Otherwise, impact on power consumption.
  384. *
  385. * WARNING:
  386. * enabling High Speed mode while VDD>2.7V
  387. * with the OTP product_below_2v5 (OTP 18, BIT 13)
  388. * erroneously set to 1 can damage the IC!
  389. * => U-Boot set the register only if VDD < 2.7V (in DT)
  390. * but this value need to be consistent with board design
  391. */
  392. ret = syscon_get_by_driver_data(STM32MP_SYSCON_PWR, &pwr_dev);
  393. if (!ret) {
  394. ret = uclass_get_device_by_driver(UCLASS_MISC,
  395. DM_GET_DRIVER(stm32mp_bsec),
  396. &dev);
  397. if (ret) {
  398. pr_err("Can't find stm32mp_bsec driver\n");
  399. return;
  400. }
  401. ret = misc_read(dev, STM32_BSEC_SHADOW(18), &otp, 4);
  402. if (!ret)
  403. otp = otp & BIT(13);
  404. /* get VDD = pwr-supply */
  405. ret = device_get_supply_regulator(pwr_dev, "pwr-supply",
  406. &pwr_reg);
  407. /* check if VDD is Low Voltage */
  408. if (!ret) {
  409. if (regulator_get_value(pwr_reg) < 2700000) {
  410. writel(SYSCFG_IOCTRLSETR_HSLVEN_TRACE |
  411. SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI |
  412. SYSCFG_IOCTRLSETR_HSLVEN_ETH |
  413. SYSCFG_IOCTRLSETR_HSLVEN_SDMMC |
  414. SYSCFG_IOCTRLSETR_HSLVEN_SPI,
  415. syscfg + SYSCFG_IOCTRLSETR);
  416. if (!otp)
  417. pr_err("product_below_2v5=0: HSLVEN protected by HW\n");
  418. } else {
  419. if (otp)
  420. pr_err("product_below_2v5=1: HSLVEN update is destructive, no update as VDD>2.7V\n");
  421. }
  422. } else {
  423. debug("VDD unknown");
  424. }
  425. }
  426. #endif
  427. /* activate automatic I/O compensation
  428. * warning: need to ensure CSI enabled and ready in clock driver
  429. */
  430. writel(SYSCFG_CMPENSETR_MPU_EN, syscfg + SYSCFG_CMPENSETR);
  431. while (!(readl(syscfg + SYSCFG_CMPCR) & SYSCFG_CMPCR_READY))
  432. ;
  433. clrbits_le32(syscfg + SYSCFG_CMPCR, SYSCFG_CMPCR_SW_CTRL);
  434. #endif
  435. }
  436. /* board dependent setup after realloc */
  437. int board_init(void)
  438. {
  439. struct udevice *dev;
  440. /* address of boot parameters */
  441. gd->bd->bi_boot_params = STM32_DDR_BASE + 0x100;
  442. /* probe all PINCTRL for hog */
  443. for (uclass_first_device(UCLASS_PINCTRL, &dev);
  444. dev;
  445. uclass_next_device(&dev)) {
  446. pr_debug("probe pincontrol = %s\n", dev->name);
  447. }
  448. board_key_check();
  449. #ifdef CONFIG_DM_REGULATOR
  450. regulators_enable_boot_on(_DEBUG);
  451. #endif
  452. sysconf_init();
  453. if (IS_ENABLED(CONFIG_LED))
  454. led_default_state();
  455. return 0;
  456. }
  457. int board_late_init(void)
  458. {
  459. #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
  460. const void *fdt_compat;
  461. int fdt_compat_len;
  462. fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible",
  463. &fdt_compat_len);
  464. if (fdt_compat && fdt_compat_len) {
  465. if (strncmp(fdt_compat, "st,", 3) != 0)
  466. env_set("board_name", fdt_compat);
  467. else
  468. env_set("board_name", fdt_compat + 3);
  469. }
  470. #endif
  471. /* for DK1/DK2 boards */
  472. board_check_usb_power();
  473. return 0;
  474. }
  475. void board_quiesce_devices(void)
  476. {
  477. setup_led(LEDST_OFF);
  478. }
  479. /* board interface eth init */
  480. /* this is a weak define that we are overriding */
  481. int board_interface_eth_init(phy_interface_t interface_type,
  482. bool eth_clk_sel_reg, bool eth_ref_clk_sel_reg)
  483. {
  484. u8 *syscfg;
  485. u32 value;
  486. syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
  487. if (!syscfg)
  488. return -ENODEV;
  489. switch (interface_type) {
  490. case PHY_INTERFACE_MODE_MII:
  491. value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
  492. SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
  493. debug("%s: PHY_INTERFACE_MODE_MII\n", __func__);
  494. break;
  495. case PHY_INTERFACE_MODE_GMII:
  496. if (eth_clk_sel_reg)
  497. value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
  498. SYSCFG_PMCSETR_ETH_CLK_SEL;
  499. else
  500. value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII;
  501. debug("%s: PHY_INTERFACE_MODE_GMII\n", __func__);
  502. break;
  503. case PHY_INTERFACE_MODE_RMII:
  504. if (eth_ref_clk_sel_reg)
  505. value = SYSCFG_PMCSETR_ETH_SEL_RMII |
  506. SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
  507. else
  508. value = SYSCFG_PMCSETR_ETH_SEL_RMII;
  509. debug("%s: PHY_INTERFACE_MODE_RMII\n", __func__);
  510. break;
  511. case PHY_INTERFACE_MODE_RGMII:
  512. case PHY_INTERFACE_MODE_RGMII_ID:
  513. case PHY_INTERFACE_MODE_RGMII_RXID:
  514. case PHY_INTERFACE_MODE_RGMII_TXID:
  515. if (eth_clk_sel_reg)
  516. value = SYSCFG_PMCSETR_ETH_SEL_RGMII |
  517. SYSCFG_PMCSETR_ETH_CLK_SEL;
  518. else
  519. value = SYSCFG_PMCSETR_ETH_SEL_RGMII;
  520. debug("%s: PHY_INTERFACE_MODE_RGMII\n", __func__);
  521. break;
  522. default:
  523. debug("%s: Do not manage %d interface\n",
  524. __func__, interface_type);
  525. /* Do not manage others interfaces */
  526. return -EINVAL;
  527. }
  528. /* clear and set ETH configuration bits */
  529. writel(SYSCFG_PMCSETR_ETH_SEL_MASK | SYSCFG_PMCSETR_ETH_SELMII |
  530. SYSCFG_PMCSETR_ETH_REF_CLK_SEL | SYSCFG_PMCSETR_ETH_CLK_SEL,
  531. syscfg + SYSCFG_PMCCLRR);
  532. writel(value, syscfg + SYSCFG_PMCSETR);
  533. return 0;
  534. }
  535. enum env_location env_get_location(enum env_operation op, int prio)
  536. {
  537. u32 bootmode = get_bootmode();
  538. if (prio)
  539. return ENVL_UNKNOWN;
  540. switch (bootmode & TAMP_BOOT_DEVICE_MASK) {
  541. #ifdef CONFIG_ENV_IS_IN_EXT4
  542. case BOOT_FLASH_SD:
  543. case BOOT_FLASH_EMMC:
  544. return ENVL_EXT4;
  545. #endif
  546. #ifdef CONFIG_ENV_IS_IN_UBI
  547. case BOOT_FLASH_NAND:
  548. return ENVL_UBI;
  549. #endif
  550. #ifdef CONFIG_ENV_IS_IN_SPI_FLASH
  551. case BOOT_FLASH_NOR:
  552. return ENVL_SPI_FLASH;
  553. #endif
  554. default:
  555. return ENVL_NOWHERE;
  556. }
  557. }
  558. #if defined(CONFIG_ENV_IS_IN_EXT4)
  559. const char *env_ext4_get_intf(void)
  560. {
  561. u32 bootmode = get_bootmode();
  562. switch (bootmode & TAMP_BOOT_DEVICE_MASK) {
  563. case BOOT_FLASH_SD:
  564. case BOOT_FLASH_EMMC:
  565. return "mmc";
  566. default:
  567. return "";
  568. }
  569. }
  570. const char *env_ext4_get_dev_part(void)
  571. {
  572. static char *const dev_part[] = {"0:auto", "1:auto", "2:auto"};
  573. u32 bootmode = get_bootmode();
  574. return dev_part[(bootmode & TAMP_BOOT_INSTANCE_MASK) - 1];
  575. }
  576. #endif
  577. #ifdef CONFIG_SYS_MTDPARTS_RUNTIME
  578. #define MTDPARTS_LEN 256
  579. #define MTDIDS_LEN 128
  580. /**
  581. * The mtdparts_nand0 and mtdparts_nor0 variable tends to be long.
  582. * If we need to access it before the env is relocated, then we need
  583. * to use our own stack buffer. gd->env_buf will be too small.
  584. *
  585. * @param buf temporary buffer pointer MTDPARTS_LEN long
  586. * @return mtdparts variable string, NULL if not found
  587. */
  588. static const char *env_get_mtdparts(const char *str, char *buf)
  589. {
  590. if (gd->flags & GD_FLG_ENV_READY)
  591. return env_get(str);
  592. if (env_get_f(str, buf, MTDPARTS_LEN) != -1)
  593. return buf;
  594. return NULL;
  595. }
  596. /**
  597. * update the variables "mtdids" and "mtdparts" with content of mtdparts_<dev>
  598. */
  599. static void board_get_mtdparts(const char *dev,
  600. char *mtdids,
  601. char *mtdparts)
  602. {
  603. char env_name[32] = "mtdparts_";
  604. char tmp_mtdparts[MTDPARTS_LEN];
  605. const char *tmp;
  606. /* name of env variable to read = mtdparts_<dev> */
  607. strcat(env_name, dev);
  608. tmp = env_get_mtdparts(env_name, tmp_mtdparts);
  609. if (tmp) {
  610. /* mtdids: "<dev>=<dev>, ...." */
  611. if (mtdids[0] != '\0')
  612. strcat(mtdids, ",");
  613. strcat(mtdids, dev);
  614. strcat(mtdids, "=");
  615. strcat(mtdids, dev);
  616. /* mtdparts: "mtdparts=<dev>:<mtdparts_<dev>>;..." */
  617. if (mtdparts[0] != '\0')
  618. strncat(mtdparts, ";", MTDPARTS_LEN);
  619. else
  620. strcat(mtdparts, "mtdparts=");
  621. strncat(mtdparts, dev, MTDPARTS_LEN);
  622. strncat(mtdparts, ":", MTDPARTS_LEN);
  623. strncat(mtdparts, tmp, MTDPARTS_LEN);
  624. }
  625. }
  626. void board_mtdparts_default(const char **mtdids, const char **mtdparts)
  627. {
  628. struct udevice *dev;
  629. static char parts[2 * MTDPARTS_LEN + 1];
  630. static char ids[MTDIDS_LEN + 1];
  631. static bool mtd_initialized;
  632. if (mtd_initialized) {
  633. *mtdids = ids;
  634. *mtdparts = parts;
  635. return;
  636. }
  637. memset(parts, 0, sizeof(parts));
  638. memset(ids, 0, sizeof(ids));
  639. if (!uclass_get_device(UCLASS_MTD, 0, &dev))
  640. board_get_mtdparts("nand0", ids, parts);
  641. if (!uclass_get_device(UCLASS_SPI_FLASH, 0, &dev))
  642. board_get_mtdparts("nor0", ids, parts);
  643. mtd_initialized = true;
  644. *mtdids = ids;
  645. *mtdparts = parts;
  646. debug("%s:mtdids=%s & mtdparts=%s\n", __func__, ids, parts);
  647. }
  648. #endif
  649. #if defined(CONFIG_OF_BOARD_SETUP)
  650. int ft_board_setup(void *blob, bd_t *bd)
  651. {
  652. #ifdef CONFIG_FDT_FIXUP_PARTITIONS
  653. struct node_info nodes[] = {
  654. { "st,stm32f469-qspi", MTD_DEV_TYPE_NOR, },
  655. { "st,stm32mp15-fmc2", MTD_DEV_TYPE_NAND, },
  656. };
  657. fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
  658. #endif
  659. return 0;
  660. }
  661. #endif