ls1012ardb.c 5.9 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312
  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright 2016 Freescale Semiconductor, Inc.
  4. */
  5. #include <common.h>
  6. #include <i2c.h>
  7. #include <asm/io.h>
  8. #include <asm/arch/clock.h>
  9. #include <asm/arch/fsl_serdes.h>
  10. #ifdef CONFIG_FSL_LS_PPA
  11. #include <asm/arch/ppa.h>
  12. #endif
  13. #include <asm/arch/mmu.h>
  14. #include <asm/arch/soc.h>
  15. #include <hwconfig.h>
  16. #include <ahci.h>
  17. #include <mmc.h>
  18. #include <scsi.h>
  19. #include <fsl_esdhc.h>
  20. #include <env_internal.h>
  21. #include <fsl_mmdc.h>
  22. #include <netdev.h>
  23. #include <fsl_sec.h>
  24. DECLARE_GLOBAL_DATA_PTR;
  25. #define BOOT_FROM_UPPER_BANK 0x2
  26. #define BOOT_FROM_LOWER_BANK 0x1
  27. int checkboard(void)
  28. {
  29. #ifdef CONFIG_TARGET_LS1012ARDB
  30. u8 in1;
  31. puts("Board: LS1012ARDB ");
  32. /* Initialize i2c early for Serial flash bank information */
  33. i2c_set_bus_num(0);
  34. if (i2c_read(I2C_MUX_IO_ADDR, I2C_MUX_IO_1, 1, &in1, 1) < 0) {
  35. printf("Error reading i2c boot information!\n");
  36. return 0; /* Don't want to hang() on this error */
  37. }
  38. puts("Version");
  39. switch (in1 & SW_REV_MASK) {
  40. case SW_REV_A:
  41. puts(": RevA");
  42. break;
  43. case SW_REV_B:
  44. puts(": RevB");
  45. break;
  46. case SW_REV_C:
  47. puts(": RevC");
  48. break;
  49. case SW_REV_C1:
  50. puts(": RevC1");
  51. break;
  52. case SW_REV_C2:
  53. puts(": RevC2");
  54. break;
  55. case SW_REV_D:
  56. puts(": RevD");
  57. break;
  58. case SW_REV_E:
  59. puts(": RevE");
  60. break;
  61. default:
  62. puts(": unknown");
  63. break;
  64. }
  65. printf(", boot from QSPI");
  66. if ((in1 & SW_BOOT_MASK) == SW_BOOT_EMU)
  67. puts(": emu\n");
  68. else if ((in1 & SW_BOOT_MASK) == SW_BOOT_BANK1)
  69. puts(": bank1\n");
  70. else if ((in1 & SW_BOOT_MASK) == SW_BOOT_BANK2)
  71. puts(": bank2\n");
  72. else
  73. puts("unknown\n");
  74. #else
  75. puts("Board: LS1012A2G5RDB ");
  76. #endif
  77. return 0;
  78. }
  79. #ifdef CONFIG_TFABOOT
  80. int dram_init(void)
  81. {
  82. gd->ram_size = tfa_get_dram_size();
  83. if (!gd->ram_size)
  84. gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
  85. return 0;
  86. }
  87. #else
  88. int dram_init(void)
  89. {
  90. #ifndef CONFIG_TFABOOT
  91. static const struct fsl_mmdc_info mparam = {
  92. 0x05180000, /* mdctl */
  93. 0x00030035, /* mdpdc */
  94. 0x12554000, /* mdotc */
  95. 0xbabf7954, /* mdcfg0 */
  96. 0xdb328f64, /* mdcfg1 */
  97. 0x01ff00db, /* mdcfg2 */
  98. 0x00001680, /* mdmisc */
  99. 0x0f3c8000, /* mdref */
  100. 0x00002000, /* mdrwd */
  101. 0x00bf1023, /* mdor */
  102. 0x0000003f, /* mdasp */
  103. 0x0000022a, /* mpodtctrl */
  104. 0xa1390003, /* mpzqhwctrl */
  105. };
  106. mmdc_init(&mparam);
  107. #endif
  108. gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
  109. #if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)
  110. /* This will break-before-make MMU for DDR */
  111. update_early_mmu_table();
  112. #endif
  113. return 0;
  114. }
  115. #endif
  116. int board_early_init_f(void)
  117. {
  118. fsl_lsch2_early_init_f();
  119. return 0;
  120. }
  121. int board_init(void)
  122. {
  123. struct ccsr_cci400 *cci = (struct ccsr_cci400 *)(CONFIG_SYS_IMMR +
  124. CONFIG_SYS_CCI400_OFFSET);
  125. /*
  126. * Set CCI-400 control override register to enable barrier
  127. * transaction
  128. */
  129. if (current_el() == 3)
  130. out_le32(&cci->ctrl_ord, CCI400_CTRLORD_EN_BARRIER);
  131. #ifdef CONFIG_SYS_FSL_ERRATUM_A010315
  132. erratum_a010315();
  133. #endif
  134. #ifdef CONFIG_ENV_IS_NOWHERE
  135. gd->env_addr = (ulong)&default_environment[0];
  136. #endif
  137. #ifdef CONFIG_FSL_CAAM
  138. sec_init();
  139. #endif
  140. #ifdef CONFIG_FSL_LS_PPA
  141. ppa_init();
  142. #endif
  143. return 0;
  144. }
  145. #ifdef CONFIG_TARGET_LS1012ARDB
  146. int esdhc_status_fixup(void *blob, const char *compat)
  147. {
  148. char esdhc1_path[] = "/soc/esdhc@1580000";
  149. bool sdhc2_en = false;
  150. u8 mux_sdhc2;
  151. u8 io = 0;
  152. i2c_set_bus_num(0);
  153. /* IO1[7:3] is the field of board revision info. */
  154. if (i2c_read(I2C_MUX_IO_ADDR, I2C_MUX_IO_1, 1, &io, 1) < 0) {
  155. printf("Error reading i2c boot information!\n");
  156. return 0;
  157. }
  158. /* hwconfig method is used for RevD and later versions. */
  159. if ((io & SW_REV_MASK) <= SW_REV_D) {
  160. #ifdef CONFIG_HWCONFIG
  161. if (hwconfig("esdhc1"))
  162. sdhc2_en = true;
  163. #endif
  164. } else {
  165. /*
  166. * The I2C IO-expander for mux select is used to control
  167. * the muxing of various onboard interfaces.
  168. *
  169. * IO0[3:2] indicates SDHC2 interface demultiplexer
  170. * select lines.
  171. * 00 - SDIO wifi
  172. * 01 - GPIO (to Arduino)
  173. * 10 - eMMC Memory
  174. * 11 - SPI
  175. */
  176. if (i2c_read(I2C_MUX_IO_ADDR, I2C_MUX_IO_0, 1, &io, 1) < 0) {
  177. printf("Error reading i2c boot information!\n");
  178. return 0;
  179. }
  180. mux_sdhc2 = (io & 0x0c) >> 2;
  181. /* Enable SDHC2 only when use SDIO wifi and eMMC */
  182. if (mux_sdhc2 == 2 || mux_sdhc2 == 0)
  183. sdhc2_en = true;
  184. }
  185. if (sdhc2_en)
  186. do_fixup_by_path(blob, esdhc1_path, "status", "okay",
  187. sizeof("okay"), 1);
  188. else
  189. do_fixup_by_path(blob, esdhc1_path, "status", "disabled",
  190. sizeof("disabled"), 1);
  191. return 0;
  192. }
  193. #endif
  194. int ft_board_setup(void *blob, bd_t *bd)
  195. {
  196. arch_fixup_fdt(blob);
  197. ft_cpu_setup(blob, bd);
  198. return 0;
  199. }
  200. static int switch_to_bank1(void)
  201. {
  202. u8 data;
  203. int ret;
  204. i2c_set_bus_num(0);
  205. data = 0xf4;
  206. ret = i2c_write(0x24, 0x3, 1, &data, 1);
  207. if (ret) {
  208. printf("i2c write error to chip : %u, addr : %u, data : %u\n",
  209. 0x24, 0x3, data);
  210. }
  211. return ret;
  212. }
  213. static int switch_to_bank2(void)
  214. {
  215. u8 data;
  216. int ret;
  217. i2c_set_bus_num(0);
  218. data = 0xfc;
  219. ret = i2c_write(0x24, 0x7, 1, &data, 1);
  220. if (ret) {
  221. printf("i2c write error to chip : %u, addr : %u, data : %u\n",
  222. 0x24, 0x7, data);
  223. goto err;
  224. }
  225. data = 0xf5;
  226. ret = i2c_write(0x24, 0x3, 1, &data, 1);
  227. if (ret) {
  228. printf("i2c write error to chip : %u, addr : %u, data : %u\n",
  229. 0x24, 0x3, data);
  230. }
  231. err:
  232. return ret;
  233. }
  234. static int convert_flash_bank(int bank)
  235. {
  236. int ret = 0;
  237. switch (bank) {
  238. case BOOT_FROM_UPPER_BANK:
  239. ret = switch_to_bank2();
  240. break;
  241. case BOOT_FROM_LOWER_BANK:
  242. ret = switch_to_bank1();
  243. break;
  244. default:
  245. ret = CMD_RET_USAGE;
  246. break;
  247. };
  248. return ret;
  249. }
  250. static int flash_bank_cmd(cmd_tbl_t *cmdtp, int flag, int argc,
  251. char * const argv[])
  252. {
  253. if (argc != 2)
  254. return CMD_RET_USAGE;
  255. if (strcmp(argv[1], "1") == 0)
  256. convert_flash_bank(BOOT_FROM_LOWER_BANK);
  257. else if (strcmp(argv[1], "2") == 0)
  258. convert_flash_bank(BOOT_FROM_UPPER_BANK);
  259. else
  260. return CMD_RET_USAGE;
  261. return 0;
  262. }
  263. U_BOOT_CMD(
  264. boot_bank, 2, 0, flash_bank_cmd,
  265. "Flash bank Selection Control",
  266. "bank[1-lower bank/2-upper bank] (e.g. boot_bank 1)"
  267. );