phy.c 25 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Generic PHY Management code
  4. *
  5. * Copyright 2011 Freescale Semiconductor, Inc.
  6. * author Andy Fleming
  7. *
  8. * Based loosely off of Linux's PHY Lib
  9. */
  10. #include <common.h>
  11. #include <console.h>
  12. #include <dm.h>
  13. #include <log.h>
  14. #include <malloc.h>
  15. #include <net.h>
  16. #include <command.h>
  17. #include <miiphy.h>
  18. #include <phy.h>
  19. #include <errno.h>
  20. #include <asm/global_data.h>
  21. #include <linux/bitops.h>
  22. #include <linux/delay.h>
  23. #include <linux/err.h>
  24. #include <linux/compiler.h>
  25. DECLARE_GLOBAL_DATA_PTR;
  26. /* Generic PHY support and helper functions */
  27. /**
  28. * genphy_config_advert - sanitize and advertise auto-negotiation parameters
  29. * @phydev: target phy_device struct
  30. *
  31. * Description: Writes MII_ADVERTISE with the appropriate values,
  32. * after sanitizing the values to make sure we only advertise
  33. * what is supported. Returns < 0 on error, 0 if the PHY's advertisement
  34. * hasn't changed, and > 0 if it has changed.
  35. */
  36. static int genphy_config_advert(struct phy_device *phydev)
  37. {
  38. u32 advertise;
  39. int oldadv, adv, bmsr;
  40. int err, changed = 0;
  41. /* Only allow advertising what this PHY supports */
  42. phydev->advertising &= phydev->supported;
  43. advertise = phydev->advertising;
  44. /* Setup standard advertisement */
  45. adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE);
  46. oldadv = adv;
  47. if (adv < 0)
  48. return adv;
  49. adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4 | ADVERTISE_PAUSE_CAP |
  50. ADVERTISE_PAUSE_ASYM);
  51. if (advertise & ADVERTISED_10baseT_Half)
  52. adv |= ADVERTISE_10HALF;
  53. if (advertise & ADVERTISED_10baseT_Full)
  54. adv |= ADVERTISE_10FULL;
  55. if (advertise & ADVERTISED_100baseT_Half)
  56. adv |= ADVERTISE_100HALF;
  57. if (advertise & ADVERTISED_100baseT_Full)
  58. adv |= ADVERTISE_100FULL;
  59. if (advertise & ADVERTISED_Pause)
  60. adv |= ADVERTISE_PAUSE_CAP;
  61. if (advertise & ADVERTISED_Asym_Pause)
  62. adv |= ADVERTISE_PAUSE_ASYM;
  63. if (advertise & ADVERTISED_1000baseX_Half)
  64. adv |= ADVERTISE_1000XHALF;
  65. if (advertise & ADVERTISED_1000baseX_Full)
  66. adv |= ADVERTISE_1000XFULL;
  67. if (adv != oldadv) {
  68. err = phy_write(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE, adv);
  69. if (err < 0)
  70. return err;
  71. changed = 1;
  72. }
  73. bmsr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
  74. if (bmsr < 0)
  75. return bmsr;
  76. /* Per 802.3-2008, Section 22.2.4.2.16 Extended status all
  77. * 1000Mbits/sec capable PHYs shall have the BMSR_ESTATEN bit set to a
  78. * logical 1.
  79. */
  80. if (!(bmsr & BMSR_ESTATEN))
  81. return changed;
  82. /* Configure gigabit if it's supported */
  83. adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_CTRL1000);
  84. oldadv = adv;
  85. if (adv < 0)
  86. return adv;
  87. adv &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
  88. if (phydev->supported & (SUPPORTED_1000baseT_Half |
  89. SUPPORTED_1000baseT_Full)) {
  90. if (advertise & SUPPORTED_1000baseT_Half)
  91. adv |= ADVERTISE_1000HALF;
  92. if (advertise & SUPPORTED_1000baseT_Full)
  93. adv |= ADVERTISE_1000FULL;
  94. }
  95. if (adv != oldadv)
  96. changed = 1;
  97. err = phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000, adv);
  98. if (err < 0)
  99. return err;
  100. return changed;
  101. }
  102. /**
  103. * genphy_setup_forced - configures/forces speed/duplex from @phydev
  104. * @phydev: target phy_device struct
  105. *
  106. * Description: Configures MII_BMCR to force speed/duplex
  107. * to the values in phydev. Assumes that the values are valid.
  108. */
  109. static int genphy_setup_forced(struct phy_device *phydev)
  110. {
  111. int err;
  112. int ctl = BMCR_ANRESTART;
  113. phydev->pause = 0;
  114. phydev->asym_pause = 0;
  115. if (phydev->speed == SPEED_1000)
  116. ctl |= BMCR_SPEED1000;
  117. else if (phydev->speed == SPEED_100)
  118. ctl |= BMCR_SPEED100;
  119. if (phydev->duplex == DUPLEX_FULL)
  120. ctl |= BMCR_FULLDPLX;
  121. err = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl);
  122. return err;
  123. }
  124. /**
  125. * genphy_restart_aneg - Enable and Restart Autonegotiation
  126. * @phydev: target phy_device struct
  127. */
  128. int genphy_restart_aneg(struct phy_device *phydev)
  129. {
  130. int ctl;
  131. ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
  132. if (ctl < 0)
  133. return ctl;
  134. ctl |= (BMCR_ANENABLE | BMCR_ANRESTART);
  135. /* Don't isolate the PHY if we're negotiating */
  136. ctl &= ~(BMCR_ISOLATE);
  137. ctl = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl);
  138. return ctl;
  139. }
  140. /**
  141. * genphy_config_aneg - restart auto-negotiation or write BMCR
  142. * @phydev: target phy_device struct
  143. *
  144. * Description: If auto-negotiation is enabled, we configure the
  145. * advertising, and then restart auto-negotiation. If it is not
  146. * enabled, then we write the BMCR.
  147. */
  148. int genphy_config_aneg(struct phy_device *phydev)
  149. {
  150. int result;
  151. if (phydev->autoneg != AUTONEG_ENABLE)
  152. return genphy_setup_forced(phydev);
  153. result = genphy_config_advert(phydev);
  154. if (result < 0) /* error */
  155. return result;
  156. if (result == 0) {
  157. /*
  158. * Advertisment hasn't changed, but maybe aneg was never on to
  159. * begin with? Or maybe phy was isolated?
  160. */
  161. int ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
  162. if (ctl < 0)
  163. return ctl;
  164. if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
  165. result = 1; /* do restart aneg */
  166. }
  167. /*
  168. * Only restart aneg if we are advertising something different
  169. * than we were before.
  170. */
  171. if (result > 0)
  172. result = genphy_restart_aneg(phydev);
  173. return result;
  174. }
  175. /**
  176. * genphy_update_link - update link status in @phydev
  177. * @phydev: target phy_device struct
  178. *
  179. * Description: Update the value in phydev->link to reflect the
  180. * current link value. In order to do this, we need to read
  181. * the status register twice, keeping the second value.
  182. */
  183. int genphy_update_link(struct phy_device *phydev)
  184. {
  185. unsigned int mii_reg;
  186. /*
  187. * Wait if the link is up, and autonegotiation is in progress
  188. * (ie - we're capable and it's not done)
  189. */
  190. mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
  191. /*
  192. * If we already saw the link up, and it hasn't gone down, then
  193. * we don't need to wait for autoneg again
  194. */
  195. if (phydev->link && mii_reg & BMSR_LSTATUS)
  196. return 0;
  197. if ((phydev->autoneg == AUTONEG_ENABLE) &&
  198. !(mii_reg & BMSR_ANEGCOMPLETE)) {
  199. int i = 0;
  200. printf("%s Waiting for PHY auto negotiation to complete",
  201. phydev->dev->name);
  202. while (!(mii_reg & BMSR_ANEGCOMPLETE)) {
  203. /*
  204. * Timeout reached ?
  205. */
  206. if (i > (PHY_ANEG_TIMEOUT / 50)) {
  207. printf(" TIMEOUT !\n");
  208. phydev->link = 0;
  209. return -ETIMEDOUT;
  210. }
  211. if (ctrlc()) {
  212. puts("user interrupt!\n");
  213. phydev->link = 0;
  214. return -EINTR;
  215. }
  216. if ((i++ % 10) == 0)
  217. printf(".");
  218. mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
  219. mdelay(50); /* 50 ms */
  220. }
  221. printf(" done\n");
  222. phydev->link = 1;
  223. } else {
  224. /* Read the link a second time to clear the latched state */
  225. mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
  226. if (mii_reg & BMSR_LSTATUS)
  227. phydev->link = 1;
  228. else
  229. phydev->link = 0;
  230. }
  231. return 0;
  232. }
  233. /*
  234. * Generic function which updates the speed and duplex. If
  235. * autonegotiation is enabled, it uses the AND of the link
  236. * partner's advertised capabilities and our advertised
  237. * capabilities. If autonegotiation is disabled, we use the
  238. * appropriate bits in the control register.
  239. *
  240. * Stolen from Linux's mii.c and phy_device.c
  241. */
  242. int genphy_parse_link(struct phy_device *phydev)
  243. {
  244. int mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
  245. /* We're using autonegotiation */
  246. if (phydev->autoneg == AUTONEG_ENABLE) {
  247. u32 lpa = 0;
  248. int gblpa = 0;
  249. u32 estatus = 0;
  250. /* Check for gigabit capability */
  251. if (phydev->supported & (SUPPORTED_1000baseT_Full |
  252. SUPPORTED_1000baseT_Half)) {
  253. /* We want a list of states supported by
  254. * both PHYs in the link
  255. */
  256. gblpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_STAT1000);
  257. if (gblpa < 0) {
  258. debug("Could not read MII_STAT1000. ");
  259. debug("Ignoring gigabit capability\n");
  260. gblpa = 0;
  261. }
  262. gblpa &= phy_read(phydev,
  263. MDIO_DEVAD_NONE, MII_CTRL1000) << 2;
  264. }
  265. /* Set the baseline so we only have to set them
  266. * if they're different
  267. */
  268. phydev->speed = SPEED_10;
  269. phydev->duplex = DUPLEX_HALF;
  270. /* Check the gigabit fields */
  271. if (gblpa & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)) {
  272. phydev->speed = SPEED_1000;
  273. if (gblpa & PHY_1000BTSR_1000FD)
  274. phydev->duplex = DUPLEX_FULL;
  275. /* We're done! */
  276. return 0;
  277. }
  278. lpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE);
  279. lpa &= phy_read(phydev, MDIO_DEVAD_NONE, MII_LPA);
  280. if (lpa & (LPA_100FULL | LPA_100HALF)) {
  281. phydev->speed = SPEED_100;
  282. if (lpa & LPA_100FULL)
  283. phydev->duplex = DUPLEX_FULL;
  284. } else if (lpa & LPA_10FULL) {
  285. phydev->duplex = DUPLEX_FULL;
  286. }
  287. /*
  288. * Extended status may indicate that the PHY supports
  289. * 1000BASE-T/X even though the 1000BASE-T registers
  290. * are missing. In this case we can't tell whether the
  291. * peer also supports it, so we only check extended
  292. * status if the 1000BASE-T registers are actually
  293. * missing.
  294. */
  295. if ((mii_reg & BMSR_ESTATEN) && !(mii_reg & BMSR_ERCAP))
  296. estatus = phy_read(phydev, MDIO_DEVAD_NONE,
  297. MII_ESTATUS);
  298. if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_XHALF |
  299. ESTATUS_1000_TFULL | ESTATUS_1000_THALF)) {
  300. phydev->speed = SPEED_1000;
  301. if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_TFULL))
  302. phydev->duplex = DUPLEX_FULL;
  303. }
  304. } else {
  305. u32 bmcr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
  306. phydev->speed = SPEED_10;
  307. phydev->duplex = DUPLEX_HALF;
  308. if (bmcr & BMCR_FULLDPLX)
  309. phydev->duplex = DUPLEX_FULL;
  310. if (bmcr & BMCR_SPEED1000)
  311. phydev->speed = SPEED_1000;
  312. else if (bmcr & BMCR_SPEED100)
  313. phydev->speed = SPEED_100;
  314. }
  315. return 0;
  316. }
  317. int genphy_config(struct phy_device *phydev)
  318. {
  319. int val;
  320. u32 features;
  321. features = (SUPPORTED_TP | SUPPORTED_MII
  322. | SUPPORTED_AUI | SUPPORTED_FIBRE |
  323. SUPPORTED_BNC);
  324. /* Do we support autonegotiation? */
  325. val = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
  326. if (val < 0)
  327. return val;
  328. if (val & BMSR_ANEGCAPABLE)
  329. features |= SUPPORTED_Autoneg;
  330. if (val & BMSR_100FULL)
  331. features |= SUPPORTED_100baseT_Full;
  332. if (val & BMSR_100HALF)
  333. features |= SUPPORTED_100baseT_Half;
  334. if (val & BMSR_10FULL)
  335. features |= SUPPORTED_10baseT_Full;
  336. if (val & BMSR_10HALF)
  337. features |= SUPPORTED_10baseT_Half;
  338. if (val & BMSR_ESTATEN) {
  339. val = phy_read(phydev, MDIO_DEVAD_NONE, MII_ESTATUS);
  340. if (val < 0)
  341. return val;
  342. if (val & ESTATUS_1000_TFULL)
  343. features |= SUPPORTED_1000baseT_Full;
  344. if (val & ESTATUS_1000_THALF)
  345. features |= SUPPORTED_1000baseT_Half;
  346. if (val & ESTATUS_1000_XFULL)
  347. features |= SUPPORTED_1000baseX_Full;
  348. if (val & ESTATUS_1000_XHALF)
  349. features |= SUPPORTED_1000baseX_Half;
  350. }
  351. phydev->supported &= features;
  352. phydev->advertising &= features;
  353. genphy_config_aneg(phydev);
  354. return 0;
  355. }
  356. int genphy_startup(struct phy_device *phydev)
  357. {
  358. int ret;
  359. ret = genphy_update_link(phydev);
  360. if (ret)
  361. return ret;
  362. return genphy_parse_link(phydev);
  363. }
  364. int genphy_shutdown(struct phy_device *phydev)
  365. {
  366. return 0;
  367. }
  368. static struct phy_driver genphy_driver = {
  369. .uid = 0xffffffff,
  370. .mask = 0xffffffff,
  371. .name = "Generic PHY",
  372. .features = PHY_GBIT_FEATURES | SUPPORTED_MII |
  373. SUPPORTED_AUI | SUPPORTED_FIBRE |
  374. SUPPORTED_BNC,
  375. .config = genphy_config,
  376. .startup = genphy_startup,
  377. .shutdown = genphy_shutdown,
  378. };
  379. int genphy_init(void)
  380. {
  381. return phy_register(&genphy_driver);
  382. }
  383. static LIST_HEAD(phy_drivers);
  384. int phy_init(void)
  385. {
  386. #ifdef CONFIG_NEEDS_MANUAL_RELOC
  387. /*
  388. * The pointers inside phy_drivers also needs to be updated incase of
  389. * manual reloc, without which these points to some invalid
  390. * pre reloc address and leads to invalid accesses, hangs.
  391. */
  392. struct list_head *head = &phy_drivers;
  393. head->next = (void *)head->next + gd->reloc_off;
  394. head->prev = (void *)head->prev + gd->reloc_off;
  395. #endif
  396. #ifdef CONFIG_B53_SWITCH
  397. phy_b53_init();
  398. #endif
  399. #ifdef CONFIG_MV88E61XX_SWITCH
  400. phy_mv88e61xx_init();
  401. #endif
  402. #ifdef CONFIG_PHY_AQUANTIA
  403. phy_aquantia_init();
  404. #endif
  405. #ifdef CONFIG_PHY_ATHEROS
  406. phy_atheros_init();
  407. #endif
  408. #ifdef CONFIG_PHY_BROADCOM
  409. phy_broadcom_init();
  410. #endif
  411. #ifdef CONFIG_PHY_CORTINA
  412. phy_cortina_init();
  413. #endif
  414. #ifdef CONFIG_PHY_CORTINA_ACCESS
  415. phy_cortina_access_init();
  416. #endif
  417. #ifdef CONFIG_PHY_DAVICOM
  418. phy_davicom_init();
  419. #endif
  420. #ifdef CONFIG_PHY_ET1011C
  421. phy_et1011c_init();
  422. #endif
  423. #ifdef CONFIG_PHY_LXT
  424. phy_lxt_init();
  425. #endif
  426. #ifdef CONFIG_PHY_MARVELL
  427. phy_marvell_init();
  428. #endif
  429. #ifdef CONFIG_PHY_MICREL_KSZ8XXX
  430. phy_micrel_ksz8xxx_init();
  431. #endif
  432. #ifdef CONFIG_PHY_MICREL_KSZ90X1
  433. phy_micrel_ksz90x1_init();
  434. #endif
  435. #ifdef CONFIG_PHY_MESON_GXL
  436. phy_meson_gxl_init();
  437. #endif
  438. #ifdef CONFIG_PHY_NATSEMI
  439. phy_natsemi_init();
  440. #endif
  441. #ifdef CONFIG_PHY_REALTEK
  442. phy_realtek_init();
  443. #endif
  444. #ifdef CONFIG_PHY_SMSC
  445. phy_smsc_init();
  446. #endif
  447. #ifdef CONFIG_PHY_TERANETICS
  448. phy_teranetics_init();
  449. #endif
  450. #ifdef CONFIG_PHY_TI
  451. phy_ti_init();
  452. #endif
  453. #ifdef CONFIG_PHY_VITESSE
  454. phy_vitesse_init();
  455. #endif
  456. #ifdef CONFIG_PHY_XILINX
  457. phy_xilinx_init();
  458. #endif
  459. #ifdef CONFIG_PHY_MSCC
  460. phy_mscc_init();
  461. #endif
  462. #ifdef CONFIG_PHY_FIXED
  463. phy_fixed_init();
  464. #endif
  465. #ifdef CONFIG_PHY_NCSI
  466. phy_ncsi_init();
  467. #endif
  468. #ifdef CONFIG_PHY_XILINX_GMII2RGMII
  469. phy_xilinx_gmii2rgmii_init();
  470. #endif
  471. genphy_init();
  472. return 0;
  473. }
  474. int phy_register(struct phy_driver *drv)
  475. {
  476. INIT_LIST_HEAD(&drv->list);
  477. list_add_tail(&drv->list, &phy_drivers);
  478. #ifdef CONFIG_NEEDS_MANUAL_RELOC
  479. if (drv->probe)
  480. drv->probe += gd->reloc_off;
  481. if (drv->config)
  482. drv->config += gd->reloc_off;
  483. if (drv->startup)
  484. drv->startup += gd->reloc_off;
  485. if (drv->shutdown)
  486. drv->shutdown += gd->reloc_off;
  487. if (drv->readext)
  488. drv->readext += gd->reloc_off;
  489. if (drv->writeext)
  490. drv->writeext += gd->reloc_off;
  491. if (drv->read_mmd)
  492. drv->read_mmd += gd->reloc_off;
  493. if (drv->write_mmd)
  494. drv->write_mmd += gd->reloc_off;
  495. #endif
  496. return 0;
  497. }
  498. int phy_set_supported(struct phy_device *phydev, u32 max_speed)
  499. {
  500. /* The default values for phydev->supported are provided by the PHY
  501. * driver "features" member, we want to reset to sane defaults first
  502. * before supporting higher speeds.
  503. */
  504. phydev->supported &= PHY_DEFAULT_FEATURES;
  505. switch (max_speed) {
  506. default:
  507. return -ENOTSUPP;
  508. case SPEED_1000:
  509. phydev->supported |= PHY_1000BT_FEATURES;
  510. /* fall through */
  511. case SPEED_100:
  512. phydev->supported |= PHY_100BT_FEATURES;
  513. /* fall through */
  514. case SPEED_10:
  515. phydev->supported |= PHY_10BT_FEATURES;
  516. }
  517. return 0;
  518. }
  519. static int phy_probe(struct phy_device *phydev)
  520. {
  521. int err = 0;
  522. phydev->advertising = phydev->drv->features;
  523. phydev->supported = phydev->drv->features;
  524. phydev->mmds = phydev->drv->mmds;
  525. if (phydev->drv->probe)
  526. err = phydev->drv->probe(phydev);
  527. return err;
  528. }
  529. static struct phy_driver *generic_for_interface(phy_interface_t interface)
  530. {
  531. #ifdef CONFIG_PHYLIB_10G
  532. if (is_10g_interface(interface))
  533. return &gen10g_driver;
  534. #endif
  535. return &genphy_driver;
  536. }
  537. static struct phy_driver *get_phy_driver(struct phy_device *phydev,
  538. phy_interface_t interface)
  539. {
  540. struct list_head *entry;
  541. int phy_id = phydev->phy_id;
  542. struct phy_driver *drv = NULL;
  543. list_for_each(entry, &phy_drivers) {
  544. drv = list_entry(entry, struct phy_driver, list);
  545. if ((drv->uid & drv->mask) == (phy_id & drv->mask))
  546. return drv;
  547. }
  548. /* If we made it here, there's no driver for this PHY */
  549. return generic_for_interface(interface);
  550. }
  551. static struct phy_device *phy_device_create(struct mii_dev *bus, int addr,
  552. u32 phy_id, bool is_c45,
  553. phy_interface_t interface)
  554. {
  555. struct phy_device *dev;
  556. /*
  557. * We allocate the device, and initialize the
  558. * default values
  559. */
  560. dev = malloc(sizeof(*dev));
  561. if (!dev) {
  562. printf("Failed to allocate PHY device for %s:%d\n",
  563. bus ? bus->name : "(null bus)", addr);
  564. return NULL;
  565. }
  566. memset(dev, 0, sizeof(*dev));
  567. dev->duplex = -1;
  568. dev->link = 0;
  569. dev->interface = interface;
  570. #ifdef CONFIG_DM_ETH
  571. dev->node = ofnode_null();
  572. #endif
  573. dev->autoneg = AUTONEG_ENABLE;
  574. dev->addr = addr;
  575. dev->phy_id = phy_id;
  576. dev->is_c45 = is_c45;
  577. dev->bus = bus;
  578. dev->drv = get_phy_driver(dev, interface);
  579. if (phy_probe(dev)) {
  580. printf("%s, PHY probe failed\n", __func__);
  581. return NULL;
  582. }
  583. if (addr >= 0 && addr < PHY_MAX_ADDR && phy_id != PHY_FIXED_ID)
  584. bus->phymap[addr] = dev;
  585. return dev;
  586. }
  587. /**
  588. * get_phy_id - reads the specified addr for its ID.
  589. * @bus: the target MII bus
  590. * @addr: PHY address on the MII bus
  591. * @phy_id: where to store the ID retrieved.
  592. *
  593. * Description: Reads the ID registers of the PHY at @addr on the
  594. * @bus, stores it in @phy_id and returns zero on success.
  595. */
  596. int __weak get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id)
  597. {
  598. int phy_reg;
  599. /*
  600. * Grab the bits from PHYIR1, and put them
  601. * in the upper half
  602. */
  603. phy_reg = bus->read(bus, addr, devad, MII_PHYSID1);
  604. if (phy_reg < 0)
  605. return -EIO;
  606. *phy_id = (phy_reg & 0xffff) << 16;
  607. /* Grab the bits from PHYIR2, and put them in the lower half */
  608. phy_reg = bus->read(bus, addr, devad, MII_PHYSID2);
  609. if (phy_reg < 0)
  610. return -EIO;
  611. *phy_id |= (phy_reg & 0xffff);
  612. return 0;
  613. }
  614. static struct phy_device *create_phy_by_mask(struct mii_dev *bus,
  615. uint phy_mask, int devad,
  616. phy_interface_t interface)
  617. {
  618. u32 phy_id = 0xffffffff;
  619. bool is_c45;
  620. while (phy_mask) {
  621. int addr = ffs(phy_mask) - 1;
  622. int r = get_phy_id(bus, addr, devad, &phy_id);
  623. /*
  624. * If the PHY ID is flat 0 we ignore it. There are C45 PHYs
  625. * that return all 0s for C22 reads (like Aquantia AQR112) and
  626. * there are C22 PHYs that return all 0s for C45 reads (like
  627. * Atheros AR8035).
  628. */
  629. if (r == 0 && phy_id == 0)
  630. goto next;
  631. /* If the PHY ID is mostly f's, we didn't find anything */
  632. if (r == 0 && (phy_id & 0x1fffffff) != 0x1fffffff) {
  633. is_c45 = (devad == MDIO_DEVAD_NONE) ? false : true;
  634. return phy_device_create(bus, addr, phy_id, is_c45,
  635. interface);
  636. }
  637. next:
  638. phy_mask &= ~(1 << addr);
  639. }
  640. return NULL;
  641. }
  642. static struct phy_device *search_for_existing_phy(struct mii_dev *bus,
  643. uint phy_mask,
  644. phy_interface_t interface)
  645. {
  646. /* If we have one, return the existing device, with new interface */
  647. while (phy_mask) {
  648. int addr = ffs(phy_mask) - 1;
  649. if (bus->phymap[addr]) {
  650. bus->phymap[addr]->interface = interface;
  651. return bus->phymap[addr];
  652. }
  653. phy_mask &= ~(1 << addr);
  654. }
  655. return NULL;
  656. }
  657. static struct phy_device *get_phy_device_by_mask(struct mii_dev *bus,
  658. uint phy_mask,
  659. phy_interface_t interface)
  660. {
  661. struct phy_device *phydev;
  662. int devad[] = {
  663. /* Clause-22 */
  664. MDIO_DEVAD_NONE,
  665. /* Clause-45 */
  666. MDIO_MMD_PMAPMD,
  667. MDIO_MMD_WIS,
  668. MDIO_MMD_PCS,
  669. MDIO_MMD_PHYXS,
  670. MDIO_MMD_VEND1,
  671. };
  672. int i, devad_cnt;
  673. devad_cnt = sizeof(devad)/sizeof(int);
  674. phydev = search_for_existing_phy(bus, phy_mask, interface);
  675. if (phydev)
  676. return phydev;
  677. /* try different access clauses */
  678. for (i = 0; i < devad_cnt; i++) {
  679. phydev = create_phy_by_mask(bus, phy_mask,
  680. devad[i], interface);
  681. if (IS_ERR(phydev))
  682. return NULL;
  683. if (phydev)
  684. return phydev;
  685. }
  686. debug("\n%s PHY: ", bus->name);
  687. while (phy_mask) {
  688. int addr = ffs(phy_mask) - 1;
  689. debug("%d ", addr);
  690. phy_mask &= ~(1 << addr);
  691. }
  692. debug("not found\n");
  693. return NULL;
  694. }
  695. /**
  696. * get_phy_device - reads the specified PHY device and returns its
  697. * @phy_device struct
  698. * @bus: the target MII bus
  699. * @addr: PHY address on the MII bus
  700. *
  701. * Description: Reads the ID registers of the PHY at @addr on the
  702. * @bus, then allocates and returns the phy_device to represent it.
  703. */
  704. static struct phy_device *get_phy_device(struct mii_dev *bus, int addr,
  705. phy_interface_t interface)
  706. {
  707. return get_phy_device_by_mask(bus, 1 << addr, interface);
  708. }
  709. int phy_reset(struct phy_device *phydev)
  710. {
  711. int reg;
  712. int timeout = 500;
  713. int devad = MDIO_DEVAD_NONE;
  714. if (phydev->flags & PHY_FLAG_BROKEN_RESET)
  715. return 0;
  716. #ifdef CONFIG_PHYLIB_10G
  717. /* If it's 10G, we need to issue reset through one of the MMDs */
  718. if (is_10g_interface(phydev->interface)) {
  719. if (!phydev->mmds)
  720. gen10g_discover_mmds(phydev);
  721. devad = ffs(phydev->mmds) - 1;
  722. }
  723. #endif
  724. if (phy_write(phydev, devad, MII_BMCR, BMCR_RESET) < 0) {
  725. debug("PHY reset failed\n");
  726. return -1;
  727. }
  728. #ifdef CONFIG_PHY_RESET_DELAY
  729. udelay(CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */
  730. #endif
  731. /*
  732. * Poll the control register for the reset bit to go to 0 (it is
  733. * auto-clearing). This should happen within 0.5 seconds per the
  734. * IEEE spec.
  735. */
  736. reg = phy_read(phydev, devad, MII_BMCR);
  737. while ((reg & BMCR_RESET) && timeout--) {
  738. reg = phy_read(phydev, devad, MII_BMCR);
  739. if (reg < 0) {
  740. debug("PHY status read failed\n");
  741. return -1;
  742. }
  743. udelay(1000);
  744. }
  745. if (reg & BMCR_RESET) {
  746. puts("PHY reset timed out\n");
  747. return -1;
  748. }
  749. return 0;
  750. }
  751. int miiphy_reset(const char *devname, unsigned char addr)
  752. {
  753. struct mii_dev *bus = miiphy_get_dev_by_name(devname);
  754. struct phy_device *phydev;
  755. /*
  756. * miiphy_reset was only used on standard PHYs, so we'll fake it here.
  757. * If later code tries to connect with the right interface, this will
  758. * be corrected by get_phy_device in phy_connect()
  759. */
  760. phydev = get_phy_device(bus, addr, PHY_INTERFACE_MODE_MII);
  761. return phy_reset(phydev);
  762. }
  763. struct phy_device *phy_find_by_mask(struct mii_dev *bus, uint phy_mask,
  764. phy_interface_t interface)
  765. {
  766. /* Reset the bus */
  767. if (bus->reset) {
  768. bus->reset(bus);
  769. /* Wait 15ms to make sure the PHY has come out of hard reset */
  770. mdelay(15);
  771. }
  772. return get_phy_device_by_mask(bus, phy_mask, interface);
  773. }
  774. #ifdef CONFIG_DM_ETH
  775. void phy_connect_dev(struct phy_device *phydev, struct udevice *dev)
  776. #else
  777. void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev)
  778. #endif
  779. {
  780. /* Soft Reset the PHY */
  781. phy_reset(phydev);
  782. if (phydev->dev && phydev->dev != dev) {
  783. printf("%s:%d is connected to %s. Reconnecting to %s\n",
  784. phydev->bus->name, phydev->addr,
  785. phydev->dev->name, dev->name);
  786. }
  787. phydev->dev = dev;
  788. debug("%s connected to %s\n", dev->name, phydev->drv->name);
  789. }
  790. #ifdef CONFIG_PHY_XILINX_GMII2RGMII
  791. #ifdef CONFIG_DM_ETH
  792. static struct phy_device *phy_connect_gmii2rgmii(struct mii_dev *bus,
  793. struct udevice *dev,
  794. phy_interface_t interface)
  795. #else
  796. static struct phy_device *phy_connect_gmii2rgmii(struct mii_dev *bus,
  797. struct eth_device *dev,
  798. phy_interface_t interface)
  799. #endif
  800. {
  801. struct phy_device *phydev = NULL;
  802. int sn = dev_of_offset(dev);
  803. int off;
  804. while (sn > 0) {
  805. off = fdt_node_offset_by_compatible(gd->fdt_blob, sn,
  806. "xlnx,gmii-to-rgmii-1.0");
  807. if (off > 0) {
  808. phydev = phy_device_create(bus, off,
  809. PHY_GMII2RGMII_ID, false,
  810. interface);
  811. break;
  812. }
  813. if (off == -FDT_ERR_NOTFOUND)
  814. sn = fdt_first_subnode(gd->fdt_blob, sn);
  815. else
  816. printf("%s: Error finding compat string:%d\n",
  817. __func__, off);
  818. }
  819. return phydev;
  820. }
  821. #endif
  822. #ifdef CONFIG_PHY_FIXED
  823. /**
  824. * fixed_phy_create() - create an unconnected fixed-link pseudo-PHY device
  825. * @node: OF node for the container of the fixed-link node
  826. *
  827. * Description: Creates a struct phy_device based on a fixed-link of_node
  828. * description. Can be used without phy_connect by drivers which do not expose
  829. * a UCLASS_ETH udevice.
  830. */
  831. struct phy_device *fixed_phy_create(ofnode node)
  832. {
  833. phy_interface_t interface = PHY_INTERFACE_MODE_NONE;
  834. struct phy_device *phydev;
  835. const char *if_str;
  836. ofnode subnode;
  837. if_str = ofnode_read_string(node, "phy-mode");
  838. if (!if_str) {
  839. if_str = ofnode_read_string(node, "phy-interface-type");
  840. }
  841. if (if_str) {
  842. interface = phy_get_interface_by_name(if_str);
  843. }
  844. subnode = ofnode_find_subnode(node, "fixed-link");
  845. if (!ofnode_valid(subnode)) {
  846. return NULL;
  847. }
  848. phydev = phy_device_create(NULL, 0, PHY_FIXED_ID, false, interface);
  849. if (phydev)
  850. phydev->node = subnode;
  851. return phydev;
  852. }
  853. #ifdef CONFIG_DM_ETH
  854. static struct phy_device *phy_connect_fixed(struct mii_dev *bus,
  855. struct udevice *dev,
  856. phy_interface_t interface)
  857. #else
  858. static struct phy_device *phy_connect_fixed(struct mii_dev *bus,
  859. struct eth_device *dev,
  860. phy_interface_t interface)
  861. #endif
  862. {
  863. ofnode node = dev_ofnode(dev), subnode;
  864. struct phy_device *phydev;
  865. subnode = ofnode_find_subnode(node, "fixed-link");
  866. if (!ofnode_valid(subnode))
  867. return NULL;
  868. phydev = phy_device_create(bus, 0, PHY_FIXED_ID, false, interface);
  869. if (phydev)
  870. phydev->node = subnode;
  871. return phydev;
  872. }
  873. #endif
  874. #ifdef CONFIG_DM_ETH
  875. struct phy_device *phy_connect(struct mii_dev *bus, int addr,
  876. struct udevice *dev,
  877. phy_interface_t interface)
  878. #else
  879. struct phy_device *phy_connect(struct mii_dev *bus, int addr,
  880. struct eth_device *dev,
  881. phy_interface_t interface)
  882. #endif
  883. {
  884. struct phy_device *phydev = NULL;
  885. uint mask = (addr >= 0) ? (1 << addr) : 0xffffffff;
  886. #ifdef CONFIG_PHY_FIXED
  887. phydev = phy_connect_fixed(bus, dev, interface);
  888. #endif
  889. #ifdef CONFIG_PHY_NCSI
  890. if (!phydev)
  891. phydev = phy_device_create(bus, 0, PHY_NCSI_ID, false, interface);
  892. #endif
  893. #ifdef CONFIG_PHY_XILINX_GMII2RGMII
  894. if (!phydev)
  895. phydev = phy_connect_gmii2rgmii(bus, dev, interface);
  896. #endif
  897. if (!phydev)
  898. phydev = phy_find_by_mask(bus, mask, interface);
  899. if (phydev)
  900. phy_connect_dev(phydev, dev);
  901. else
  902. printf("Could not get PHY for %s: addr %d\n", bus->name, addr);
  903. return phydev;
  904. }
  905. /*
  906. * Start the PHY. Returns 0 on success, or a negative error code.
  907. */
  908. int phy_startup(struct phy_device *phydev)
  909. {
  910. if (phydev->drv->startup)
  911. return phydev->drv->startup(phydev);
  912. return 0;
  913. }
  914. __weak int board_phy_config(struct phy_device *phydev)
  915. {
  916. if (phydev->drv->config)
  917. return phydev->drv->config(phydev);
  918. return 0;
  919. }
  920. int phy_config(struct phy_device *phydev)
  921. {
  922. /* Invoke an optional board-specific helper */
  923. return board_phy_config(phydev);
  924. }
  925. int phy_shutdown(struct phy_device *phydev)
  926. {
  927. if (phydev->drv->shutdown)
  928. phydev->drv->shutdown(phydev);
  929. return 0;
  930. }
  931. int phy_get_interface_by_name(const char *str)
  932. {
  933. int i;
  934. for (i = 0; i < PHY_INTERFACE_MODE_COUNT; i++) {
  935. if (!strcmp(str, phy_interface_strings[i]))
  936. return i;
  937. }
  938. return -1;
  939. }