starfive-devkits.h 12 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2021 Shanghai StarFive Technology Co., Ltd.
  4. * YanHong Wang <yanhong.wang@starfivetech.com>
  5. */
  6. #ifndef _STARFIVE_DEVKITS_H
  7. #define _STARFIVE_DEVKITS_H
  8. #include <version.h>
  9. #include <linux/sizes.h>
  10. #ifdef CONFIG_SPL
  11. #define CONFIG_SPL_MAX_SIZE 0x00040000
  12. #define CONFIG_SPL_BSS_START_ADDR 0x08040000
  13. #define CONFIG_SPL_BSS_MAX_SIZE 0x00010000
  14. #define CONFIG_SYS_SPL_MALLOC_START 0x42000000
  15. #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00800000
  16. #define CONFIG_SPL_STACK (0x08000000 + 0x00180000 - \
  17. GENERATED_GBL_DATA_SIZE)
  18. #define STARFIVE_SPL_BOOT_LOAD_ADDR 0x60000000
  19. #endif
  20. #define CONFIG_SYS_BOOTM_LEN SZ_64M
  21. #define CONFIG_SYS_CACHELINE_SIZE 64
  22. /*
  23. * Miscellaneous configurable options
  24. */
  25. #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
  26. /*
  27. * Print Buffer Size
  28. */
  29. #define CONFIG_SYS_PBSIZE \
  30. (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
  31. /*
  32. * max number of command args
  33. */
  34. #define CONFIG_SYS_MAXARGS 16
  35. /*
  36. * Boot Argument Buffer Size
  37. */
  38. #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
  39. /*
  40. * Size of malloc() pool
  41. * 512kB is suggested, (CONFIG_ENV_SIZE + 128 * 1024) was not enough
  42. */
  43. #define CONFIG_SYS_MALLOC_LEN SZ_8M
  44. #define CONFIG_SYS_SDRAM_BASE 0x40000000
  45. /* Init Stack Pointer */
  46. #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_8M)
  47. #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_16M)
  48. #define CONFIG_STANDALONE_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_16M)
  49. /*
  50. * Ethernet
  51. */
  52. #ifdef CONFIG_CMD_NET
  53. #define CONFIG_DW_ALTDESCRIPTOR
  54. #define DWC_NET_PHYADDR 0
  55. #define CONFIG_ARP_TIMEOUT 500
  56. #define PHY_ANEG_TIMEOUT 8000 /* PHY needs longer aneg time */
  57. #define CONFIG_NETMASK 255.255.255.0
  58. #define CONFIG_IPADDR 192.168.120.230
  59. #define CONFIG_IP_DEFRAG
  60. #ifndef CONFIG_NET_MAXDEFRAG
  61. #define CONFIG_NET_MAXDEFRAG 16384
  62. #endif
  63. #endif
  64. /* HACK these should have '#if defined (stuff) around them like zynqp*/
  65. #define BOOT_TARGET_DEVICES(func) func(DHCP, dhcp, na) func(MMC, mmc, 0)
  66. #include <config_distro_bootcmd.h>
  67. #include <environment/distro/sf.h>
  68. #define TYPE_GUID_LOADER1 "5B193300-FC78-40CD-8002-E86C45580B47"
  69. #define TYPE_GUID_LOADER2 "2E54B353-1271-4842-806F-E436D6AF6985"
  70. #define TYPE_GUID_SYSTEM "0FC63DAF-8483-4772-8E79-3D69D8477DE4"
  71. #define CPU_VOL_1020_SET \
  72. "cpu_vol_1020_set=" \
  73. "fdt set /opp-table-0/opp-1500000000 opp-microvolt <1020000>;\0"
  74. #define CPU_VOL_1040_SET \
  75. "cpu_vol_1040_set=" \
  76. "fdt set /opp-table-0/opp-1500000000 opp-microvolt <1040000>;\0"
  77. #define CPU_VOL_1060_SET \
  78. "cpu_vol_1060_set=" \
  79. "fdt set /opp-table-0/opp-1500000000 opp-microvolt <1060000>;\0"
  80. #define CPU_SPEED_1250_SET \
  81. "cpu_speed_1250_set=" \
  82. "fdt rm /opp-table-0/opp-375000000;" \
  83. "fdt rm /opp-table-0/opp-500000000;" \
  84. "fdt rm /opp-table-0/opp-750000000;" \
  85. "fdt rm /opp-table-0/opp-1500000000;\0"
  86. #define CPU_SPEED_1500_SET \
  87. "cpu_speed_1500_set=" \
  88. "fdt rm /opp-table-0/opp-312500000;" \
  89. "fdt rm /opp-table-0/opp-417000000;" \
  90. "fdt rm /opp-table-0/opp-625000000;" \
  91. "fdt rm /opp-table-0/opp-1250000000;\0"
  92. #define CMA_SIZE_SET \
  93. "cma_start=70000000\0" \
  94. "cma_1g=b000000\0" \
  95. "cma_2g=20000000\0" \
  96. "cma_4g=40000000\0" \
  97. "cma_8g=60000000\0" \
  98. "cma_node=/reserved-memory/linux,cma\0" \
  99. "cma_ddr1g_set=" \
  100. "fdt set ${cma_node} size <0x0 0x${cma_1g}>;" \
  101. "fdt set ${cma_node} alloc-ranges <0x0 0x${cma_start} 0x0 0x${cma_1g}>;\0" \
  102. "cma_ddr2g_set=" \
  103. "fdt set ${cma_node} size <0x0 0x${cma_2g}>;" \
  104. "fdt set ${cma_node} alloc-ranges <0x0 0x${cma_start} 0x0 0x${cma_2g}>;\0" \
  105. "cma_ddr4g_set=" \
  106. "fdt set ${cma_node} size <0x0 0x${cma_4g}>;" \
  107. "fdt set ${cma_node} alloc-ranges <0x0 0x${cma_start} 0x0 0x${cma_4g}>;\0" \
  108. "cma_ddr8g_set=" \
  109. "fdt set ${cma_node} size <0x0 0x${cma_8g}>;" \
  110. "fdt set ${cma_node} alloc-ranges <0x0 0x${cma_start} 0x0 0x${cma_8g}>;\0" \
  111. "cma_resize=" \
  112. "if test ${memory_size} -eq 40000000; then " \
  113. "run cma_ddr1g_set;" \
  114. "elif test ${memory_size} -eq 80000000; then " \
  115. "run cma_ddr2g_set;" \
  116. "elif test ${memory_size} -eq 100000000; then " \
  117. "run cma_ddr4g_set;" \
  118. "elif test ${memory_size} -ge 200000000; then " \
  119. "run cma_ddr8g_set;" \
  120. "fi; \0 "
  121. #define CPU_FREQ_VOL_SET \
  122. "cpu_vol_set=" \
  123. "if test ${cpu_max_vol} = 1000000; then " \
  124. "run cpu_speed_1250_set; " \
  125. "else " \
  126. "run cpu_speed_1500_set; " \
  127. "if test ${cpu_max_vol} = 1060000; then " \
  128. "run cpu_vol_1060_set; " \
  129. "elif test ${cpu_max_vol} = 1020000; then " \
  130. "run cpu_vol_1020_set; " \
  131. "else " \
  132. "run cpu_vol_1040_set; " \
  133. "fi; " \
  134. "fi; \0"
  135. #define DEVKITS_MEM_SET \
  136. "devkits_mem_set=" \
  137. "fdt memory ${memory_addr} ${memory_size};" \
  138. "run cma_resize; \0"
  139. #define CHIPA_GMAC_SET \
  140. "chipa_gmac_set=" \
  141. "fdt set /soc/ethernet@16030000/ethernet-phy@0 tx_inverted_10 <0x1>;" \
  142. "fdt set /soc/ethernet@16030000/ethernet-phy@0 tx_inverted_100 <0x1>;" \
  143. "fdt set /soc/ethernet@16030000/ethernet-phy@0 tx_inverted_1000 <0x1>;\0"
  144. #define CHIPA_SET \
  145. "chipa_set=" \
  146. "if test ${chip_vision} = B; then " \
  147. "run chipa_gmac_set;" \
  148. "fi; \0" \
  149. "chipa_set_uboot=" \
  150. "fdt addr ${fdtcontroladdr};" \
  151. "run chipa_set;\0" \
  152. "chipa_set_linux=" \
  153. "fdt addr ${fdt_addr_r};" \
  154. "run devkits_mem_set;" \
  155. "run chipa_set;\0"
  156. #define PARTS_DEFAULT \
  157. "name=loader1,start=17K,size=1M,type=${type_guid_gpt_loader1};" \
  158. "name=loader2,size=4MB,type=${type_guid_gpt_loader2};" \
  159. "name=system,size=-,bootable,type=${type_guid_gpt_system};"
  160. #define JH7110_SDK_BOOTENV \
  161. "bootdir=/boot\0" \
  162. "bootpart=3\0" \
  163. "rootpart=4\0" \
  164. "load_sdk_uenv=" \
  165. "fatload ${bootdev} ${devnum}:${bootpart} ${loadaddr} ${bootenv_sdk};" \
  166. "env import -t ${loadaddr} ${filesize}; \0" \
  167. "mmc_test_and_boot=" \
  168. "if mmc dev ${devnum}; then " \
  169. "echo Try booting from MMC${devnum} ...; " \
  170. "setenv sdev_blk mmcblk${devnum}p${rootpart};" \
  171. "run load_sdk_uenv; run boot2;" \
  172. "fi;\0" \
  173. "bootenv_mmc=" \
  174. "setenv bootdev mmc;" \
  175. "if test ${bootmode} = flash; then " \
  176. "for mmc_devnum in ${mmc_devnum_l}; do " \
  177. "setenv devnum ${mmc_devnum}; " \
  178. "run mmc_test_and_boot;" \
  179. "done;" \
  180. "fi; " \
  181. "if test ${bootmode} = sd; then " \
  182. "setenv devnum ${sd_devnum};" \
  183. "run mmc_test_and_boot;" \
  184. "fi; " \
  185. "if test ${bootmode} = emmc; then " \
  186. "setenv devnum ${emmc_devnum};"\
  187. "run mmc_test_and_boot;" \
  188. "fi; \0" \
  189. "bootenv_nvme=" \
  190. "if test ${bootmode} = flash; then " \
  191. "for nvme_devnum in ${nvme_devnum_l}; do " \
  192. "setenv devnum ${nvme_devnum};" \
  193. "if pci enum; then " \
  194. "nvme scan; " \
  195. "fi; " \
  196. "if nvme dev ${devnum}; then " \
  197. "echo Try booting from NVME${devnum} ...; " \
  198. "setenv bootdev nvme;" \
  199. "setenv sdev_blk nvme${devnum}n1p${rootpart};" \
  200. "run load_sdk_uenv; run boot2;" \
  201. "fi; " \
  202. "done; " \
  203. "fi; \0" \
  204. "sdk_boot_env=" \
  205. "for bootdev_s in ${boot_devs}; do " \
  206. "run bootenv_${bootdev_s}; " \
  207. "done;\0" \
  208. "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0"
  209. #define DEVKITS_SDK_BOOTENV \
  210. "bootenv=uEnv.txt\0" \
  211. "bootenv_sdk=devkits_uEnv.txt\0"\
  212. "boot_devs=mmc nvme\0" \
  213. "emmc_devnum=0\0" \
  214. "sd_devnum=1\0" \
  215. "mmc_devnum_l=1 0\0" \
  216. "nvme_devnum_l=0 0\0"
  217. #define JH7110_DISTRO_BOOTENV \
  218. "bootdir=/boot\0" \
  219. "bootpart=3\0" \
  220. "rootpart=4\0" \
  221. "load_distro_uenv=" \
  222. "fatload ${bootdev} ${devnum}:${bootpart} ${loadaddr} /${bootenv}; " \
  223. "env import ${loadaddr} ${filesize}; \0" \
  224. "fdt_loaddtb=" \
  225. "fatload ${bootdev} ${devnum}:${bootpart} ${fdt_addr_r} /dtbs/${fdtfile}; fdt addr ${fdt_addr_r}; \0" \
  226. "fdt_sizecheck=" \
  227. "fatsize ${bootdev} ${devnum}:${bootpart} /dtbs/${fdtfile}; \0" \
  228. "set_fdt_distro=" \
  229. "run chipa_set_linux; run cpu_vol_set;" \
  230. "fatwrite ${bootdev} ${devnum}:${bootpart} ${fdt_addr_r} /dtbs/${fdtfile} ${filesize}; \0" \
  231. "bootcmd_distro=" \
  232. "run load_distro_uenv; " \
  233. "run fdt_loaddtb; run fdt_sizecheck; run set_fdt_distro; " \
  234. "sysboot ${bootdev} ${devnum}:${bootpart} fat ${scriptaddr} /${boot_syslinux_conf}; \0" \
  235. "distro_mmc_test_and_boot=" \
  236. "if mmc dev ${devnum}; then " \
  237. "echo Try booting from MMC${devnum} ...; " \
  238. "run bootcmd_distro;" \
  239. "fi;\0" \
  240. "distro_bootenv_mmc=" \
  241. "setenv bootdev mmc;" \
  242. "if test ${bootmode} = flash; then " \
  243. "for mmc_devnum in ${mmc_devnum_l}; do "\
  244. "setenv devnum ${mmc_devnum}; " \
  245. "run distro_mmc_test_and_boot;" \
  246. "done;" \
  247. "fi; " \
  248. "if test ${bootmode} = sd; then " \
  249. "setenv devnum ${sd_devnum};" \
  250. "run distro_mmc_test_and_boot;" \
  251. "fi; " \
  252. "if test ${bootmode} = emmc; then " \
  253. "setenv devnum ${emmc_devnum};"\
  254. "run distro_mmc_test_and_boot;" \
  255. "fi; \0" \
  256. "distro_bootenv_nvme=" \
  257. "if test ${bootmode} = flash; then " \
  258. "for nvme_devnum in ${nvme_devnum_l}; do " \
  259. "setenv devnum ${nvme_devnum};" \
  260. "if pci enum; then " \
  261. "nvme scan; " \
  262. "fi; " \
  263. "if nvme dev ${devnum}; then " \
  264. "echo Try booting from NVME${devnum} ...; " \
  265. "setenv bootdev nvme;" \
  266. "run bootcmd_distro; " \
  267. "fi; " \
  268. "done; " \
  269. "fi; \0" \
  270. "distro_boot_env=" \
  271. "echo Tring booting distro ...;" \
  272. "for bootdev_s in ${boot_devs}; do " \
  273. "run distro_bootenv_${bootdev_s}; " \
  274. "done; \0"
  275. #define CONFIG_EXTRA_ENV_SETTINGS \
  276. "fdt_high=0xffffffffffffffff\0" \
  277. "initrd_high=0xffffffffffffffff\0" \
  278. "kernel_addr_r=0x40200000\0" \
  279. "kernel_comp_addr_r=0x5a000000\0" \
  280. "kernel_comp_size=0x4000000\0" \
  281. "fdt_addr_r=0x46000000\0" \
  282. "scriptaddr=0x43900000\0" \
  283. "script_offset_f=0x1fff000\0" \
  284. "script_size_f=0x1000\0" \
  285. "pxefile_addr_r=0x45900000\0" \
  286. "ramdisk_addr_r=0x46100000\0" \
  287. "fdtoverlay_addr_r=0x4f000000\0" \
  288. "loadaddr=0x60000000\0" \
  289. CHIPA_GMAC_SET \
  290. CHIPA_SET \
  291. CPU_VOL_1020_SET \
  292. CPU_VOL_1040_SET \
  293. CPU_VOL_1060_SET \
  294. CPU_SPEED_1250_SET \
  295. CPU_SPEED_1500_SET \
  296. CPU_FREQ_VOL_SET \
  297. DEVKITS_MEM_SET \
  298. DEVKITS_SDK_BOOTENV \
  299. CMA_SIZE_SET \
  300. JH7110_SDK_BOOTENV \
  301. JH7110_DISTRO_BOOTENV \
  302. "type_guid_gpt_loader1=" TYPE_GUID_LOADER1 "\0" \
  303. "type_guid_gpt_loader2=" TYPE_GUID_LOADER2 "\0" \
  304. "type_guid_gpt_system=" TYPE_GUID_SYSTEM "\0" \
  305. "partitions=" PARTS_DEFAULT "\0" \
  306. BOOTENV \
  307. BOOTENV_SF
  308. #define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200, 230400, 460800, 921600}
  309. #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
  310. /* 6.25MHz RTC clock, StarFive JH7110*/
  311. #define CONFIG_SYS_HZ_CLOCK 4000000
  312. #define __io
  313. #define memset_io(c, v, l) memset((c), (v), (l))
  314. #define memcpy_fromio(a, c, l) memcpy((a), (c), (l))
  315. #define memcpy_toio(c, a, l) memcpy((c), (a), (l))
  316. #define CONFIG_ID_EEPROM
  317. #ifdef CONFIG_ID_EEPROM /* EEPROM for SN and MAC */
  318. #define CONFIG_SYS_EEPROM_BUS_NUM 5
  319. #define FORMAT_VERSION 0x01
  320. #define PCB_VERSION 0xB0
  321. #define BOM_VERSION 'A'
  322. /*
  323. * BYTES_PER_EEPROM_PAGE: the 24FC04H datasheet says that data can
  324. * only be written in page mode, which means 16 bytes at a time:
  325. * 16-Byte Page Write Buffer
  326. * For compatibility with 24FC02, PAGE SIZE is set to 8
  327. */
  328. #define BYTES_PER_EEPROM_PAGE 8
  329. /*
  330. * EEPROM_WRITE_DELAY_MS: the 24FC04H datasheet says it takes up to
  331. * 5ms to complete a given write:
  332. * Write Cycle Time (byte or page) ro Page Write Time 5 ms, Maximum
  333. */
  334. #define EEPROM_WRITE_DELAY_MS 5000
  335. /*
  336. * StarFive OUI. Registration Date is 20xx-xx-xx
  337. */
  338. #define STARFIVE_OUI_PREFIX "6C:CF:39:"
  339. #define STARFIVE_DEFAULT_MAC0 {0x6c, 0xcf, 0x39, 0x6c, 0xde, 0xad}
  340. #define STARFIVE_DEFAULT_MAC1 {0x6c, 0xcf, 0x39, 0x7c, 0xae, 0x5d}
  341. /* Magic number at the first four bytes of EEPROM HATs */
  342. #define STARFIVE_EEPROM_HATS_SIG "SFDK" /* StarFive VisionFive */
  343. #define STARFIVE_EEPROM_HATS_SIZE_MAX 256 /* Header + Atom1&4(v1) */
  344. #define STARFIVE_EEPROM_WP_OFFSET 0 /* Read only field */
  345. #define STARFIVE_EEPROM_ATOM1_PSTR "DK7110B1-2150-D104EC32-00000001\0"
  346. #define STARFIVE_EEPROM_ATOM1_PSTR_SIZE 32
  347. #define STARFIVE_EEPROM_ATOM1_SN_OFFSET 23
  348. #define STARFIVE_EEPROM_ATOM1_VSTR "StarFive Technology Co., Ltd.\0\0\0"
  349. #define STARFIVE_EEPROM_ATOM1_VSTR_SIZE 32
  350. #endif
  351. #define CONFIG_VIDEO_BMP_LOGO
  352. #define CONFIG_VIDEO_LOGO
  353. #define CONFIG_BMP_16BPP
  354. #define CONFIG_BMP_24BPP
  355. #define CONFIG_BMP_32BPP
  356. #endif /* _STARFIVE_DEVKITS_H */