slicetimer.c 2.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2007, 2012 Freescale Semiconductor, Inc.
  4. * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
  5. */
  6. #include <common.h>
  7. #include <init.h>
  8. #include <irq_func.h>
  9. #include <asm/global_data.h>
  10. #include <linux/delay.h>
  11. #include <asm/timer.h>
  12. #include <asm/immap.h>
  13. #include <asm/io.h>
  14. DECLARE_GLOBAL_DATA_PTR;
  15. static ulong timestamp;
  16. #if defined(CONFIG_SLTTMR)
  17. #ifndef CONFIG_SYS_UDELAY_BASE
  18. # error "uDelay base not defined!"
  19. #endif
  20. #if !defined(CONFIG_SYS_TMR_BASE) || !defined(CONFIG_SYS_INTR_BASE) || !defined(CONFIG_SYS_TMRINTR_NO) || !defined(CONFIG_SYS_TMRINTR_MASK)
  21. # error "TMR_BASE, INTR_BASE, TMRINTR_NO or TMRINTR_MASk not defined!"
  22. #endif
  23. extern void dtimer_intr_setup(void);
  24. void __udelay(unsigned long usec)
  25. {
  26. slt_t *timerp = (slt_t *) (CONFIG_SYS_UDELAY_BASE);
  27. u32 now, freq;
  28. /* 1 us period */
  29. freq = CONFIG_SYS_TIMER_PRESCALER;
  30. /* Disable */
  31. out_be32(&timerp->cr, 0);
  32. out_be32(&timerp->tcnt, usec * freq);
  33. out_be32(&timerp->cr, SLT_CR_TEN);
  34. now = in_be32(&timerp->cnt);
  35. while (now != 0)
  36. now = in_be32(&timerp->cnt);
  37. setbits_be32(&timerp->sr, SLT_SR_ST);
  38. out_be32(&timerp->cr, 0);
  39. }
  40. void dtimer_interrupt(void *not_used)
  41. {
  42. slt_t *timerp = (slt_t *) (CONFIG_SYS_TMR_BASE);
  43. /* check for timer interrupt asserted */
  44. if ((CONFIG_SYS_TMRPND_REG & CONFIG_SYS_TMRINTR_MASK) == CONFIG_SYS_TMRINTR_PEND) {
  45. setbits_be32(&timerp->sr, SLT_SR_ST);
  46. timestamp++;
  47. return;
  48. }
  49. }
  50. int timer_init(void)
  51. {
  52. slt_t *timerp = (slt_t *) (CONFIG_SYS_TMR_BASE);
  53. timestamp = 0;
  54. /* disable timer */
  55. out_be32(&timerp->cr, 0);
  56. out_be32(&timerp->tcnt, 0);
  57. /* clear status */
  58. out_be32(&timerp->sr, SLT_SR_BE | SLT_SR_ST);
  59. /* initialize and enable timer interrupt */
  60. irq_install_handler(CONFIG_SYS_TMRINTR_NO, dtimer_interrupt, 0);
  61. /* Interrupt every ms */
  62. out_be32(&timerp->tcnt, 1000 * CONFIG_SYS_TIMER_PRESCALER);
  63. dtimer_intr_setup();
  64. /* set a period of 1us, set timer mode to restart and
  65. enable timer and interrupt */
  66. out_be32(&timerp->cr, SLT_CR_RUN | SLT_CR_IEN | SLT_CR_TEN);
  67. return 0;
  68. }
  69. ulong get_timer(ulong base)
  70. {
  71. return (timestamp - base);
  72. }
  73. #endif /* CONFIG_SLTTMR */