cpu.c 2.8 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. *
  4. * (C) Copyright 2000-2003
  5. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  6. *
  7. * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
  8. * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
  9. */
  10. #include <common.h>
  11. #include <init.h>
  12. #include <net.h>
  13. #include <vsprintf.h>
  14. #include <watchdog.h>
  15. #include <command.h>
  16. #include <netdev.h>
  17. #include <asm/global_data.h>
  18. #include <asm/immap.h>
  19. #include <asm/io.h>
  20. DECLARE_GLOBAL_DATA_PTR;
  21. int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
  22. {
  23. gptmr_t *gptmr = (gptmr_t *) (MMAP_GPTMR);
  24. out_be16(&gptmr->pre, 10);
  25. out_be16(&gptmr->cnt, 1);
  26. /* enable watchdog, set timeout to 0 and wait */
  27. out_8(&gptmr->mode, GPT_TMS_SGPIO);
  28. out_8(&gptmr->ctrl, GPT_CTRL_WDEN | GPT_CTRL_CE);
  29. /* we don't return! */
  30. return 1;
  31. };
  32. #if defined(CONFIG_DISPLAY_CPUINFO)
  33. int print_cpuinfo(void)
  34. {
  35. siu_t *siu = (siu_t *) MMAP_SIU;
  36. u16 id = 0;
  37. puts("CPU: ");
  38. switch ((in_be32(&siu->jtagid) & 0x000FF000) >> 12) {
  39. case 0x0C:
  40. id = 5485;
  41. break;
  42. case 0x0D:
  43. id = 5484;
  44. break;
  45. case 0x0E:
  46. id = 5483;
  47. break;
  48. case 0x0F:
  49. id = 5482;
  50. break;
  51. case 0x10:
  52. id = 5481;
  53. break;
  54. case 0x11:
  55. id = 5480;
  56. break;
  57. case 0x12:
  58. id = 5475;
  59. break;
  60. case 0x13:
  61. id = 5474;
  62. break;
  63. case 0x14:
  64. id = 5473;
  65. break;
  66. case 0x15:
  67. id = 5472;
  68. break;
  69. case 0x16:
  70. id = 5471;
  71. break;
  72. case 0x17:
  73. id = 5470;
  74. break;
  75. }
  76. if (id) {
  77. char buf1[32], buf2[32];
  78. printf("Freescale MCF%d\n", id);
  79. printf(" CPU CLK %s MHz BUS CLK %s MHz\n",
  80. strmhz(buf1, gd->cpu_clk),
  81. strmhz(buf2, gd->bus_clk));
  82. }
  83. return 0;
  84. };
  85. #endif /* CONFIG_DISPLAY_CPUINFO */
  86. #if defined(CONFIG_HW_WATCHDOG)
  87. /* Called by macro WATCHDOG_RESET */
  88. void hw_watchdog_reset(void)
  89. {
  90. gptmr_t *gptmr = (gptmr_t *) (MMAP_GPTMR);
  91. out_8(&gptmr->ocpw, 0xa5);
  92. }
  93. int watchdog_disable(void)
  94. {
  95. gptmr_t *gptmr = (gptmr_t *) (MMAP_GPTMR);
  96. /* UserManual, once the wdog is disabled, wdog cannot be re-enabled */
  97. out_8(&gptmr->mode, 0);
  98. out_8(&gptmr->ctrl, 0);
  99. puts("WATCHDOG:disabled\n");
  100. return (0);
  101. }
  102. int watchdog_init(void)
  103. {
  104. gptmr_t *gptmr = (gptmr_t *) (MMAP_GPTMR);
  105. out_be16(&gptmr->pre, CONFIG_WATCHDOG_TIMEOUT);
  106. out_be16(&gptmr->cnt, CONFIG_SYS_TIMER_PRESCALER * 1000);
  107. out_8(&gptmr->mode, GPT_TMS_SGPIO);
  108. out_8(&gptmr->ctrl, GPT_CTRL_CE | GPT_CTRL_WDEN);
  109. puts("WATCHDOG:enabled\n");
  110. return (0);
  111. }
  112. #endif /* CONFIG_HW_WATCHDOG */
  113. #if defined(CONFIG_FSLDMAFEC) || defined(CONFIG_MCFFEC)
  114. /* Default initializations for MCFFEC controllers. To override,
  115. * create a board-specific function called:
  116. * int board_eth_init(struct bd_info *bis)
  117. */
  118. int cpu_eth_init(struct bd_info *bis)
  119. {
  120. #if defined(CONFIG_FSLDMAFEC)
  121. mcdmafec_initialize(bis);
  122. #endif
  123. #if defined(CONFIG_MCFFEC)
  124. mcffec_initialize(bis);
  125. #endif
  126. return 0;
  127. }
  128. #endif