qbman_portal.c 19 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2014 Freescale Semiconductor
  4. */
  5. #include <log.h>
  6. #include <malloc.h>
  7. #include <asm/arch/clock.h>
  8. #include <linux/bug.h>
  9. #include "qbman_portal.h"
  10. /* QBMan portal management command codes */
  11. #define QBMAN_MC_ACQUIRE 0x30
  12. #define QBMAN_WQCHAN_CONFIGURE 0x46
  13. /* CINH register offsets */
  14. #define QBMAN_CINH_SWP_EQAR 0x8c0
  15. #define QBMAN_CINH_SWP_DCAP 0xac0
  16. #define QBMAN_CINH_SWP_SDQCR 0xb00
  17. #define QBMAN_CINH_SWP_RAR 0xcc0
  18. /* CENA register offsets */
  19. #define QBMAN_CENA_SWP_EQCR(n) (0x000 + ((uint32_t)(n) << 6))
  20. #define QBMAN_CENA_SWP_DQRR(n) (0x200 + ((uint32_t)(n) << 6))
  21. #define QBMAN_CENA_SWP_RCR(n) (0x400 + ((uint32_t)(n) << 6))
  22. #define QBMAN_CENA_SWP_CR 0x600
  23. #define QBMAN_CENA_SWP_RR(vb) (0x700 + ((uint32_t)(vb) >> 1))
  24. #define QBMAN_CENA_SWP_VDQCR 0x780
  25. /* Reverse mapping of QBMAN_CENA_SWP_DQRR() */
  26. #define QBMAN_IDX_FROM_DQRR(p) (((unsigned long)p & 0x1ff) >> 6)
  27. /*******************************/
  28. /* Pre-defined attribute codes */
  29. /*******************************/
  30. struct qb_attr_code code_generic_verb = QB_CODE(0, 0, 7);
  31. struct qb_attr_code code_generic_rslt = QB_CODE(0, 8, 8);
  32. /*************************/
  33. /* SDQCR attribute codes */
  34. /*************************/
  35. /* we put these here because at least some of them are required by
  36. * qbman_swp_init() */
  37. struct qb_attr_code code_sdqcr_dct = QB_CODE(0, 24, 2);
  38. struct qb_attr_code code_sdqcr_fc = QB_CODE(0, 29, 1);
  39. struct qb_attr_code code_sdqcr_tok = QB_CODE(0, 16, 8);
  40. #define CODE_SDQCR_DQSRC(n) QB_CODE(0, n, 1)
  41. enum qbman_sdqcr_dct {
  42. qbman_sdqcr_dct_null = 0,
  43. qbman_sdqcr_dct_prio_ics,
  44. qbman_sdqcr_dct_active_ics,
  45. qbman_sdqcr_dct_active
  46. };
  47. enum qbman_sdqcr_fc {
  48. qbman_sdqcr_fc_one = 0,
  49. qbman_sdqcr_fc_up_to_3 = 1
  50. };
  51. /*********************************/
  52. /* Portal constructor/destructor */
  53. /*********************************/
  54. /* Software portals should always be in the power-on state when we initialise,
  55. * due to the CCSR-based portal reset functionality that MC has. */
  56. struct qbman_swp *qbman_swp_init(const struct qbman_swp_desc *d)
  57. {
  58. int ret;
  59. struct qbman_swp *p = malloc(sizeof(struct qbman_swp));
  60. u32 major = 0, minor = 0;
  61. if (!p)
  62. return NULL;
  63. p->desc = d;
  64. #ifdef QBMAN_CHECKING
  65. p->mc.check = swp_mc_can_start;
  66. #endif
  67. p->mc.valid_bit = QB_VALID_BIT;
  68. p->sdq = 0;
  69. qb_attr_code_encode(&code_sdqcr_dct, &p->sdq, qbman_sdqcr_dct_prio_ics);
  70. qb_attr_code_encode(&code_sdqcr_fc, &p->sdq, qbman_sdqcr_fc_up_to_3);
  71. qb_attr_code_encode(&code_sdqcr_tok, &p->sdq, 0xbb);
  72. atomic_set(&p->vdq.busy, 1);
  73. p->vdq.valid_bit = QB_VALID_BIT;
  74. p->dqrr.next_idx = 0;
  75. qbman_version(&major, &minor);
  76. if (!major) {
  77. printf("invalid qbman version\n");
  78. return NULL;
  79. }
  80. if (major >= 4 && minor >= 1)
  81. p->dqrr.dqrr_size = QBMAN_VER_4_1_DQRR_SIZE;
  82. else
  83. p->dqrr.dqrr_size = QBMAN_VER_4_0_DQRR_SIZE;
  84. p->dqrr.valid_bit = QB_VALID_BIT;
  85. ret = qbman_swp_sys_init(&p->sys, d, p->dqrr.dqrr_size);
  86. if (ret) {
  87. free(p);
  88. printf("qbman_swp_sys_init() failed %d\n", ret);
  89. return NULL;
  90. }
  91. qbman_cinh_write(&p->sys, QBMAN_CINH_SWP_SDQCR, p->sdq);
  92. return p;
  93. }
  94. /***********************/
  95. /* Management commands */
  96. /***********************/
  97. /*
  98. * Internal code common to all types of management commands.
  99. */
  100. void *qbman_swp_mc_start(struct qbman_swp *p)
  101. {
  102. void *ret;
  103. int *return_val;
  104. #ifdef QBMAN_CHECKING
  105. BUG_ON(p->mc.check != swp_mc_can_start);
  106. #endif
  107. ret = qbman_cena_write_start(&p->sys, QBMAN_CENA_SWP_CR);
  108. #ifdef QBMAN_CHECKING
  109. return_val = (int *)ret;
  110. if (!(*return_val))
  111. p->mc.check = swp_mc_can_submit;
  112. #endif
  113. return ret;
  114. }
  115. void qbman_swp_mc_submit(struct qbman_swp *p, void *cmd, uint32_t cmd_verb)
  116. {
  117. uint32_t *v = cmd;
  118. #ifdef QBMAN_CHECKING
  119. BUG_ON(p->mc.check != swp_mc_can_submit);
  120. #endif
  121. lwsync();
  122. /* TBD: "|=" is going to hurt performance. Need to move as many fields
  123. * out of word zero, and for those that remain, the "OR" needs to occur
  124. * at the caller side. This debug check helps to catch cases where the
  125. * caller wants to OR but has forgotten to do so. */
  126. BUG_ON((*v & cmd_verb) != *v);
  127. *v = cmd_verb | p->mc.valid_bit;
  128. qbman_cena_write_complete(&p->sys, QBMAN_CENA_SWP_CR, cmd);
  129. /* TODO: add prefetch support for GPP */
  130. #ifdef QBMAN_CHECKING
  131. p->mc.check = swp_mc_can_poll;
  132. #endif
  133. }
  134. void *qbman_swp_mc_result(struct qbman_swp *p)
  135. {
  136. uint32_t *ret, verb;
  137. #ifdef QBMAN_CHECKING
  138. BUG_ON(p->mc.check != swp_mc_can_poll);
  139. #endif
  140. ret = qbman_cena_read(&p->sys, QBMAN_CENA_SWP_RR(p->mc.valid_bit));
  141. /* Remove the valid-bit - command completed iff the rest is non-zero */
  142. verb = ret[0] & ~QB_VALID_BIT;
  143. if (!verb)
  144. return NULL;
  145. #ifdef QBMAN_CHECKING
  146. p->mc.check = swp_mc_can_start;
  147. #endif
  148. p->mc.valid_bit ^= QB_VALID_BIT;
  149. return ret;
  150. }
  151. /***********/
  152. /* Enqueue */
  153. /***********/
  154. /* These should be const, eventually */
  155. static struct qb_attr_code code_eq_cmd = QB_CODE(0, 0, 2);
  156. static struct qb_attr_code code_eq_orp_en = QB_CODE(0, 2, 1);
  157. static struct qb_attr_code code_eq_tgt_id = QB_CODE(2, 0, 24);
  158. /* static struct qb_attr_code code_eq_tag = QB_CODE(3, 0, 32); */
  159. static struct qb_attr_code code_eq_qd_en = QB_CODE(0, 4, 1);
  160. static struct qb_attr_code code_eq_qd_bin = QB_CODE(4, 0, 16);
  161. static struct qb_attr_code code_eq_qd_pri = QB_CODE(4, 16, 4);
  162. static struct qb_attr_code code_eq_rsp_stash = QB_CODE(5, 16, 1);
  163. static struct qb_attr_code code_eq_rsp_lo = QB_CODE(6, 0, 32);
  164. enum qbman_eq_cmd_e {
  165. /* No enqueue, primarily for plugging ORP gaps for dropped frames */
  166. qbman_eq_cmd_empty,
  167. /* DMA an enqueue response once complete */
  168. qbman_eq_cmd_respond,
  169. /* DMA an enqueue response only if the enqueue fails */
  170. qbman_eq_cmd_respond_reject
  171. };
  172. void qbman_eq_desc_clear(struct qbman_eq_desc *d)
  173. {
  174. memset(d, 0, sizeof(*d));
  175. }
  176. void qbman_eq_desc_set_no_orp(struct qbman_eq_desc *d, int respond_success)
  177. {
  178. uint32_t *cl = qb_cl(d);
  179. qb_attr_code_encode(&code_eq_orp_en, cl, 0);
  180. qb_attr_code_encode(&code_eq_cmd, cl,
  181. respond_success ? qbman_eq_cmd_respond :
  182. qbman_eq_cmd_respond_reject);
  183. }
  184. void qbman_eq_desc_set_response(struct qbman_eq_desc *d,
  185. dma_addr_t storage_phys,
  186. int stash)
  187. {
  188. uint32_t *cl = qb_cl(d);
  189. qb_attr_code_encode_64(&code_eq_rsp_lo, (uint64_t *)cl, storage_phys);
  190. qb_attr_code_encode(&code_eq_rsp_stash, cl, !!stash);
  191. }
  192. void qbman_eq_desc_set_qd(struct qbman_eq_desc *d, uint32_t qdid,
  193. uint32_t qd_bin, uint32_t qd_prio)
  194. {
  195. uint32_t *cl = qb_cl(d);
  196. qb_attr_code_encode(&code_eq_qd_en, cl, 1);
  197. qb_attr_code_encode(&code_eq_tgt_id, cl, qdid);
  198. qb_attr_code_encode(&code_eq_qd_bin, cl, qd_bin);
  199. qb_attr_code_encode(&code_eq_qd_pri, cl, qd_prio);
  200. }
  201. #define EQAR_IDX(eqar) ((eqar) & 0x7)
  202. #define EQAR_VB(eqar) ((eqar) & 0x80)
  203. #define EQAR_SUCCESS(eqar) ((eqar) & 0x100)
  204. int qbman_swp_enqueue(struct qbman_swp *s, const struct qbman_eq_desc *d,
  205. const struct qbman_fd *fd)
  206. {
  207. uint32_t *p;
  208. const uint32_t *cl = qb_cl(d);
  209. uint32_t eqar = qbman_cinh_read(&s->sys, QBMAN_CINH_SWP_EQAR);
  210. debug("EQAR=%08x\n", eqar);
  211. if (!EQAR_SUCCESS(eqar))
  212. return -EBUSY;
  213. p = qbman_cena_write_start(&s->sys,
  214. QBMAN_CENA_SWP_EQCR(EQAR_IDX(eqar)));
  215. word_copy(&p[1], &cl[1], 7);
  216. word_copy(&p[8], fd, sizeof(*fd) >> 2);
  217. lwsync();
  218. /* Set the verb byte, have to substitute in the valid-bit */
  219. p[0] = cl[0] | EQAR_VB(eqar);
  220. qbman_cena_write_complete(&s->sys,
  221. QBMAN_CENA_SWP_EQCR(EQAR_IDX(eqar)),
  222. p);
  223. return 0;
  224. }
  225. /***************************/
  226. /* Volatile (pull) dequeue */
  227. /***************************/
  228. /* These should be const, eventually */
  229. static struct qb_attr_code code_pull_dct = QB_CODE(0, 0, 2);
  230. static struct qb_attr_code code_pull_dt = QB_CODE(0, 2, 2);
  231. static struct qb_attr_code code_pull_rls = QB_CODE(0, 4, 1);
  232. static struct qb_attr_code code_pull_stash = QB_CODE(0, 5, 1);
  233. static struct qb_attr_code code_pull_numframes = QB_CODE(0, 8, 4);
  234. static struct qb_attr_code code_pull_token = QB_CODE(0, 16, 8);
  235. static struct qb_attr_code code_pull_dqsource = QB_CODE(1, 0, 24);
  236. static struct qb_attr_code code_pull_rsp_lo = QB_CODE(2, 0, 32);
  237. enum qb_pull_dt_e {
  238. qb_pull_dt_channel,
  239. qb_pull_dt_workqueue,
  240. qb_pull_dt_framequeue
  241. };
  242. void qbman_pull_desc_clear(struct qbman_pull_desc *d)
  243. {
  244. memset(d, 0, sizeof(*d));
  245. }
  246. void qbman_pull_desc_set_storage(struct qbman_pull_desc *d,
  247. struct ldpaa_dq *storage,
  248. dma_addr_t storage_phys,
  249. int stash)
  250. {
  251. uint32_t *cl = qb_cl(d);
  252. /* Squiggle the pointer 'storage' into the extra 2 words of the
  253. * descriptor (which aren't copied to the hw command) */
  254. *(void **)&cl[4] = storage;
  255. if (!storage) {
  256. qb_attr_code_encode(&code_pull_rls, cl, 0);
  257. return;
  258. }
  259. qb_attr_code_encode(&code_pull_rls, cl, 1);
  260. qb_attr_code_encode(&code_pull_stash, cl, !!stash);
  261. qb_attr_code_encode_64(&code_pull_rsp_lo, (uint64_t *)cl, storage_phys);
  262. }
  263. void qbman_pull_desc_set_numframes(struct qbman_pull_desc *d, uint8_t numframes)
  264. {
  265. uint32_t *cl = qb_cl(d);
  266. BUG_ON(!numframes || (numframes > 16));
  267. qb_attr_code_encode(&code_pull_numframes, cl,
  268. (uint32_t)(numframes - 1));
  269. }
  270. void qbman_pull_desc_set_token(struct qbman_pull_desc *d, uint8_t token)
  271. {
  272. uint32_t *cl = qb_cl(d);
  273. qb_attr_code_encode(&code_pull_token, cl, token);
  274. }
  275. void qbman_pull_desc_set_fq(struct qbman_pull_desc *d, uint32_t fqid)
  276. {
  277. uint32_t *cl = qb_cl(d);
  278. qb_attr_code_encode(&code_pull_dct, cl, 1);
  279. qb_attr_code_encode(&code_pull_dt, cl, qb_pull_dt_framequeue);
  280. qb_attr_code_encode(&code_pull_dqsource, cl, fqid);
  281. }
  282. int qbman_swp_pull(struct qbman_swp *s, struct qbman_pull_desc *d)
  283. {
  284. uint32_t *p;
  285. uint32_t *cl = qb_cl(d);
  286. if (!atomic_dec_and_test(&s->vdq.busy)) {
  287. atomic_inc(&s->vdq.busy);
  288. return -EBUSY;
  289. }
  290. s->vdq.storage = *(void **)&cl[4];
  291. s->vdq.token = qb_attr_code_decode(&code_pull_token, cl);
  292. p = qbman_cena_write_start(&s->sys, QBMAN_CENA_SWP_VDQCR);
  293. word_copy(&p[1], &cl[1], 3);
  294. lwsync();
  295. /* Set the verb byte, have to substitute in the valid-bit */
  296. p[0] = cl[0] | s->vdq.valid_bit;
  297. s->vdq.valid_bit ^= QB_VALID_BIT;
  298. qbman_cena_write_complete(&s->sys, QBMAN_CENA_SWP_VDQCR, p);
  299. return 0;
  300. }
  301. /****************/
  302. /* Polling DQRR */
  303. /****************/
  304. static struct qb_attr_code code_dqrr_verb = QB_CODE(0, 0, 8);
  305. static struct qb_attr_code code_dqrr_response = QB_CODE(0, 0, 7);
  306. static struct qb_attr_code code_dqrr_stat = QB_CODE(0, 8, 8);
  307. #define QBMAN_DQRR_RESPONSE_DQ 0x60
  308. #define QBMAN_DQRR_RESPONSE_FQRN 0x21
  309. #define QBMAN_DQRR_RESPONSE_FQRNI 0x22
  310. #define QBMAN_DQRR_RESPONSE_FQPN 0x24
  311. #define QBMAN_DQRR_RESPONSE_FQDAN 0x25
  312. #define QBMAN_DQRR_RESPONSE_CDAN 0x26
  313. #define QBMAN_DQRR_RESPONSE_CSCN_MEM 0x27
  314. #define QBMAN_DQRR_RESPONSE_CGCU 0x28
  315. #define QBMAN_DQRR_RESPONSE_BPSCN 0x29
  316. #define QBMAN_DQRR_RESPONSE_CSCN_WQ 0x2a
  317. /* NULL return if there are no unconsumed DQRR entries. Returns a DQRR entry
  318. * only once, so repeated calls can return a sequence of DQRR entries, without
  319. * requiring they be consumed immediately or in any particular order. */
  320. const struct ldpaa_dq *qbman_swp_dqrr_next(struct qbman_swp *s)
  321. {
  322. uint32_t verb;
  323. uint32_t response_verb;
  324. uint32_t flags;
  325. const struct ldpaa_dq *dq;
  326. const uint32_t *p;
  327. dq = qbman_cena_read(&s->sys, QBMAN_CENA_SWP_DQRR(s->dqrr.next_idx));
  328. p = qb_cl(dq);
  329. verb = qb_attr_code_decode(&code_dqrr_verb, p);
  330. /* If the valid-bit isn't of the expected polarity, nothing there. Note,
  331. * in the DQRR reset bug workaround, we shouldn't need to skip these
  332. * check, because we've already determined that a new entry is available
  333. * and we've invalidated the cacheline before reading it, so the
  334. * valid-bit behaviour is repaired and should tell us what we already
  335. * knew from reading PI.
  336. */
  337. if ((verb & QB_VALID_BIT) != s->dqrr.valid_bit) {
  338. qbman_cena_invalidate_prefetch(&s->sys,
  339. QBMAN_CENA_SWP_DQRR(s->dqrr.next_idx));
  340. return NULL;
  341. }
  342. /* There's something there. Move "next_idx" attention to the next ring
  343. * entry (and prefetch it) before returning what we found. */
  344. s->dqrr.next_idx++;
  345. s->dqrr.next_idx &= s->dqrr.dqrr_size - 1;/* Wrap around at dqrr_size */
  346. /* TODO: it's possible to do all this without conditionals, optimise it
  347. * later. */
  348. if (!s->dqrr.next_idx)
  349. s->dqrr.valid_bit ^= QB_VALID_BIT;
  350. /* If this is the final response to a volatile dequeue command
  351. indicate that the vdq is no longer busy */
  352. flags = ldpaa_dq_flags(dq);
  353. response_verb = qb_attr_code_decode(&code_dqrr_response, &verb);
  354. if ((response_verb == QBMAN_DQRR_RESPONSE_DQ) &&
  355. (flags & LDPAA_DQ_STAT_VOLATILE) &&
  356. (flags & LDPAA_DQ_STAT_EXPIRED))
  357. atomic_inc(&s->vdq.busy);
  358. qbman_cena_invalidate_prefetch(&s->sys,
  359. QBMAN_CENA_SWP_DQRR(s->dqrr.next_idx));
  360. return dq;
  361. }
  362. /* Consume DQRR entries previously returned from qbman_swp_dqrr_next(). */
  363. void qbman_swp_dqrr_consume(struct qbman_swp *s, const struct ldpaa_dq *dq)
  364. {
  365. qbman_cinh_write(&s->sys, QBMAN_CINH_SWP_DCAP, QBMAN_IDX_FROM_DQRR(dq));
  366. }
  367. /*********************************/
  368. /* Polling user-provided storage */
  369. /*********************************/
  370. void qbman_dq_entry_set_oldtoken(struct ldpaa_dq *dq,
  371. unsigned int num_entries,
  372. uint8_t oldtoken)
  373. {
  374. memset(dq, oldtoken, num_entries * sizeof(*dq));
  375. }
  376. int qbman_dq_entry_has_newtoken(struct qbman_swp *s,
  377. const struct ldpaa_dq *dq,
  378. uint8_t newtoken)
  379. {
  380. /* To avoid converting the little-endian DQ entry to host-endian prior
  381. * to us knowing whether there is a valid entry or not (and run the
  382. * risk of corrupting the incoming hardware LE write), we detect in
  383. * hardware endianness rather than host. This means we need a different
  384. * "code" depending on whether we are BE or LE in software, which is
  385. * where DQRR_TOK_OFFSET comes in... */
  386. static struct qb_attr_code code_dqrr_tok_detect =
  387. QB_CODE(0, DQRR_TOK_OFFSET, 8);
  388. /* The user trying to poll for a result treats "dq" as const. It is
  389. * however the same address that was provided to us non-const in the
  390. * first place, for directing hardware DMA to. So we can cast away the
  391. * const because it is mutable from our perspective. */
  392. uint32_t *p = qb_cl((struct ldpaa_dq *)dq);
  393. uint32_t token;
  394. token = qb_attr_code_decode(&code_dqrr_tok_detect, &p[1]);
  395. if (token != newtoken)
  396. return 0;
  397. /* Only now do we convert from hardware to host endianness. Also, as we
  398. * are returning success, the user has promised not to call us again, so
  399. * there's no risk of us converting the endianness twice... */
  400. make_le32_n(p, 16);
  401. /* VDQCR "no longer busy" hook - not quite the same as DQRR, because the
  402. * fact "VDQCR" shows busy doesn't mean that the result we're looking at
  403. * is from the same command. Eg. we may be looking at our 10th dequeue
  404. * result from our first VDQCR command, yet the second dequeue command
  405. * could have been kicked off already, after seeing the 1st result. Ie.
  406. * the result we're looking at is not necessarily proof that we can
  407. * reset "busy". We instead base the decision on whether the current
  408. * result is sitting at the first 'storage' location of the busy
  409. * command. */
  410. if (s->vdq.storage == dq) {
  411. s->vdq.storage = NULL;
  412. atomic_inc(&s->vdq.busy);
  413. }
  414. return 1;
  415. }
  416. /********************************/
  417. /* Categorising dequeue entries */
  418. /********************************/
  419. static inline int __qbman_dq_entry_is_x(const struct ldpaa_dq *dq, uint32_t x)
  420. {
  421. const uint32_t *p = qb_cl(dq);
  422. uint32_t response_verb = qb_attr_code_decode(&code_dqrr_response, p);
  423. return response_verb == x;
  424. }
  425. int qbman_dq_entry_is_DQ(const struct ldpaa_dq *dq)
  426. {
  427. return __qbman_dq_entry_is_x(dq, QBMAN_DQRR_RESPONSE_DQ);
  428. }
  429. /*********************************/
  430. /* Parsing frame dequeue results */
  431. /*********************************/
  432. /* These APIs assume qbman_dq_entry_is_DQ() is TRUE */
  433. uint32_t ldpaa_dq_flags(const struct ldpaa_dq *dq)
  434. {
  435. const uint32_t *p = qb_cl(dq);
  436. return qb_attr_code_decode(&code_dqrr_stat, p);
  437. }
  438. const struct dpaa_fd *ldpaa_dq_fd(const struct ldpaa_dq *dq)
  439. {
  440. const uint32_t *p = qb_cl(dq);
  441. return (const struct dpaa_fd *)&p[8];
  442. }
  443. /******************/
  444. /* Buffer release */
  445. /******************/
  446. /* These should be const, eventually */
  447. /* static struct qb_attr_code code_release_num = QB_CODE(0, 0, 3); */
  448. static struct qb_attr_code code_release_set_me = QB_CODE(0, 5, 1);
  449. static struct qb_attr_code code_release_bpid = QB_CODE(0, 16, 16);
  450. void qbman_release_desc_clear(struct qbman_release_desc *d)
  451. {
  452. uint32_t *cl;
  453. memset(d, 0, sizeof(*d));
  454. cl = qb_cl(d);
  455. qb_attr_code_encode(&code_release_set_me, cl, 1);
  456. }
  457. void qbman_release_desc_set_bpid(struct qbman_release_desc *d, uint32_t bpid)
  458. {
  459. uint32_t *cl = qb_cl(d);
  460. qb_attr_code_encode(&code_release_bpid, cl, bpid);
  461. }
  462. #define RAR_IDX(rar) ((rar) & 0x7)
  463. #define RAR_VB(rar) ((rar) & 0x80)
  464. #define RAR_SUCCESS(rar) ((rar) & 0x100)
  465. int qbman_swp_release(struct qbman_swp *s, const struct qbman_release_desc *d,
  466. const uint64_t *buffers, unsigned int num_buffers)
  467. {
  468. uint32_t *p;
  469. const uint32_t *cl = qb_cl(d);
  470. uint32_t rar = qbman_cinh_read(&s->sys, QBMAN_CINH_SWP_RAR);
  471. debug("RAR=%08x\n", rar);
  472. if (!RAR_SUCCESS(rar))
  473. return -EBUSY;
  474. BUG_ON(!num_buffers || (num_buffers > 7));
  475. /* Start the release command */
  476. p = qbman_cena_write_start(&s->sys,
  477. QBMAN_CENA_SWP_RCR(RAR_IDX(rar)));
  478. /* Copy the caller's buffer pointers to the command */
  479. u64_to_le32_copy(&p[2], buffers, num_buffers);
  480. lwsync();
  481. /* Set the verb byte, have to substitute in the valid-bit and the number
  482. * of buffers. */
  483. p[0] = cl[0] | RAR_VB(rar) | num_buffers;
  484. qbman_cena_write_complete(&s->sys,
  485. QBMAN_CENA_SWP_RCR(RAR_IDX(rar)),
  486. p);
  487. return 0;
  488. }
  489. /*******************/
  490. /* Buffer acquires */
  491. /*******************/
  492. /* These should be const, eventually */
  493. static struct qb_attr_code code_acquire_bpid = QB_CODE(0, 16, 16);
  494. static struct qb_attr_code code_acquire_num = QB_CODE(1, 0, 3);
  495. static struct qb_attr_code code_acquire_r_num = QB_CODE(1, 0, 3);
  496. int qbman_swp_acquire(struct qbman_swp *s, uint32_t bpid, uint64_t *buffers,
  497. unsigned int num_buffers)
  498. {
  499. uint32_t *p;
  500. uint32_t verb, rslt, num;
  501. BUG_ON(!num_buffers || (num_buffers > 7));
  502. /* Start the management command */
  503. p = qbman_swp_mc_start(s);
  504. if (!p)
  505. return -EBUSY;
  506. /* Encode the caller-provided attributes */
  507. qb_attr_code_encode(&code_acquire_bpid, p, bpid);
  508. qb_attr_code_encode(&code_acquire_num, p, num_buffers);
  509. /* Complete the management command */
  510. p = qbman_swp_mc_complete(s, p, p[0] | QBMAN_MC_ACQUIRE);
  511. /* Decode the outcome */
  512. verb = qb_attr_code_decode(&code_generic_verb, p);
  513. rslt = qb_attr_code_decode(&code_generic_rslt, p);
  514. num = qb_attr_code_decode(&code_acquire_r_num, p);
  515. BUG_ON(verb != QBMAN_MC_ACQUIRE);
  516. /* Determine success or failure */
  517. if (unlikely(rslt != QBMAN_MC_RSLT_OK)) {
  518. printf("Acquire buffers from BPID 0x%x failed, code=0x%02x\n",
  519. bpid, rslt);
  520. return -EIO;
  521. }
  522. BUG_ON(num > num_buffers);
  523. /* Copy the acquired buffers to the caller's array */
  524. u64_from_le32_copy(buffers, &p[2], num);
  525. return (int)num;
  526. }