uniphier-ld20-akebi96.dts 2.8 KB

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  1. // SPDX-License-Identifier: GPL-2.0+ OR MIT
  2. //
  3. // Device Tree Source for Akebi96 Development Board
  4. //
  5. // Derived from uniphier-ld20-global.dts.
  6. //
  7. // Copyright (C) 2015-2017 Socionext Inc.
  8. // Copyright (C) 2019-2020 Linaro Ltd.
  9. /dts-v1/;
  10. #include <dt-bindings/gpio/uniphier-gpio.h>
  11. #include "uniphier-ld20.dtsi"
  12. / {
  13. model = "Akebi96";
  14. compatible = "socionext,uniphier-ld20-akebi96",
  15. "socionext,uniphier-ld20";
  16. chosen {
  17. stdout-path = "serial0:115200n8";
  18. };
  19. aliases {
  20. serial0 = &serial0;
  21. serial1 = &serial1;
  22. serial2 = &serial2;
  23. serial3 = &serial3;
  24. i2c0 = &i2c0;
  25. i2c1 = &i2c1;
  26. i2c2 = &i2c2;
  27. i2c3 = &i2c3;
  28. i2c4 = &i2c4;
  29. i2c5 = &i2c5;
  30. spi0 = &spi0;
  31. spi1 = &spi1;
  32. spi2 = &spi2;
  33. spi3 = &spi3;
  34. ethernet0 = &eth;
  35. };
  36. memory@80000000 {
  37. device_type = "memory";
  38. reg = <0 0x80000000 0 0xc0000000>;
  39. };
  40. framebuffer@c0000000 {
  41. compatible = "simple-framebuffer";
  42. reg = <0 0xc0000000 0 0x02000000>;
  43. width = <1920>;
  44. height = <1080>;
  45. stride = <7680>;
  46. format = "a8r8g8b8";
  47. };
  48. reserved-memory {
  49. #address-cells = <2>;
  50. #size-cells = <2>;
  51. ranges;
  52. memory@c0000000 {
  53. reg = <0 0xc0000000 0 0x02000000>;
  54. no-map;
  55. };
  56. };
  57. sound {
  58. compatible = "audio-graph-card";
  59. label = "UniPhier LD20";
  60. dais = <&spdif_port0
  61. &comp_spdif_port0>;
  62. };
  63. spdif-out {
  64. compatible = "linux,spdif-dit";
  65. #sound-dai-cells = <0>;
  66. port@0 {
  67. spdif_tx: endpoint {
  68. remote-endpoint = <&spdif_hiecout1>;
  69. };
  70. };
  71. };
  72. comp-spdif-out {
  73. compatible = "linux,spdif-dit";
  74. #sound-dai-cells = <0>;
  75. port@0 {
  76. comp_spdif_tx: endpoint {
  77. remote-endpoint = <&comp_spdif_hiecout1>;
  78. };
  79. };
  80. };
  81. firmware {
  82. optee {
  83. compatible = "linaro,optee-tz";
  84. method = "smc";
  85. };
  86. };
  87. };
  88. &spi3 {
  89. status = "okay";
  90. #address-cells = <1>;
  91. #size-cells = <0>;
  92. usb-over-spi@0 {
  93. compatible = "maxim,max3421-udc";
  94. reg = <0>;
  95. spi-max-frequency = <12500000>;
  96. interrupt-parent = <&gpio>;
  97. interrupt-names = "udc";
  98. interrupts = <0 2>;
  99. };
  100. };
  101. &serial0 {
  102. /* Onboard USB-UART */
  103. status = "okay";
  104. };
  105. &serial2 {
  106. /* LS connector UART1 */
  107. status = "okay";
  108. };
  109. &serial3 {
  110. /* LS connector UART0 */
  111. status = "okay";
  112. };
  113. &spdif_hiecout1 {
  114. remote-endpoint = <&spdif_tx>;
  115. };
  116. &comp_spdif_hiecout1 {
  117. remote-endpoint = <&comp_spdif_tx>;
  118. };
  119. &i2c0 {
  120. /* LS connector I2C0 */
  121. status = "okay";
  122. };
  123. &i2c1 {
  124. /* LS connector I2C1 */
  125. status = "okay";
  126. };
  127. &eth {
  128. status = "okay";
  129. phy-handle = <&ethphy>;
  130. };
  131. &mdio {
  132. ethphy: ethernet-phy@0 {
  133. reg = <0>;
  134. };
  135. };
  136. &usb {
  137. status = "okay";
  138. };
  139. &pcie {
  140. status = "okay";
  141. };
  142. &gpio {
  143. /* IRQs for Max3421 */
  144. xirq0 {
  145. gpio-hog;
  146. gpios = <UNIPHIER_GPIO_IRQ(0) 1>;
  147. input;
  148. };
  149. xirq10 {
  150. gpio-hog;
  151. gpios = <UNIPHIER_GPIO_IRQ(10) 1>;
  152. input;
  153. };
  154. };
  155. &pinctrl_aout1 {
  156. groups = "aout1b";
  157. };
  158. &pinctrl_uart3 {
  159. groups = "uart3", "uart3_ctsrts";
  160. };