ax25-ae350.c 2.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135
  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2017 Andes Technology Corporation
  4. * Rick Chen, Andes Technology Corporation <rick@andestech.com>
  5. */
  6. #include <common.h>
  7. #include <flash.h>
  8. #include <image.h>
  9. #include <init.h>
  10. #include <net.h>
  11. #if defined(CONFIG_FTMAC100) && !defined(CONFIG_DM_ETH)
  12. #include <netdev.h>
  13. #endif
  14. #include <asm/global_data.h>
  15. #include <linux/io.h>
  16. #include <faraday/ftsmc020.h>
  17. #include <fdtdec.h>
  18. #include <dm.h>
  19. #include <spl.h>
  20. DECLARE_GLOBAL_DATA_PTR;
  21. /*
  22. * Miscellaneous platform dependent initializations
  23. */
  24. int board_init(void)
  25. {
  26. gd->bd->bi_boot_params = PHYS_SDRAM_0 + 0x400;
  27. return 0;
  28. }
  29. int dram_init(void)
  30. {
  31. return fdtdec_setup_mem_size_base();
  32. }
  33. int dram_init_banksize(void)
  34. {
  35. return fdtdec_setup_memory_banksize();
  36. }
  37. #if defined(CONFIG_FTMAC100) && !defined(CONFIG_DM_ETH)
  38. int board_eth_init(struct bd_info *bd)
  39. {
  40. return ftmac100_initialize(bd);
  41. }
  42. #endif
  43. ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info)
  44. {
  45. return 0;
  46. }
  47. void *board_fdt_blob_setup(int *err)
  48. {
  49. *err = 0;
  50. #if CONFIG_IS_ENABLED(OF_BOARD)
  51. return (void *)(ulong)gd->arch.firmware_fdt_addr;
  52. #elif CONFIG_IS_ENABLED(OF_SEPARATE)
  53. return (void *)CONFIG_SYS_FDT_BASE;
  54. #else
  55. *err = -EINVAL;
  56. return NULL;
  57. #endif
  58. }
  59. int smc_init(void)
  60. {
  61. int node = -1;
  62. const char *compat = "andestech,atfsmc020";
  63. void *blob = (void *)gd->fdt_blob;
  64. fdt_addr_t addr;
  65. struct ftsmc020_bank *regs;
  66. node = fdt_node_offset_by_compatible(blob, -1, compat);
  67. if (node < 0)
  68. return -FDT_ERR_NOTFOUND;
  69. addr = fdtdec_get_addr_size_auto_noparent(blob, node,
  70. "reg", 0, NULL, false);
  71. if (addr == FDT_ADDR_T_NONE)
  72. return -EINVAL;
  73. regs = (struct ftsmc020_bank *)(uintptr_t)addr;
  74. regs->cr &= ~FTSMC020_BANK_WPROT;
  75. return 0;
  76. }
  77. static void v5l2_init(void)
  78. {
  79. struct udevice *dev;
  80. uclass_get_device(UCLASS_CACHE, 0, &dev);
  81. }
  82. #ifdef CONFIG_BOARD_EARLY_INIT_F
  83. int board_early_init_f(void)
  84. {
  85. smc_init();
  86. v5l2_init();
  87. return 0;
  88. }
  89. #endif
  90. #ifdef CONFIG_SPL
  91. void board_boot_order(u32 *spl_boot_list)
  92. {
  93. u8 i;
  94. u32 boot_devices[] = {
  95. #ifdef CONFIG_SPL_RAM_SUPPORT
  96. BOOT_DEVICE_RAM,
  97. #endif
  98. #ifdef CONFIG_SPL_MMC
  99. BOOT_DEVICE_MMC1,
  100. #endif
  101. };
  102. for (i = 0; i < ARRAY_SIZE(boot_devices); i++)
  103. spl_boot_list[i] = boot_devices[i];
  104. }
  105. #endif
  106. #ifdef CONFIG_SPL_LOAD_FIT
  107. int board_fit_config_name_match(const char *name)
  108. {
  109. /* boot using first FIT config */
  110. return 0;
  111. }
  112. #endif