board.c 6.8 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * board.c
  4. *
  5. * Board functions for EETS PDU001 board
  6. *
  7. * Copyright (C) 2018, EETS GmbH, http://www.eets.ch/
  8. *
  9. * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
  10. */
  11. #include <common.h>
  12. #include <env.h>
  13. #include <errno.h>
  14. #include <spl.h>
  15. #include <i2c.h>
  16. #include <watchdog.h>
  17. #include <debug_uart.h>
  18. #include <dm/ofnode.h>
  19. #include <power/pmic.h>
  20. #include <power/regulator.h>
  21. #include <asm/arch/cpu.h>
  22. #include <asm/arch/hardware.h>
  23. #include <asm/arch/omap.h>
  24. #include <asm/arch/ddr_defs.h>
  25. #include <asm/arch/clock.h>
  26. #include <asm/arch/gpio.h>
  27. #include <asm/arch/mmc_host_def.h>
  28. #include <asm/arch/sys_proto.h>
  29. #include <asm/arch/mem.h>
  30. #include <asm/io.h>
  31. #include <asm/emif.h>
  32. #include <asm/gpio.h>
  33. #include "board.h"
  34. DECLARE_GLOBAL_DATA_PTR;
  35. #define I2C_ADDR_NODE_ID 0x50
  36. #define I2C_REG_NODE_ID_BASE 0xfa
  37. #define NODE_ID_BYTE_COUNT 6
  38. #define I2C_ADDR_LEDS 0x60
  39. #define I2C_REG_RUN_LED 0x06
  40. #define RUN_LED_OFF 0x0
  41. #define RUN_LED_RED 0x1
  42. #define RUN_LED_GREEN (0x1 << 2)
  43. #define VDD_MPU_REGULATOR "regulator@2"
  44. #define VDD_CORE_REGULATOR "regulator@3"
  45. #define DEFAULT_CORE_VOLTAGE 1137500
  46. /*
  47. * boot device save register
  48. * -------------------------
  49. * The boot device can be quired by 'spl_boot_device()' in
  50. * 'am33xx_spl_board_init'. However it can't be saved in the u-boot
  51. * environment here. In turn 'spl_boot_device' can't be called in
  52. * 'board_late_init' which allows writing to u-boot environment.
  53. * To get the boot device from 'am33xx_spl_board_init' to
  54. * 'board_late_init' we therefore use a scratch register from the RTC.
  55. */
  56. #define CONFIG_SYS_RTC_SCRATCH0 0x60
  57. #define BOOT_DEVICE_SAVE_REGISTER (RTC_BASE + CONFIG_SYS_RTC_SCRATCH0)
  58. #ifdef CONFIG_SPL_BUILD
  59. static void save_boot_device(void)
  60. {
  61. *((u32 *)(BOOT_DEVICE_SAVE_REGISTER)) = spl_boot_device();
  62. }
  63. #endif
  64. u32 boot_device(void)
  65. {
  66. return *((u32 *)(BOOT_DEVICE_SAVE_REGISTER));
  67. }
  68. /* Store the boot device in the environment variable 'boot_device' */
  69. static void env_set_boot_device(void)
  70. {
  71. switch (boot_device()) {
  72. case BOOT_DEVICE_MMC1: {
  73. env_set("boot_device", "emmc");
  74. break;
  75. }
  76. case BOOT_DEVICE_MMC2: {
  77. env_set("boot_device", "sdcard");
  78. break;
  79. }
  80. default: {
  81. env_set("boot_device", "unknown");
  82. break;
  83. }
  84. }
  85. }
  86. static void set_run_led(struct udevice *dev)
  87. {
  88. int val = RUN_LED_OFF;
  89. if (IS_ENABLED(CONFIG_RUN_LED_RED))
  90. val = RUN_LED_RED;
  91. else if (IS_ENABLED(CONFIG_RUN_LED_GREEN))
  92. val = RUN_LED_GREEN;
  93. dm_i2c_reg_write(dev, I2C_REG_RUN_LED, val);
  94. }
  95. /* Set 'serial#' to the EUI-48 value of board node ID chip */
  96. static void env_set_serial(struct udevice *dev)
  97. {
  98. int val;
  99. char serial[2 * NODE_ID_BYTE_COUNT + 1];
  100. int n;
  101. for (n = 0; n < sizeof(serial); n += 2) {
  102. val = dm_i2c_reg_read(dev, I2C_REG_NODE_ID_BASE + n / 2);
  103. sprintf(serial + n, "%02X", val);
  104. }
  105. serial[2 * NODE_ID_BYTE_COUNT] = '\0';
  106. env_set("serial#", serial);
  107. }
  108. static void set_mpu_and_core_voltage(void)
  109. {
  110. int mpu_vdd;
  111. int sil_rev;
  112. struct udevice *dev;
  113. struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
  114. /*
  115. * The PDU001 (more precisely the computing module m2) uses a
  116. * TPS65910 PMIC. For all MPU frequencies we support we use a CORE
  117. * voltage of 1.1375V. For MPU voltage we need to switch based on
  118. * the frequency we are running at.
  119. */
  120. /*
  121. * Depending on MPU clock and PG we will need a different VDD
  122. * to drive at that speed.
  123. */
  124. sil_rev = readl(&cdev->deviceid) >> 28;
  125. mpu_vdd = am335x_get_mpu_vdd(sil_rev, dpll_mpu_opp100.m);
  126. /* first update the MPU voltage */
  127. if (!regulator_get_by_devname(VDD_MPU_REGULATOR, &dev)) {
  128. if (regulator_set_value(dev, mpu_vdd))
  129. debug("failed to set MPU voltage\n");
  130. } else {
  131. debug("invalid MPU voltage ragulator %s\n", VDD_MPU_REGULATOR);
  132. }
  133. /* second update the CORE voltage */
  134. if (!regulator_get_by_devname(VDD_CORE_REGULATOR, &dev)) {
  135. if (regulator_set_value(dev, DEFAULT_CORE_VOLTAGE))
  136. debug("failed to set CORE voltage\n");
  137. } else {
  138. debug("invalid CORE voltage ragulator %s\n",
  139. VDD_CORE_REGULATOR);
  140. }
  141. }
  142. #ifndef CONFIG_SKIP_LOWLEVEL_INIT
  143. static const struct ddr_data ddr2_data = {
  144. .datardsratio0 = MT47H128M16RT25E_RD_DQS,
  145. .datafwsratio0 = MT47H128M16RT25E_PHY_FIFO_WE,
  146. .datawrsratio0 = MT47H128M16RT25E_PHY_WR_DATA,
  147. };
  148. static const struct cmd_control ddr2_cmd_ctrl_data = {
  149. .cmd0csratio = MT47H128M16RT25E_RATIO,
  150. .cmd1csratio = MT47H128M16RT25E_RATIO,
  151. .cmd2csratio = MT47H128M16RT25E_RATIO,
  152. };
  153. static const struct emif_regs ddr2_emif_reg_data = {
  154. .sdram_config = MT47H128M16RT25E_EMIF_SDCFG,
  155. .ref_ctrl = MT47H128M16RT25E_EMIF_SDREF,
  156. .sdram_tim1 = MT47H128M16RT25E_EMIF_TIM1,
  157. .sdram_tim2 = MT47H128M16RT25E_EMIF_TIM2,
  158. .sdram_tim3 = MT47H128M16RT25E_EMIF_TIM3,
  159. .emif_ddr_phy_ctlr_1 = MT47H128M16RT25E_EMIF_READ_LATENCY,
  160. };
  161. #define OSC (V_OSCK / 1000000)
  162. const struct dpll_params dpll_ddr = {
  163. 266, OSC - 1, 1, -1, -1, -1, -1};
  164. const struct dpll_params dpll_ddr_evm_sk = {
  165. 303, OSC - 1, 1, -1, -1, -1, -1};
  166. const struct dpll_params dpll_ddr_bone_black = {
  167. 400, OSC - 1, 1, -1, -1, -1, -1};
  168. void am33xx_spl_board_init(void)
  169. {
  170. struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
  171. /* Get the frequency */
  172. dpll_mpu_opp100.m = am335x_get_efuse_mpu_max_freq(cdev);
  173. /* Set CORE Frequencies to OPP100 */
  174. do_setup_dpll(&dpll_core_regs, &dpll_core_opp100);
  175. /* Set MPU Frequency to what we detected now that voltages are set */
  176. do_setup_dpll(&dpll_mpu_regs, &dpll_mpu_opp100);
  177. /* save boot device for later use by 'board_late_init' */
  178. save_boot_device();
  179. }
  180. const struct dpll_params *get_dpll_ddr_params(void)
  181. {
  182. enable_i2c0_pin_mux();
  183. return &dpll_ddr;
  184. }
  185. void set_mux_conf_regs(void)
  186. {
  187. /* done first by the ROM and afterwards by the pin controller driver */
  188. enable_i2c0_pin_mux();
  189. }
  190. const struct ctrl_ioregs ioregs = {
  191. .cm0ioctl = MT47H128M16RT25E_IOCTRL_VALUE,
  192. .cm1ioctl = MT47H128M16RT25E_IOCTRL_VALUE,
  193. .cm2ioctl = MT47H128M16RT25E_IOCTRL_VALUE,
  194. .dt0ioctl = MT47H128M16RT25E_IOCTRL_VALUE,
  195. .dt1ioctl = MT47H128M16RT25E_IOCTRL_VALUE,
  196. };
  197. void sdram_init(void)
  198. {
  199. config_ddr(266, &ioregs, &ddr2_data,
  200. &ddr2_cmd_ctrl_data, &ddr2_emif_reg_data, 0);
  201. }
  202. #endif /* CONFIG_SKIP_LOWLEVEL_INIT */
  203. #ifdef CONFIG_DEBUG_UART
  204. void board_debug_uart_init(void)
  205. {
  206. /* done by pin controller driver if not debugging */
  207. enable_uart_pin_mux(CONFIG_DEBUG_UART_BASE);
  208. }
  209. #endif
  210. /*
  211. * Basic board specific setup. Pinmux has been handled already.
  212. */
  213. int board_init(void)
  214. {
  215. #ifdef CONFIG_HW_WATCHDOG
  216. hw_watchdog_init();
  217. #endif
  218. gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
  219. return 0;
  220. }
  221. #ifdef CONFIG_BOARD_LATE_INIT
  222. int board_late_init(void)
  223. {
  224. struct udevice *dev;
  225. set_mpu_and_core_voltage();
  226. env_set_boot_device();
  227. /* second I2C bus connects to node ID and front panel LED chip */
  228. if (!i2c_get_chip_for_busnum(1, I2C_ADDR_LEDS, 1, &dev))
  229. set_run_led(dev);
  230. if (!i2c_get_chip_for_busnum(1, I2C_ADDR_NODE_ID, 1, &dev))
  231. env_set_serial(dev);
  232. return 0;
  233. }
  234. #endif