net2big_v2.c 6.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2011 Simon Guinot <sguinot@lacie.com>
  4. *
  5. * Based on Kirkwood support:
  6. * (C) Copyright 2009
  7. * Marvell Semiconductor <www.marvell.com>
  8. * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
  9. */
  10. #include <common.h>
  11. #include <command.h>
  12. #include <env.h>
  13. #include <i2c.h>
  14. #include <asm/mach-types.h>
  15. #include <asm/arch/cpu.h>
  16. #include <asm/arch/soc.h>
  17. #include <asm/arch/mpp.h>
  18. #include <asm/arch/gpio.h>
  19. #include "net2big_v2.h"
  20. #include "../common/common.h"
  21. #include "../common/cpld-gpio-bus.h"
  22. DECLARE_GLOBAL_DATA_PTR;
  23. int board_early_init_f(void)
  24. {
  25. /* GPIO configuration */
  26. mvebu_config_gpio(NET2BIG_V2_OE_VAL_LOW, NET2BIG_V2_OE_VAL_HIGH,
  27. NET2BIG_V2_OE_LOW, NET2BIG_V2_OE_HIGH);
  28. /* Multi-Purpose Pins Functionality configuration */
  29. static const u32 kwmpp_config[] = {
  30. MPP0_SPI_SCn,
  31. MPP1_SPI_MOSI,
  32. MPP2_SPI_SCK,
  33. MPP3_SPI_MISO,
  34. MPP6_SYSRST_OUTn,
  35. MPP7_GPO, /* Request power-off */
  36. MPP8_TW_SDA,
  37. MPP9_TW_SCK,
  38. MPP10_UART0_TXD,
  39. MPP11_UART0_RXD,
  40. MPP13_GPIO, /* Rear power switch (on|auto) */
  41. MPP14_GPIO, /* USB fuse alarm */
  42. MPP15_GPIO, /* Rear power switch (auto|off) */
  43. MPP16_GPIO, /* SATA HDD1 power */
  44. MPP17_GPIO, /* SATA HDD2 power */
  45. MPP20_SATA1_ACTn,
  46. MPP21_SATA0_ACTn,
  47. MPP24_GPIO, /* USB mode select */
  48. MPP26_GPIO, /* USB device vbus */
  49. MPP28_GPIO, /* USB enable host vbus */
  50. MPP29_GPIO, /* CPLD GPIO bus ALE */
  51. MPP34_GPIO, /* Rear Push button 0=on 1=off */
  52. MPP35_GPIO, /* Inhibit switch power-off */
  53. MPP36_GPIO, /* SATA HDD1 presence */
  54. MPP37_GPIO, /* SATA HDD2 presence */
  55. MPP40_GPIO, /* eSATA presence */
  56. MPP44_GPIO, /* CPLD GPIO bus (data 0) */
  57. MPP45_GPIO, /* CPLD GPIO bus (data 1) */
  58. MPP46_GPIO, /* CPLD GPIO bus (data 2) */
  59. MPP47_GPIO, /* CPLD GPIO bus (addr 0) */
  60. MPP48_GPIO, /* CPLD GPIO bus (addr 1) */
  61. MPP49_GPIO, /* CPLD GPIO bus (addr 2) */
  62. 0
  63. };
  64. kirkwood_mpp_conf(kwmpp_config, NULL);
  65. return 0;
  66. }
  67. int board_init(void)
  68. {
  69. /* Machine number */
  70. gd->bd->bi_arch_number = MACH_TYPE_NET2BIG_V2;
  71. /* Boot parameters address */
  72. gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
  73. return 0;
  74. }
  75. #if defined(CONFIG_MISC_INIT_R)
  76. #if defined(CONFIG_CMD_I2C) && defined(CONFIG_SYS_I2C_G762_ADDR)
  77. /*
  78. * Start I2C fan (GMT G762 controller)
  79. */
  80. static void init_fan(void)
  81. {
  82. u8 data;
  83. i2c_set_bus_num(0);
  84. /* Enable open-loop and PWM modes */
  85. data = 0x20;
  86. if (i2c_write(CONFIG_SYS_I2C_G762_ADDR,
  87. G762_REG_FAN_CMD1, 1, &data, 1) != 0)
  88. goto err;
  89. data = 0;
  90. if (i2c_write(CONFIG_SYS_I2C_G762_ADDR,
  91. G762_REG_SET_CNT, 1, &data, 1) != 0)
  92. goto err;
  93. /*
  94. * RPM to PWM (set_out register) fan speed conversion array:
  95. * 0 0x00
  96. * 1500 0x04
  97. * 2800 0x08
  98. * 3400 0x0C
  99. * 3700 0x10
  100. * 4400 0x20
  101. * 4700 0x30
  102. * 4800 0x50
  103. * 5200 0x80
  104. * 5400 0xC0
  105. * 5500 0xFF
  106. *
  107. * Start fan at low speed (2800 RPM):
  108. */
  109. data = 0x08;
  110. if (i2c_write(CONFIG_SYS_I2C_G762_ADDR,
  111. G762_REG_SET_OUT, 1, &data, 1) != 0)
  112. goto err;
  113. return;
  114. err:
  115. printf("Error: failed to start I2C fan @%02x\n",
  116. CONFIG_SYS_I2C_G762_ADDR);
  117. }
  118. #else
  119. static void init_fan(void) {}
  120. #endif /* CONFIG_CMD_I2C && CONFIG_SYS_I2C_G762_ADDR */
  121. #if defined(CONFIG_NET2BIG_V2) && defined(CONFIG_KIRKWOOD_GPIO)
  122. /*
  123. * CPLD GPIO bus:
  124. *
  125. * - address register : bit [0-2] -> GPIO [47-49]
  126. * - data register : bit [0-2] -> GPIO [44-46]
  127. * - enable register : GPIO 29
  128. */
  129. static unsigned cpld_gpio_bus_addr[] = { 47, 48, 49 };
  130. static unsigned cpld_gpio_bus_data[] = { 44, 45, 46 };
  131. static struct cpld_gpio_bus cpld_gpio_bus = {
  132. .addr = cpld_gpio_bus_addr,
  133. .num_addr = ARRAY_SIZE(cpld_gpio_bus_addr),
  134. .data = cpld_gpio_bus_data,
  135. .num_data = ARRAY_SIZE(cpld_gpio_bus_data),
  136. .enable = 29,
  137. };
  138. /*
  139. * LEDs configuration:
  140. *
  141. * The LEDs are controlled by a CPLD and can be configured through
  142. * the CPLD GPIO bus.
  143. *
  144. * Address register selection:
  145. *
  146. * addr | register
  147. * ----------------------------
  148. * 0 | front LED
  149. * 1 | front LED brightness
  150. * 2 | SATA LED brightness
  151. * 3 | SATA0 LED
  152. * 4 | SATA1 LED
  153. * 5 | SATA2 LED
  154. * 6 | SATA3 LED
  155. * 7 | SATA4 LED
  156. *
  157. * Data register configuration:
  158. *
  159. * data | LED brightness
  160. * -------------------------------------------------
  161. * 0 | min (off)
  162. * - | -
  163. * 7 | max
  164. *
  165. * data | front LED mode
  166. * -------------------------------------------------
  167. * 0 | fix off
  168. * 1 | fix blue on
  169. * 2 | fix red on
  170. * 3 | blink blue on=1 sec and blue off=1 sec
  171. * 4 | blink red on=1 sec and red off=1 sec
  172. * 5 | blink blue on=2.5 sec and red on=0.5 sec
  173. * 6 | blink blue on=1 sec and red on=1 sec
  174. * 7 | blink blue on=0.5 sec and blue off=2.5 sec
  175. *
  176. * data | SATA LED mode
  177. * -------------------------------------------------
  178. * 0 | fix off
  179. * 1 | SATA activity blink
  180. * 2 | fix red on
  181. * 3 | blink blue on=1 sec and blue off=1 sec
  182. * 4 | blink red on=1 sec and red off=1 sec
  183. * 5 | blink blue on=2.5 sec and red on=0.5 sec
  184. * 6 | blink blue on=1 sec and red on=1 sec
  185. * 7 | fix blue on
  186. */
  187. static void init_leds(void)
  188. {
  189. /* Enable the front blue LED */
  190. cpld_gpio_bus_write(&cpld_gpio_bus, 0, 1);
  191. cpld_gpio_bus_write(&cpld_gpio_bus, 1, 3);
  192. /* Configure SATA LEDs to blink in relation with the SATA activity */
  193. cpld_gpio_bus_write(&cpld_gpio_bus, 3, 1);
  194. cpld_gpio_bus_write(&cpld_gpio_bus, 4, 1);
  195. cpld_gpio_bus_write(&cpld_gpio_bus, 2, 3);
  196. }
  197. #else
  198. static void init_leds(void) {}
  199. #endif /* CONFIG_NET2BIG_V2 && CONFIG_KIRKWOOD_GPIO */
  200. int misc_init_r(void)
  201. {
  202. init_fan();
  203. #if defined(CONFIG_CMD_I2C) && defined(CONFIG_SYS_I2C_EEPROM_ADDR)
  204. if (!env_get("ethaddr")) {
  205. uchar mac[6];
  206. if (lacie_read_mac_address(mac) == 0)
  207. eth_env_set_enetaddr("ethaddr", mac);
  208. }
  209. #endif
  210. init_leds();
  211. return 0;
  212. }
  213. #endif /* CONFIG_MISC_INIT_R */
  214. #if defined(CONFIG_CMD_NET) && defined(CONFIG_RESET_PHY_R)
  215. /* Configure and initialize PHY */
  216. void reset_phy(void)
  217. {
  218. mv_phy_88e1116_init("egiga0", 8);
  219. }
  220. #endif
  221. #if defined(CONFIG_KIRKWOOD_GPIO)
  222. /* Return GPIO push button status */
  223. static int
  224. do_read_push_button(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  225. {
  226. return !kw_gpio_get_value(NET2BIG_V2_GPIO_PUSH_BUTTON);
  227. }
  228. U_BOOT_CMD(button, 1, 1, do_read_push_button,
  229. "Return GPIO push button status 0=off 1=on", "");
  230. #endif