edison.dts 3.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (c) 2017 Intel Corporation
  4. */
  5. /dts-v1/;
  6. #include <dt-bindings/gpio/x86-gpio.h>
  7. #include <dt-bindings/interrupt-router/intel-irq.h>
  8. /include/ "skeleton.dtsi"
  9. /include/ "rtc.dtsi"
  10. #include "tsc_timer.dtsi"
  11. #include "smbios.dtsi"
  12. / {
  13. model = "Intel Edison";
  14. compatible = "intel,edison", "intel,tangier";
  15. aliases {
  16. serial0 = &serial0;
  17. serial1 = &serial1;
  18. serial2 = &serial2;
  19. };
  20. binman: binman {
  21. multiple-images;
  22. };
  23. chosen {
  24. stdout-path = &serial2;
  25. };
  26. cpus {
  27. #address-cells = <1>;
  28. #size-cells = <0>;
  29. cpu@0 {
  30. device_type = "cpu";
  31. compatible = "cpu-x86";
  32. reg = <0>;
  33. intel,apic-id = <0>;
  34. };
  35. cpu@1 {
  36. device_type = "cpu";
  37. compatible = "cpu-x86";
  38. reg = <1>;
  39. intel,apic-id = <2>;
  40. };
  41. };
  42. pci {
  43. compatible = "pci-x86";
  44. #address-cells = <3>;
  45. #size-cells = <2>;
  46. u-boot,dm-pre-reloc;
  47. ranges = <0x02000000 0x0 0x80000000 0x80000000 0 0x40000000
  48. 0x42000000 0x0 0xc0000000 0xc0000000 0 0x20000000
  49. 0x01000000 0x0 0x2000 0x2000 0 0xe000>;
  50. };
  51. serial0: serial@ff010080 {
  52. compatible = "intel,mid-uart";
  53. reg = <0xff010080 0x100>;
  54. reg-shift = <0>;
  55. clock-frequency = <29491200>;
  56. current-speed = <115200>;
  57. };
  58. serial1: serial@ff010100 {
  59. compatible = "intel,mid-uart";
  60. reg = <0xff010100 0x100>;
  61. reg-shift = <0>;
  62. clock-frequency = <29491200>;
  63. current-speed = <115200>;
  64. };
  65. serial2: serial@ff010180 {
  66. compatible = "intel,mid-uart";
  67. reg = <0xff010180 0x100>;
  68. reg-shift = <0>;
  69. clock-frequency = <29491200>;
  70. current-speed = <115200>;
  71. };
  72. emmc: mmc@ff3fc000 {
  73. compatible = "intel,sdhci-tangier";
  74. reg = <0xff3fc000 0x1000>;
  75. non-removable;
  76. };
  77. sdcard: mmc@ff3fa000 {
  78. compatible = "intel,sdhci-tangier";
  79. reg = <0xff3fa000 0x1000>;
  80. };
  81. pmu: power@ff00b000 {
  82. compatible = "intel,pmu-mid";
  83. reg = <0xff00b000 0x1000>;
  84. };
  85. scu: ipc@ff009000 {
  86. compatible = "intel,scu-ipc";
  87. reg = <0xff009000 0x1000>;
  88. };
  89. usb: usb@f9100000 {
  90. compatible = "intel,tangier-dwc3";
  91. #address-cells = <1>;
  92. #size-cells = <1>;
  93. dwc3: dwc3 {
  94. reg = <0xf9100000 0x100000>;
  95. maximum-speed = "high-speed";
  96. dr_mode = "peripheral";
  97. };
  98. };
  99. watchdog: wdt@0 {
  100. compatible = "intel,tangier-wdt";
  101. };
  102. reset {
  103. compatible = "intel,reset-tangier";
  104. u-boot,dm-pre-reloc;
  105. };
  106. pinctrl {
  107. compatible = "intel,pinctrl-tangier";
  108. reg = <0xff0c0000 0x8000>;
  109. /*
  110. * Initial configuration came from the firmware.
  111. * Which quite likely has been used in the phones, where I2C #8,
  112. * that is not part of Atom peripheral, is in use.
  113. * Thus we need to override the leftover.
  114. */
  115. i2c6_scl@0 {
  116. pad-offset = <111>;
  117. mode-func = <1>;
  118. protected;
  119. };
  120. i2c6_sda@0 {
  121. pad-offset = <112>;
  122. mode-func = <1>;
  123. protected;
  124. };
  125. };
  126. };
  127. &binman {
  128. u-boot-edison {
  129. filename = "u-boot-edison.img";
  130. /* This is the OSIP */
  131. blob {
  132. filename = "edison-osip.dat";
  133. };
  134. u-boot {
  135. offset = <0x200>;
  136. };
  137. u-boot-env {
  138. offset = <0x200200>;
  139. filename = "edison-environment.txt";
  140. size = <0x10000>;
  141. fill-byte = [ff];
  142. };
  143. u-boot-env2 {
  144. type = "u-boot-env";
  145. offset = <0x500200>;
  146. filename = "edison-environment.txt";
  147. size = <0x10000>;
  148. fill-byte = [ff];
  149. };
  150. };
  151. };