kwbimage.h 11 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * (C) Copyright 2008
  4. * Marvell Semiconductor <www.marvell.com>
  5. * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
  6. */
  7. #ifndef _KWBIMAGE_H_
  8. #define _KWBIMAGE_H_
  9. #include <compiler.h>
  10. #include <stdint.h>
  11. #ifdef __GNUC__
  12. #define __packed __attribute((packed))
  13. #else
  14. #define __packed
  15. #endif
  16. #define KWBIMAGE_MAX_CONFIG ((0x1dc - 0x20)/sizeof(struct reg_config))
  17. #define MAX_TEMPBUF_LEN 32
  18. /* NAND ECC Mode */
  19. #define IBR_HDR_ECC_DEFAULT 0x00
  20. #define IBR_HDR_ECC_FORCED_HAMMING 0x01
  21. #define IBR_HDR_ECC_FORCED_RS 0x02
  22. #define IBR_HDR_ECC_DISABLED 0x03
  23. /* Boot Type - block ID */
  24. #define IBR_HDR_I2C_ID 0x4D
  25. #define IBR_HDR_SPI_ID 0x5A
  26. #define IBR_HDR_NAND_ID 0x8B
  27. #define IBR_HDR_SATA_ID 0x78
  28. #define IBR_HDR_PEX_ID 0x9C
  29. #define IBR_HDR_UART_ID 0x69
  30. #define IBR_HDR_SDIO_ID 0xAE
  31. #define IBR_DEF_ATTRIB 0x00
  32. /* Structure of the main header, version 0 (Kirkwood, Dove) */
  33. struct main_hdr_v0 {
  34. uint8_t blockid; /* 0x0 */
  35. uint8_t nandeccmode; /* 0x1 */
  36. uint16_t nandpagesize; /* 0x2-0x3 */
  37. uint32_t blocksize; /* 0x4-0x7 */
  38. uint8_t version; /* 0x8 */
  39. uint8_t rsvd1[3]; /* 0x9-0xB */
  40. uint32_t srcaddr; /* 0xC-0xF */
  41. uint32_t destaddr; /* 0x10-0x13 */
  42. uint32_t execaddr; /* 0x14-0x17 */
  43. uint8_t satapiomode; /* 0x18 */
  44. uint8_t nandblocksize; /* 0x19 */
  45. union {
  46. uint8_t nandbadblklocation; /* 0x1A */
  47. uint16_t ddrinitdelay; /* 0x1A-0x1B */
  48. };
  49. uint8_t rsvd2; /* 0x1C */
  50. uint8_t bin; /* 0x1D */
  51. uint8_t ext; /* 0x1E */
  52. uint8_t checksum; /* 0x1F */
  53. } __packed;
  54. struct ext_hdr_v0_reg {
  55. uint32_t raddr;
  56. uint32_t rdata;
  57. } __packed;
  58. /* Structure of the extension header, version 0 (Kirkwood, Dove) */
  59. struct ext_hdr_v0 {
  60. /*
  61. * Beware that extension header offsets specified in 88AP510 Functional
  62. * Specifications are relative to the start of the main header, not to
  63. * the start of the extension header itself.
  64. */
  65. uint32_t offset; /* 0x0-0x3 */
  66. uint8_t rsvd1[8]; /* 0x4-0xB */
  67. uint32_t enddelay; /* 0xC-0xF */
  68. uint32_t match_addr; /* 0x10-0x13 */
  69. uint32_t match_mask; /* 0x14-0x17 */
  70. uint32_t match_value; /* 0x18-0x1B */
  71. uint8_t ddrwritetype; /* 0x1C */
  72. uint8_t ddrresetmpp; /* 0x1D */
  73. uint8_t ddrclkenmpp; /* 0x1E */
  74. uint8_t ddrinitdelay; /* 0x1F */
  75. struct ext_hdr_v0_reg rcfg[55]; /* 0x20-0x1D7 */
  76. uint8_t rsvd2[7]; /* 0x1D8-0x1DE */
  77. uint8_t checksum; /* 0x1DF */
  78. } __packed;
  79. /* Structure of the binary code header, version 0 (Dove) */
  80. struct bin_hdr_v0 {
  81. uint32_t match_addr; /* 0x00-0x03 */
  82. uint32_t match_mask; /* 0x04-0x07 */
  83. uint32_t match_value; /* 0x08-0x0B */
  84. uint32_t offset; /* 0x0C-0x0F */
  85. uint32_t destaddr; /* 0x10-0x13 */
  86. uint32_t size; /* 0x14-0x17 */
  87. uint32_t execaddr; /* 0x18-0x1B */
  88. uint32_t params[4]; /* 0x1C-0x2B */
  89. uint8_t params_flags; /* 0x2C */
  90. uint8_t rsvd1; /* 0x2D */
  91. uint8_t rsvd2; /* 0x2E */
  92. uint8_t checksum; /* 0x2F */
  93. uint8_t code[2000]; /* 0x30-0x7FF */
  94. } __packed;
  95. /* Structure of the main header, version 1 (Armada 370/XP/375/38x/39x) */
  96. struct main_hdr_v1 {
  97. uint8_t blockid; /* 0x0 */
  98. uint8_t flags; /* 0x1 */
  99. uint16_t nandpagesize; /* 0x2-0x3 */
  100. uint32_t blocksize; /* 0x4-0x7 */
  101. uint8_t version; /* 0x8 */
  102. uint8_t headersz_msb; /* 0x9 */
  103. uint16_t headersz_lsb; /* 0xA-0xB */
  104. uint32_t srcaddr; /* 0xC-0xF */
  105. uint32_t destaddr; /* 0x10-0x13 */
  106. uint32_t execaddr; /* 0x14-0x17 */
  107. uint8_t options; /* 0x18 */
  108. uint8_t nandblocksize; /* 0x19 */
  109. uint8_t nandbadblklocation; /* 0x1A */
  110. uint8_t reserved4; /* 0x1B */
  111. uint16_t reserved5; /* 0x1C-0x1D */
  112. uint8_t ext; /* 0x1E */
  113. uint8_t checksum; /* 0x1F */
  114. } __packed;
  115. /*
  116. * Main header options
  117. */
  118. #define MAIN_HDR_V1_OPT_BAUD_DEFAULT 0
  119. #define MAIN_HDR_V1_OPT_BAUD_2400 0x1
  120. #define MAIN_HDR_V1_OPT_BAUD_4800 0x2
  121. #define MAIN_HDR_V1_OPT_BAUD_9600 0x3
  122. #define MAIN_HDR_V1_OPT_BAUD_19200 0x4
  123. #define MAIN_HDR_V1_OPT_BAUD_38400 0x5
  124. #define MAIN_HDR_V1_OPT_BAUD_57600 0x6
  125. #define MAIN_HDR_V1_OPT_BAUD_115200 0x7
  126. /*
  127. * Header for the optional headers, version 1 (Armada 370/XP/375/38x/39x)
  128. */
  129. struct opt_hdr_v1 {
  130. uint8_t headertype;
  131. uint8_t headersz_msb;
  132. uint16_t headersz_lsb;
  133. char data[0];
  134. } __packed;
  135. /*
  136. * Public Key data in DER format
  137. */
  138. struct pubkey_der_v1 {
  139. uint8_t key[524];
  140. } __packed;
  141. /*
  142. * Signature (RSA 2048)
  143. */
  144. struct sig_v1 {
  145. uint8_t sig[256];
  146. } __packed;
  147. /*
  148. * Structure of secure header (Armada XP/375/38x/39x)
  149. */
  150. struct secure_hdr_v1 {
  151. uint8_t headertype; /* 0x0 */
  152. uint8_t headersz_msb; /* 0x1 */
  153. uint16_t headersz_lsb; /* 0x2 - 0x3 */
  154. uint32_t reserved1; /* 0x4 - 0x7 */
  155. struct pubkey_der_v1 kak; /* 0x8 - 0x213 */
  156. uint8_t jtag_delay; /* 0x214 */
  157. uint8_t reserved2; /* 0x215 */
  158. uint16_t reserved3; /* 0x216 - 0x217 */
  159. uint32_t boxid; /* 0x218 - 0x21B */
  160. uint32_t flashid; /* 0x21C - 0x21F */
  161. struct sig_v1 hdrsig; /* 0x220 - 0x31F */
  162. struct sig_v1 imgsig; /* 0x320 - 0x41F */
  163. struct pubkey_der_v1 csk[16]; /* 0x420 - 0x24DF */
  164. struct sig_v1 csksig; /* 0x24E0 - 0x25DF */
  165. uint8_t next; /* 0x25E0 */
  166. uint8_t reserved4; /* 0x25E1 */
  167. uint16_t reserved5; /* 0x25E2 - 0x25E3 */
  168. } __packed;
  169. /*
  170. * Structure of register set
  171. */
  172. struct register_set_hdr_v1 {
  173. uint8_t headertype; /* 0x0 */
  174. uint8_t headersz_msb; /* 0x1 */
  175. uint16_t headersz_lsb; /* 0x2 - 0x3 */
  176. union {
  177. struct {
  178. uint32_t address; /* 0x4+8*N - 0x7+8*N */
  179. uint32_t value; /* 0x8+8*N - 0xB+8*N */
  180. } __packed entry;
  181. struct {
  182. uint8_t next; /* 0xC+8*N */
  183. uint8_t delay; /* 0xD+8*N */
  184. uint16_t reserved; /* 0xE+8*N - 0xF+8*N */
  185. } __packed last_entry;
  186. } data[];
  187. } __packed;
  188. /*
  189. * Value 0 in register_set_hdr_v1 delay field is special.
  190. * Instead of delay it setup SDRAM Controller.
  191. */
  192. #define REGISTER_SET_HDR_OPT_DELAY_SDRAM_SETUP 0
  193. #define REGISTER_SET_HDR_OPT_DELAY_MS(val) ((val) ?: 1)
  194. /*
  195. * Various values for the opt_hdr_v1->headertype field, describing the
  196. * different types of optional headers. The "secure" header contains
  197. * informations related to secure boot (encryption keys, etc.). The
  198. * "binary" header contains ARM binary code to be executed prior to
  199. * executing the main payload (usually the bootloader). This is
  200. * typically used to execute DDR3 training code. The "register" header
  201. * allows to describe a set of (address, value) tuples that are
  202. * generally used to configure the DRAM controller.
  203. */
  204. #define OPT_HDR_V1_SECURE_TYPE 0x1
  205. #define OPT_HDR_V1_BINARY_TYPE 0x2
  206. #define OPT_HDR_V1_REGISTER_TYPE 0x3
  207. /*
  208. * Byte 8 of the image header contains the version number. In the v0
  209. * header, byte 8 was reserved, and always set to 0. In the v1 header,
  210. * byte 8 has been changed to a proper field, set to 1.
  211. */
  212. static inline unsigned int kwbimage_version(const void *header)
  213. {
  214. const unsigned char *ptr = header;
  215. return ptr[8];
  216. }
  217. static inline size_t kwbheader_size(const void *header)
  218. {
  219. if (kwbimage_version(header) == 0) {
  220. const struct main_hdr_v0 *hdr = header;
  221. /*
  222. * First extension header starts immediately after the main
  223. * header without any padding. Between extension headers is
  224. * 0x20 byte padding. There is no padding after the last
  225. * extension header. First binary code header starts immediately
  226. * after the last extension header (or immediately after the
  227. * main header if there is no extension header) without any
  228. * padding. There is no padding between binary code headers and
  229. * neither after the last binary code header.
  230. */
  231. return sizeof(*hdr) +
  232. hdr->ext * sizeof(struct ext_hdr_v0) +
  233. ((hdr->ext > 1) ? ((hdr->ext - 1) * 0x20) : 0) +
  234. hdr->bin * sizeof(struct bin_hdr_v0);
  235. } else {
  236. const struct main_hdr_v1 *hdr = header;
  237. return (hdr->headersz_msb << 16) |
  238. le16_to_cpu(hdr->headersz_lsb);
  239. }
  240. }
  241. static inline size_t kwbheader_size_for_csum(const void *header)
  242. {
  243. if (kwbimage_version(header) == 0)
  244. return sizeof(struct main_hdr_v0);
  245. else
  246. return kwbheader_size(header);
  247. }
  248. static inline struct ext_hdr_v0 *ext_hdr_v0_first(void *img)
  249. {
  250. struct main_hdr_v0 *mhdr;
  251. if (kwbimage_version(img) != 0)
  252. return NULL;
  253. mhdr = img;
  254. if (mhdr->ext)
  255. return (struct ext_hdr_v0 *)(mhdr + 1);
  256. else
  257. return NULL;
  258. }
  259. static inline void *_ext_hdr_v0_end(struct main_hdr_v0 *mhdr)
  260. {
  261. return (uint8_t *)mhdr + kwbheader_size(mhdr) - mhdr->bin * sizeof(struct bin_hdr_v0);
  262. }
  263. static inline struct ext_hdr_v0 *ext_hdr_v0_next(void *img, struct ext_hdr_v0 *cur)
  264. {
  265. if ((void *)(cur + 1) < _ext_hdr_v0_end(img))
  266. return (struct ext_hdr_v0 *)((uint8_t *)(cur + 1) + 0x20);
  267. else
  268. return NULL;
  269. }
  270. #define for_each_ext_hdr_v0(ehdr, img) \
  271. for ((ehdr) = ext_hdr_v0_first((img)); \
  272. (ehdr) != NULL; \
  273. (ehdr) = ext_hdr_v0_next((img), (ehdr)))
  274. static inline struct bin_hdr_v0 *bin_hdr_v0_first(void *img)
  275. {
  276. struct main_hdr_v0 *mhdr;
  277. if (kwbimage_version(img) != 0)
  278. return NULL;
  279. mhdr = img;
  280. if (mhdr->bin)
  281. return _ext_hdr_v0_end(mhdr);
  282. else
  283. return NULL;
  284. }
  285. #define for_each_bin_hdr_v0(bhdr, img) \
  286. for ((bhdr) = bin_hdr_v0_first((img)); \
  287. (bhdr) && (void *)(bhdr) < (void *)((uint8_t *)img + kwbheader_size(img)); \
  288. (bhdr) = (struct bin_hdr_v0 *)((bhdr))+1)
  289. static inline uint32_t opt_hdr_v1_size(const struct opt_hdr_v1 *ohdr)
  290. {
  291. return (ohdr->headersz_msb << 16) | le16_to_cpu(ohdr->headersz_lsb);
  292. }
  293. static inline int opt_hdr_v1_valid_size(const struct opt_hdr_v1 *ohdr,
  294. const void *mhdr_end)
  295. {
  296. uint32_t ohdr_size;
  297. if ((const void *)(ohdr + 1) > mhdr_end)
  298. return 0;
  299. ohdr_size = opt_hdr_v1_size(ohdr);
  300. if (ohdr_size < 8 || (const void *)((const uint8_t *)ohdr + ohdr_size) > mhdr_end)
  301. return 0;
  302. return 1;
  303. }
  304. static inline struct opt_hdr_v1 *opt_hdr_v1_first(void *img) {
  305. struct main_hdr_v1 *mhdr;
  306. if (kwbimage_version(img) != 1)
  307. return NULL;
  308. mhdr = img;
  309. if (mhdr->ext)
  310. return (struct opt_hdr_v1 *)(mhdr + 1);
  311. else
  312. return NULL;
  313. }
  314. static inline uint8_t *opt_hdr_v1_ext(struct opt_hdr_v1 *cur)
  315. {
  316. uint32_t size = opt_hdr_v1_size(cur);
  317. return (uint8_t *)cur + size - 4;
  318. }
  319. static inline struct opt_hdr_v1 *_opt_hdr_v1_next(struct opt_hdr_v1 *cur)
  320. {
  321. return (struct opt_hdr_v1 *)((uint8_t *)cur + opt_hdr_v1_size(cur));
  322. }
  323. static inline struct opt_hdr_v1 *opt_hdr_v1_next(struct opt_hdr_v1 *cur)
  324. {
  325. if (*opt_hdr_v1_ext(cur))
  326. return _opt_hdr_v1_next(cur);
  327. else
  328. return NULL;
  329. }
  330. #define for_each_opt_hdr_v1(ohdr, img) \
  331. for ((ohdr) = opt_hdr_v1_first((img)); \
  332. (ohdr) != NULL; \
  333. (ohdr) = opt_hdr_v1_next((ohdr)))
  334. #endif /* _KWBIMAGE_H_ */