fdtdec.c 44 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (c) 2011 The Chromium OS Authors.
  4. *
  5. * NOTE: Please do not add new devicetree-reading functionality into this file.
  6. * Add it to the ofnode API instead, since that is compatible with livetree.
  7. */
  8. #ifndef USE_HOSTCC
  9. #include <common.h>
  10. #include <boot_fit.h>
  11. #include <display_options.h>
  12. #include <dm.h>
  13. #include <hang.h>
  14. #include <init.h>
  15. #include <log.h>
  16. #include <malloc.h>
  17. #include <net.h>
  18. #include <spl.h>
  19. #include <env.h>
  20. #include <errno.h>
  21. #include <fdtdec.h>
  22. #include <fdt_support.h>
  23. #include <gzip.h>
  24. #include <mapmem.h>
  25. #include <linux/libfdt.h>
  26. #include <serial.h>
  27. #include <asm/global_data.h>
  28. #include <asm/sections.h>
  29. #include <dm/ofnode.h>
  30. #include <dm/of_extra.h>
  31. #include <linux/ctype.h>
  32. #include <linux/lzo.h>
  33. #include <linux/ioport.h>
  34. DECLARE_GLOBAL_DATA_PTR;
  35. /*
  36. * Here are the type we know about. One day we might allow drivers to
  37. * register. For now we just put them here. The COMPAT macro allows us to
  38. * turn this into a sparse list later, and keeps the ID with the name.
  39. *
  40. * NOTE: This list is basically a TODO list for things that need to be
  41. * converted to driver model. So don't add new things here unless there is a
  42. * good reason why driver-model conversion is infeasible. Examples include
  43. * things which are used before driver model is available.
  44. */
  45. #define COMPAT(id, name) name
  46. static const char * const compat_names[COMPAT_COUNT] = {
  47. COMPAT(UNKNOWN, "<none>"),
  48. COMPAT(NVIDIA_TEGRA20_EMC, "nvidia,tegra20-emc"),
  49. COMPAT(NVIDIA_TEGRA20_EMC_TABLE, "nvidia,tegra20-emc-table"),
  50. COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"),
  51. COMPAT(NVIDIA_TEGRA124_XUSB_PADCTL, "nvidia,tegra124-xusb-padctl"),
  52. COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL, "nvidia,tegra210-xusb-padctl"),
  53. COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"),
  54. COMPAT(SAMSUNG_EXYNOS5_USB3_PHY, "samsung,exynos5250-usb3-phy"),
  55. COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"),
  56. COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"),
  57. COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"),
  58. COMPAT(GENERIC_SPI_FLASH, "jedec,spi-nor"),
  59. COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"),
  60. COMPAT(INTEL_MICROCODE, "intel,microcode"),
  61. COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"),
  62. COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"),
  63. COMPAT(ALTERA_SOCFPGA_DWMMC, "altr,socfpga-dw-mshc"),
  64. COMPAT(ALTERA_SOCFPGA_DWC2USB, "snps,dwc2"),
  65. COMPAT(INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"),
  66. COMPAT(INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"),
  67. COMPAT(INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"),
  68. COMPAT(ALTERA_SOCFPGA_CLK, "altr,clk-mgr"),
  69. COMPAT(ALTERA_SOCFPGA_PINCTRL_SINGLE, "pinctrl-single"),
  70. COMPAT(ALTERA_SOCFPGA_H2F_BRG, "altr,socfpga-hps2fpga-bridge"),
  71. COMPAT(ALTERA_SOCFPGA_LWH2F_BRG, "altr,socfpga-lwhps2fpga-bridge"),
  72. COMPAT(ALTERA_SOCFPGA_F2H_BRG, "altr,socfpga-fpga2hps-bridge"),
  73. COMPAT(ALTERA_SOCFPGA_F2SDR0, "altr,socfpga-fpga2sdram0-bridge"),
  74. COMPAT(ALTERA_SOCFPGA_F2SDR1, "altr,socfpga-fpga2sdram1-bridge"),
  75. COMPAT(ALTERA_SOCFPGA_F2SDR2, "altr,socfpga-fpga2sdram2-bridge"),
  76. COMPAT(ALTERA_SOCFPGA_FPGA0, "altr,socfpga-a10-fpga-mgr"),
  77. COMPAT(ALTERA_SOCFPGA_NOC, "altr,socfpga-a10-noc"),
  78. COMPAT(ALTERA_SOCFPGA_CLK_INIT, "altr,socfpga-a10-clk-init")
  79. };
  80. static const char *const fdt_src_name[] = {
  81. [FDTSRC_SEPARATE] = "separate",
  82. [FDTSRC_FIT] = "fit",
  83. [FDTSRC_BOARD] = "board",
  84. [FDTSRC_EMBED] = "embed",
  85. [FDTSRC_ENV] = "env",
  86. };
  87. const char *fdtdec_get_srcname(void)
  88. {
  89. return fdt_src_name[gd->fdt_src];
  90. }
  91. const char *fdtdec_get_compatible(enum fdt_compat_id id)
  92. {
  93. /* We allow reading of the 'unknown' ID for testing purposes */
  94. assert(id >= 0 && id < COMPAT_COUNT);
  95. return compat_names[id];
  96. }
  97. fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int node,
  98. const char *prop_name, int index, int na,
  99. int ns, fdt_size_t *sizep,
  100. bool translate)
  101. {
  102. const fdt32_t *prop, *prop_end;
  103. const fdt32_t *prop_addr, *prop_size, *prop_after_size;
  104. int len;
  105. fdt_addr_t addr;
  106. debug("%s: %s: ", __func__, prop_name);
  107. prop = fdt_getprop(blob, node, prop_name, &len);
  108. if (!prop) {
  109. debug("(not found)\n");
  110. return FDT_ADDR_T_NONE;
  111. }
  112. prop_end = prop + (len / sizeof(*prop));
  113. prop_addr = prop + (index * (na + ns));
  114. prop_size = prop_addr + na;
  115. prop_after_size = prop_size + ns;
  116. if (prop_after_size > prop_end) {
  117. debug("(not enough data: expected >= %d cells, got %d cells)\n",
  118. (u32)(prop_after_size - prop), ((u32)(prop_end - prop)));
  119. return FDT_ADDR_T_NONE;
  120. }
  121. #if CONFIG_IS_ENABLED(OF_TRANSLATE)
  122. if (translate)
  123. addr = fdt_translate_address(blob, node, prop_addr);
  124. else
  125. #endif
  126. addr = fdtdec_get_number(prop_addr, na);
  127. if (sizep) {
  128. *sizep = fdtdec_get_number(prop_size, ns);
  129. debug("addr=%08llx, size=%llx\n", (unsigned long long)addr,
  130. (unsigned long long)*sizep);
  131. } else {
  132. debug("addr=%08llx\n", (unsigned long long)addr);
  133. }
  134. return addr;
  135. }
  136. fdt_addr_t fdtdec_get_addr_size_auto_parent(const void *blob, int parent,
  137. int node, const char *prop_name,
  138. int index, fdt_size_t *sizep,
  139. bool translate)
  140. {
  141. int na, ns;
  142. debug("%s: ", __func__);
  143. na = fdt_address_cells(blob, parent);
  144. if (na < 1) {
  145. debug("(bad #address-cells)\n");
  146. return FDT_ADDR_T_NONE;
  147. }
  148. ns = fdt_size_cells(blob, parent);
  149. if (ns < 0) {
  150. debug("(bad #size-cells)\n");
  151. return FDT_ADDR_T_NONE;
  152. }
  153. debug("na=%d, ns=%d, ", na, ns);
  154. return fdtdec_get_addr_size_fixed(blob, node, prop_name, index, na,
  155. ns, sizep, translate);
  156. }
  157. fdt_addr_t fdtdec_get_addr_size_auto_noparent(const void *blob, int node,
  158. const char *prop_name, int index,
  159. fdt_size_t *sizep,
  160. bool translate)
  161. {
  162. int parent;
  163. debug("%s: ", __func__);
  164. parent = fdt_parent_offset(blob, node);
  165. if (parent < 0) {
  166. debug("(no parent found)\n");
  167. return FDT_ADDR_T_NONE;
  168. }
  169. return fdtdec_get_addr_size_auto_parent(blob, parent, node, prop_name,
  170. index, sizep, translate);
  171. }
  172. fdt_addr_t fdtdec_get_addr_size(const void *blob, int node,
  173. const char *prop_name, fdt_size_t *sizep)
  174. {
  175. int ns = sizep ? (sizeof(fdt_size_t) / sizeof(fdt32_t)) : 0;
  176. return fdtdec_get_addr_size_fixed(blob, node, prop_name, 0,
  177. sizeof(fdt_addr_t) / sizeof(fdt32_t),
  178. ns, sizep, false);
  179. }
  180. fdt_addr_t fdtdec_get_addr(const void *blob, int node, const char *prop_name)
  181. {
  182. return fdtdec_get_addr_size(blob, node, prop_name, NULL);
  183. }
  184. int fdtdec_get_pci_vendev(const void *blob, int node, u16 *vendor, u16 *device)
  185. {
  186. const char *list, *end;
  187. int len;
  188. list = fdt_getprop(blob, node, "compatible", &len);
  189. if (!list)
  190. return -ENOENT;
  191. end = list + len;
  192. while (list < end) {
  193. len = strlen(list);
  194. if (len >= strlen("pciVVVV,DDDD")) {
  195. char *s = strstr(list, "pci");
  196. /*
  197. * check if the string is something like pciVVVV,DDDD.RR
  198. * or just pciVVVV,DDDD
  199. */
  200. if (s && s[7] == ',' &&
  201. (s[12] == '.' || s[12] == 0)) {
  202. s += 3;
  203. *vendor = simple_strtol(s, NULL, 16);
  204. s += 5;
  205. *device = simple_strtol(s, NULL, 16);
  206. return 0;
  207. }
  208. }
  209. list += (len + 1);
  210. }
  211. return -ENOENT;
  212. }
  213. int fdtdec_get_pci_bar32(const struct udevice *dev, struct fdt_pci_addr *addr,
  214. u32 *bar)
  215. {
  216. int barnum;
  217. /* extract the bar number from fdt_pci_addr */
  218. barnum = addr->phys_hi & 0xff;
  219. if (barnum < PCI_BASE_ADDRESS_0 || barnum > PCI_CARDBUS_CIS)
  220. return -EINVAL;
  221. barnum = (barnum - PCI_BASE_ADDRESS_0) / 4;
  222. *bar = dm_pci_read_bar32(dev, barnum);
  223. return 0;
  224. }
  225. int fdtdec_get_pci_bus_range(const void *blob, int node,
  226. struct fdt_resource *res)
  227. {
  228. const u32 *values;
  229. int len;
  230. values = fdt_getprop(blob, node, "bus-range", &len);
  231. if (!values || len < sizeof(*values) * 2)
  232. return -EINVAL;
  233. res->start = fdt32_to_cpu(*values++);
  234. res->end = fdt32_to_cpu(*values);
  235. return 0;
  236. }
  237. uint64_t fdtdec_get_uint64(const void *blob, int node, const char *prop_name,
  238. uint64_t default_val)
  239. {
  240. const unaligned_fdt64_t *cell64;
  241. int length;
  242. cell64 = fdt_getprop(blob, node, prop_name, &length);
  243. if (!cell64 || length < sizeof(*cell64))
  244. return default_val;
  245. return fdt64_to_cpu(*cell64);
  246. }
  247. int fdtdec_get_is_enabled(const void *blob, int node)
  248. {
  249. const char *cell;
  250. /*
  251. * It should say "okay", so only allow that. Some fdts use "ok" but
  252. * this is a bug. Please fix your device tree source file. See here
  253. * for discussion:
  254. *
  255. * http://www.mail-archive.com/u-boot@lists.denx.de/msg71598.html
  256. */
  257. cell = fdt_getprop(blob, node, "status", NULL);
  258. if (cell)
  259. return strcmp(cell, "okay") == 0;
  260. return 1;
  261. }
  262. enum fdt_compat_id fdtdec_lookup(const void *blob, int node)
  263. {
  264. enum fdt_compat_id id;
  265. /* Search our drivers */
  266. for (id = COMPAT_UNKNOWN; id < COMPAT_COUNT; id++)
  267. if (fdt_node_check_compatible(blob, node,
  268. compat_names[id]) == 0)
  269. return id;
  270. return COMPAT_UNKNOWN;
  271. }
  272. int fdtdec_next_compatible(const void *blob, int node, enum fdt_compat_id id)
  273. {
  274. return fdt_node_offset_by_compatible(blob, node, compat_names[id]);
  275. }
  276. int fdtdec_next_compatible_subnode(const void *blob, int node,
  277. enum fdt_compat_id id, int *depthp)
  278. {
  279. do {
  280. node = fdt_next_node(blob, node, depthp);
  281. } while (*depthp > 1);
  282. /* If this is a direct subnode, and compatible, return it */
  283. if (*depthp == 1 && 0 == fdt_node_check_compatible(
  284. blob, node, compat_names[id]))
  285. return node;
  286. return -FDT_ERR_NOTFOUND;
  287. }
  288. int fdtdec_next_alias(const void *blob, const char *name, enum fdt_compat_id id,
  289. int *upto)
  290. {
  291. #define MAX_STR_LEN 20
  292. char str[MAX_STR_LEN + 20];
  293. int node, err;
  294. /* snprintf() is not available */
  295. assert(strlen(name) < MAX_STR_LEN);
  296. sprintf(str, "%.*s%d", MAX_STR_LEN, name, *upto);
  297. node = fdt_path_offset(blob, str);
  298. if (node < 0)
  299. return node;
  300. err = fdt_node_check_compatible(blob, node, compat_names[id]);
  301. if (err < 0)
  302. return err;
  303. if (err)
  304. return -FDT_ERR_NOTFOUND;
  305. (*upto)++;
  306. return node;
  307. }
  308. int fdtdec_find_aliases_for_id(const void *blob, const char *name,
  309. enum fdt_compat_id id, int *node_list,
  310. int maxcount)
  311. {
  312. memset(node_list, '\0', sizeof(*node_list) * maxcount);
  313. return fdtdec_add_aliases_for_id(blob, name, id, node_list, maxcount);
  314. }
  315. /* TODO: Can we tighten this code up a little? */
  316. int fdtdec_add_aliases_for_id(const void *blob, const char *name,
  317. enum fdt_compat_id id, int *node_list,
  318. int maxcount)
  319. {
  320. int name_len = strlen(name);
  321. int nodes[maxcount];
  322. int num_found = 0;
  323. int offset, node;
  324. int alias_node;
  325. int count;
  326. int i, j;
  327. /* find the alias node if present */
  328. alias_node = fdt_path_offset(blob, "/aliases");
  329. /*
  330. * start with nothing, and we can assume that the root node can't
  331. * match
  332. */
  333. memset(nodes, '\0', sizeof(nodes));
  334. /* First find all the compatible nodes */
  335. for (node = count = 0; node >= 0 && count < maxcount;) {
  336. node = fdtdec_next_compatible(blob, node, id);
  337. if (node >= 0)
  338. nodes[count++] = node;
  339. }
  340. if (node >= 0)
  341. debug("%s: warning: maxcount exceeded with alias '%s'\n",
  342. __func__, name);
  343. /* Now find all the aliases */
  344. for (offset = fdt_first_property_offset(blob, alias_node);
  345. offset > 0;
  346. offset = fdt_next_property_offset(blob, offset)) {
  347. const struct fdt_property *prop;
  348. const char *path;
  349. int number;
  350. int found;
  351. node = 0;
  352. prop = fdt_get_property_by_offset(blob, offset, NULL);
  353. path = fdt_string(blob, fdt32_to_cpu(prop->nameoff));
  354. if (prop->len && 0 == strncmp(path, name, name_len))
  355. node = fdt_path_offset(blob, prop->data);
  356. if (node <= 0)
  357. continue;
  358. /* Get the alias number */
  359. number = dectoul(path + name_len, NULL);
  360. if (number < 0 || number >= maxcount) {
  361. debug("%s: warning: alias '%s' is out of range\n",
  362. __func__, path);
  363. continue;
  364. }
  365. /* Make sure the node we found is actually in our list! */
  366. found = -1;
  367. for (j = 0; j < count; j++)
  368. if (nodes[j] == node) {
  369. found = j;
  370. break;
  371. }
  372. if (found == -1) {
  373. debug("%s: warning: alias '%s' points to a node "
  374. "'%s' that is missing or is not compatible "
  375. " with '%s'\n", __func__, path,
  376. fdt_get_name(blob, node, NULL),
  377. compat_names[id]);
  378. continue;
  379. }
  380. /*
  381. * Add this node to our list in the right place, and mark
  382. * it as done.
  383. */
  384. if (fdtdec_get_is_enabled(blob, node)) {
  385. if (node_list[number]) {
  386. debug("%s: warning: alias '%s' requires that "
  387. "a node be placed in the list in a "
  388. "position which is already filled by "
  389. "node '%s'\n", __func__, path,
  390. fdt_get_name(blob, node, NULL));
  391. continue;
  392. }
  393. node_list[number] = node;
  394. if (number >= num_found)
  395. num_found = number + 1;
  396. }
  397. nodes[found] = 0;
  398. }
  399. /* Add any nodes not mentioned by an alias */
  400. for (i = j = 0; i < maxcount; i++) {
  401. if (!node_list[i]) {
  402. for (; j < maxcount; j++)
  403. if (nodes[j] &&
  404. fdtdec_get_is_enabled(blob, nodes[j]))
  405. break;
  406. /* Have we run out of nodes to add? */
  407. if (j == maxcount)
  408. break;
  409. assert(!node_list[i]);
  410. node_list[i] = nodes[j++];
  411. if (i >= num_found)
  412. num_found = i + 1;
  413. }
  414. }
  415. return num_found;
  416. }
  417. int fdtdec_get_alias_seq(const void *blob, const char *base, int offset,
  418. int *seqp)
  419. {
  420. int base_len = strlen(base);
  421. const char *find_name;
  422. int find_namelen;
  423. int prop_offset;
  424. int aliases;
  425. find_name = fdt_get_name(blob, offset, &find_namelen);
  426. debug("Looking for '%s' at %d, name %s\n", base, offset, find_name);
  427. aliases = fdt_path_offset(blob, "/aliases");
  428. for (prop_offset = fdt_first_property_offset(blob, aliases);
  429. prop_offset > 0;
  430. prop_offset = fdt_next_property_offset(blob, prop_offset)) {
  431. const char *prop;
  432. const char *name;
  433. const char *slash;
  434. int len, val;
  435. prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
  436. debug(" - %s, %s\n", name, prop);
  437. if (len < find_namelen || *prop != '/' || prop[len - 1] ||
  438. strncmp(name, base, base_len))
  439. continue;
  440. slash = strrchr(prop, '/');
  441. if (strcmp(slash + 1, find_name))
  442. continue;
  443. /*
  444. * Adding an extra check to distinguish DT nodes with
  445. * same name
  446. */
  447. if (IS_ENABLED(CONFIG_PHANDLE_CHECK_SEQ)) {
  448. if (fdt_get_phandle(blob, offset) !=
  449. fdt_get_phandle(blob, fdt_path_offset(blob, prop)))
  450. continue;
  451. }
  452. val = trailing_strtol(name);
  453. if (val != -1) {
  454. *seqp = val;
  455. debug("Found seq %d\n", *seqp);
  456. return 0;
  457. }
  458. }
  459. debug("Not found\n");
  460. return -ENOENT;
  461. }
  462. int fdtdec_get_alias_highest_id(const void *blob, const char *base)
  463. {
  464. int base_len = strlen(base);
  465. int prop_offset;
  466. int aliases;
  467. int max = -1;
  468. debug("Looking for highest alias id for '%s'\n", base);
  469. aliases = fdt_path_offset(blob, "/aliases");
  470. for (prop_offset = fdt_first_property_offset(blob, aliases);
  471. prop_offset > 0;
  472. prop_offset = fdt_next_property_offset(blob, prop_offset)) {
  473. const char *prop;
  474. const char *name;
  475. int len, val;
  476. prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
  477. debug(" - %s, %s\n", name, prop);
  478. if (*prop != '/' || prop[len - 1] ||
  479. strncmp(name, base, base_len))
  480. continue;
  481. val = trailing_strtol(name);
  482. if (val > max) {
  483. debug("Found seq %d\n", val);
  484. max = val;
  485. }
  486. }
  487. return max;
  488. }
  489. const char *fdtdec_get_chosen_prop(const void *blob, const char *name)
  490. {
  491. int chosen_node;
  492. if (!blob)
  493. return NULL;
  494. chosen_node = fdt_path_offset(blob, "/chosen");
  495. return fdt_getprop(blob, chosen_node, name, NULL);
  496. }
  497. int fdtdec_get_chosen_node(const void *blob, const char *name)
  498. {
  499. const char *prop;
  500. prop = fdtdec_get_chosen_prop(blob, name);
  501. if (!prop)
  502. return -FDT_ERR_NOTFOUND;
  503. return fdt_path_offset(blob, prop);
  504. }
  505. /**
  506. * fdtdec_prepare_fdt() - Check we have a valid fdt available to control U-Boot
  507. *
  508. * @blob: Blob to check
  509. *
  510. * If not, a message is printed to the console if the console is ready.
  511. *
  512. * Return: 0 if all ok, -ENOENT if not
  513. */
  514. static int fdtdec_prepare_fdt(const void *blob)
  515. {
  516. if (!blob || ((uintptr_t)blob & 3) || fdt_check_header(blob)) {
  517. if (spl_phase() <= PHASE_SPL) {
  518. puts("Missing DTB\n");
  519. } else {
  520. printf("No valid device tree binary found at %p\n",
  521. blob);
  522. if (_DEBUG && blob) {
  523. printf("fdt_blob=%p\n", blob);
  524. print_buffer((ulong)blob, blob, 4, 32, 0);
  525. }
  526. }
  527. return -ENOENT;
  528. }
  529. return 0;
  530. }
  531. int fdtdec_check_fdt(void)
  532. {
  533. /*
  534. * We must have an FDT, but we cannot panic() yet since the console
  535. * is not ready. So for now, just assert(). Boards which need an early
  536. * FDT (prior to console ready) will need to make their own
  537. * arrangements and do their own checks.
  538. */
  539. assert(!fdtdec_prepare_fdt(gd->fdt_blob));
  540. return 0;
  541. }
  542. int fdtdec_lookup_phandle(const void *blob, int node, const char *prop_name)
  543. {
  544. const u32 *phandle;
  545. int lookup;
  546. debug("%s: %s\n", __func__, prop_name);
  547. phandle = fdt_getprop(blob, node, prop_name, NULL);
  548. if (!phandle)
  549. return -FDT_ERR_NOTFOUND;
  550. lookup = fdt_node_offset_by_phandle(blob, fdt32_to_cpu(*phandle));
  551. return lookup;
  552. }
  553. /**
  554. * Look up a property in a node and check that it has a minimum length.
  555. *
  556. * @param blob FDT blob
  557. * @param node node to examine
  558. * @param prop_name name of property to find
  559. * @param min_len minimum property length in bytes
  560. * @param err 0 if ok, or -FDT_ERR_NOTFOUND if the property is not
  561. found, or -FDT_ERR_BADLAYOUT if not enough data
  562. * Return: pointer to cell, which is only valid if err == 0
  563. */
  564. static const void *get_prop_check_min_len(const void *blob, int node,
  565. const char *prop_name, int min_len,
  566. int *err)
  567. {
  568. const void *cell;
  569. int len;
  570. debug("%s: %s\n", __func__, prop_name);
  571. cell = fdt_getprop(blob, node, prop_name, &len);
  572. if (!cell)
  573. *err = -FDT_ERR_NOTFOUND;
  574. else if (len < min_len)
  575. *err = -FDT_ERR_BADLAYOUT;
  576. else
  577. *err = 0;
  578. return cell;
  579. }
  580. int fdtdec_get_int_array(const void *blob, int node, const char *prop_name,
  581. u32 *array, int count)
  582. {
  583. const u32 *cell;
  584. int err = 0;
  585. debug("%s: %s\n", __func__, prop_name);
  586. cell = get_prop_check_min_len(blob, node, prop_name,
  587. sizeof(u32) * count, &err);
  588. if (!err) {
  589. int i;
  590. for (i = 0; i < count; i++)
  591. array[i] = fdt32_to_cpu(cell[i]);
  592. }
  593. return err;
  594. }
  595. int fdtdec_get_int_array_count(const void *blob, int node,
  596. const char *prop_name, u32 *array, int count)
  597. {
  598. const u32 *cell;
  599. int len, elems;
  600. int i;
  601. debug("%s: %s\n", __func__, prop_name);
  602. cell = fdt_getprop(blob, node, prop_name, &len);
  603. if (!cell)
  604. return -FDT_ERR_NOTFOUND;
  605. elems = len / sizeof(u32);
  606. if (count > elems)
  607. count = elems;
  608. for (i = 0; i < count; i++)
  609. array[i] = fdt32_to_cpu(cell[i]);
  610. return count;
  611. }
  612. const u32 *fdtdec_locate_array(const void *blob, int node,
  613. const char *prop_name, int count)
  614. {
  615. const u32 *cell;
  616. int err;
  617. cell = get_prop_check_min_len(blob, node, prop_name,
  618. sizeof(u32) * count, &err);
  619. return err ? NULL : cell;
  620. }
  621. int fdtdec_get_bool(const void *blob, int node, const char *prop_name)
  622. {
  623. const s32 *cell;
  624. int len;
  625. debug("%s: %s\n", __func__, prop_name);
  626. cell = fdt_getprop(blob, node, prop_name, &len);
  627. return cell != NULL;
  628. }
  629. int fdtdec_parse_phandle_with_args(const void *blob, int src_node,
  630. const char *list_name,
  631. const char *cells_name,
  632. int cell_count, int index,
  633. struct fdtdec_phandle_args *out_args)
  634. {
  635. const __be32 *list, *list_end;
  636. int rc = 0, size, cur_index = 0;
  637. uint32_t count = 0;
  638. int node = -1;
  639. int phandle;
  640. /* Retrieve the phandle list property */
  641. list = fdt_getprop(blob, src_node, list_name, &size);
  642. if (!list)
  643. return -ENOENT;
  644. list_end = list + size / sizeof(*list);
  645. /* Loop over the phandles until all the requested entry is found */
  646. while (list < list_end) {
  647. rc = -EINVAL;
  648. count = 0;
  649. /*
  650. * If phandle is 0, then it is an empty entry with no
  651. * arguments. Skip forward to the next entry.
  652. */
  653. phandle = be32_to_cpup(list++);
  654. if (phandle) {
  655. /*
  656. * Find the provider node and parse the #*-cells
  657. * property to determine the argument length.
  658. *
  659. * This is not needed if the cell count is hard-coded
  660. * (i.e. cells_name not set, but cell_count is set),
  661. * except when we're going to return the found node
  662. * below.
  663. */
  664. if (cells_name || cur_index == index) {
  665. node = fdt_node_offset_by_phandle(blob,
  666. phandle);
  667. if (node < 0) {
  668. debug("%s: could not find phandle\n",
  669. fdt_get_name(blob, src_node,
  670. NULL));
  671. goto err;
  672. }
  673. }
  674. if (cells_name) {
  675. count = fdtdec_get_int(blob, node, cells_name,
  676. -1);
  677. if (count == -1) {
  678. debug("%s: could not get %s for %s\n",
  679. fdt_get_name(blob, src_node,
  680. NULL),
  681. cells_name,
  682. fdt_get_name(blob, node,
  683. NULL));
  684. goto err;
  685. }
  686. } else {
  687. count = cell_count;
  688. }
  689. /*
  690. * Make sure that the arguments actually fit in the
  691. * remaining property data length
  692. */
  693. if (list + count > list_end) {
  694. debug("%s: arguments longer than property\n",
  695. fdt_get_name(blob, src_node, NULL));
  696. goto err;
  697. }
  698. }
  699. /*
  700. * All of the error cases above bail out of the loop, so at
  701. * this point, the parsing is successful. If the requested
  702. * index matches, then fill the out_args structure and return,
  703. * or return -ENOENT for an empty entry.
  704. */
  705. rc = -ENOENT;
  706. if (cur_index == index) {
  707. if (!phandle)
  708. goto err;
  709. if (out_args) {
  710. int i;
  711. if (count > MAX_PHANDLE_ARGS) {
  712. debug("%s: too many arguments %d\n",
  713. fdt_get_name(blob, src_node,
  714. NULL), count);
  715. count = MAX_PHANDLE_ARGS;
  716. }
  717. out_args->node = node;
  718. out_args->args_count = count;
  719. for (i = 0; i < count; i++) {
  720. out_args->args[i] =
  721. be32_to_cpup(list++);
  722. }
  723. }
  724. /* Found it! return success */
  725. return 0;
  726. }
  727. node = -1;
  728. list += count;
  729. cur_index++;
  730. }
  731. /*
  732. * Result will be one of:
  733. * -ENOENT : index is for empty phandle
  734. * -EINVAL : parsing error on data
  735. * [1..n] : Number of phandle (count mode; when index = -1)
  736. */
  737. rc = index < 0 ? cur_index : -ENOENT;
  738. err:
  739. return rc;
  740. }
  741. int fdtdec_get_byte_array(const void *blob, int node, const char *prop_name,
  742. u8 *array, int count)
  743. {
  744. const u8 *cell;
  745. int err;
  746. cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
  747. if (!err)
  748. memcpy(array, cell, count);
  749. return err;
  750. }
  751. const u8 *fdtdec_locate_byte_array(const void *blob, int node,
  752. const char *prop_name, int count)
  753. {
  754. const u8 *cell;
  755. int err;
  756. cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
  757. if (err)
  758. return NULL;
  759. return cell;
  760. }
  761. u64 fdtdec_get_number(const fdt32_t *ptr, unsigned int cells)
  762. {
  763. u64 number = 0;
  764. while (cells--)
  765. number = (number << 32) | fdt32_to_cpu(*ptr++);
  766. return number;
  767. }
  768. int fdt_get_resource(const void *fdt, int node, const char *property,
  769. unsigned int index, struct fdt_resource *res)
  770. {
  771. const fdt32_t *ptr, *end;
  772. int na, ns, len, parent;
  773. unsigned int i = 0;
  774. parent = fdt_parent_offset(fdt, node);
  775. if (parent < 0)
  776. return parent;
  777. na = fdt_address_cells(fdt, parent);
  778. ns = fdt_size_cells(fdt, parent);
  779. ptr = fdt_getprop(fdt, node, property, &len);
  780. if (!ptr)
  781. return len;
  782. end = ptr + len / sizeof(*ptr);
  783. while (ptr + na + ns <= end) {
  784. if (i == index) {
  785. if (CONFIG_IS_ENABLED(OF_TRANSLATE))
  786. res->start = fdt_translate_address(fdt, node, ptr);
  787. else
  788. res->start = fdtdec_get_number(ptr, na);
  789. res->end = res->start;
  790. res->end += fdtdec_get_number(&ptr[na], ns) - 1;
  791. return 0;
  792. }
  793. ptr += na + ns;
  794. i++;
  795. }
  796. return -FDT_ERR_NOTFOUND;
  797. }
  798. int fdt_get_named_resource(const void *fdt, int node, const char *property,
  799. const char *prop_names, const char *name,
  800. struct fdt_resource *res)
  801. {
  802. int index;
  803. index = fdt_stringlist_search(fdt, node, prop_names, name);
  804. if (index < 0)
  805. return index;
  806. return fdt_get_resource(fdt, node, property, index, res);
  807. }
  808. static int decode_timing_property(const void *blob, int node, const char *name,
  809. struct timing_entry *result)
  810. {
  811. int length, ret = 0;
  812. const u32 *prop;
  813. prop = fdt_getprop(blob, node, name, &length);
  814. if (!prop) {
  815. debug("%s: could not find property %s\n",
  816. fdt_get_name(blob, node, NULL), name);
  817. return length;
  818. }
  819. if (length == sizeof(u32)) {
  820. result->typ = fdtdec_get_int(blob, node, name, 0);
  821. result->min = result->typ;
  822. result->max = result->typ;
  823. } else {
  824. ret = fdtdec_get_int_array(blob, node, name, &result->min, 3);
  825. }
  826. return ret;
  827. }
  828. int fdtdec_decode_display_timing(const void *blob, int parent, int index,
  829. struct display_timing *dt)
  830. {
  831. int i, node, timings_node;
  832. u32 val = 0;
  833. int ret = 0;
  834. timings_node = fdt_subnode_offset(blob, parent, "display-timings");
  835. if (timings_node < 0)
  836. return timings_node;
  837. for (i = 0, node = fdt_first_subnode(blob, timings_node);
  838. node > 0 && i != index;
  839. node = fdt_next_subnode(blob, node))
  840. i++;
  841. if (node < 0)
  842. return node;
  843. memset(dt, 0, sizeof(*dt));
  844. ret |= decode_timing_property(blob, node, "hback-porch",
  845. &dt->hback_porch);
  846. ret |= decode_timing_property(blob, node, "hfront-porch",
  847. &dt->hfront_porch);
  848. ret |= decode_timing_property(blob, node, "hactive", &dt->hactive);
  849. ret |= decode_timing_property(blob, node, "hsync-len", &dt->hsync_len);
  850. ret |= decode_timing_property(blob, node, "vback-porch",
  851. &dt->vback_porch);
  852. ret |= decode_timing_property(blob, node, "vfront-porch",
  853. &dt->vfront_porch);
  854. ret |= decode_timing_property(blob, node, "vactive", &dt->vactive);
  855. ret |= decode_timing_property(blob, node, "vsync-len", &dt->vsync_len);
  856. ret |= decode_timing_property(blob, node, "clock-frequency",
  857. &dt->pixelclock);
  858. dt->flags = 0;
  859. val = fdtdec_get_int(blob, node, "vsync-active", -1);
  860. if (val != -1) {
  861. dt->flags |= val ? DISPLAY_FLAGS_VSYNC_HIGH :
  862. DISPLAY_FLAGS_VSYNC_LOW;
  863. }
  864. val = fdtdec_get_int(blob, node, "hsync-active", -1);
  865. if (val != -1) {
  866. dt->flags |= val ? DISPLAY_FLAGS_HSYNC_HIGH :
  867. DISPLAY_FLAGS_HSYNC_LOW;
  868. }
  869. val = fdtdec_get_int(blob, node, "de-active", -1);
  870. if (val != -1) {
  871. dt->flags |= val ? DISPLAY_FLAGS_DE_HIGH :
  872. DISPLAY_FLAGS_DE_LOW;
  873. }
  874. val = fdtdec_get_int(blob, node, "pixelclk-active", -1);
  875. if (val != -1) {
  876. dt->flags |= val ? DISPLAY_FLAGS_PIXDATA_POSEDGE :
  877. DISPLAY_FLAGS_PIXDATA_NEGEDGE;
  878. }
  879. if (fdtdec_get_bool(blob, node, "interlaced"))
  880. dt->flags |= DISPLAY_FLAGS_INTERLACED;
  881. if (fdtdec_get_bool(blob, node, "doublescan"))
  882. dt->flags |= DISPLAY_FLAGS_DOUBLESCAN;
  883. if (fdtdec_get_bool(blob, node, "doubleclk"))
  884. dt->flags |= DISPLAY_FLAGS_DOUBLECLK;
  885. return ret;
  886. }
  887. int fdtdec_setup_mem_size_base(void)
  888. {
  889. int ret;
  890. ofnode mem;
  891. struct resource res;
  892. mem = ofnode_path("/memory");
  893. if (!ofnode_valid(mem)) {
  894. debug("%s: Missing /memory node\n", __func__);
  895. return -EINVAL;
  896. }
  897. ret = ofnode_read_resource(mem, 0, &res);
  898. if (ret != 0) {
  899. debug("%s: Unable to decode first memory bank\n", __func__);
  900. return -EINVAL;
  901. }
  902. gd->ram_size = (phys_size_t)(res.end - res.start + 1);
  903. gd->ram_base = (unsigned long)res.start;
  904. debug("%s: Initial DRAM size %llx\n", __func__,
  905. (unsigned long long)gd->ram_size);
  906. return 0;
  907. }
  908. ofnode get_next_memory_node(ofnode mem)
  909. {
  910. do {
  911. mem = ofnode_by_prop_value(mem, "device_type", "memory", 7);
  912. } while (!ofnode_is_enabled(mem));
  913. return mem;
  914. }
  915. int fdtdec_setup_memory_banksize(void)
  916. {
  917. int bank, ret, reg = 0;
  918. struct resource res;
  919. ofnode mem = ofnode_null();
  920. mem = get_next_memory_node(mem);
  921. if (!ofnode_valid(mem)) {
  922. debug("%s: Missing /memory node\n", __func__);
  923. return -EINVAL;
  924. }
  925. for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
  926. ret = ofnode_read_resource(mem, reg++, &res);
  927. if (ret < 0) {
  928. reg = 0;
  929. mem = get_next_memory_node(mem);
  930. if (!ofnode_valid(mem))
  931. break;
  932. ret = ofnode_read_resource(mem, reg++, &res);
  933. if (ret < 0)
  934. break;
  935. }
  936. if (ret != 0)
  937. return -EINVAL;
  938. gd->bd->bi_dram[bank].start = (phys_addr_t)res.start;
  939. gd->bd->bi_dram[bank].size =
  940. (phys_size_t)(res.end - res.start + 1);
  941. debug("%s: DRAM Bank #%d: start = 0x%llx, size = 0x%llx\n",
  942. __func__, bank,
  943. (unsigned long long)gd->bd->bi_dram[bank].start,
  944. (unsigned long long)gd->bd->bi_dram[bank].size);
  945. }
  946. return 0;
  947. }
  948. int fdtdec_setup_mem_size_base_lowest(void)
  949. {
  950. int bank, ret, reg = 0;
  951. struct resource res;
  952. unsigned long base;
  953. phys_size_t size;
  954. ofnode mem = ofnode_null();
  955. gd->ram_base = (unsigned long)~0;
  956. mem = get_next_memory_node(mem);
  957. if (!ofnode_valid(mem)) {
  958. debug("%s: Missing /memory node\n", __func__);
  959. return -EINVAL;
  960. }
  961. for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
  962. ret = ofnode_read_resource(mem, reg++, &res);
  963. if (ret < 0) {
  964. reg = 0;
  965. mem = get_next_memory_node(mem);
  966. if (!ofnode_valid(mem))
  967. break;
  968. ret = ofnode_read_resource(mem, reg++, &res);
  969. if (ret < 0)
  970. break;
  971. }
  972. if (ret != 0)
  973. return -EINVAL;
  974. base = (unsigned long)res.start;
  975. size = (phys_size_t)(res.end - res.start + 1);
  976. if (gd->ram_base > base && size) {
  977. gd->ram_base = base;
  978. gd->ram_size = size;
  979. debug("%s: Initial DRAM base %lx size %lx\n",
  980. __func__, base, (unsigned long)size);
  981. }
  982. }
  983. return 0;
  984. }
  985. static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
  986. {
  987. #if CONFIG_IS_ENABLED(MULTI_DTB_FIT_GZIP) ||\
  988. CONFIG_IS_ENABLED(MULTI_DTB_FIT_LZO)
  989. size_t sz_out = CONFIG_VAL(MULTI_DTB_FIT_UNCOMPRESS_SZ);
  990. bool gzip = 0, lzo = 0;
  991. ulong sz_in = sz_src;
  992. void *dst;
  993. int rc;
  994. if (CONFIG_IS_ENABLED(GZIP))
  995. if (gzip_parse_header(src, sz_in) >= 0)
  996. gzip = 1;
  997. if (CONFIG_IS_ENABLED(LZO))
  998. if (!gzip && lzop_is_valid_header(src))
  999. lzo = 1;
  1000. if (!gzip && !lzo)
  1001. return -EBADMSG;
  1002. if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC)) {
  1003. dst = malloc(sz_out);
  1004. if (!dst) {
  1005. puts("uncompress_blob: Unable to allocate memory\n");
  1006. return -ENOMEM;
  1007. }
  1008. } else {
  1009. # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_USER_DEFINED_AREA)
  1010. dst = (void *)CONFIG_VAL(MULTI_DTB_FIT_USER_DEF_ADDR);
  1011. # else
  1012. return -ENOTSUPP;
  1013. # endif
  1014. }
  1015. if (CONFIG_IS_ENABLED(GZIP) && gzip)
  1016. rc = gunzip(dst, sz_out, (u8 *)src, &sz_in);
  1017. else if (CONFIG_IS_ENABLED(LZO) && lzo)
  1018. rc = lzop_decompress(src, sz_in, dst, &sz_out);
  1019. else
  1020. hang();
  1021. if (rc < 0) {
  1022. /* not a valid compressed blob */
  1023. puts("uncompress_blob: Unable to uncompress\n");
  1024. if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC))
  1025. free(dst);
  1026. return -EBADMSG;
  1027. }
  1028. *dstp = dst;
  1029. #else
  1030. *dstp = (void *)src;
  1031. *dstp = (void *)src;
  1032. #endif
  1033. return 0;
  1034. }
  1035. /**
  1036. * fdt_find_separate() - Find a devicetree at the end of the image
  1037. *
  1038. * Return: pointer to FDT blob
  1039. */
  1040. static void *fdt_find_separate(void)
  1041. {
  1042. void *fdt_blob = NULL;
  1043. if (IS_ENABLED(CONFIG_SANDBOX))
  1044. return NULL;
  1045. #ifdef CONFIG_SPL_BUILD
  1046. /* FDT is at end of BSS unless it is in a different memory region */
  1047. if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS))
  1048. fdt_blob = (ulong *)&_image_binary_end;
  1049. else
  1050. fdt_blob = (ulong *)&__bss_end;
  1051. #else
  1052. /* FDT is at end of image */
  1053. fdt_blob = (ulong *)&_end;
  1054. if (_DEBUG && !fdtdec_prepare_fdt(fdt_blob)) {
  1055. int stack_ptr;
  1056. const void *top = fdt_blob + fdt_totalsize(fdt_blob);
  1057. /*
  1058. * Perform a sanity check on the memory layout. If this fails,
  1059. * it indicates that the device tree is positioned above the
  1060. * global data pointer or the stack pointer. This should not
  1061. * happen.
  1062. *
  1063. * If this fails, check that SYS_INIT_SP_ADDR has enough space
  1064. * below it for SYS_MALLOC_F_LEN and global_data, as well as the
  1065. * stack, without overwriting the device tree or U-Boot itself.
  1066. * Since the device tree is sitting at _end (the start of the
  1067. * BSS region), we need the top of the device tree to be below
  1068. * any memory allocated by board_init_f_alloc_reserve().
  1069. */
  1070. if (top > (void *)gd || top > (void *)&stack_ptr) {
  1071. printf("FDT %p gd %p\n", fdt_blob, gd);
  1072. panic("FDT overlap");
  1073. }
  1074. }
  1075. #endif
  1076. return fdt_blob;
  1077. }
  1078. int fdtdec_set_ethernet_mac_address(void *fdt, const u8 *mac, size_t size)
  1079. {
  1080. const char *path;
  1081. int offset, err;
  1082. if (!is_valid_ethaddr(mac))
  1083. return -EINVAL;
  1084. path = fdt_get_alias(fdt, "ethernet");
  1085. if (!path)
  1086. return 0;
  1087. debug("ethernet alias found: %s\n", path);
  1088. offset = fdt_path_offset(fdt, path);
  1089. if (offset < 0) {
  1090. debug("ethernet alias points to absent node %s\n", path);
  1091. return -ENOENT;
  1092. }
  1093. err = fdt_setprop_inplace(fdt, offset, "local-mac-address", mac, size);
  1094. if (err < 0)
  1095. return err;
  1096. debug("MAC address: %pM\n", mac);
  1097. return 0;
  1098. }
  1099. static int fdtdec_init_reserved_memory(void *blob)
  1100. {
  1101. int na, ns, node, err;
  1102. fdt32_t value;
  1103. /* inherit #address-cells and #size-cells from the root node */
  1104. na = fdt_address_cells(blob, 0);
  1105. ns = fdt_size_cells(blob, 0);
  1106. node = fdt_add_subnode(blob, 0, "reserved-memory");
  1107. if (node < 0)
  1108. return node;
  1109. err = fdt_setprop(blob, node, "ranges", NULL, 0);
  1110. if (err < 0)
  1111. return err;
  1112. value = cpu_to_fdt32(ns);
  1113. err = fdt_setprop(blob, node, "#size-cells", &value, sizeof(value));
  1114. if (err < 0)
  1115. return err;
  1116. value = cpu_to_fdt32(na);
  1117. err = fdt_setprop(blob, node, "#address-cells", &value, sizeof(value));
  1118. if (err < 0)
  1119. return err;
  1120. return node;
  1121. }
  1122. int fdtdec_add_reserved_memory(void *blob, const char *basename,
  1123. const struct fdt_memory *carveout,
  1124. const char **compatibles, unsigned int count,
  1125. uint32_t *phandlep, unsigned long flags)
  1126. {
  1127. fdt32_t cells[4] = {}, *ptr = cells;
  1128. uint32_t upper, lower, phandle;
  1129. int parent, node, na, ns, err;
  1130. fdt_size_t size;
  1131. char name[64];
  1132. /* create an empty /reserved-memory node if one doesn't exist */
  1133. parent = fdt_path_offset(blob, "/reserved-memory");
  1134. if (parent < 0) {
  1135. parent = fdtdec_init_reserved_memory(blob);
  1136. if (parent < 0)
  1137. return parent;
  1138. }
  1139. /* only 1 or 2 #address-cells and #size-cells are supported */
  1140. na = fdt_address_cells(blob, parent);
  1141. if (na < 1 || na > 2)
  1142. return -FDT_ERR_BADNCELLS;
  1143. ns = fdt_size_cells(blob, parent);
  1144. if (ns < 1 || ns > 2)
  1145. return -FDT_ERR_BADNCELLS;
  1146. /* find a matching node and return the phandle to that */
  1147. fdt_for_each_subnode(node, blob, parent) {
  1148. const char *name = fdt_get_name(blob, node, NULL);
  1149. fdt_addr_t addr;
  1150. fdt_size_t size;
  1151. addr = fdtdec_get_addr_size_fixed(blob, node, "reg", 0, na, ns,
  1152. &size, false);
  1153. if (addr == FDT_ADDR_T_NONE) {
  1154. debug("failed to read address/size for %s\n", name);
  1155. continue;
  1156. }
  1157. if (addr == carveout->start && (addr + size - 1) ==
  1158. carveout->end) {
  1159. if (phandlep)
  1160. *phandlep = fdt_get_phandle(blob, node);
  1161. return 0;
  1162. }
  1163. }
  1164. /*
  1165. * Unpack the start address and generate the name of the new node
  1166. * base on the basename and the unit-address.
  1167. */
  1168. upper = upper_32_bits(carveout->start);
  1169. lower = lower_32_bits(carveout->start);
  1170. if (na > 1 && upper > 0)
  1171. snprintf(name, sizeof(name), "%s@%x,%x", basename, upper,
  1172. lower);
  1173. else {
  1174. if (upper > 0) {
  1175. debug("address %08x:%08x exceeds addressable space\n",
  1176. upper, lower);
  1177. return -FDT_ERR_BADVALUE;
  1178. }
  1179. snprintf(name, sizeof(name), "%s@%x", basename, lower);
  1180. }
  1181. node = fdt_add_subnode(blob, parent, name);
  1182. if (node < 0)
  1183. return node;
  1184. if (flags & FDTDEC_RESERVED_MEMORY_NO_MAP) {
  1185. err = fdt_setprop(blob, node, "no-map", NULL, 0);
  1186. if (err < 0)
  1187. return err;
  1188. }
  1189. if (phandlep) {
  1190. err = fdt_generate_phandle(blob, &phandle);
  1191. if (err < 0)
  1192. return err;
  1193. err = fdtdec_set_phandle(blob, node, phandle);
  1194. if (err < 0)
  1195. return err;
  1196. }
  1197. /* store one or two address cells */
  1198. if (na > 1)
  1199. *ptr++ = cpu_to_fdt32(upper);
  1200. *ptr++ = cpu_to_fdt32(lower);
  1201. /* store one or two size cells */
  1202. size = carveout->end - carveout->start + 1;
  1203. upper = upper_32_bits(size);
  1204. lower = lower_32_bits(size);
  1205. if (ns > 1)
  1206. *ptr++ = cpu_to_fdt32(upper);
  1207. *ptr++ = cpu_to_fdt32(lower);
  1208. err = fdt_setprop(blob, node, "reg", cells, (na + ns) * sizeof(*cells));
  1209. if (err < 0)
  1210. return err;
  1211. if (compatibles && count > 0) {
  1212. size_t length = 0, len = 0;
  1213. unsigned int i;
  1214. char *buffer;
  1215. for (i = 0; i < count; i++)
  1216. length += strlen(compatibles[i]) + 1;
  1217. buffer = malloc(length);
  1218. if (!buffer)
  1219. return -FDT_ERR_INTERNAL;
  1220. for (i = 0; i < count; i++)
  1221. len += strlcpy(buffer + len, compatibles[i],
  1222. length - len) + 1;
  1223. err = fdt_setprop(blob, node, "compatible", buffer, length);
  1224. free(buffer);
  1225. if (err < 0)
  1226. return err;
  1227. }
  1228. /* return the phandle for the new node for the caller to use */
  1229. if (phandlep)
  1230. *phandlep = phandle;
  1231. return 0;
  1232. }
  1233. int fdtdec_get_carveout(const void *blob, const char *node,
  1234. const char *prop_name, unsigned int index,
  1235. struct fdt_memory *carveout, const char **name,
  1236. const char ***compatiblesp, unsigned int *countp,
  1237. unsigned long *flags)
  1238. {
  1239. const fdt32_t *prop;
  1240. uint32_t phandle;
  1241. int offset, len;
  1242. fdt_size_t size;
  1243. offset = fdt_path_offset(blob, node);
  1244. if (offset < 0)
  1245. return offset;
  1246. prop = fdt_getprop(blob, offset, prop_name, &len);
  1247. if (!prop) {
  1248. debug("failed to get %s for %s\n", prop_name, node);
  1249. return -FDT_ERR_NOTFOUND;
  1250. }
  1251. if ((len % sizeof(phandle)) != 0) {
  1252. debug("invalid phandle property\n");
  1253. return -FDT_ERR_BADPHANDLE;
  1254. }
  1255. if (len < (sizeof(phandle) * (index + 1))) {
  1256. debug("invalid phandle index\n");
  1257. return -FDT_ERR_NOTFOUND;
  1258. }
  1259. phandle = fdt32_to_cpu(prop[index]);
  1260. offset = fdt_node_offset_by_phandle(blob, phandle);
  1261. if (offset < 0) {
  1262. debug("failed to find node for phandle %u\n", phandle);
  1263. return offset;
  1264. }
  1265. if (name)
  1266. *name = fdt_get_name(blob, offset, NULL);
  1267. if (compatiblesp) {
  1268. const char **compatibles = NULL;
  1269. const char *start, *end, *ptr;
  1270. unsigned int count = 0;
  1271. prop = fdt_getprop(blob, offset, "compatible", &len);
  1272. if (!prop)
  1273. goto skip_compat;
  1274. start = ptr = (const char *)prop;
  1275. end = start + len;
  1276. while (ptr < end) {
  1277. ptr = strchrnul(ptr, '\0');
  1278. count++;
  1279. ptr++;
  1280. }
  1281. compatibles = malloc(sizeof(ptr) * count);
  1282. if (!compatibles)
  1283. return -FDT_ERR_INTERNAL;
  1284. ptr = start;
  1285. count = 0;
  1286. while (ptr < end) {
  1287. compatibles[count] = ptr;
  1288. ptr = strchrnul(ptr, '\0');
  1289. count++;
  1290. ptr++;
  1291. }
  1292. skip_compat:
  1293. *compatiblesp = compatibles;
  1294. if (countp)
  1295. *countp = count;
  1296. }
  1297. carveout->start = fdtdec_get_addr_size_auto_noparent(blob, offset,
  1298. "reg", 0, &size,
  1299. true);
  1300. if (carveout->start == FDT_ADDR_T_NONE) {
  1301. debug("failed to read address/size from \"reg\" property\n");
  1302. return -FDT_ERR_NOTFOUND;
  1303. }
  1304. carveout->end = carveout->start + size - 1;
  1305. if (flags) {
  1306. *flags = 0;
  1307. if (fdtdec_get_bool(blob, offset, "no-map"))
  1308. *flags |= FDTDEC_RESERVED_MEMORY_NO_MAP;
  1309. }
  1310. return 0;
  1311. }
  1312. int fdtdec_set_carveout(void *blob, const char *node, const char *prop_name,
  1313. unsigned int index, const struct fdt_memory *carveout,
  1314. const char *name, const char **compatibles,
  1315. unsigned int count, unsigned long flags)
  1316. {
  1317. uint32_t phandle;
  1318. int err, offset, len;
  1319. fdt32_t value;
  1320. void *prop;
  1321. err = fdtdec_add_reserved_memory(blob, name, carveout, compatibles,
  1322. count, &phandle, flags);
  1323. if (err < 0) {
  1324. debug("failed to add reserved memory: %d\n", err);
  1325. return err;
  1326. }
  1327. offset = fdt_path_offset(blob, node);
  1328. if (offset < 0) {
  1329. debug("failed to find offset for node %s: %d\n", node, offset);
  1330. return offset;
  1331. }
  1332. value = cpu_to_fdt32(phandle);
  1333. if (!fdt_getprop(blob, offset, prop_name, &len)) {
  1334. if (len == -FDT_ERR_NOTFOUND)
  1335. len = 0;
  1336. else
  1337. return len;
  1338. }
  1339. if ((index + 1) * sizeof(value) > len) {
  1340. err = fdt_setprop_placeholder(blob, offset, prop_name,
  1341. (index + 1) * sizeof(value),
  1342. &prop);
  1343. if (err < 0) {
  1344. debug("failed to resize reserved memory property: %s\n",
  1345. fdt_strerror(err));
  1346. return err;
  1347. }
  1348. }
  1349. err = fdt_setprop_inplace_namelen_partial(blob, offset, prop_name,
  1350. strlen(prop_name),
  1351. index * sizeof(value),
  1352. &value, sizeof(value));
  1353. if (err < 0) {
  1354. debug("failed to update %s property for node %s: %s\n",
  1355. prop_name, node, fdt_strerror(err));
  1356. return err;
  1357. }
  1358. return 0;
  1359. }
  1360. /* TODO(sjg@chromium.org): This function should not be weak */
  1361. __weak int fdtdec_board_setup(const void *fdt_blob)
  1362. {
  1363. return 0;
  1364. }
  1365. /**
  1366. * setup_multi_dtb_fit() - locate the correct dtb from a FIT
  1367. *
  1368. * This supports the CONFIG_MULTI_DTB_FIT feature, looking for the dtb in a
  1369. * supplied FIT
  1370. *
  1371. * It accepts the current value of gd->fdt_blob, which points to the FIT, then
  1372. * updates that gd->fdt_blob, to point to the chosen dtb so that U-Boot uses the
  1373. * correct one
  1374. */
  1375. static void setup_multi_dtb_fit(void)
  1376. {
  1377. void *blob;
  1378. /*
  1379. * Try and uncompress the blob.
  1380. * Unfortunately there is no way to know how big the input blob really
  1381. * is. So let us set the maximum input size arbitrarily high. 16MB
  1382. * ought to be more than enough for packed DTBs.
  1383. */
  1384. if (uncompress_blob(gd->fdt_blob, 0x1000000, &blob) == 0)
  1385. gd->fdt_blob = blob;
  1386. /*
  1387. * Check if blob is a FIT images containings DTBs.
  1388. * If so, pick the most relevant
  1389. */
  1390. blob = locate_dtb_in_fit(gd->fdt_blob);
  1391. if (blob) {
  1392. gd_set_multi_dtb_fit(gd->fdt_blob);
  1393. gd->fdt_blob = blob;
  1394. gd->fdt_src = FDTSRC_FIT;
  1395. }
  1396. }
  1397. int fdtdec_setup(void)
  1398. {
  1399. int ret;
  1400. /* The devicetree is typically appended to U-Boot */
  1401. if (IS_ENABLED(CONFIG_OF_SEPARATE)) {
  1402. gd->fdt_blob = fdt_find_separate();
  1403. gd->fdt_src = FDTSRC_SEPARATE;
  1404. } else { /* embed dtb in ELF file for testing / development */
  1405. gd->fdt_blob = dtb_dt_embedded();
  1406. gd->fdt_src = FDTSRC_EMBED;
  1407. }
  1408. /* Allow the board to override the fdt address. */
  1409. if (IS_ENABLED(CONFIG_OF_BOARD)) {
  1410. gd->fdt_blob = board_fdt_blob_setup(&ret);
  1411. if (ret)
  1412. return ret;
  1413. gd->fdt_src = FDTSRC_BOARD;
  1414. }
  1415. /* Allow the early environment to override the fdt address */
  1416. if (!IS_ENABLED(CONFIG_SPL_BUILD)) {
  1417. ulong addr;
  1418. addr = env_get_hex("fdtcontroladdr", 0);
  1419. if (addr) {
  1420. gd->fdt_blob = map_sysmem(addr, 0);
  1421. gd->fdt_src = FDTSRC_ENV;
  1422. }
  1423. }
  1424. if (CONFIG_IS_ENABLED(MULTI_DTB_FIT))
  1425. setup_multi_dtb_fit();
  1426. ret = fdtdec_prepare_fdt(gd->fdt_blob);
  1427. if (!ret)
  1428. ret = fdtdec_board_setup(gd->fdt_blob);
  1429. oftree_reset();
  1430. return ret;
  1431. }
  1432. int fdtdec_resetup(int *rescan)
  1433. {
  1434. void *fdt_blob;
  1435. /*
  1436. * If the current DTB is part of a compressed FIT image,
  1437. * try to locate the best match from the uncompressed
  1438. * FIT image stillpresent there. Save the time and space
  1439. * required to uncompress it again.
  1440. */
  1441. if (gd_multi_dtb_fit()) {
  1442. fdt_blob = locate_dtb_in_fit(gd_multi_dtb_fit());
  1443. if (fdt_blob == gd->fdt_blob) {
  1444. /*
  1445. * The best match did not change. no need to tear down
  1446. * the DM and rescan the fdt.
  1447. */
  1448. *rescan = 0;
  1449. return 0;
  1450. }
  1451. *rescan = 1;
  1452. gd->fdt_blob = fdt_blob;
  1453. return fdtdec_prepare_fdt(fdt_blob);
  1454. }
  1455. /*
  1456. * If multi_dtb_fit is NULL, it means that blob appended to u-boot is
  1457. * not a FIT image containings DTB, but a single DTB. There is no need
  1458. * to teard down DM and rescan the DT in this case.
  1459. */
  1460. *rescan = 0;
  1461. return 0;
  1462. }
  1463. int fdtdec_decode_ram_size(const void *blob, const char *area, int board_id,
  1464. phys_addr_t *basep, phys_size_t *sizep,
  1465. struct bd_info *bd)
  1466. {
  1467. int addr_cells, size_cells;
  1468. const u32 *cell, *end;
  1469. u64 total_size, size, addr;
  1470. int node, child;
  1471. bool auto_size;
  1472. int bank;
  1473. int len;
  1474. debug("%s: board_id=%d\n", __func__, board_id);
  1475. if (!area)
  1476. area = "/memory";
  1477. node = fdt_path_offset(blob, area);
  1478. if (node < 0) {
  1479. debug("No %s node found\n", area);
  1480. return -ENOENT;
  1481. }
  1482. cell = fdt_getprop(blob, node, "reg", &len);
  1483. if (!cell) {
  1484. debug("No reg property found\n");
  1485. return -ENOENT;
  1486. }
  1487. addr_cells = fdt_address_cells(blob, node);
  1488. size_cells = fdt_size_cells(blob, node);
  1489. /* Check the board id and mask */
  1490. for (child = fdt_first_subnode(blob, node);
  1491. child >= 0;
  1492. child = fdt_next_subnode(blob, child)) {
  1493. int match_mask, match_value;
  1494. match_mask = fdtdec_get_int(blob, child, "match-mask", -1);
  1495. match_value = fdtdec_get_int(blob, child, "match-value", -1);
  1496. if (match_value >= 0 &&
  1497. ((board_id & match_mask) == match_value)) {
  1498. /* Found matching mask */
  1499. debug("Found matching mask %d\n", match_mask);
  1500. node = child;
  1501. cell = fdt_getprop(blob, node, "reg", &len);
  1502. if (!cell) {
  1503. debug("No memory-banks property found\n");
  1504. return -EINVAL;
  1505. }
  1506. break;
  1507. }
  1508. }
  1509. /* Note: if no matching subnode was found we use the parent node */
  1510. if (bd) {
  1511. memset(bd->bi_dram, '\0', sizeof(bd->bi_dram[0]) *
  1512. CONFIG_NR_DRAM_BANKS);
  1513. }
  1514. auto_size = fdtdec_get_bool(blob, node, "auto-size");
  1515. total_size = 0;
  1516. end = cell + len / 4 - addr_cells - size_cells;
  1517. debug("cell at %p, end %p\n", cell, end);
  1518. for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
  1519. if (cell > end)
  1520. break;
  1521. addr = 0;
  1522. if (addr_cells == 2)
  1523. addr += (u64)fdt32_to_cpu(*cell++) << 32UL;
  1524. addr += fdt32_to_cpu(*cell++);
  1525. if (bd)
  1526. bd->bi_dram[bank].start = addr;
  1527. if (basep && !bank)
  1528. *basep = (phys_addr_t)addr;
  1529. size = 0;
  1530. if (size_cells == 2)
  1531. size += (u64)fdt32_to_cpu(*cell++) << 32UL;
  1532. size += fdt32_to_cpu(*cell++);
  1533. if (auto_size) {
  1534. u64 new_size;
  1535. debug("Auto-sizing %llx, size %llx: ", addr, size);
  1536. new_size = get_ram_size((long *)(uintptr_t)addr, size);
  1537. if (new_size == size) {
  1538. debug("OK\n");
  1539. } else {
  1540. debug("sized to %llx\n", new_size);
  1541. size = new_size;
  1542. }
  1543. }
  1544. if (bd)
  1545. bd->bi_dram[bank].size = size;
  1546. total_size += size;
  1547. }
  1548. debug("Memory size %llu\n", total_size);
  1549. if (sizep)
  1550. *sizep = (phys_size_t)total_size;
  1551. return 0;
  1552. }
  1553. #endif /* !USE_HOSTCC */