board_f.c 25 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (c) 2011 The Chromium OS Authors.
  4. * (C) Copyright 2002-2006
  5. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  6. *
  7. * (C) Copyright 2002
  8. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  9. * Marius Groeger <mgroeger@sysgo.de>
  10. */
  11. #include <common.h>
  12. #include <bloblist.h>
  13. #include <bootstage.h>
  14. #include <clock_legacy.h>
  15. #include <console.h>
  16. #include <cpu.h>
  17. #include <cpu_func.h>
  18. #include <cyclic.h>
  19. #include <display_options.h>
  20. #include <dm.h>
  21. #include <env.h>
  22. #include <env_internal.h>
  23. #include <event.h>
  24. #include <fdtdec.h>
  25. #include <fs.h>
  26. #include <hang.h>
  27. #include <i2c.h>
  28. #include <init.h>
  29. #include <initcall.h>
  30. #include <log.h>
  31. #include <malloc.h>
  32. #include <mapmem.h>
  33. #include <os.h>
  34. #include <post.h>
  35. #include <relocate.h>
  36. #include <serial.h>
  37. #include <spl.h>
  38. #include <status_led.h>
  39. #include <sysreset.h>
  40. #include <timer.h>
  41. #include <trace.h>
  42. #include <video.h>
  43. #include <watchdog.h>
  44. #include <asm/cache.h>
  45. #include <asm/global_data.h>
  46. #include <asm/io.h>
  47. #include <asm/sections.h>
  48. #include <dm/root.h>
  49. #include <linux/errno.h>
  50. #include <linux/log2.h>
  51. DECLARE_GLOBAL_DATA_PTR;
  52. /*
  53. * TODO(sjg@chromium.org): IMO this code should be
  54. * refactored to a single function, something like:
  55. *
  56. * void led_set_state(enum led_colour_t colour, int on);
  57. */
  58. /************************************************************************
  59. * Coloured LED functionality
  60. ************************************************************************
  61. * May be supplied by boards if desired
  62. */
  63. __weak void coloured_LED_init(void) {}
  64. __weak void red_led_on(void) {}
  65. __weak void red_led_off(void) {}
  66. __weak void green_led_on(void) {}
  67. __weak void green_led_off(void) {}
  68. __weak void yellow_led_on(void) {}
  69. __weak void yellow_led_off(void) {}
  70. __weak void blue_led_on(void) {}
  71. __weak void blue_led_off(void) {}
  72. /*
  73. * Why is gd allocated a register? Prior to reloc it might be better to
  74. * just pass it around to each function in this file?
  75. *
  76. * After reloc one could argue that it is hardly used and doesn't need
  77. * to be in a register. Or if it is it should perhaps hold pointers to all
  78. * global data for all modules, so that post-reloc we can avoid the massive
  79. * literal pool we get on ARM. Or perhaps just encourage each module to use
  80. * a structure...
  81. */
  82. #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
  83. static int init_func_watchdog_init(void)
  84. {
  85. # if defined(CONFIG_HW_WATCHDOG) && \
  86. (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
  87. defined(CONFIG_SH) || \
  88. defined(CONFIG_DESIGNWARE_WATCHDOG) || \
  89. defined(CONFIG_IMX_WATCHDOG))
  90. hw_watchdog_init();
  91. puts(" Watchdog enabled\n");
  92. # endif
  93. schedule();
  94. return 0;
  95. }
  96. int init_func_watchdog_reset(void)
  97. {
  98. schedule();
  99. return 0;
  100. }
  101. #endif /* CONFIG_WATCHDOG */
  102. __weak void board_add_ram_info(int use_default)
  103. {
  104. /* please define platform specific board_add_ram_info() */
  105. }
  106. static int init_baud_rate(void)
  107. {
  108. gd->baudrate = env_get_ulong("baudrate", 10, CONFIG_BAUDRATE);
  109. return 0;
  110. }
  111. static int display_text_info(void)
  112. {
  113. #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
  114. ulong bss_start, bss_end, text_base;
  115. bss_start = (ulong)&__bss_start;
  116. bss_end = (ulong)&__bss_end;
  117. #ifdef CONFIG_TEXT_BASE
  118. text_base = CONFIG_TEXT_BASE;
  119. #else
  120. text_base = CONFIG_SYS_MONITOR_BASE;
  121. #endif
  122. debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
  123. text_base, bss_start, bss_end);
  124. #endif
  125. return 0;
  126. }
  127. #ifdef CONFIG_SYSRESET
  128. static int print_resetinfo(void)
  129. {
  130. struct udevice *dev;
  131. char status[256];
  132. bool status_printed = false;
  133. int ret;
  134. /* Not all boards have sysreset drivers available during early
  135. * boot, so don't fail if one can't be found.
  136. */
  137. for (ret = uclass_first_device_check(UCLASS_SYSRESET, &dev); dev;
  138. ret = uclass_next_device_check(&dev)) {
  139. if (ret) {
  140. debug("%s: %s sysreset device (error: %d)\n",
  141. __func__, dev->name, ret);
  142. continue;
  143. }
  144. if (!sysreset_get_status(dev, status, sizeof(status))) {
  145. printf("%s%s", status_printed ? " " : "", status);
  146. status_printed = true;
  147. }
  148. }
  149. if (status_printed)
  150. printf("\n");
  151. return 0;
  152. }
  153. #endif
  154. #if defined(CONFIG_DISPLAY_CPUINFO) && CONFIG_IS_ENABLED(CPU)
  155. static int print_cpuinfo(void)
  156. {
  157. struct udevice *dev;
  158. char desc[512];
  159. int ret;
  160. dev = cpu_get_current_dev();
  161. if (!dev) {
  162. debug("%s: Could not get CPU device\n",
  163. __func__);
  164. return -ENODEV;
  165. }
  166. ret = cpu_get_desc(dev, desc, sizeof(desc));
  167. if (ret) {
  168. debug("%s: Could not get CPU description (err = %d)\n",
  169. dev->name, ret);
  170. return ret;
  171. }
  172. printf("CPU: %s\n", desc);
  173. return 0;
  174. }
  175. #endif
  176. static int announce_dram_init(void)
  177. {
  178. puts("DRAM: ");
  179. return 0;
  180. }
  181. /*
  182. * From input size calculate its nearest rounded unit scale (multiply of 2^10)
  183. * and value in calculated unit scale multiplied by 10 (as fractional fixed
  184. * point number with one decimal digit), which is human natural format,
  185. * same what uses print_size() function for displaying. Mathematically it is:
  186. * round_nearest(val * 2^scale) = size * 10; where: 10 <= val < 10240.
  187. *
  188. * For example for size=87654321 we calculate scale=20 and val=836 which means
  189. * that input has natural human format 83.6 M (mega = 2^20).
  190. */
  191. #define compute_size_scale_val(size, scale, val) do { \
  192. scale = ilog2(size) / 10 * 10; \
  193. val = (10 * size + ((1ULL << scale) >> 1)) >> scale; \
  194. if (val == 10240) { val = 10; scale += 10; } \
  195. } while (0)
  196. /*
  197. * Check if the sizes in their natural units written in decimal format with
  198. * one fraction number are same.
  199. */
  200. static int sizes_near(unsigned long long size1, unsigned long long size2)
  201. {
  202. unsigned int size1_scale, size1_val, size2_scale, size2_val;
  203. compute_size_scale_val(size1, size1_scale, size1_val);
  204. compute_size_scale_val(size2, size2_scale, size2_val);
  205. return size1_scale == size2_scale && size1_val == size2_val;
  206. }
  207. static int show_dram_config(void)
  208. {
  209. unsigned long long size;
  210. int i;
  211. debug("\nRAM Configuration:\n");
  212. for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
  213. size += gd->bd->bi_dram[i].size;
  214. debug("Bank #%d: %llx ", i,
  215. (unsigned long long)(gd->bd->bi_dram[i].start));
  216. #ifdef DEBUG
  217. print_size(gd->bd->bi_dram[i].size, "\n");
  218. #endif
  219. }
  220. debug("\nDRAM: ");
  221. print_size(gd->ram_size, "");
  222. if (!sizes_near(gd->ram_size, size)) {
  223. printf(" (effective ");
  224. print_size(size, ")");
  225. }
  226. board_add_ram_info(0);
  227. putc('\n');
  228. return 0;
  229. }
  230. __weak int dram_init_banksize(void)
  231. {
  232. gd->bd->bi_dram[0].start = gd->ram_base;
  233. gd->bd->bi_dram[0].size = get_effective_memsize();
  234. return 0;
  235. }
  236. #if CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
  237. static int init_func_i2c(void)
  238. {
  239. puts("I2C: ");
  240. i2c_init_all();
  241. puts("ready\n");
  242. return 0;
  243. }
  244. #endif
  245. #if defined(CONFIG_VID)
  246. __weak int init_func_vid(void)
  247. {
  248. return 0;
  249. }
  250. #endif
  251. static int setup_mon_len(void)
  252. {
  253. #if defined(__ARM__) || defined(__MICROBLAZE__)
  254. gd->mon_len = (ulong)&__bss_end - (ulong)_start;
  255. #elif defined(CONFIG_SANDBOX) && !defined(__riscv)
  256. gd->mon_len = (ulong)&_end - (ulong)_init;
  257. #elif defined(CONFIG_SANDBOX)
  258. /* gcc does not provide _init in crti.o on RISC-V */
  259. gd->mon_len = 0;
  260. #elif defined(CONFIG_EFI_APP)
  261. gd->mon_len = (ulong)&_end - (ulong)_init;
  262. #elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA)
  263. gd->mon_len = CONFIG_SYS_MONITOR_LEN;
  264. #elif defined(CONFIG_SH) || defined(CONFIG_RISCV)
  265. gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
  266. #elif defined(CONFIG_SYS_MONITOR_BASE)
  267. /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
  268. gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
  269. #endif
  270. return 0;
  271. }
  272. static int setup_spl_handoff(void)
  273. {
  274. #if CONFIG_IS_ENABLED(HANDOFF)
  275. gd->spl_handoff = bloblist_find(BLOBLISTT_U_BOOT_SPL_HANDOFF,
  276. sizeof(struct spl_handoff));
  277. debug("Found SPL hand-off info %p\n", gd->spl_handoff);
  278. #endif
  279. return 0;
  280. }
  281. __weak int arch_cpu_init(void)
  282. {
  283. return 0;
  284. }
  285. __weak int mach_cpu_init(void)
  286. {
  287. return 0;
  288. }
  289. /* Get the top of usable RAM */
  290. __weak phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
  291. {
  292. #if defined(CFG_SYS_SDRAM_BASE) && CFG_SYS_SDRAM_BASE > 0
  293. /*
  294. * Detect whether we have so much RAM that it goes past the end of our
  295. * 32-bit address space. If so, clip the usable RAM so it doesn't.
  296. */
  297. if (gd->ram_top < CFG_SYS_SDRAM_BASE)
  298. /*
  299. * Will wrap back to top of 32-bit space when reservations
  300. * are made.
  301. */
  302. return 0;
  303. #endif
  304. return gd->ram_top;
  305. }
  306. __weak int arch_setup_dest_addr(void)
  307. {
  308. return 0;
  309. }
  310. static int setup_dest_addr(void)
  311. {
  312. debug("Monitor len: %08lX\n", gd->mon_len);
  313. /*
  314. * Ram is setup, size stored in gd !!
  315. */
  316. debug("Ram size: %08llX\n", (unsigned long long)gd->ram_size);
  317. #if CONFIG_VAL(SYS_MEM_TOP_HIDE)
  318. /*
  319. * Subtract specified amount of memory to hide so that it won't
  320. * get "touched" at all by U-Boot. By fixing up gd->ram_size
  321. * the Linux kernel should now get passed the now "corrected"
  322. * memory size and won't touch it either. This should work
  323. * for arch/ppc and arch/powerpc. Only Linux board ports in
  324. * arch/powerpc with bootwrapper support, that recalculate the
  325. * memory size from the SDRAM controller setup will have to
  326. * get fixed.
  327. */
  328. gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
  329. #endif
  330. #ifdef CFG_SYS_SDRAM_BASE
  331. gd->ram_base = CFG_SYS_SDRAM_BASE;
  332. #endif
  333. gd->ram_top = gd->ram_base + get_effective_memsize();
  334. gd->ram_top = board_get_usable_ram_top(gd->mon_len);
  335. gd->relocaddr = gd->ram_top;
  336. debug("Ram top: %08llX\n", (unsigned long long)gd->ram_top);
  337. return arch_setup_dest_addr();
  338. }
  339. #ifdef CFG_PRAM
  340. /* reserve protected RAM */
  341. static int reserve_pram(void)
  342. {
  343. ulong reg;
  344. reg = env_get_ulong("pram", 10, CFG_PRAM);
  345. gd->relocaddr -= (reg << 10); /* size is in kB */
  346. debug("Reserving %ldk for protected RAM at %08lx\n", reg,
  347. gd->relocaddr);
  348. return 0;
  349. }
  350. #endif /* CFG_PRAM */
  351. /* Round memory pointer down to next 4 kB limit */
  352. static int reserve_round_4k(void)
  353. {
  354. gd->relocaddr &= ~(4096 - 1);
  355. return 0;
  356. }
  357. __weak int arch_reserve_mmu(void)
  358. {
  359. return 0;
  360. }
  361. static int reserve_video(void)
  362. {
  363. if (IS_ENABLED(CONFIG_SPL_VIDEO_HANDOFF) && spl_phase() > PHASE_SPL) {
  364. struct video_handoff *ho;
  365. ho = bloblist_find(BLOBLISTT_U_BOOT_VIDEO, sizeof(*ho));
  366. if (!ho)
  367. return log_msg_ret("blf", -ENOENT);
  368. video_reserve_from_bloblist(ho);
  369. gd->relocaddr = ho->fb;
  370. } else if (CONFIG_IS_ENABLED(VIDEO)) {
  371. ulong addr;
  372. int ret;
  373. addr = gd->relocaddr;
  374. ret = video_reserve(&addr);
  375. if (ret)
  376. return ret;
  377. debug("Reserving %luk for video at: %08lx\n",
  378. ((unsigned long)gd->relocaddr - addr) >> 10, addr);
  379. gd->relocaddr = addr;
  380. }
  381. return 0;
  382. }
  383. static int reserve_trace(void)
  384. {
  385. #ifdef CONFIG_TRACE
  386. gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
  387. gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
  388. debug("Reserving %luk for trace data at: %08lx\n",
  389. (unsigned long)CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
  390. #endif
  391. return 0;
  392. }
  393. static int reserve_uboot(void)
  394. {
  395. if (!(gd->flags & GD_FLG_SKIP_RELOC)) {
  396. /*
  397. * reserve memory for U-Boot code, data & bss
  398. * round down to next 4 kB limit
  399. */
  400. gd->relocaddr -= gd->mon_len;
  401. gd->relocaddr &= ~(4096 - 1);
  402. #if defined(CONFIG_E500) || defined(CONFIG_MIPS)
  403. /* round down to next 64 kB limit so that IVPR stays aligned */
  404. gd->relocaddr &= ~(65536 - 1);
  405. #endif
  406. debug("Reserving %ldk for U-Boot at: %08lx\n",
  407. gd->mon_len >> 10, gd->relocaddr);
  408. }
  409. gd->start_addr_sp = gd->relocaddr;
  410. return 0;
  411. }
  412. /*
  413. * reserve after start_addr_sp the requested size and make the stack pointer
  414. * 16-byte aligned, this alignment is needed for cast on the reserved memory
  415. * ref = x86_64 ABI: https://reviews.llvm.org/D30049: 16 bytes
  416. * = ARMv8 Instruction Set Overview: quad word, 16 bytes
  417. */
  418. static unsigned long reserve_stack_aligned(size_t size)
  419. {
  420. return ALIGN_DOWN(gd->start_addr_sp - size, 16);
  421. }
  422. #ifdef CONFIG_SYS_NONCACHED_MEMORY
  423. static int reserve_noncached(void)
  424. {
  425. /*
  426. * The value of gd->start_addr_sp must match the value of malloc_start
  427. * calculated in board_r.c:initr_malloc(), which is passed to
  428. * dlmalloc.c:mem_malloc_init() and then used by
  429. * cache.c:noncached_init()
  430. *
  431. * These calculations must match the code in cache.c:noncached_init()
  432. */
  433. gd->start_addr_sp = ALIGN(gd->start_addr_sp, MMU_SECTION_SIZE) -
  434. MMU_SECTION_SIZE;
  435. gd->start_addr_sp -= ALIGN(CONFIG_SYS_NONCACHED_MEMORY,
  436. MMU_SECTION_SIZE);
  437. debug("Reserving %dM for noncached_alloc() at: %08lx\n",
  438. CONFIG_SYS_NONCACHED_MEMORY >> 20, gd->start_addr_sp);
  439. return 0;
  440. }
  441. #endif
  442. /* reserve memory for malloc() area */
  443. static int reserve_malloc(void)
  444. {
  445. gd->start_addr_sp = reserve_stack_aligned(TOTAL_MALLOC_LEN);
  446. debug("Reserving %dk for malloc() at: %08lx\n",
  447. TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
  448. #ifdef CONFIG_SYS_NONCACHED_MEMORY
  449. reserve_noncached();
  450. #endif
  451. return 0;
  452. }
  453. /* (permanently) allocate a Board Info struct */
  454. static int reserve_board(void)
  455. {
  456. if (!gd->bd) {
  457. gd->start_addr_sp = reserve_stack_aligned(sizeof(struct bd_info));
  458. gd->bd = (struct bd_info *)map_sysmem(gd->start_addr_sp,
  459. sizeof(struct bd_info));
  460. memset(gd->bd, '\0', sizeof(struct bd_info));
  461. debug("Reserving %zu Bytes for Board Info at: %08lx\n",
  462. sizeof(struct bd_info), gd->start_addr_sp);
  463. }
  464. return 0;
  465. }
  466. static int reserve_global_data(void)
  467. {
  468. gd->start_addr_sp = reserve_stack_aligned(sizeof(gd_t));
  469. gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
  470. debug("Reserving %zu Bytes for Global Data at: %08lx\n",
  471. sizeof(gd_t), gd->start_addr_sp);
  472. return 0;
  473. }
  474. static int reserve_fdt(void)
  475. {
  476. if (!IS_ENABLED(CONFIG_OF_EMBED)) {
  477. /*
  478. * If the device tree is sitting immediately above our image
  479. * then we must relocate it. If it is embedded in the data
  480. * section, then it will be relocated with other data.
  481. */
  482. if (gd->fdt_blob) {
  483. gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob), 32);
  484. gd->start_addr_sp = reserve_stack_aligned(gd->fdt_size);
  485. gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
  486. debug("Reserving %lu Bytes for FDT at: %08lx\n",
  487. gd->fdt_size, gd->start_addr_sp);
  488. }
  489. }
  490. return 0;
  491. }
  492. static int reserve_bootstage(void)
  493. {
  494. #ifdef CONFIG_BOOTSTAGE
  495. int size = bootstage_get_size();
  496. gd->start_addr_sp = reserve_stack_aligned(size);
  497. gd->new_bootstage = map_sysmem(gd->start_addr_sp, size);
  498. debug("Reserving %#x Bytes for bootstage at: %08lx\n", size,
  499. gd->start_addr_sp);
  500. #endif
  501. return 0;
  502. }
  503. __weak int arch_reserve_stacks(void)
  504. {
  505. return 0;
  506. }
  507. static int reserve_stacks(void)
  508. {
  509. /* make stack pointer 16-byte aligned */
  510. gd->start_addr_sp = reserve_stack_aligned(16);
  511. /*
  512. * let the architecture-specific code tailor gd->start_addr_sp and
  513. * gd->irq_sp
  514. */
  515. return arch_reserve_stacks();
  516. }
  517. static int reserve_bloblist(void)
  518. {
  519. #ifdef CONFIG_BLOBLIST
  520. /* Align to a 4KB boundary for easier reading of addresses */
  521. gd->start_addr_sp = ALIGN_DOWN(gd->start_addr_sp -
  522. CONFIG_BLOBLIST_SIZE_RELOC, 0x1000);
  523. gd->new_bloblist = map_sysmem(gd->start_addr_sp,
  524. CONFIG_BLOBLIST_SIZE_RELOC);
  525. #endif
  526. return 0;
  527. }
  528. static int display_new_sp(void)
  529. {
  530. debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
  531. return 0;
  532. }
  533. __weak int arch_setup_bdinfo(void)
  534. {
  535. return 0;
  536. }
  537. int setup_bdinfo(void)
  538. {
  539. struct bd_info *bd = gd->bd;
  540. if (IS_ENABLED(CONFIG_SYS_HAS_SRAM)) {
  541. bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
  542. bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
  543. }
  544. return arch_setup_bdinfo();
  545. }
  546. #ifdef CONFIG_POST
  547. static int init_post(void)
  548. {
  549. post_bootmode_init();
  550. post_run(NULL, POST_ROM | post_bootmode_get(0));
  551. return 0;
  552. }
  553. #endif
  554. static int reloc_fdt(void)
  555. {
  556. if (!IS_ENABLED(CONFIG_OF_EMBED)) {
  557. if (gd->new_fdt) {
  558. memcpy(gd->new_fdt, gd->fdt_blob,
  559. fdt_totalsize(gd->fdt_blob));
  560. gd->fdt_blob = gd->new_fdt;
  561. }
  562. }
  563. return 0;
  564. }
  565. static int reloc_bootstage(void)
  566. {
  567. #ifdef CONFIG_BOOTSTAGE
  568. if (gd->flags & GD_FLG_SKIP_RELOC)
  569. return 0;
  570. if (gd->new_bootstage) {
  571. int size = bootstage_get_size();
  572. debug("Copying bootstage from %p to %p, size %x\n",
  573. gd->bootstage, gd->new_bootstage, size);
  574. memcpy(gd->new_bootstage, gd->bootstage, size);
  575. gd->bootstage = gd->new_bootstage;
  576. bootstage_relocate();
  577. }
  578. #endif
  579. return 0;
  580. }
  581. static int reloc_bloblist(void)
  582. {
  583. #ifdef CONFIG_BLOBLIST
  584. /*
  585. * Relocate only if we are supposed to send it
  586. */
  587. if ((gd->flags & GD_FLG_SKIP_RELOC) &&
  588. CONFIG_BLOBLIST_SIZE == CONFIG_BLOBLIST_SIZE_RELOC) {
  589. debug("Not relocating bloblist\n");
  590. return 0;
  591. }
  592. if (gd->new_bloblist) {
  593. int size = CONFIG_BLOBLIST_SIZE;
  594. debug("Copying bloblist from %p to %p, size %x\n",
  595. gd->bloblist, gd->new_bloblist, size);
  596. bloblist_reloc(gd->new_bloblist, CONFIG_BLOBLIST_SIZE_RELOC,
  597. gd->bloblist, size);
  598. gd->bloblist = gd->new_bloblist;
  599. }
  600. #endif
  601. return 0;
  602. }
  603. static int setup_reloc(void)
  604. {
  605. if (!(gd->flags & GD_FLG_SKIP_RELOC)) {
  606. #ifdef CONFIG_TEXT_BASE
  607. #ifdef ARM
  608. gd->reloc_off = gd->relocaddr - (unsigned long)__image_copy_start;
  609. #elif defined(CONFIG_MICROBLAZE)
  610. gd->reloc_off = gd->relocaddr - (u32)_start;
  611. #elif defined(CONFIG_M68K)
  612. /*
  613. * On all ColdFire arch cpu, monitor code starts always
  614. * just after the default vector table location, so at 0x400
  615. */
  616. gd->reloc_off = gd->relocaddr - (CONFIG_TEXT_BASE + 0x400);
  617. #elif !defined(CONFIG_SANDBOX)
  618. gd->reloc_off = gd->relocaddr - CONFIG_TEXT_BASE;
  619. #endif
  620. #endif
  621. }
  622. memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
  623. if (gd->flags & GD_FLG_SKIP_RELOC) {
  624. debug("Skipping relocation due to flag\n");
  625. } else {
  626. debug("Relocation Offset is: %08lx\n", gd->reloc_off);
  627. debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
  628. gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
  629. gd->start_addr_sp);
  630. }
  631. return 0;
  632. }
  633. #ifdef CONFIG_OF_BOARD_FIXUP
  634. static int fix_fdt(void)
  635. {
  636. return board_fix_fdt((void *)gd->fdt_blob);
  637. }
  638. #endif
  639. /* ARM calls relocate_code from its crt0.S */
  640. #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
  641. static int jump_to_copy(void)
  642. {
  643. if (gd->flags & GD_FLG_SKIP_RELOC)
  644. return 0;
  645. /*
  646. * x86 is special, but in a nice way. It uses a trampoline which
  647. * enables the dcache if possible.
  648. *
  649. * For now, other archs use relocate_code(), which is implemented
  650. * similarly for all archs. When we do generic relocation, hopefully
  651. * we can make all archs enable the dcache prior to relocation.
  652. */
  653. #if defined(CONFIG_X86) || defined(CONFIG_ARC)
  654. /*
  655. * SDRAM and console are now initialised. The final stack can now
  656. * be setup in SDRAM. Code execution will continue in Flash, but
  657. * with the stack in SDRAM and Global Data in temporary memory
  658. * (CPU cache)
  659. */
  660. arch_setup_gd(gd->new_gd);
  661. # if CONFIG_IS_ENABLED(X86_64)
  662. board_init_f_r_trampoline64(gd->new_gd, gd->start_addr_sp);
  663. # else
  664. board_init_f_r_trampoline(gd->start_addr_sp);
  665. # endif
  666. #else
  667. relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
  668. #endif
  669. return 0;
  670. }
  671. #endif
  672. /* Record the board_init_f() bootstage (after arch_cpu_init()) */
  673. static int initf_bootstage(void)
  674. {
  675. bool from_spl = IS_ENABLED(CONFIG_SPL_BOOTSTAGE) &&
  676. IS_ENABLED(CONFIG_BOOTSTAGE_STASH);
  677. int ret;
  678. ret = bootstage_init(!from_spl);
  679. if (ret)
  680. return ret;
  681. if (from_spl) {
  682. const void *stash = map_sysmem(CONFIG_BOOTSTAGE_STASH_ADDR,
  683. CONFIG_BOOTSTAGE_STASH_SIZE);
  684. ret = bootstage_unstash(stash, CONFIG_BOOTSTAGE_STASH_SIZE);
  685. if (ret && ret != -ENOENT) {
  686. debug("Failed to unstash bootstage: err=%d\n", ret);
  687. return ret;
  688. }
  689. }
  690. bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
  691. return 0;
  692. }
  693. static int initf_dm(void)
  694. {
  695. #if defined(CONFIG_DM) && CONFIG_VAL(SYS_MALLOC_F_LEN)
  696. int ret;
  697. bootstage_start(BOOTSTAGE_ID_ACCUM_DM_F, "dm_f");
  698. ret = dm_init_and_scan(true);
  699. bootstage_accum(BOOTSTAGE_ID_ACCUM_DM_F);
  700. if (ret)
  701. return ret;
  702. if (IS_ENABLED(CONFIG_TIMER_EARLY)) {
  703. ret = dm_timer_init();
  704. if (ret)
  705. return ret;
  706. }
  707. #endif
  708. return 0;
  709. }
  710. /* Architecture-specific memory reservation */
  711. __weak int reserve_arch(void)
  712. {
  713. return 0;
  714. }
  715. __weak int checkcpu(void)
  716. {
  717. return 0;
  718. }
  719. __weak int clear_bss(void)
  720. {
  721. return 0;
  722. }
  723. static int misc_init_f(void)
  724. {
  725. return event_notify_null(EVT_MISC_INIT_F);
  726. }
  727. static const init_fnc_t init_sequence_f[] = {
  728. setup_mon_len,
  729. #ifdef CONFIG_OF_CONTROL
  730. fdtdec_setup,
  731. #endif
  732. #ifdef CONFIG_TRACE_EARLY
  733. trace_early_init,
  734. #endif
  735. initf_malloc,
  736. log_init,
  737. initf_bootstage, /* uses its own timer, so does not need DM */
  738. event_init,
  739. #ifdef CONFIG_BLOBLIST
  740. bloblist_init,
  741. #endif
  742. setup_spl_handoff,
  743. #if defined(CONFIG_CONSOLE_RECORD_INIT_F)
  744. console_record_init,
  745. #endif
  746. #if defined(CONFIG_HAVE_FSP)
  747. arch_fsp_init,
  748. #endif
  749. arch_cpu_init, /* basic arch cpu dependent setup */
  750. mach_cpu_init, /* SoC/machine dependent CPU setup */
  751. initf_dm,
  752. #if defined(CONFIG_BOARD_EARLY_INIT_F)
  753. board_early_init_f,
  754. #endif
  755. #if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
  756. /* get CPU and bus clocks according to the environment variable */
  757. get_clocks, /* get CPU and bus clocks (etc.) */
  758. #endif
  759. #if !defined(CONFIG_M68K) || (defined(CONFIG_M68K) && !defined(CONFIG_MCFTMR))
  760. timer_init, /* initialize timer */
  761. #endif
  762. #if defined(CONFIG_BOARD_POSTCLK_INIT)
  763. board_postclk_init,
  764. #endif
  765. env_init, /* initialize environment */
  766. init_baud_rate, /* initialze baudrate settings */
  767. serial_init, /* serial communications setup */
  768. console_init_f, /* stage 1 init of console */
  769. display_options, /* say that we are here */
  770. display_text_info, /* show debugging info if required */
  771. checkcpu,
  772. #if defined(CONFIG_SYSRESET)
  773. print_resetinfo,
  774. #endif
  775. #if defined(CONFIG_DISPLAY_CPUINFO)
  776. print_cpuinfo, /* display cpu info (and speed) */
  777. #endif
  778. #if defined(CONFIG_DTB_RESELECT)
  779. embedded_dtb_select,
  780. #endif
  781. #if defined(CONFIG_DISPLAY_BOARDINFO)
  782. show_board_info,
  783. #endif
  784. INIT_FUNC_WATCHDOG_INIT
  785. misc_init_f,
  786. INIT_FUNC_WATCHDOG_RESET
  787. #if CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
  788. init_func_i2c,
  789. #endif
  790. #if defined(CONFIG_VID) && !defined(CONFIG_SPL)
  791. init_func_vid,
  792. #endif
  793. announce_dram_init,
  794. dram_init, /* configure available RAM banks */
  795. #ifdef CONFIG_POST
  796. post_init_f,
  797. #endif
  798. INIT_FUNC_WATCHDOG_RESET
  799. #if defined(CFG_SYS_DRAM_TEST)
  800. testdram,
  801. #endif /* CFG_SYS_DRAM_TEST */
  802. INIT_FUNC_WATCHDOG_RESET
  803. #ifdef CONFIG_POST
  804. init_post,
  805. #endif
  806. INIT_FUNC_WATCHDOG_RESET
  807. /*
  808. * Now that we have DRAM mapped and working, we can
  809. * relocate the code and continue running from DRAM.
  810. *
  811. * Reserve memory at end of RAM for (top down in that order):
  812. * - area that won't get touched by U-Boot and Linux (optional)
  813. * - kernel log buffer
  814. * - protected RAM
  815. * - LCD framebuffer
  816. * - monitor code
  817. * - board info struct
  818. */
  819. setup_dest_addr,
  820. #ifdef CONFIG_OF_BOARD_FIXUP
  821. fix_fdt,
  822. #endif
  823. #ifdef CFG_PRAM
  824. reserve_pram,
  825. #endif
  826. reserve_round_4k,
  827. arch_reserve_mmu,
  828. reserve_video,
  829. reserve_trace,
  830. reserve_uboot,
  831. reserve_malloc,
  832. reserve_board,
  833. reserve_global_data,
  834. reserve_fdt,
  835. reserve_bootstage,
  836. reserve_bloblist,
  837. reserve_arch,
  838. reserve_stacks,
  839. dram_init_banksize,
  840. show_dram_config,
  841. INIT_FUNC_WATCHDOG_RESET
  842. setup_bdinfo,
  843. display_new_sp,
  844. INIT_FUNC_WATCHDOG_RESET
  845. reloc_fdt,
  846. reloc_bootstage,
  847. reloc_bloblist,
  848. setup_reloc,
  849. #if defined(CONFIG_X86) || defined(CONFIG_ARC)
  850. copy_uboot_to_ram,
  851. do_elf_reloc_fixups,
  852. #endif
  853. clear_bss,
  854. /*
  855. * Deregister all cyclic functions before relocation, so that
  856. * gd->cyclic_list does not contain any references to pre-relocation
  857. * devices. Drivers will register their cyclic functions anew when the
  858. * devices are probed again.
  859. *
  860. * This should happen as late as possible so that the window where a
  861. * watchdog device is not serviced is as small as possible.
  862. */
  863. cyclic_unregister_all,
  864. #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
  865. jump_to_copy,
  866. #endif
  867. NULL,
  868. };
  869. void board_init_f(ulong boot_flags)
  870. {
  871. gd->flags = boot_flags;
  872. gd->have_console = 0;
  873. if (initcall_run_list(init_sequence_f))
  874. hang();
  875. #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
  876. !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64) && \
  877. !defined(CONFIG_ARC)
  878. /* NOTREACHED - jump_to_copy() does not return */
  879. hang();
  880. #endif
  881. }
  882. #if defined(CONFIG_X86) || defined(CONFIG_ARC)
  883. /*
  884. * For now this code is only used on x86.
  885. *
  886. * init_sequence_f_r is the list of init functions which are run when
  887. * U-Boot is executing from Flash with a semi-limited 'C' environment.
  888. * The following limitations must be considered when implementing an
  889. * '_f_r' function:
  890. * - 'static' variables are read-only
  891. * - Global Data (gd->xxx) is read/write
  892. *
  893. * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
  894. * supported). It _should_, if possible, copy global data to RAM and
  895. * initialise the CPU caches (to speed up the relocation process)
  896. *
  897. * NOTE: At present only x86 uses this route, but it is intended that
  898. * all archs will move to this when generic relocation is implemented.
  899. */
  900. static const init_fnc_t init_sequence_f_r[] = {
  901. #if !CONFIG_IS_ENABLED(X86_64)
  902. init_cache_f_r,
  903. #endif
  904. NULL,
  905. };
  906. void board_init_f_r(void)
  907. {
  908. if (initcall_run_list(init_sequence_f_r))
  909. hang();
  910. /*
  911. * The pre-relocation drivers may be using memory that has now gone
  912. * away. Mark serial as unavailable - this will fall back to the debug
  913. * UART if available.
  914. *
  915. * Do the same with log drivers since the memory may not be available.
  916. */
  917. gd->flags &= ~(GD_FLG_SERIAL_READY | GD_FLG_LOG_READY);
  918. #ifdef CONFIG_TIMER
  919. gd->timer = NULL;
  920. #endif
  921. /*
  922. * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
  923. * Transfer execution from Flash to RAM by calculating the address
  924. * of the in-RAM copy of board_init_r() and calling it
  925. */
  926. (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
  927. /* NOTREACHED - board_init_r() does not return */
  928. hang();
  929. }
  930. #endif /* CONFIG_X86 */