fdtdec.c 36 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (c) 2011 The Chromium OS Authors.
  4. */
  5. #ifndef USE_HOSTCC
  6. #include <common.h>
  7. #include <boot_fit.h>
  8. #include <dm.h>
  9. #include <dm/of_extra.h>
  10. #include <errno.h>
  11. #include <fdtdec.h>
  12. #include <fdt_support.h>
  13. #include <linux/libfdt.h>
  14. #include <serial.h>
  15. #include <asm/sections.h>
  16. #include <linux/ctype.h>
  17. #include <linux/lzo.h>
  18. DECLARE_GLOBAL_DATA_PTR;
  19. /*
  20. * Here are the type we know about. One day we might allow drivers to
  21. * register. For now we just put them here. The COMPAT macro allows us to
  22. * turn this into a sparse list later, and keeps the ID with the name.
  23. *
  24. * NOTE: This list is basically a TODO list for things that need to be
  25. * converted to driver model. So don't add new things here unless there is a
  26. * good reason why driver-model conversion is infeasible. Examples include
  27. * things which are used before driver model is available.
  28. */
  29. #define COMPAT(id, name) name
  30. static const char * const compat_names[COMPAT_COUNT] = {
  31. COMPAT(UNKNOWN, "<none>"),
  32. COMPAT(NVIDIA_TEGRA20_EMC, "nvidia,tegra20-emc"),
  33. COMPAT(NVIDIA_TEGRA20_EMC_TABLE, "nvidia,tegra20-emc-table"),
  34. COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"),
  35. COMPAT(NVIDIA_TEGRA124_XUSB_PADCTL, "nvidia,tegra124-xusb-padctl"),
  36. COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL, "nvidia,tegra210-xusb-padctl"),
  37. COMPAT(SMSC_LAN9215, "smsc,lan9215"),
  38. COMPAT(SAMSUNG_EXYNOS5_SROMC, "samsung,exynos-sromc"),
  39. COMPAT(SAMSUNG_S3C2440_I2C, "samsung,s3c2440-i2c"),
  40. COMPAT(SAMSUNG_EXYNOS5_SOUND, "samsung,exynos-sound"),
  41. COMPAT(WOLFSON_WM8994_CODEC, "wolfson,wm8994-codec"),
  42. COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"),
  43. COMPAT(SAMSUNG_EXYNOS5_USB3_PHY, "samsung,exynos5250-usb3-phy"),
  44. COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"),
  45. COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"),
  46. COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"),
  47. COMPAT(SAMSUNG_EXYNOS_MMC, "samsung,exynos-mmc"),
  48. COMPAT(GENERIC_SPI_FLASH, "spi-flash"),
  49. COMPAT(MAXIM_98095_CODEC, "maxim,max98095-codec"),
  50. COMPAT(SAMSUNG_EXYNOS5_I2C, "samsung,exynos5-hsi2c"),
  51. COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"),
  52. COMPAT(INTEL_MICROCODE, "intel,microcode"),
  53. COMPAT(AMS_AS3722, "ams,as3722"),
  54. COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"),
  55. COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"),
  56. COMPAT(ALTERA_SOCFPGA_DWMMC, "altr,socfpga-dw-mshc"),
  57. COMPAT(ALTERA_SOCFPGA_DWC2USB, "snps,dwc2"),
  58. COMPAT(INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"),
  59. COMPAT(INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"),
  60. COMPAT(INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"),
  61. COMPAT(COMPAT_SUNXI_NAND, "allwinner,sun4i-a10-nand"),
  62. COMPAT(ALTERA_SOCFPGA_CLK, "altr,clk-mgr"),
  63. COMPAT(ALTERA_SOCFPGA_PINCTRL_SINGLE, "pinctrl-single"),
  64. COMPAT(ALTERA_SOCFPGA_H2F_BRG, "altr,socfpga-hps2fpga-bridge"),
  65. COMPAT(ALTERA_SOCFPGA_LWH2F_BRG, "altr,socfpga-lwhps2fpga-bridge"),
  66. COMPAT(ALTERA_SOCFPGA_F2H_BRG, "altr,socfpga-fpga2hps-bridge"),
  67. COMPAT(ALTERA_SOCFPGA_F2SDR0, "altr,socfpga-fpga2sdram0-bridge"),
  68. COMPAT(ALTERA_SOCFPGA_F2SDR1, "altr,socfpga-fpga2sdram1-bridge"),
  69. COMPAT(ALTERA_SOCFPGA_F2SDR2, "altr,socfpga-fpga2sdram2-bridge"),
  70. COMPAT(ALTERA_SOCFPGA_FPGA0, "altr,socfpga-a10-fpga-mgr"),
  71. COMPAT(ALTERA_SOCFPGA_NOC, "altr,socfpga-a10-noc"),
  72. COMPAT(ALTERA_SOCFPGA_CLK_INIT, "altr,socfpga-a10-clk-init")
  73. };
  74. const char *fdtdec_get_compatible(enum fdt_compat_id id)
  75. {
  76. /* We allow reading of the 'unknown' ID for testing purposes */
  77. assert(id >= 0 && id < COMPAT_COUNT);
  78. return compat_names[id];
  79. }
  80. fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int node,
  81. const char *prop_name, int index, int na,
  82. int ns, fdt_size_t *sizep,
  83. bool translate)
  84. {
  85. const fdt32_t *prop, *prop_end;
  86. const fdt32_t *prop_addr, *prop_size, *prop_after_size;
  87. int len;
  88. fdt_addr_t addr;
  89. debug("%s: %s: ", __func__, prop_name);
  90. if (na > (sizeof(fdt_addr_t) / sizeof(fdt32_t))) {
  91. debug("(na too large for fdt_addr_t type)\n");
  92. return FDT_ADDR_T_NONE;
  93. }
  94. if (ns > (sizeof(fdt_size_t) / sizeof(fdt32_t))) {
  95. debug("(ns too large for fdt_size_t type)\n");
  96. return FDT_ADDR_T_NONE;
  97. }
  98. prop = fdt_getprop(blob, node, prop_name, &len);
  99. if (!prop) {
  100. debug("(not found)\n");
  101. return FDT_ADDR_T_NONE;
  102. }
  103. prop_end = prop + (len / sizeof(*prop));
  104. prop_addr = prop + (index * (na + ns));
  105. prop_size = prop_addr + na;
  106. prop_after_size = prop_size + ns;
  107. if (prop_after_size > prop_end) {
  108. debug("(not enough data: expected >= %d cells, got %d cells)\n",
  109. (u32)(prop_after_size - prop), ((u32)(prop_end - prop)));
  110. return FDT_ADDR_T_NONE;
  111. }
  112. #if CONFIG_IS_ENABLED(OF_TRANSLATE)
  113. if (translate)
  114. addr = fdt_translate_address(blob, node, prop_addr);
  115. else
  116. #endif
  117. addr = fdtdec_get_number(prop_addr, na);
  118. if (sizep) {
  119. *sizep = fdtdec_get_number(prop_size, ns);
  120. debug("addr=%08llx, size=%llx\n", (unsigned long long)addr,
  121. (unsigned long long)*sizep);
  122. } else {
  123. debug("addr=%08llx\n", (unsigned long long)addr);
  124. }
  125. return addr;
  126. }
  127. fdt_addr_t fdtdec_get_addr_size_auto_parent(const void *blob, int parent,
  128. int node, const char *prop_name,
  129. int index, fdt_size_t *sizep,
  130. bool translate)
  131. {
  132. int na, ns;
  133. debug("%s: ", __func__);
  134. na = fdt_address_cells(blob, parent);
  135. if (na < 1) {
  136. debug("(bad #address-cells)\n");
  137. return FDT_ADDR_T_NONE;
  138. }
  139. ns = fdt_size_cells(blob, parent);
  140. if (ns < 0) {
  141. debug("(bad #size-cells)\n");
  142. return FDT_ADDR_T_NONE;
  143. }
  144. debug("na=%d, ns=%d, ", na, ns);
  145. return fdtdec_get_addr_size_fixed(blob, node, prop_name, index, na,
  146. ns, sizep, translate);
  147. }
  148. fdt_addr_t fdtdec_get_addr_size_auto_noparent(const void *blob, int node,
  149. const char *prop_name, int index,
  150. fdt_size_t *sizep,
  151. bool translate)
  152. {
  153. int parent;
  154. debug("%s: ", __func__);
  155. parent = fdt_parent_offset(blob, node);
  156. if (parent < 0) {
  157. debug("(no parent found)\n");
  158. return FDT_ADDR_T_NONE;
  159. }
  160. return fdtdec_get_addr_size_auto_parent(blob, parent, node, prop_name,
  161. index, sizep, translate);
  162. }
  163. fdt_addr_t fdtdec_get_addr_size(const void *blob, int node,
  164. const char *prop_name, fdt_size_t *sizep)
  165. {
  166. int ns = sizep ? (sizeof(fdt_size_t) / sizeof(fdt32_t)) : 0;
  167. return fdtdec_get_addr_size_fixed(blob, node, prop_name, 0,
  168. sizeof(fdt_addr_t) / sizeof(fdt32_t),
  169. ns, sizep, false);
  170. }
  171. fdt_addr_t fdtdec_get_addr(const void *blob, int node, const char *prop_name)
  172. {
  173. return fdtdec_get_addr_size(blob, node, prop_name, NULL);
  174. }
  175. #if defined(CONFIG_PCI) && defined(CONFIG_DM_PCI)
  176. int fdtdec_get_pci_addr(const void *blob, int node, enum fdt_pci_space type,
  177. const char *prop_name, struct fdt_pci_addr *addr)
  178. {
  179. const u32 *cell;
  180. int len;
  181. int ret = -ENOENT;
  182. debug("%s: %s: ", __func__, prop_name);
  183. /*
  184. * If we follow the pci bus bindings strictly, we should check
  185. * the value of the node's parent node's #address-cells and
  186. * #size-cells. They need to be 3 and 2 accordingly. However,
  187. * for simplicity we skip the check here.
  188. */
  189. cell = fdt_getprop(blob, node, prop_name, &len);
  190. if (!cell)
  191. goto fail;
  192. if ((len % FDT_PCI_REG_SIZE) == 0) {
  193. int num = len / FDT_PCI_REG_SIZE;
  194. int i;
  195. for (i = 0; i < num; i++) {
  196. debug("pci address #%d: %08lx %08lx %08lx\n", i,
  197. (ulong)fdt32_to_cpu(cell[0]),
  198. (ulong)fdt32_to_cpu(cell[1]),
  199. (ulong)fdt32_to_cpu(cell[2]));
  200. if ((fdt32_to_cpu(*cell) & type) == type) {
  201. addr->phys_hi = fdt32_to_cpu(cell[0]);
  202. addr->phys_mid = fdt32_to_cpu(cell[1]);
  203. addr->phys_lo = fdt32_to_cpu(cell[1]);
  204. break;
  205. }
  206. cell += (FDT_PCI_ADDR_CELLS +
  207. FDT_PCI_SIZE_CELLS);
  208. }
  209. if (i == num) {
  210. ret = -ENXIO;
  211. goto fail;
  212. }
  213. return 0;
  214. }
  215. ret = -EINVAL;
  216. fail:
  217. debug("(not found)\n");
  218. return ret;
  219. }
  220. int fdtdec_get_pci_vendev(const void *blob, int node, u16 *vendor, u16 *device)
  221. {
  222. const char *list, *end;
  223. int len;
  224. list = fdt_getprop(blob, node, "compatible", &len);
  225. if (!list)
  226. return -ENOENT;
  227. end = list + len;
  228. while (list < end) {
  229. len = strlen(list);
  230. if (len >= strlen("pciVVVV,DDDD")) {
  231. char *s = strstr(list, "pci");
  232. /*
  233. * check if the string is something like pciVVVV,DDDD.RR
  234. * or just pciVVVV,DDDD
  235. */
  236. if (s && s[7] == ',' &&
  237. (s[12] == '.' || s[12] == 0)) {
  238. s += 3;
  239. *vendor = simple_strtol(s, NULL, 16);
  240. s += 5;
  241. *device = simple_strtol(s, NULL, 16);
  242. return 0;
  243. }
  244. }
  245. list += (len + 1);
  246. }
  247. return -ENOENT;
  248. }
  249. int fdtdec_get_pci_bar32(struct udevice *dev, struct fdt_pci_addr *addr,
  250. u32 *bar)
  251. {
  252. int barnum;
  253. /* extract the bar number from fdt_pci_addr */
  254. barnum = addr->phys_hi & 0xff;
  255. if (barnum < PCI_BASE_ADDRESS_0 || barnum > PCI_CARDBUS_CIS)
  256. return -EINVAL;
  257. barnum = (barnum - PCI_BASE_ADDRESS_0) / 4;
  258. *bar = dm_pci_read_bar32(dev, barnum);
  259. return 0;
  260. }
  261. #endif
  262. uint64_t fdtdec_get_uint64(const void *blob, int node, const char *prop_name,
  263. uint64_t default_val)
  264. {
  265. const uint64_t *cell64;
  266. int length;
  267. cell64 = fdt_getprop(blob, node, prop_name, &length);
  268. if (!cell64 || length < sizeof(*cell64))
  269. return default_val;
  270. return fdt64_to_cpu(*cell64);
  271. }
  272. int fdtdec_get_is_enabled(const void *blob, int node)
  273. {
  274. const char *cell;
  275. /*
  276. * It should say "okay", so only allow that. Some fdts use "ok" but
  277. * this is a bug. Please fix your device tree source file. See here
  278. * for discussion:
  279. *
  280. * http://www.mail-archive.com/u-boot@lists.denx.de/msg71598.html
  281. */
  282. cell = fdt_getprop(blob, node, "status", NULL);
  283. if (cell)
  284. return strcmp(cell, "okay") == 0;
  285. return 1;
  286. }
  287. enum fdt_compat_id fdtdec_lookup(const void *blob, int node)
  288. {
  289. enum fdt_compat_id id;
  290. /* Search our drivers */
  291. for (id = COMPAT_UNKNOWN; id < COMPAT_COUNT; id++)
  292. if (fdt_node_check_compatible(blob, node,
  293. compat_names[id]) == 0)
  294. return id;
  295. return COMPAT_UNKNOWN;
  296. }
  297. int fdtdec_next_compatible(const void *blob, int node, enum fdt_compat_id id)
  298. {
  299. return fdt_node_offset_by_compatible(blob, node, compat_names[id]);
  300. }
  301. int fdtdec_next_compatible_subnode(const void *blob, int node,
  302. enum fdt_compat_id id, int *depthp)
  303. {
  304. do {
  305. node = fdt_next_node(blob, node, depthp);
  306. } while (*depthp > 1);
  307. /* If this is a direct subnode, and compatible, return it */
  308. if (*depthp == 1 && 0 == fdt_node_check_compatible(
  309. blob, node, compat_names[id]))
  310. return node;
  311. return -FDT_ERR_NOTFOUND;
  312. }
  313. int fdtdec_next_alias(const void *blob, const char *name, enum fdt_compat_id id,
  314. int *upto)
  315. {
  316. #define MAX_STR_LEN 20
  317. char str[MAX_STR_LEN + 20];
  318. int node, err;
  319. /* snprintf() is not available */
  320. assert(strlen(name) < MAX_STR_LEN);
  321. sprintf(str, "%.*s%d", MAX_STR_LEN, name, *upto);
  322. node = fdt_path_offset(blob, str);
  323. if (node < 0)
  324. return node;
  325. err = fdt_node_check_compatible(blob, node, compat_names[id]);
  326. if (err < 0)
  327. return err;
  328. if (err)
  329. return -FDT_ERR_NOTFOUND;
  330. (*upto)++;
  331. return node;
  332. }
  333. int fdtdec_find_aliases_for_id(const void *blob, const char *name,
  334. enum fdt_compat_id id, int *node_list,
  335. int maxcount)
  336. {
  337. memset(node_list, '\0', sizeof(*node_list) * maxcount);
  338. return fdtdec_add_aliases_for_id(blob, name, id, node_list, maxcount);
  339. }
  340. /* TODO: Can we tighten this code up a little? */
  341. int fdtdec_add_aliases_for_id(const void *blob, const char *name,
  342. enum fdt_compat_id id, int *node_list,
  343. int maxcount)
  344. {
  345. int name_len = strlen(name);
  346. int nodes[maxcount];
  347. int num_found = 0;
  348. int offset, node;
  349. int alias_node;
  350. int count;
  351. int i, j;
  352. /* find the alias node if present */
  353. alias_node = fdt_path_offset(blob, "/aliases");
  354. /*
  355. * start with nothing, and we can assume that the root node can't
  356. * match
  357. */
  358. memset(nodes, '\0', sizeof(nodes));
  359. /* First find all the compatible nodes */
  360. for (node = count = 0; node >= 0 && count < maxcount;) {
  361. node = fdtdec_next_compatible(blob, node, id);
  362. if (node >= 0)
  363. nodes[count++] = node;
  364. }
  365. if (node >= 0)
  366. debug("%s: warning: maxcount exceeded with alias '%s'\n",
  367. __func__, name);
  368. /* Now find all the aliases */
  369. for (offset = fdt_first_property_offset(blob, alias_node);
  370. offset > 0;
  371. offset = fdt_next_property_offset(blob, offset)) {
  372. const struct fdt_property *prop;
  373. const char *path;
  374. int number;
  375. int found;
  376. node = 0;
  377. prop = fdt_get_property_by_offset(blob, offset, NULL);
  378. path = fdt_string(blob, fdt32_to_cpu(prop->nameoff));
  379. if (prop->len && 0 == strncmp(path, name, name_len))
  380. node = fdt_path_offset(blob, prop->data);
  381. if (node <= 0)
  382. continue;
  383. /* Get the alias number */
  384. number = simple_strtoul(path + name_len, NULL, 10);
  385. if (number < 0 || number >= maxcount) {
  386. debug("%s: warning: alias '%s' is out of range\n",
  387. __func__, path);
  388. continue;
  389. }
  390. /* Make sure the node we found is actually in our list! */
  391. found = -1;
  392. for (j = 0; j < count; j++)
  393. if (nodes[j] == node) {
  394. found = j;
  395. break;
  396. }
  397. if (found == -1) {
  398. debug("%s: warning: alias '%s' points to a node "
  399. "'%s' that is missing or is not compatible "
  400. " with '%s'\n", __func__, path,
  401. fdt_get_name(blob, node, NULL),
  402. compat_names[id]);
  403. continue;
  404. }
  405. /*
  406. * Add this node to our list in the right place, and mark
  407. * it as done.
  408. */
  409. if (fdtdec_get_is_enabled(blob, node)) {
  410. if (node_list[number]) {
  411. debug("%s: warning: alias '%s' requires that "
  412. "a node be placed in the list in a "
  413. "position which is already filled by "
  414. "node '%s'\n", __func__, path,
  415. fdt_get_name(blob, node, NULL));
  416. continue;
  417. }
  418. node_list[number] = node;
  419. if (number >= num_found)
  420. num_found = number + 1;
  421. }
  422. nodes[found] = 0;
  423. }
  424. /* Add any nodes not mentioned by an alias */
  425. for (i = j = 0; i < maxcount; i++) {
  426. if (!node_list[i]) {
  427. for (; j < maxcount; j++)
  428. if (nodes[j] &&
  429. fdtdec_get_is_enabled(blob, nodes[j]))
  430. break;
  431. /* Have we run out of nodes to add? */
  432. if (j == maxcount)
  433. break;
  434. assert(!node_list[i]);
  435. node_list[i] = nodes[j++];
  436. if (i >= num_found)
  437. num_found = i + 1;
  438. }
  439. }
  440. return num_found;
  441. }
  442. int fdtdec_get_alias_seq(const void *blob, const char *base, int offset,
  443. int *seqp)
  444. {
  445. int base_len = strlen(base);
  446. const char *find_name;
  447. int find_namelen;
  448. int prop_offset;
  449. int aliases;
  450. find_name = fdt_get_name(blob, offset, &find_namelen);
  451. debug("Looking for '%s' at %d, name %s\n", base, offset, find_name);
  452. aliases = fdt_path_offset(blob, "/aliases");
  453. for (prop_offset = fdt_first_property_offset(blob, aliases);
  454. prop_offset > 0;
  455. prop_offset = fdt_next_property_offset(blob, prop_offset)) {
  456. const char *prop;
  457. const char *name;
  458. const char *slash;
  459. int len, val;
  460. prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
  461. debug(" - %s, %s\n", name, prop);
  462. if (len < find_namelen || *prop != '/' || prop[len - 1] ||
  463. strncmp(name, base, base_len))
  464. continue;
  465. slash = strrchr(prop, '/');
  466. if (strcmp(slash + 1, find_name))
  467. continue;
  468. val = trailing_strtol(name);
  469. if (val != -1) {
  470. *seqp = val;
  471. debug("Found seq %d\n", *seqp);
  472. return 0;
  473. }
  474. }
  475. debug("Not found\n");
  476. return -ENOENT;
  477. }
  478. const char *fdtdec_get_chosen_prop(const void *blob, const char *name)
  479. {
  480. int chosen_node;
  481. if (!blob)
  482. return NULL;
  483. chosen_node = fdt_path_offset(blob, "/chosen");
  484. return fdt_getprop(blob, chosen_node, name, NULL);
  485. }
  486. int fdtdec_get_chosen_node(const void *blob, const char *name)
  487. {
  488. const char *prop;
  489. prop = fdtdec_get_chosen_prop(blob, name);
  490. if (!prop)
  491. return -FDT_ERR_NOTFOUND;
  492. return fdt_path_offset(blob, prop);
  493. }
  494. int fdtdec_check_fdt(void)
  495. {
  496. /*
  497. * We must have an FDT, but we cannot panic() yet since the console
  498. * is not ready. So for now, just assert(). Boards which need an early
  499. * FDT (prior to console ready) will need to make their own
  500. * arrangements and do their own checks.
  501. */
  502. assert(!fdtdec_prepare_fdt());
  503. return 0;
  504. }
  505. /*
  506. * This function is a little odd in that it accesses global data. At some
  507. * point if the architecture board.c files merge this will make more sense.
  508. * Even now, it is common code.
  509. */
  510. int fdtdec_prepare_fdt(void)
  511. {
  512. if (!gd->fdt_blob || ((uintptr_t)gd->fdt_blob & 3) ||
  513. fdt_check_header(gd->fdt_blob)) {
  514. #ifdef CONFIG_SPL_BUILD
  515. puts("Missing DTB\n");
  516. #else
  517. puts("No valid device tree binary found - please append one to U-Boot binary, use u-boot-dtb.bin or define CONFIG_OF_EMBED. For sandbox, use -d <file.dtb>\n");
  518. # ifdef DEBUG
  519. if (gd->fdt_blob) {
  520. printf("fdt_blob=%p\n", gd->fdt_blob);
  521. print_buffer((ulong)gd->fdt_blob, gd->fdt_blob, 4,
  522. 32, 0);
  523. }
  524. # endif
  525. #endif
  526. return -1;
  527. }
  528. return 0;
  529. }
  530. int fdtdec_lookup_phandle(const void *blob, int node, const char *prop_name)
  531. {
  532. const u32 *phandle;
  533. int lookup;
  534. debug("%s: %s\n", __func__, prop_name);
  535. phandle = fdt_getprop(blob, node, prop_name, NULL);
  536. if (!phandle)
  537. return -FDT_ERR_NOTFOUND;
  538. lookup = fdt_node_offset_by_phandle(blob, fdt32_to_cpu(*phandle));
  539. return lookup;
  540. }
  541. /**
  542. * Look up a property in a node and check that it has a minimum length.
  543. *
  544. * @param blob FDT blob
  545. * @param node node to examine
  546. * @param prop_name name of property to find
  547. * @param min_len minimum property length in bytes
  548. * @param err 0 if ok, or -FDT_ERR_NOTFOUND if the property is not
  549. found, or -FDT_ERR_BADLAYOUT if not enough data
  550. * @return pointer to cell, which is only valid if err == 0
  551. */
  552. static const void *get_prop_check_min_len(const void *blob, int node,
  553. const char *prop_name, int min_len,
  554. int *err)
  555. {
  556. const void *cell;
  557. int len;
  558. debug("%s: %s\n", __func__, prop_name);
  559. cell = fdt_getprop(blob, node, prop_name, &len);
  560. if (!cell)
  561. *err = -FDT_ERR_NOTFOUND;
  562. else if (len < min_len)
  563. *err = -FDT_ERR_BADLAYOUT;
  564. else
  565. *err = 0;
  566. return cell;
  567. }
  568. int fdtdec_get_int_array(const void *blob, int node, const char *prop_name,
  569. u32 *array, int count)
  570. {
  571. const u32 *cell;
  572. int err = 0;
  573. debug("%s: %s\n", __func__, prop_name);
  574. cell = get_prop_check_min_len(blob, node, prop_name,
  575. sizeof(u32) * count, &err);
  576. if (!err) {
  577. int i;
  578. for (i = 0; i < count; i++)
  579. array[i] = fdt32_to_cpu(cell[i]);
  580. }
  581. return err;
  582. }
  583. int fdtdec_get_int_array_count(const void *blob, int node,
  584. const char *prop_name, u32 *array, int count)
  585. {
  586. const u32 *cell;
  587. int len, elems;
  588. int i;
  589. debug("%s: %s\n", __func__, prop_name);
  590. cell = fdt_getprop(blob, node, prop_name, &len);
  591. if (!cell)
  592. return -FDT_ERR_NOTFOUND;
  593. elems = len / sizeof(u32);
  594. if (count > elems)
  595. count = elems;
  596. for (i = 0; i < count; i++)
  597. array[i] = fdt32_to_cpu(cell[i]);
  598. return count;
  599. }
  600. const u32 *fdtdec_locate_array(const void *blob, int node,
  601. const char *prop_name, int count)
  602. {
  603. const u32 *cell;
  604. int err;
  605. cell = get_prop_check_min_len(blob, node, prop_name,
  606. sizeof(u32) * count, &err);
  607. return err ? NULL : cell;
  608. }
  609. int fdtdec_get_bool(const void *blob, int node, const char *prop_name)
  610. {
  611. const s32 *cell;
  612. int len;
  613. debug("%s: %s\n", __func__, prop_name);
  614. cell = fdt_getprop(blob, node, prop_name, &len);
  615. return cell != NULL;
  616. }
  617. int fdtdec_parse_phandle_with_args(const void *blob, int src_node,
  618. const char *list_name,
  619. const char *cells_name,
  620. int cell_count, int index,
  621. struct fdtdec_phandle_args *out_args)
  622. {
  623. const __be32 *list, *list_end;
  624. int rc = 0, size, cur_index = 0;
  625. uint32_t count = 0;
  626. int node = -1;
  627. int phandle;
  628. /* Retrieve the phandle list property */
  629. list = fdt_getprop(blob, src_node, list_name, &size);
  630. if (!list)
  631. return -ENOENT;
  632. list_end = list + size / sizeof(*list);
  633. /* Loop over the phandles until all the requested entry is found */
  634. while (list < list_end) {
  635. rc = -EINVAL;
  636. count = 0;
  637. /*
  638. * If phandle is 0, then it is an empty entry with no
  639. * arguments. Skip forward to the next entry.
  640. */
  641. phandle = be32_to_cpup(list++);
  642. if (phandle) {
  643. /*
  644. * Find the provider node and parse the #*-cells
  645. * property to determine the argument length.
  646. *
  647. * This is not needed if the cell count is hard-coded
  648. * (i.e. cells_name not set, but cell_count is set),
  649. * except when we're going to return the found node
  650. * below.
  651. */
  652. if (cells_name || cur_index == index) {
  653. node = fdt_node_offset_by_phandle(blob,
  654. phandle);
  655. if (!node) {
  656. debug("%s: could not find phandle\n",
  657. fdt_get_name(blob, src_node,
  658. NULL));
  659. goto err;
  660. }
  661. }
  662. if (cells_name) {
  663. count = fdtdec_get_int(blob, node, cells_name,
  664. -1);
  665. if (count == -1) {
  666. debug("%s: could not get %s for %s\n",
  667. fdt_get_name(blob, src_node,
  668. NULL),
  669. cells_name,
  670. fdt_get_name(blob, node,
  671. NULL));
  672. goto err;
  673. }
  674. } else {
  675. count = cell_count;
  676. }
  677. /*
  678. * Make sure that the arguments actually fit in the
  679. * remaining property data length
  680. */
  681. if (list + count > list_end) {
  682. debug("%s: arguments longer than property\n",
  683. fdt_get_name(blob, src_node, NULL));
  684. goto err;
  685. }
  686. }
  687. /*
  688. * All of the error cases above bail out of the loop, so at
  689. * this point, the parsing is successful. If the requested
  690. * index matches, then fill the out_args structure and return,
  691. * or return -ENOENT for an empty entry.
  692. */
  693. rc = -ENOENT;
  694. if (cur_index == index) {
  695. if (!phandle)
  696. goto err;
  697. if (out_args) {
  698. int i;
  699. if (count > MAX_PHANDLE_ARGS) {
  700. debug("%s: too many arguments %d\n",
  701. fdt_get_name(blob, src_node,
  702. NULL), count);
  703. count = MAX_PHANDLE_ARGS;
  704. }
  705. out_args->node = node;
  706. out_args->args_count = count;
  707. for (i = 0; i < count; i++) {
  708. out_args->args[i] =
  709. be32_to_cpup(list++);
  710. }
  711. }
  712. /* Found it! return success */
  713. return 0;
  714. }
  715. node = -1;
  716. list += count;
  717. cur_index++;
  718. }
  719. /*
  720. * Result will be one of:
  721. * -ENOENT : index is for empty phandle
  722. * -EINVAL : parsing error on data
  723. * [1..n] : Number of phandle (count mode; when index = -1)
  724. */
  725. rc = index < 0 ? cur_index : -ENOENT;
  726. err:
  727. return rc;
  728. }
  729. int fdtdec_get_child_count(const void *blob, int node)
  730. {
  731. int subnode;
  732. int num = 0;
  733. fdt_for_each_subnode(subnode, blob, node)
  734. num++;
  735. return num;
  736. }
  737. int fdtdec_get_byte_array(const void *blob, int node, const char *prop_name,
  738. u8 *array, int count)
  739. {
  740. const u8 *cell;
  741. int err;
  742. cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
  743. if (!err)
  744. memcpy(array, cell, count);
  745. return err;
  746. }
  747. const u8 *fdtdec_locate_byte_array(const void *blob, int node,
  748. const char *prop_name, int count)
  749. {
  750. const u8 *cell;
  751. int err;
  752. cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
  753. if (err)
  754. return NULL;
  755. return cell;
  756. }
  757. int fdtdec_get_config_int(const void *blob, const char *prop_name,
  758. int default_val)
  759. {
  760. int config_node;
  761. debug("%s: %s\n", __func__, prop_name);
  762. config_node = fdt_path_offset(blob, "/config");
  763. if (config_node < 0)
  764. return default_val;
  765. return fdtdec_get_int(blob, config_node, prop_name, default_val);
  766. }
  767. int fdtdec_get_config_bool(const void *blob, const char *prop_name)
  768. {
  769. int config_node;
  770. const void *prop;
  771. debug("%s: %s\n", __func__, prop_name);
  772. config_node = fdt_path_offset(blob, "/config");
  773. if (config_node < 0)
  774. return 0;
  775. prop = fdt_get_property(blob, config_node, prop_name, NULL);
  776. return prop != NULL;
  777. }
  778. char *fdtdec_get_config_string(const void *blob, const char *prop_name)
  779. {
  780. const char *nodep;
  781. int nodeoffset;
  782. int len;
  783. debug("%s: %s\n", __func__, prop_name);
  784. nodeoffset = fdt_path_offset(blob, "/config");
  785. if (nodeoffset < 0)
  786. return NULL;
  787. nodep = fdt_getprop(blob, nodeoffset, prop_name, &len);
  788. if (!nodep)
  789. return NULL;
  790. return (char *)nodep;
  791. }
  792. int fdtdec_decode_region(const void *blob, int node, const char *prop_name,
  793. fdt_addr_t *basep, fdt_size_t *sizep)
  794. {
  795. const fdt_addr_t *cell;
  796. int len;
  797. debug("%s: %s: %s\n", __func__, fdt_get_name(blob, node, NULL),
  798. prop_name);
  799. cell = fdt_getprop(blob, node, prop_name, &len);
  800. if (!cell || (len < sizeof(fdt_addr_t) * 2)) {
  801. debug("cell=%p, len=%d\n", cell, len);
  802. return -1;
  803. }
  804. *basep = fdt_addr_to_cpu(*cell);
  805. *sizep = fdt_size_to_cpu(cell[1]);
  806. debug("%s: base=%08lx, size=%lx\n", __func__, (ulong)*basep,
  807. (ulong)*sizep);
  808. return 0;
  809. }
  810. u64 fdtdec_get_number(const fdt32_t *ptr, unsigned int cells)
  811. {
  812. u64 number = 0;
  813. while (cells--)
  814. number = (number << 32) | fdt32_to_cpu(*ptr++);
  815. return number;
  816. }
  817. int fdt_get_resource(const void *fdt, int node, const char *property,
  818. unsigned int index, struct fdt_resource *res)
  819. {
  820. const fdt32_t *ptr, *end;
  821. int na, ns, len, parent;
  822. unsigned int i = 0;
  823. parent = fdt_parent_offset(fdt, node);
  824. if (parent < 0)
  825. return parent;
  826. na = fdt_address_cells(fdt, parent);
  827. ns = fdt_size_cells(fdt, parent);
  828. ptr = fdt_getprop(fdt, node, property, &len);
  829. if (!ptr)
  830. return len;
  831. end = ptr + len / sizeof(*ptr);
  832. while (ptr + na + ns <= end) {
  833. if (i == index) {
  834. res->start = fdtdec_get_number(ptr, na);
  835. res->end = res->start;
  836. res->end += fdtdec_get_number(&ptr[na], ns) - 1;
  837. return 0;
  838. }
  839. ptr += na + ns;
  840. i++;
  841. }
  842. return -FDT_ERR_NOTFOUND;
  843. }
  844. int fdt_get_named_resource(const void *fdt, int node, const char *property,
  845. const char *prop_names, const char *name,
  846. struct fdt_resource *res)
  847. {
  848. int index;
  849. index = fdt_stringlist_search(fdt, node, prop_names, name);
  850. if (index < 0)
  851. return index;
  852. return fdt_get_resource(fdt, node, property, index, res);
  853. }
  854. int fdtdec_decode_memory_region(const void *blob, int config_node,
  855. const char *mem_type, const char *suffix,
  856. fdt_addr_t *basep, fdt_size_t *sizep)
  857. {
  858. char prop_name[50];
  859. const char *mem;
  860. fdt_size_t size, offset_size;
  861. fdt_addr_t base, offset;
  862. int node;
  863. if (config_node == -1) {
  864. config_node = fdt_path_offset(blob, "/config");
  865. if (config_node < 0) {
  866. debug("%s: Cannot find /config node\n", __func__);
  867. return -ENOENT;
  868. }
  869. }
  870. if (!suffix)
  871. suffix = "";
  872. snprintf(prop_name, sizeof(prop_name), "%s-memory%s", mem_type,
  873. suffix);
  874. mem = fdt_getprop(blob, config_node, prop_name, NULL);
  875. if (!mem) {
  876. debug("%s: No memory type for '%s', using /memory\n", __func__,
  877. prop_name);
  878. mem = "/memory";
  879. }
  880. node = fdt_path_offset(blob, mem);
  881. if (node < 0) {
  882. debug("%s: Failed to find node '%s': %s\n", __func__, mem,
  883. fdt_strerror(node));
  884. return -ENOENT;
  885. }
  886. /*
  887. * Not strictly correct - the memory may have multiple banks. We just
  888. * use the first
  889. */
  890. if (fdtdec_decode_region(blob, node, "reg", &base, &size)) {
  891. debug("%s: Failed to decode memory region %s\n", __func__,
  892. mem);
  893. return -EINVAL;
  894. }
  895. snprintf(prop_name, sizeof(prop_name), "%s-offset%s", mem_type,
  896. suffix);
  897. if (fdtdec_decode_region(blob, config_node, prop_name, &offset,
  898. &offset_size)) {
  899. debug("%s: Failed to decode memory region '%s'\n", __func__,
  900. prop_name);
  901. return -EINVAL;
  902. }
  903. *basep = base + offset;
  904. *sizep = offset_size;
  905. return 0;
  906. }
  907. static int decode_timing_property(const void *blob, int node, const char *name,
  908. struct timing_entry *result)
  909. {
  910. int length, ret = 0;
  911. const u32 *prop;
  912. prop = fdt_getprop(blob, node, name, &length);
  913. if (!prop) {
  914. debug("%s: could not find property %s\n",
  915. fdt_get_name(blob, node, NULL), name);
  916. return length;
  917. }
  918. if (length == sizeof(u32)) {
  919. result->typ = fdtdec_get_int(blob, node, name, 0);
  920. result->min = result->typ;
  921. result->max = result->typ;
  922. } else {
  923. ret = fdtdec_get_int_array(blob, node, name, &result->min, 3);
  924. }
  925. return ret;
  926. }
  927. int fdtdec_decode_display_timing(const void *blob, int parent, int index,
  928. struct display_timing *dt)
  929. {
  930. int i, node, timings_node;
  931. u32 val = 0;
  932. int ret = 0;
  933. timings_node = fdt_subnode_offset(blob, parent, "display-timings");
  934. if (timings_node < 0)
  935. return timings_node;
  936. for (i = 0, node = fdt_first_subnode(blob, timings_node);
  937. node > 0 && i != index;
  938. node = fdt_next_subnode(blob, node))
  939. i++;
  940. if (node < 0)
  941. return node;
  942. memset(dt, 0, sizeof(*dt));
  943. ret |= decode_timing_property(blob, node, "hback-porch",
  944. &dt->hback_porch);
  945. ret |= decode_timing_property(blob, node, "hfront-porch",
  946. &dt->hfront_porch);
  947. ret |= decode_timing_property(blob, node, "hactive", &dt->hactive);
  948. ret |= decode_timing_property(blob, node, "hsync-len", &dt->hsync_len);
  949. ret |= decode_timing_property(blob, node, "vback-porch",
  950. &dt->vback_porch);
  951. ret |= decode_timing_property(blob, node, "vfront-porch",
  952. &dt->vfront_porch);
  953. ret |= decode_timing_property(blob, node, "vactive", &dt->vactive);
  954. ret |= decode_timing_property(blob, node, "vsync-len", &dt->vsync_len);
  955. ret |= decode_timing_property(blob, node, "clock-frequency",
  956. &dt->pixelclock);
  957. dt->flags = 0;
  958. val = fdtdec_get_int(blob, node, "vsync-active", -1);
  959. if (val != -1) {
  960. dt->flags |= val ? DISPLAY_FLAGS_VSYNC_HIGH :
  961. DISPLAY_FLAGS_VSYNC_LOW;
  962. }
  963. val = fdtdec_get_int(blob, node, "hsync-active", -1);
  964. if (val != -1) {
  965. dt->flags |= val ? DISPLAY_FLAGS_HSYNC_HIGH :
  966. DISPLAY_FLAGS_HSYNC_LOW;
  967. }
  968. val = fdtdec_get_int(blob, node, "de-active", -1);
  969. if (val != -1) {
  970. dt->flags |= val ? DISPLAY_FLAGS_DE_HIGH :
  971. DISPLAY_FLAGS_DE_LOW;
  972. }
  973. val = fdtdec_get_int(blob, node, "pixelclk-active", -1);
  974. if (val != -1) {
  975. dt->flags |= val ? DISPLAY_FLAGS_PIXDATA_POSEDGE :
  976. DISPLAY_FLAGS_PIXDATA_NEGEDGE;
  977. }
  978. if (fdtdec_get_bool(blob, node, "interlaced"))
  979. dt->flags |= DISPLAY_FLAGS_INTERLACED;
  980. if (fdtdec_get_bool(blob, node, "doublescan"))
  981. dt->flags |= DISPLAY_FLAGS_DOUBLESCAN;
  982. if (fdtdec_get_bool(blob, node, "doubleclk"))
  983. dt->flags |= DISPLAY_FLAGS_DOUBLECLK;
  984. return ret;
  985. }
  986. int fdtdec_setup_mem_size_base(void)
  987. {
  988. int ret, mem;
  989. struct fdt_resource res;
  990. mem = fdt_path_offset(gd->fdt_blob, "/memory");
  991. if (mem < 0) {
  992. debug("%s: Missing /memory node\n", __func__);
  993. return -EINVAL;
  994. }
  995. ret = fdt_get_resource(gd->fdt_blob, mem, "reg", 0, &res);
  996. if (ret != 0) {
  997. debug("%s: Unable to decode first memory bank\n", __func__);
  998. return -EINVAL;
  999. }
  1000. gd->ram_size = (phys_size_t)(res.end - res.start + 1);
  1001. gd->ram_base = (unsigned long)res.start;
  1002. debug("%s: Initial DRAM size %llx\n", __func__,
  1003. (unsigned long long)gd->ram_size);
  1004. return 0;
  1005. }
  1006. #if defined(CONFIG_NR_DRAM_BANKS)
  1007. static int get_next_memory_node(const void *blob, int mem)
  1008. {
  1009. do {
  1010. mem = fdt_node_offset_by_prop_value(gd->fdt_blob, mem,
  1011. "device_type", "memory", 7);
  1012. } while (!fdtdec_get_is_enabled(blob, mem));
  1013. return mem;
  1014. }
  1015. int fdtdec_setup_memory_banksize(void)
  1016. {
  1017. int bank, ret, mem, reg = 0;
  1018. struct fdt_resource res;
  1019. mem = get_next_memory_node(gd->fdt_blob, -1);
  1020. if (mem < 0) {
  1021. debug("%s: Missing /memory node\n", __func__);
  1022. return -EINVAL;
  1023. }
  1024. for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
  1025. ret = fdt_get_resource(gd->fdt_blob, mem, "reg", reg++, &res);
  1026. if (ret == -FDT_ERR_NOTFOUND) {
  1027. reg = 0;
  1028. mem = get_next_memory_node(gd->fdt_blob, mem);
  1029. if (mem == -FDT_ERR_NOTFOUND)
  1030. break;
  1031. ret = fdt_get_resource(gd->fdt_blob, mem, "reg", reg++, &res);
  1032. if (ret == -FDT_ERR_NOTFOUND)
  1033. break;
  1034. }
  1035. if (ret != 0) {
  1036. return -EINVAL;
  1037. }
  1038. gd->bd->bi_dram[bank].start = (phys_addr_t)res.start;
  1039. gd->bd->bi_dram[bank].size =
  1040. (phys_size_t)(res.end - res.start + 1);
  1041. debug("%s: DRAM Bank #%d: start = 0x%llx, size = 0x%llx\n",
  1042. __func__, bank,
  1043. (unsigned long long)gd->bd->bi_dram[bank].start,
  1044. (unsigned long long)gd->bd->bi_dram[bank].size);
  1045. }
  1046. return 0;
  1047. }
  1048. #endif
  1049. #if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
  1050. # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_GZIP) ||\
  1051. CONFIG_IS_ENABLED(MULTI_DTB_FIT_LZO)
  1052. static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
  1053. {
  1054. size_t sz_out = CONFIG_SPL_MULTI_DTB_FIT_UNCOMPRESS_SZ;
  1055. ulong sz_in = sz_src;
  1056. void *dst;
  1057. int rc;
  1058. if (CONFIG_IS_ENABLED(GZIP))
  1059. if (gzip_parse_header(src, sz_in) < 0)
  1060. return -1;
  1061. if (CONFIG_IS_ENABLED(LZO))
  1062. if (!lzop_is_valid_header(src))
  1063. return -EBADMSG;
  1064. if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC)) {
  1065. dst = malloc(sz_out);
  1066. if (!dst) {
  1067. puts("uncompress_blob: Unable to allocate memory\n");
  1068. return -ENOMEM;
  1069. }
  1070. } else {
  1071. # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_USER_DEFINED_AREA)
  1072. dst = (void *)CONFIG_VAL(MULTI_DTB_FIT_USER_DEF_ADDR);
  1073. # else
  1074. return -ENOTSUPP;
  1075. # endif
  1076. }
  1077. if (CONFIG_IS_ENABLED(GZIP))
  1078. rc = gunzip(dst, sz_out, (u8 *)src, &sz_in);
  1079. else if (CONFIG_IS_ENABLED(LZO))
  1080. rc = lzop_decompress(src, sz_in, dst, &sz_out);
  1081. if (rc < 0) {
  1082. /* not a valid compressed blob */
  1083. puts("uncompress_blob: Unable to uncompress\n");
  1084. if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC))
  1085. free(dst);
  1086. return -EBADMSG;
  1087. }
  1088. *dstp = dst;
  1089. return 0;
  1090. }
  1091. # else
  1092. static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
  1093. {
  1094. return -ENOTSUPP;
  1095. }
  1096. # endif
  1097. #endif
  1098. #if defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
  1099. /*
  1100. * For CONFIG_OF_SEPARATE, the board may optionally implement this to
  1101. * provide and/or fixup the fdt.
  1102. */
  1103. __weak void *board_fdt_blob_setup(void)
  1104. {
  1105. void *fdt_blob = NULL;
  1106. #ifdef CONFIG_SPL_BUILD
  1107. /* FDT is at end of BSS unless it is in a different memory region */
  1108. if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS))
  1109. fdt_blob = (ulong *)&_image_binary_end;
  1110. else
  1111. fdt_blob = (ulong *)&__bss_end;
  1112. #else
  1113. /* FDT is at end of image */
  1114. fdt_blob = (ulong *)&_end;
  1115. #endif
  1116. return fdt_blob;
  1117. }
  1118. #endif
  1119. int fdtdec_setup(void)
  1120. {
  1121. #if CONFIG_IS_ENABLED(OF_CONTROL)
  1122. # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
  1123. void *fdt_blob;
  1124. # endif
  1125. # ifdef CONFIG_OF_EMBED
  1126. /* Get a pointer to the FDT */
  1127. # ifdef CONFIG_SPL_BUILD
  1128. gd->fdt_blob = __dtb_dt_spl_begin;
  1129. # else
  1130. gd->fdt_blob = __dtb_dt_begin;
  1131. # endif
  1132. # elif defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
  1133. /* Allow the board to override the fdt address. */
  1134. gd->fdt_blob = board_fdt_blob_setup();
  1135. # elif defined(CONFIG_OF_HOSTFILE)
  1136. if (sandbox_read_fdt_from_file()) {
  1137. puts("Failed to read control FDT\n");
  1138. return -1;
  1139. }
  1140. # endif
  1141. # ifndef CONFIG_SPL_BUILD
  1142. /* Allow the early environment to override the fdt address */
  1143. # if CONFIG_IS_ENABLED(OF_PRIOR_STAGE)
  1144. gd->fdt_blob = (void *)prior_stage_fdt_address;
  1145. # else
  1146. gd->fdt_blob = (void *)env_get_ulong("fdtcontroladdr", 16,
  1147. (uintptr_t)gd->fdt_blob);
  1148. # endif
  1149. # endif
  1150. # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
  1151. /*
  1152. * Try and uncompress the blob.
  1153. * Unfortunately there is no way to know how big the input blob really
  1154. * is. So let us set the maximum input size arbitrarily high. 16MB
  1155. * ought to be more than enough for packed DTBs.
  1156. */
  1157. if (uncompress_blob(gd->fdt_blob, 0x1000000, &fdt_blob) == 0)
  1158. gd->fdt_blob = fdt_blob;
  1159. /*
  1160. * Check if blob is a FIT images containings DTBs.
  1161. * If so, pick the most relevant
  1162. */
  1163. fdt_blob = locate_dtb_in_fit(gd->fdt_blob);
  1164. if (fdt_blob)
  1165. gd->fdt_blob = fdt_blob;
  1166. # endif
  1167. #endif
  1168. return fdtdec_prepare_fdt();
  1169. }
  1170. #ifdef CONFIG_NR_DRAM_BANKS
  1171. int fdtdec_decode_ram_size(const void *blob, const char *area, int board_id,
  1172. phys_addr_t *basep, phys_size_t *sizep, bd_t *bd)
  1173. {
  1174. int addr_cells, size_cells;
  1175. const u32 *cell, *end;
  1176. u64 total_size, size, addr;
  1177. int node, child;
  1178. bool auto_size;
  1179. int bank;
  1180. int len;
  1181. debug("%s: board_id=%d\n", __func__, board_id);
  1182. if (!area)
  1183. area = "/memory";
  1184. node = fdt_path_offset(blob, area);
  1185. if (node < 0) {
  1186. debug("No %s node found\n", area);
  1187. return -ENOENT;
  1188. }
  1189. cell = fdt_getprop(blob, node, "reg", &len);
  1190. if (!cell) {
  1191. debug("No reg property found\n");
  1192. return -ENOENT;
  1193. }
  1194. addr_cells = fdt_address_cells(blob, node);
  1195. size_cells = fdt_size_cells(blob, node);
  1196. /* Check the board id and mask */
  1197. for (child = fdt_first_subnode(blob, node);
  1198. child >= 0;
  1199. child = fdt_next_subnode(blob, child)) {
  1200. int match_mask, match_value;
  1201. match_mask = fdtdec_get_int(blob, child, "match-mask", -1);
  1202. match_value = fdtdec_get_int(blob, child, "match-value", -1);
  1203. if (match_value >= 0 &&
  1204. ((board_id & match_mask) == match_value)) {
  1205. /* Found matching mask */
  1206. debug("Found matching mask %d\n", match_mask);
  1207. node = child;
  1208. cell = fdt_getprop(blob, node, "reg", &len);
  1209. if (!cell) {
  1210. debug("No memory-banks property found\n");
  1211. return -EINVAL;
  1212. }
  1213. break;
  1214. }
  1215. }
  1216. /* Note: if no matching subnode was found we use the parent node */
  1217. if (bd) {
  1218. memset(bd->bi_dram, '\0', sizeof(bd->bi_dram[0]) *
  1219. CONFIG_NR_DRAM_BANKS);
  1220. }
  1221. auto_size = fdtdec_get_bool(blob, node, "auto-size");
  1222. total_size = 0;
  1223. end = cell + len / 4 - addr_cells - size_cells;
  1224. debug("cell at %p, end %p\n", cell, end);
  1225. for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
  1226. if (cell > end)
  1227. break;
  1228. addr = 0;
  1229. if (addr_cells == 2)
  1230. addr += (u64)fdt32_to_cpu(*cell++) << 32UL;
  1231. addr += fdt32_to_cpu(*cell++);
  1232. if (bd)
  1233. bd->bi_dram[bank].start = addr;
  1234. if (basep && !bank)
  1235. *basep = (phys_addr_t)addr;
  1236. size = 0;
  1237. if (size_cells == 2)
  1238. size += (u64)fdt32_to_cpu(*cell++) << 32UL;
  1239. size += fdt32_to_cpu(*cell++);
  1240. if (auto_size) {
  1241. u64 new_size;
  1242. debug("Auto-sizing %llx, size %llx: ", addr, size);
  1243. new_size = get_ram_size((long *)(uintptr_t)addr, size);
  1244. if (new_size == size) {
  1245. debug("OK\n");
  1246. } else {
  1247. debug("sized to %llx\n", new_size);
  1248. size = new_size;
  1249. }
  1250. }
  1251. if (bd)
  1252. bd->bi_dram[bank].size = size;
  1253. total_size += size;
  1254. }
  1255. debug("Memory size %llu\n", total_size);
  1256. if (sizep)
  1257. *sizep = (phys_size_t)total_size;
  1258. return 0;
  1259. }
  1260. #endif /* CONFIG_NR_DRAM_BANKS */
  1261. #endif /* !USE_HOSTCC */