ethernut5.h 3.8 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * (C) Copyright 2011
  4. * egnite GmbH <info@egnite.de>
  5. *
  6. * Configuation settings for Ethernut 5 with AT91SAM9XE.
  7. */
  8. #ifndef __CONFIG_H
  9. #define __CONFIG_H
  10. #include <asm/hardware.h>
  11. /* The first stage boot loader expects u-boot running at this address. */
  12. /* The first stage boot loader takes care of low level initialization. */
  13. #define CONFIG_SKIP_LOWLEVEL_INIT
  14. /* Set our official architecture number. */
  15. #define CONFIG_MACH_TYPE MACH_TYPE_ETHERNUT5
  16. /* CPU information */
  17. /* ARM asynchronous clock */
  18. #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
  19. #define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */
  20. /* 32kB internal SRAM */
  21. #define CONFIG_SRAM_BASE 0x00300000 /*AT91SAM9XE_SRAM_BASE */
  22. #define CONFIG_SRAM_SIZE (32 << 10)
  23. #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SRAM_BASE + CONFIG_SRAM_SIZE - \
  24. GENERATED_GBL_DATA_SIZE)
  25. /* 128MB SDRAM in 1 bank */
  26. #define CONFIG_SYS_SDRAM_BASE 0x20000000
  27. #define CONFIG_SYS_SDRAM_SIZE (128 << 20)
  28. #define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE
  29. #define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR
  30. #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 << 20))
  31. /* 512kB on-chip NOR flash */
  32. # define CONFIG_SYS_MAX_FLASH_BANKS 1
  33. # define CONFIG_SYS_FLASH_BASE 0x00200000 /* AT91SAM9XE_FLASH_BASE */
  34. # define CONFIG_AT91_EFLASH
  35. # define CONFIG_SYS_MAX_FLASH_SECT 32
  36. # define CONFIG_EFLASH_PROTSECTORS 1
  37. /* bootstrap + u-boot + env + linux in dataflash on CS0 */
  38. /* NAND flash */
  39. #ifdef CONFIG_CMD_NAND
  40. #define CONFIG_SYS_MAX_NAND_DEVICE 1
  41. #define CONFIG_SYS_NAND_BASE 0x40000000
  42. #define CONFIG_SYS_NAND_DBW_8
  43. /* our ALE is AD21 */
  44. #define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
  45. /* our CLE is AD22 */
  46. #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
  47. #define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PC(14)
  48. #endif
  49. /* JFFS2 */
  50. #ifdef CONFIG_CMD_JFFS2
  51. #define CONFIG_JFFS2_CMDLINE
  52. #define CONFIG_JFFS2_NAND
  53. #endif
  54. /* Ethernet */
  55. #define CONFIG_NET_RETRY_COUNT 20
  56. #define CONFIG_MACB
  57. #define CONFIG_RMII
  58. #define CONFIG_PHY_ID 0
  59. #define CONFIG_MACB_SEARCH_PHY
  60. /* MMC */
  61. #ifdef CONFIG_CMD_MMC
  62. #define CONFIG_GENERIC_ATMEL_MCI
  63. #define CONFIG_SYS_MMC_CD_PIN AT91_PIO_PORTC, 8
  64. #endif
  65. /* USB */
  66. #ifdef CONFIG_CMD_USB
  67. #define CONFIG_USB_ATMEL
  68. #define CONFIG_USB_ATMEL_CLK_SEL_PLLB
  69. #define CONFIG_USB_OHCI_NEW
  70. #define CONFIG_SYS_USB_OHCI_CPU_INIT
  71. #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000
  72. #define CONFIG_SYS_USB_OHCI_SLOT_NAME "host"
  73. #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
  74. #endif
  75. /* RTC */
  76. #if defined(CONFIG_CMD_DATE) || defined(CONFIG_CMD_SNTP)
  77. #define CONFIG_SYS_I2C_RTC_ADDR 0x51
  78. #endif
  79. /* I2C */
  80. #define CONFIG_SYS_MAX_I2C_BUS 1
  81. #define CONFIG_SYS_I2C
  82. #define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
  83. #define CONFIG_SYS_I2C_SOFT_SPEED 100000
  84. #define CONFIG_SYS_I2C_SOFT_SLAVE 0
  85. #define I2C_SOFT_DECLARATIONS
  86. #define GPIO_I2C_SCL AT91_PIO_PORTA, 24
  87. #define GPIO_I2C_SDA AT91_PIO_PORTA, 23
  88. #define I2C_INIT { \
  89. at91_set_pio_periph(AT91_PIO_PORTA, 23, 0); \
  90. at91_set_pio_multi_drive(AT91_PIO_PORTA, 23, 1); \
  91. at91_set_pio_periph(AT91_PIO_PORTA, 24, 0); \
  92. at91_set_pio_output(AT91_PIO_PORTA, 24, 0); \
  93. at91_set_pio_multi_drive(AT91_PIO_PORTA, 24, 1); \
  94. }
  95. #define I2C_ACTIVE at91_set_pio_output(AT91_PIO_PORTA, 23, 0)
  96. #define I2C_TRISTATE at91_set_pio_input(AT91_PIO_PORTA, 23, 0)
  97. #define I2C_SCL(bit) at91_set_pio_value(AT91_PIO_PORTA, 24, bit)
  98. #define I2C_SDA(bit) at91_set_pio_value(AT91_PIO_PORTA, 23, bit)
  99. #define I2C_DELAY udelay(100)
  100. #define I2C_READ at91_get_pio_value(AT91_PIO_PORTA, 23)
  101. /* DHCP/BOOTP options */
  102. #ifdef CONFIG_CMD_DHCP
  103. #define CONFIG_BOOTP_BOOTFILESIZE
  104. #define CONFIG_SYS_AUTOLOAD "n"
  105. #endif
  106. /* File systems */
  107. /* Boot command */
  108. #define CONFIG_CMDLINE_TAG
  109. #define CONFIG_SETUP_MEMORY_TAGS
  110. #define CONFIG_INITRD_TAG
  111. #define CONFIG_BOOTCOMMAND "sf probe 0:0; " \
  112. "sf read 0x22000000 0xc6000 0x294000; " \
  113. "bootm 0x22000000"
  114. /* Misc. u-boot settings */
  115. #endif