fdt.c 19 KB

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  1. /*
  2. * Copyright 2007-2011 Freescale Semiconductor, Inc.
  3. *
  4. * (C) Copyright 2000
  5. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  6. *
  7. * See file CREDITS for list of people who contributed to this
  8. * project.
  9. *
  10. * This program is free software; you can redistribute it and/or
  11. * modify it under the terms of the GNU General Public License as
  12. * published by the Free Software Foundation; either version 2 of
  13. * the License, or (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  23. * MA 02111-1307 USA
  24. */
  25. #include <common.h>
  26. #include <libfdt.h>
  27. #include <fdt_support.h>
  28. #include <asm/processor.h>
  29. #include <linux/ctype.h>
  30. #include <asm/io.h>
  31. #include <asm/fsl_portals.h>
  32. #ifdef CONFIG_FSL_ESDHC
  33. #include <fsl_esdhc.h>
  34. #endif
  35. #include "../../../../drivers/qe/qe.h" /* For struct qe_firmware */
  36. DECLARE_GLOBAL_DATA_PTR;
  37. extern void ft_qe_setup(void *blob);
  38. extern void ft_fixup_num_cores(void *blob);
  39. extern void ft_srio_setup(void *blob);
  40. #ifdef CONFIG_MP
  41. #include "mp.h"
  42. void ft_fixup_cpu(void *blob, u64 memory_limit)
  43. {
  44. int off;
  45. ulong spin_tbl_addr = get_spin_phys_addr();
  46. u32 bootpg = determine_mp_bootpg();
  47. u32 id = get_my_id();
  48. const char *enable_method;
  49. off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
  50. while (off != -FDT_ERR_NOTFOUND) {
  51. u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", 0);
  52. if (reg) {
  53. u64 val = *reg * SIZE_BOOT_ENTRY + spin_tbl_addr;
  54. val = cpu_to_fdt32(val);
  55. if (*reg == id) {
  56. fdt_setprop_string(blob, off, "status",
  57. "okay");
  58. } else {
  59. fdt_setprop_string(blob, off, "status",
  60. "disabled");
  61. }
  62. if (hold_cores_in_reset(0)) {
  63. #ifdef CONFIG_FSL_CORENET
  64. /* Cores held in reset, use BRR to release */
  65. enable_method = "fsl,brr-holdoff";
  66. #else
  67. /* Cores held in reset, use EEBPCR to release */
  68. enable_method = "fsl,eebpcr-holdoff";
  69. #endif
  70. } else {
  71. /* Cores out of reset and in a spin-loop */
  72. enable_method = "spin-table";
  73. fdt_setprop(blob, off, "cpu-release-addr",
  74. &val, sizeof(val));
  75. }
  76. fdt_setprop_string(blob, off, "enable-method",
  77. enable_method);
  78. } else {
  79. printf ("cpu NULL\n");
  80. }
  81. off = fdt_node_offset_by_prop_value(blob, off,
  82. "device_type", "cpu", 4);
  83. }
  84. /* Reserve the boot page so OSes dont use it */
  85. if ((u64)bootpg < memory_limit) {
  86. off = fdt_add_mem_rsv(blob, bootpg, (u64)4096);
  87. if (off < 0)
  88. printf("%s: %s\n", __FUNCTION__, fdt_strerror(off));
  89. }
  90. }
  91. #endif
  92. #ifdef CONFIG_SYS_FSL_CPC
  93. static inline void ft_fixup_l3cache(void *blob, int off)
  94. {
  95. u32 line_size, num_ways, size, num_sets;
  96. cpc_corenet_t *cpc = (void *)CONFIG_SYS_FSL_CPC_ADDR;
  97. u32 cfg0 = in_be32(&cpc->cpccfg0);
  98. size = CPC_CFG0_SZ_K(cfg0) * 1024 * CONFIG_SYS_NUM_CPC;
  99. num_ways = CPC_CFG0_NUM_WAYS(cfg0);
  100. line_size = CPC_CFG0_LINE_SZ(cfg0);
  101. num_sets = size / (line_size * num_ways);
  102. fdt_setprop(blob, off, "cache-unified", NULL, 0);
  103. fdt_setprop_cell(blob, off, "cache-block-size", line_size);
  104. fdt_setprop_cell(blob, off, "cache-size", size);
  105. fdt_setprop_cell(blob, off, "cache-sets", num_sets);
  106. fdt_setprop_cell(blob, off, "cache-level", 3);
  107. #ifdef CONFIG_SYS_CACHE_STASHING
  108. fdt_setprop_cell(blob, off, "cache-stash-id", 1);
  109. #endif
  110. }
  111. #else
  112. #define ft_fixup_l3cache(x, y)
  113. #endif
  114. #if defined(CONFIG_L2_CACHE)
  115. /* return size in kilobytes */
  116. static inline u32 l2cache_size(void)
  117. {
  118. volatile ccsr_l2cache_t *l2cache = (void *)CONFIG_SYS_MPC85xx_L2_ADDR;
  119. volatile u32 l2siz_field = (l2cache->l2ctl >> 28) & 0x3;
  120. u32 ver = SVR_SOC_VER(get_svr());
  121. switch (l2siz_field) {
  122. case 0x0:
  123. break;
  124. case 0x1:
  125. if (ver == SVR_8540 || ver == SVR_8560 ||
  126. ver == SVR_8541 || ver == SVR_8541_E ||
  127. ver == SVR_8555 || ver == SVR_8555_E)
  128. return 128;
  129. else
  130. return 256;
  131. break;
  132. case 0x2:
  133. if (ver == SVR_8540 || ver == SVR_8560 ||
  134. ver == SVR_8541 || ver == SVR_8541_E ||
  135. ver == SVR_8555 || ver == SVR_8555_E)
  136. return 256;
  137. else
  138. return 512;
  139. break;
  140. case 0x3:
  141. return 1024;
  142. break;
  143. }
  144. return 0;
  145. }
  146. static inline void ft_fixup_l2cache(void *blob)
  147. {
  148. int len, off;
  149. u32 *ph;
  150. struct cpu_type *cpu = identify_cpu(SVR_SOC_VER(get_svr()));
  151. const u32 line_size = 32;
  152. const u32 num_ways = 8;
  153. const u32 size = l2cache_size() * 1024;
  154. const u32 num_sets = size / (line_size * num_ways);
  155. off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
  156. if (off < 0) {
  157. debug("no cpu node fount\n");
  158. return;
  159. }
  160. ph = (u32 *)fdt_getprop(blob, off, "next-level-cache", 0);
  161. if (ph == NULL) {
  162. debug("no next-level-cache property\n");
  163. return ;
  164. }
  165. off = fdt_node_offset_by_phandle(blob, *ph);
  166. if (off < 0) {
  167. printf("%s: %s\n", __func__, fdt_strerror(off));
  168. return ;
  169. }
  170. if (cpu) {
  171. char buf[40];
  172. if (isdigit(cpu->name[0])) {
  173. /* MPCxxxx, where xxxx == 4-digit number */
  174. len = sprintf(buf, "fsl,mpc%s-l2-cache-controller",
  175. cpu->name) + 1;
  176. } else {
  177. /* Pxxxx or Txxxx, where xxxx == 4-digit number */
  178. len = sprintf(buf, "fsl,%c%s-l2-cache-controller",
  179. tolower(cpu->name[0]), cpu->name + 1) + 1;
  180. }
  181. /*
  182. * append "cache" after the NULL character that the previous
  183. * sprintf wrote. This is how a device tree stores multiple
  184. * strings in a property.
  185. */
  186. len += sprintf(buf + len, "cache") + 1;
  187. fdt_setprop(blob, off, "compatible", buf, len);
  188. }
  189. fdt_setprop(blob, off, "cache-unified", NULL, 0);
  190. fdt_setprop_cell(blob, off, "cache-block-size", line_size);
  191. fdt_setprop_cell(blob, off, "cache-size", size);
  192. fdt_setprop_cell(blob, off, "cache-sets", num_sets);
  193. fdt_setprop_cell(blob, off, "cache-level", 2);
  194. /* we dont bother w/L3 since no platform of this type has one */
  195. }
  196. #elif defined(CONFIG_BACKSIDE_L2_CACHE)
  197. static inline void ft_fixup_l2cache(void *blob)
  198. {
  199. int off, l2_off, l3_off = -1;
  200. u32 *ph;
  201. u32 l2cfg0 = mfspr(SPRN_L2CFG0);
  202. u32 size, line_size, num_ways, num_sets;
  203. int has_l2 = 1;
  204. /* P2040/P2040E has no L2, so dont set any L2 props */
  205. if ((SVR_SOC_VER(get_svr()) == SVR_P2040) ||
  206. (SVR_SOC_VER(get_svr()) == SVR_P2040_E))
  207. has_l2 = 0;
  208. size = (l2cfg0 & 0x3fff) * 64 * 1024;
  209. num_ways = ((l2cfg0 >> 14) & 0x1f) + 1;
  210. line_size = (((l2cfg0 >> 23) & 0x3) + 1) * 32;
  211. num_sets = size / (line_size * num_ways);
  212. off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
  213. while (off != -FDT_ERR_NOTFOUND) {
  214. ph = (u32 *)fdt_getprop(blob, off, "next-level-cache", 0);
  215. if (ph == NULL) {
  216. debug("no next-level-cache property\n");
  217. goto next;
  218. }
  219. l2_off = fdt_node_offset_by_phandle(blob, *ph);
  220. if (l2_off < 0) {
  221. printf("%s: %s\n", __func__, fdt_strerror(off));
  222. goto next;
  223. }
  224. if (has_l2) {
  225. #ifdef CONFIG_SYS_CACHE_STASHING
  226. u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", 0);
  227. if (reg)
  228. fdt_setprop_cell(blob, l2_off, "cache-stash-id",
  229. (*reg * 2) + 32 + 1);
  230. #endif
  231. fdt_setprop(blob, l2_off, "cache-unified", NULL, 0);
  232. fdt_setprop_cell(blob, l2_off, "cache-block-size",
  233. line_size);
  234. fdt_setprop_cell(blob, l2_off, "cache-size", size);
  235. fdt_setprop_cell(blob, l2_off, "cache-sets", num_sets);
  236. fdt_setprop_cell(blob, l2_off, "cache-level", 2);
  237. fdt_setprop(blob, l2_off, "compatible", "cache", 6);
  238. }
  239. if (l3_off < 0) {
  240. ph = (u32 *)fdt_getprop(blob, l2_off, "next-level-cache", 0);
  241. if (ph == NULL) {
  242. debug("no next-level-cache property\n");
  243. goto next;
  244. }
  245. l3_off = *ph;
  246. }
  247. next:
  248. off = fdt_node_offset_by_prop_value(blob, off,
  249. "device_type", "cpu", 4);
  250. }
  251. if (l3_off > 0) {
  252. l3_off = fdt_node_offset_by_phandle(blob, l3_off);
  253. if (l3_off < 0) {
  254. printf("%s: %s\n", __func__, fdt_strerror(off));
  255. return ;
  256. }
  257. ft_fixup_l3cache(blob, l3_off);
  258. }
  259. }
  260. #else
  261. #define ft_fixup_l2cache(x)
  262. #endif
  263. static inline void ft_fixup_cache(void *blob)
  264. {
  265. int off;
  266. off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
  267. while (off != -FDT_ERR_NOTFOUND) {
  268. u32 l1cfg0 = mfspr(SPRN_L1CFG0);
  269. u32 l1cfg1 = mfspr(SPRN_L1CFG1);
  270. u32 isize, iline_size, inum_sets, inum_ways;
  271. u32 dsize, dline_size, dnum_sets, dnum_ways;
  272. /* d-side config */
  273. dsize = (l1cfg0 & 0x7ff) * 1024;
  274. dnum_ways = ((l1cfg0 >> 11) & 0xff) + 1;
  275. dline_size = (((l1cfg0 >> 23) & 0x3) + 1) * 32;
  276. dnum_sets = dsize / (dline_size * dnum_ways);
  277. fdt_setprop_cell(blob, off, "d-cache-block-size", dline_size);
  278. fdt_setprop_cell(blob, off, "d-cache-size", dsize);
  279. fdt_setprop_cell(blob, off, "d-cache-sets", dnum_sets);
  280. #ifdef CONFIG_SYS_CACHE_STASHING
  281. {
  282. u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", 0);
  283. if (reg)
  284. fdt_setprop_cell(blob, off, "cache-stash-id",
  285. (*reg * 2) + 32 + 0);
  286. }
  287. #endif
  288. /* i-side config */
  289. isize = (l1cfg1 & 0x7ff) * 1024;
  290. inum_ways = ((l1cfg1 >> 11) & 0xff) + 1;
  291. iline_size = (((l1cfg1 >> 23) & 0x3) + 1) * 32;
  292. inum_sets = isize / (iline_size * inum_ways);
  293. fdt_setprop_cell(blob, off, "i-cache-block-size", iline_size);
  294. fdt_setprop_cell(blob, off, "i-cache-size", isize);
  295. fdt_setprop_cell(blob, off, "i-cache-sets", inum_sets);
  296. off = fdt_node_offset_by_prop_value(blob, off,
  297. "device_type", "cpu", 4);
  298. }
  299. ft_fixup_l2cache(blob);
  300. }
  301. void fdt_add_enet_stashing(void *fdt)
  302. {
  303. do_fixup_by_compat(fdt, "gianfar", "bd-stash", NULL, 0, 1);
  304. do_fixup_by_compat_u32(fdt, "gianfar", "rx-stash-len", 96, 1);
  305. do_fixup_by_compat_u32(fdt, "gianfar", "rx-stash-idx", 0, 1);
  306. do_fixup_by_compat(fdt, "fsl,etsec2", "bd-stash", NULL, 0, 1);
  307. do_fixup_by_compat_u32(fdt, "fsl,etsec2", "rx-stash-len", 96, 1);
  308. do_fixup_by_compat_u32(fdt, "fsl,etsec2", "rx-stash-idx", 0, 1);
  309. }
  310. #if defined(CONFIG_SYS_DPAA_FMAN) || defined(CONFIG_SYS_DPAA_PME)
  311. static void ft_fixup_clks(void *blob, const char *compat, u32 offset,
  312. unsigned long freq)
  313. {
  314. phys_addr_t phys = offset + CONFIG_SYS_CCSRBAR_PHYS;
  315. int off = fdt_node_offset_by_compat_reg(blob, compat, phys);
  316. if (off >= 0) {
  317. off = fdt_setprop_cell(blob, off, "clock-frequency", freq);
  318. if (off > 0)
  319. printf("WARNING enable to set clock-frequency "
  320. "for %s: %s\n", compat, fdt_strerror(off));
  321. }
  322. }
  323. static void ft_fixup_dpaa_clks(void *blob)
  324. {
  325. sys_info_t sysinfo;
  326. get_sys_info(&sysinfo);
  327. ft_fixup_clks(blob, "fsl,fman", CONFIG_SYS_FSL_FM1_OFFSET,
  328. sysinfo.freqFMan[0]);
  329. #if (CONFIG_SYS_NUM_FMAN == 2)
  330. ft_fixup_clks(blob, "fsl,fman", CONFIG_SYS_FSL_FM2_OFFSET,
  331. sysinfo.freqFMan[1]);
  332. #endif
  333. #ifdef CONFIG_SYS_DPAA_PME
  334. do_fixup_by_compat_u32(blob, "fsl,pme",
  335. "clock-frequency", sysinfo.freqPME, 1);
  336. #endif
  337. }
  338. #else
  339. #define ft_fixup_dpaa_clks(x)
  340. #endif
  341. #ifdef CONFIG_QE
  342. static void ft_fixup_qe_snum(void *blob)
  343. {
  344. unsigned int svr;
  345. svr = mfspr(SPRN_SVR);
  346. if (SVR_SOC_VER(svr) == SVR_8569_E) {
  347. if(IS_SVR_REV(svr, 1, 0))
  348. do_fixup_by_compat_u32(blob, "fsl,qe",
  349. "fsl,qe-num-snums", 46, 1);
  350. else
  351. do_fixup_by_compat_u32(blob, "fsl,qe",
  352. "fsl,qe-num-snums", 76, 1);
  353. }
  354. }
  355. #endif
  356. /**
  357. * fdt_fixup_fman_firmware -- insert the Fman firmware into the device tree
  358. *
  359. * The binding for an Fman firmware node is documented in
  360. * Documentation/powerpc/dts-bindings/fsl/dpaa/fman.txt. This node contains
  361. * the actual Fman firmware binary data. The operating system is expected to
  362. * be able to parse the binary data to determine any attributes it needs.
  363. */
  364. #ifdef CONFIG_SYS_DPAA_FMAN
  365. void fdt_fixup_fman_firmware(void *blob)
  366. {
  367. int rc, fmnode, fwnode = -1;
  368. uint32_t phandle;
  369. struct qe_firmware *fmanfw;
  370. const struct qe_header *hdr;
  371. unsigned int length;
  372. uint32_t crc;
  373. const char *p;
  374. /* The first Fman we find will contain the actual firmware. */
  375. fmnode = fdt_node_offset_by_compatible(blob, -1, "fsl,fman");
  376. if (fmnode < 0)
  377. /* Exit silently if there are no Fman devices */
  378. return;
  379. /* If we already have a firmware node, then also exit silently. */
  380. if (fdt_node_offset_by_compatible(blob, -1, "fsl,fman-firmware") > 0)
  381. return;
  382. /* If the environment variable is not set, then exit silently */
  383. p = getenv("fman_ucode");
  384. if (!p)
  385. return;
  386. fmanfw = (struct qe_firmware *) simple_strtoul(p, NULL, 0);
  387. if (!fmanfw)
  388. return;
  389. hdr = &fmanfw->header;
  390. length = be32_to_cpu(hdr->length);
  391. /* Verify the firmware. */
  392. if ((hdr->magic[0] != 'Q') || (hdr->magic[1] != 'E') ||
  393. (hdr->magic[2] != 'F')) {
  394. printf("Data at %p is not an Fman firmware\n", fmanfw);
  395. return;
  396. }
  397. if (length > CONFIG_SYS_FMAN_FW_LENGTH) {
  398. printf("Fman firmware at %p is too large (size=%u)\n",
  399. fmanfw, length);
  400. return;
  401. }
  402. length -= sizeof(u32); /* Subtract the size of the CRC */
  403. crc = be32_to_cpu(*(u32 *)((void *)fmanfw + length));
  404. if (crc != crc32_no_comp(0, (void *)fmanfw, length)) {
  405. printf("Fman firmware at %p has invalid CRC\n", fmanfw);
  406. return;
  407. }
  408. /* Increase the size of the fdt to make room for the node. */
  409. rc = fdt_increase_size(blob, fmanfw->header.length);
  410. if (rc < 0) {
  411. printf("Unable to make room for Fman firmware: %s\n",
  412. fdt_strerror(rc));
  413. return;
  414. }
  415. /* Create the firmware node. */
  416. fwnode = fdt_add_subnode(blob, fmnode, "fman-firmware");
  417. if (fwnode < 0) {
  418. char s[64];
  419. fdt_get_path(blob, fmnode, s, sizeof(s));
  420. printf("Could not add firmware node to %s: %s\n", s,
  421. fdt_strerror(fwnode));
  422. return;
  423. }
  424. rc = fdt_setprop_string(blob, fwnode, "compatible", "fsl,fman-firmware");
  425. if (rc < 0) {
  426. char s[64];
  427. fdt_get_path(blob, fwnode, s, sizeof(s));
  428. printf("Could not add compatible property to node %s: %s\n", s,
  429. fdt_strerror(rc));
  430. return;
  431. }
  432. phandle = fdt_alloc_phandle(blob);
  433. rc = fdt_setprop_cell(blob, fwnode, "linux,phandle", phandle);
  434. if (rc < 0) {
  435. char s[64];
  436. fdt_get_path(blob, fwnode, s, sizeof(s));
  437. printf("Could not add phandle property to node %s: %s\n", s,
  438. fdt_strerror(rc));
  439. return;
  440. }
  441. rc = fdt_setprop(blob, fwnode, "fsl,firmware", fmanfw, fmanfw->header.length);
  442. if (rc < 0) {
  443. char s[64];
  444. fdt_get_path(blob, fwnode, s, sizeof(s));
  445. printf("Could not add firmware property to node %s: %s\n", s,
  446. fdt_strerror(rc));
  447. return;
  448. }
  449. /* Find all other Fman nodes and point them to the firmware node. */
  450. while ((fmnode = fdt_node_offset_by_compatible(blob, fmnode, "fsl,fman")) > 0) {
  451. rc = fdt_setprop_cell(blob, fmnode, "fsl,firmware-phandle", phandle);
  452. if (rc < 0) {
  453. char s[64];
  454. fdt_get_path(blob, fmnode, s, sizeof(s));
  455. printf("Could not add pointer property to node %s: %s\n",
  456. s, fdt_strerror(rc));
  457. return;
  458. }
  459. }
  460. }
  461. #else
  462. #define fdt_fixup_fman_firmware(x)
  463. #endif
  464. void ft_cpu_setup(void *blob, bd_t *bd)
  465. {
  466. int off;
  467. int val;
  468. sys_info_t sysinfo;
  469. /* delete crypto node if not on an E-processor */
  470. if (!IS_E_PROCESSOR(get_svr()))
  471. fdt_fixup_crypto_node(blob, 0);
  472. fdt_fixup_ethernet(blob);
  473. fdt_add_enet_stashing(blob);
  474. do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
  475. "timebase-frequency", get_tbclk(), 1);
  476. do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
  477. "bus-frequency", bd->bi_busfreq, 1);
  478. get_sys_info(&sysinfo);
  479. off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
  480. while (off != -FDT_ERR_NOTFOUND) {
  481. u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", 0);
  482. val = cpu_to_fdt32(sysinfo.freqProcessor[*reg]);
  483. fdt_setprop(blob, off, "clock-frequency", &val, 4);
  484. off = fdt_node_offset_by_prop_value(blob, off, "device_type",
  485. "cpu", 4);
  486. }
  487. do_fixup_by_prop_u32(blob, "device_type", "soc", 4,
  488. "bus-frequency", bd->bi_busfreq, 1);
  489. do_fixup_by_compat_u32(blob, "fsl,pq3-localbus",
  490. "bus-frequency", gd->lbc_clk, 1);
  491. do_fixup_by_compat_u32(blob, "fsl,elbc",
  492. "bus-frequency", gd->lbc_clk, 1);
  493. #ifdef CONFIG_QE
  494. ft_qe_setup(blob);
  495. ft_fixup_qe_snum(blob);
  496. #endif
  497. fdt_fixup_fman_firmware(blob);
  498. #ifdef CONFIG_SYS_NS16550
  499. do_fixup_by_compat_u32(blob, "ns16550",
  500. "clock-frequency", CONFIG_SYS_NS16550_CLK, 1);
  501. #endif
  502. #ifdef CONFIG_CPM2
  503. do_fixup_by_compat_u32(blob, "fsl,cpm2-scc-uart",
  504. "current-speed", bd->bi_baudrate, 1);
  505. do_fixup_by_compat_u32(blob, "fsl,cpm2-brg",
  506. "clock-frequency", bd->bi_brgfreq, 1);
  507. #endif
  508. #ifdef CONFIG_FSL_CORENET
  509. do_fixup_by_compat_u32(blob, "fsl,qoriq-clockgen-1.0",
  510. "clock-frequency", CONFIG_SYS_CLK_FREQ, 1);
  511. #endif
  512. fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
  513. #ifdef CONFIG_MP
  514. ft_fixup_cpu(blob, (u64)bd->bi_memstart + (u64)bd->bi_memsize);
  515. ft_fixup_num_cores(blob);
  516. #endif
  517. ft_fixup_cache(blob);
  518. #if defined(CONFIG_FSL_ESDHC)
  519. fdt_fixup_esdhc(blob, bd);
  520. #endif
  521. ft_fixup_dpaa_clks(blob);
  522. #if defined(CONFIG_SYS_BMAN_MEM_PHYS)
  523. fdt_portal(blob, "fsl,bman-portal", "bman-portals",
  524. (u64)CONFIG_SYS_BMAN_MEM_PHYS,
  525. CONFIG_SYS_BMAN_MEM_SIZE);
  526. fdt_fixup_bportals(blob);
  527. #endif
  528. #if defined(CONFIG_SYS_QMAN_MEM_PHYS)
  529. fdt_portal(blob, "fsl,qman-portal", "qman-portals",
  530. (u64)CONFIG_SYS_QMAN_MEM_PHYS,
  531. CONFIG_SYS_QMAN_MEM_SIZE);
  532. fdt_fixup_qportals(blob);
  533. #endif
  534. #ifdef CONFIG_SYS_SRIO
  535. ft_srio_setup(blob);
  536. #endif
  537. /*
  538. * system-clock = CCB clock/2
  539. * Here gd->bus_clk = CCB clock
  540. * We are using the system clock as 1588 Timer reference
  541. * clock source select
  542. */
  543. do_fixup_by_compat_u32(blob, "fsl,gianfar-ptp-timer",
  544. "timer-frequency", gd->bus_clk/2, 1);
  545. do_fixup_by_compat_u32(blob, "fsl,flexcan-v1.0",
  546. "clock_freq", gd->bus_clk, 1);
  547. }
  548. /*
  549. * For some CCSR devices, we only have the virtual address, not the physical
  550. * address. This is because we map CCSR as a whole, so we typically don't need
  551. * a macro for the physical address of any device within CCSR. In this case,
  552. * we calculate the physical address of that device using it's the difference
  553. * between the virtual address of the device and the virtual address of the
  554. * beginning of CCSR.
  555. */
  556. #define CCSR_VIRT_TO_PHYS(x) \
  557. (CONFIG_SYS_CCSRBAR_PHYS + ((x) - CONFIG_SYS_CCSRBAR))
  558. /*
  559. * Verify the device tree
  560. *
  561. * This function compares several CONFIG_xxx macros that contain physical
  562. * addresses with the corresponding nodes in the device tree, to see if
  563. * the physical addresses are all correct. For example, if
  564. * CONFIG_SYS_NS16550_COM1 is defined, then it contains the virtual address
  565. * of the first UART. We convert this to a physical address and compare
  566. * that with the physical address of the first ns16550-compatible node
  567. * in the device tree. If they don't match, then we display a warning.
  568. *
  569. * Returns 1 on success, 0 on failure
  570. */
  571. int ft_verify_fdt(void *fdt)
  572. {
  573. uint64_t ccsr = 0;
  574. int aliases;
  575. int off;
  576. /* First check the CCSR base address */
  577. off = fdt_node_offset_by_prop_value(fdt, -1, "device_type", "soc", 4);
  578. if (off > 0)
  579. ccsr = fdt_get_base_address(fdt, off);
  580. if (!ccsr) {
  581. printf("Warning: could not determine base CCSR address in "
  582. "device tree\n");
  583. /* No point in checking anything else */
  584. return 0;
  585. }
  586. if (ccsr != CONFIG_SYS_CCSRBAR_PHYS) {
  587. printf("Warning: U-Boot configured CCSR at address %llx,\n"
  588. "but the device tree has it at %llx\n",
  589. (uint64_t) CONFIG_SYS_CCSRBAR_PHYS, ccsr);
  590. /* No point in checking anything else */
  591. return 0;
  592. }
  593. /*
  594. * Get the 'aliases' node. If there isn't one, then there's nothing
  595. * left to do.
  596. */
  597. aliases = fdt_path_offset(fdt, "/aliases");
  598. if (aliases > 0) {
  599. #ifdef CONFIG_SYS_NS16550_COM1
  600. if (!fdt_verify_alias_address(fdt, aliases, "serial0",
  601. CCSR_VIRT_TO_PHYS(CONFIG_SYS_NS16550_COM1)))
  602. return 0;
  603. #endif
  604. #ifdef CONFIG_SYS_NS16550_COM2
  605. if (!fdt_verify_alias_address(fdt, aliases, "serial1",
  606. CCSR_VIRT_TO_PHYS(CONFIG_SYS_NS16550_COM2)))
  607. return 0;
  608. #endif
  609. }
  610. return 1;
  611. }