Kconfig 19 KB

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  1. source "drivers/net/phy/Kconfig"
  2. source "drivers/net/pfe_eth/Kconfig"
  3. source "drivers/net/fsl-mc/Kconfig"
  4. config DM_ETH
  5. bool "Enable Driver Model for Ethernet drivers"
  6. depends on DM
  7. help
  8. Enable driver model for Ethernet.
  9. The eth_*() interface will be implemented by the UCLASS_ETH class
  10. This is currently implemented in net/eth-uclass.c
  11. Look in include/net.h for details.
  12. config DM_MDIO
  13. bool "Enable Driver Model for MDIO devices"
  14. depends on DM_ETH && PHYLIB
  15. help
  16. Enable driver model for MDIO devices
  17. Adds UCLASS_MDIO DM class supporting MDIO buses that are probed as
  18. stand-alone devices. Useful in particular for systems that support
  19. DM_ETH and have a stand-alone MDIO hardware block shared by multiple
  20. Ethernet interfaces.
  21. This is currently implemented in net/mdio-uclass.c
  22. Look in include/miiphy.h for details.
  23. config DM_MDIO_MUX
  24. bool "Enable Driver Model for MDIO MUX devices"
  25. depends on DM_MDIO
  26. help
  27. Enable driver model for MDIO MUX devices
  28. Adds UCLASS_MDIO_MUX DM class supporting MDIO MUXes. Useful for
  29. systems that support DM_MDIO and integrate one or multiple muxes on
  30. the MDIO bus.
  31. This is currently implemented in net/mdio-mux-uclass.c
  32. Look in include/miiphy.h for details.
  33. config MDIO_SANDBOX
  34. depends on DM_MDIO && SANDBOX
  35. default y
  36. bool "Sandbox: Mocked MDIO driver"
  37. help
  38. This driver implements dummy read/write/reset MDIO functions mimicking
  39. a bus with a single PHY.
  40. This driver is used in for testing in test/dm/mdio.c
  41. config MDIO_MUX_SANDBOX
  42. depends on DM_MDIO_MUX && MDIO_SANDBOX
  43. default y
  44. bool "Sandbox: Mocked MDIO-MUX driver"
  45. help
  46. This driver implements dummy select/deselect ops mimicking a MUX on
  47. the MDIO bux. It uses mdio_sandbox driver as parent MDIO.
  48. This driver is used for testing in test/dm/mdio.c
  49. config DM_ETH_PHY
  50. bool "Enable Driver Model for Ethernet Generic PHY drivers"
  51. depends on DM
  52. help
  53. Enable driver model for Ethernet Generic PHY .
  54. menuconfig NETDEVICES
  55. bool "Network device support"
  56. depends on NET
  57. default y if DM_ETH
  58. help
  59. You must select Y to enable any network device support
  60. Generally if you have any networking support this is a given
  61. If unsure, say Y
  62. if NETDEVICES
  63. config PHY_GIGE
  64. bool "Enable GbE PHY status parsing and configuration"
  65. help
  66. Enables support for parsing the status output and for
  67. configuring GbE PHYs (affects the inner workings of some
  68. commands and miiphyutil.c).
  69. config AG7XXX
  70. bool "Atheros AG7xxx Ethernet MAC support"
  71. depends on DM_ETH && ARCH_ATH79
  72. select PHYLIB
  73. help
  74. This driver supports the Atheros AG7xxx Ethernet MAC. This MAC is
  75. present in the Atheros AR7xxx, AR9xxx and QCA9xxx MIPS chips.
  76. config ALTERA_TSE
  77. bool "Altera Triple-Speed Ethernet MAC support"
  78. depends on DM_ETH
  79. select PHYLIB
  80. help
  81. This driver supports the Altera Triple-Speed (TSE) Ethernet MAC.
  82. Please find details on the "Triple-Speed Ethernet MegaCore Function
  83. Resource Center" of Altera.
  84. config BCM_SF2_ETH
  85. bool "Broadcom SF2 (Starfighter2) Ethernet support"
  86. select PHYLIB
  87. help
  88. This is an abstract framework which provides a generic interface
  89. to MAC and DMA management for multiple Broadcom SoCs such as
  90. Cygnus, NSP and bcm28155_ap platforms.
  91. config BCM_SF2_ETH_DEFAULT_PORT
  92. int "Broadcom SF2 (Starfighter2) Ethernet default port number"
  93. depends on BCM_SF2_ETH
  94. default 0
  95. help
  96. Default port number for the Starfighter2 ethernet driver.
  97. config BCM_SF2_ETH_GMAC
  98. bool "Broadcom SF2 (Starfighter2) GMAC Ethernet support"
  99. depends on BCM_SF2_ETH
  100. help
  101. This flag enables the ethernet support for Broadcom platforms with
  102. GMAC such as Cygnus. This driver is based on the framework provided
  103. by the BCM_SF2_ETH driver.
  104. Say Y to any bcmcygnus based platforms.
  105. config BCM6348_ETH
  106. bool "BCM6348 EMAC support"
  107. depends on DM_ETH && ARCH_BMIPS
  108. select DMA
  109. select DMA_CHANNELS
  110. select MII
  111. select PHYLIB
  112. help
  113. This driver supports the BCM6348 Ethernet MAC.
  114. config BCM6368_ETH
  115. bool "BCM6368 EMAC support"
  116. depends on DM_ETH && ARCH_BMIPS
  117. select DMA
  118. select MII
  119. help
  120. This driver supports the BCM6368 Ethernet MAC.
  121. config BCMGENET
  122. bool "BCMGENET V5 support"
  123. depends on DM_ETH
  124. select PHYLIB
  125. help
  126. This driver supports the BCMGENET Ethernet MAC.
  127. config DWC_ETH_QOS
  128. bool "Synopsys DWC Ethernet QOS device support"
  129. depends on DM_ETH
  130. select PHYLIB
  131. help
  132. This driver supports the Synopsys Designware Ethernet QOS (Quality
  133. Of Service) IP block. The IP supports many options for bus type,
  134. clocking/reset structure, and feature list. This driver currently
  135. supports the specific configuration used in NVIDIA's Tegra186 chip,
  136. but should be extensible to other combinations quite easily.
  137. config E1000
  138. bool "Intel PRO/1000 Gigabit Ethernet support"
  139. depends on (DM_ETH && DM_PCI) || !DM_ETH
  140. help
  141. This driver supports Intel(R) PRO/1000 gigabit ethernet family of
  142. adapters. For more information on how to identify your adapter, go
  143. to the Adapter & Driver ID Guide at:
  144. <http://support.intel.com/support/network/adapter/pro100/21397.htm>
  145. config E1000_SPI_GENERIC
  146. bool "Allow access to the Intel 8257x SPI bus"
  147. depends on E1000
  148. help
  149. Allow generic access to the SPI bus on the Intel 8257x, for
  150. example with the "sspi" command.
  151. config E1000_SPI
  152. bool "Enable SPI bus utility code"
  153. depends on E1000
  154. help
  155. Utility code for direct access to the SPI bus on Intel 8257x.
  156. This does not do anything useful unless you set at least one
  157. of CONFIG_CMD_E1000 or CONFIG_E1000_SPI_GENERIC.
  158. config CMD_E1000
  159. bool "Enable the e1000 command"
  160. depends on E1000
  161. help
  162. This enables the 'e1000' management command for E1000 devices. When
  163. used on devices with SPI support you can reprogram the EEPROM from
  164. U-Boot.
  165. config ETH_SANDBOX
  166. depends on DM_ETH && SANDBOX
  167. default y
  168. bool "Sandbox: Mocked Ethernet driver"
  169. help
  170. This driver simply responds with fake ARP replies and ping
  171. replies that are used to verify network stack functionality
  172. This driver is particularly useful in the test/dm/eth.c tests
  173. config ETH_SANDBOX_RAW
  174. depends on DM_ETH && SANDBOX
  175. default y
  176. bool "Sandbox: Bridge to Linux Raw Sockets"
  177. help
  178. This driver is a bridge from the bottom of the network stack
  179. in U-Boot to the RAW AF_PACKET API in Linux. This allows real
  180. network traffic to be tested from within sandbox. See
  181. doc/arch/index.rst for more details.
  182. config ETH_DESIGNWARE
  183. bool "Synopsys Designware Ethernet MAC"
  184. select PHYLIB
  185. imply ETH_DESIGNWARE_SOCFPGA if ARCH_SOCFPGA
  186. help
  187. This MAC is present in SoCs from various vendors. It supports
  188. 100Mbit and 1 Gbit operation. You must enable CONFIG_PHYLIB to
  189. provide the PHY (physical media interface).
  190. config ETH_DESIGNWARE_SOCFPGA
  191. select REGMAP
  192. select SYSCON
  193. bool "Altera SoCFPGA extras for Synopsys Designware Ethernet MAC"
  194. depends on DM_ETH && ETH_DESIGNWARE
  195. help
  196. The Altera SoCFPGA requires additional configuration of the
  197. Altera system manager to correctly interface with the PHY.
  198. This code handles those SoC specifics.
  199. config ETHOC
  200. bool "OpenCores 10/100 Mbps Ethernet MAC"
  201. help
  202. This MAC is present in OpenRISC and Xtensa XTFPGA boards.
  203. config FEC_MXC_SHARE_MDIO
  204. bool "Share the MDIO bus for FEC controller"
  205. depends on FEC_MXC
  206. config FEC_MXC_MDIO_BASE
  207. hex "MDIO base address for the FEC controller"
  208. depends on FEC_MXC_SHARE_MDIO
  209. help
  210. This specifies the MDIO registers base address. It is used when
  211. two FEC controllers share MDIO bus.
  212. config FEC_MXC
  213. bool "FEC Ethernet controller"
  214. depends on MX28 || MX5 || MX6 || MX7 || IMX8 || IMX8M || VF610
  215. help
  216. This driver supports the 10/100 Fast Ethernet controller for
  217. NXP i.MX processors.
  218. config FMAN_ENET
  219. bool "Freescale FMan ethernet support"
  220. depends on ARM || PPC
  221. help
  222. This driver support the Freescale FMan Ethernet controller
  223. config FTMAC100
  224. bool "Ftmac100 Ethernet Support"
  225. help
  226. This MAC is present in Andestech SoCs.
  227. config FTGMAC100
  228. bool "Ftgmac100 Ethernet Support"
  229. depends on DM_ETH
  230. select PHYLIB
  231. help
  232. This driver supports the Faraday's FTGMAC100 Gigabit SoC
  233. Ethernet controller that can be found on Aspeed SoCs (which
  234. include NCSI).
  235. It is fully compliant with IEEE 802.3 specification for
  236. 10/100 Mbps Ethernet and IEEE 802.3z specification for 1000
  237. Mbps Ethernet and includes Reduced Media Independent
  238. Interface (RMII) and Reduced Gigabit Media Independent
  239. Interface (RGMII) interfaces. It adopts an AHB bus interface
  240. and integrates a link list DMA engine with direct M-Bus
  241. accesses for transmitting and receiving packets. It has
  242. independent TX/RX fifos, supports half and full duplex (1000
  243. Mbps mode only supports full duplex), flow control for full
  244. duplex and backpressure for half duplex.
  245. The FTGMAC100 also implements IP, TCP, UDP checksum offloads
  246. and supports IEEE 802.1Q VLAN tag insertion and removal. It
  247. offers high-priority transmit queue for QoS and CoS
  248. applications.
  249. config MCFFEC
  250. bool "ColdFire Ethernet Support"
  251. depends on DM_ETH
  252. select PHYLIB
  253. help
  254. This driver supports the network interface units in the
  255. ColdFire family.
  256. config FSLDMAFEC
  257. bool "ColdFire DMA Ethernet Support"
  258. depends on DM_ETH
  259. select PHYLIB
  260. help
  261. This driver supports the network interface units in the
  262. ColdFire family.
  263. config KS8851_MLL
  264. bool "Microchip KS8851-MLL controller driver"
  265. help
  266. The Microchip KS8851 parallel bus external ethernet interface chip.
  267. if KS8851_MLL
  268. if !DM_ETH
  269. config KS8851_MLL_BASEADDR
  270. hex "Microchip KS8851-MLL Base Address"
  271. help
  272. Define this to hold the physical address of the device (I/O space)
  273. endif #DM_ETH
  274. endif #KS8851_MLL
  275. config MVGBE
  276. bool "Marvell Orion5x/Kirkwood network interface support"
  277. depends on ARCH_KIRKWOOD || ARCH_ORION5X
  278. select PHYLIB if DM_ETH
  279. help
  280. This driver supports the network interface units in the
  281. Marvell Orion5x and Kirkwood SoCs
  282. config MVNETA
  283. bool "Marvell Armada XP/385/3700 network interface support"
  284. depends on ARMADA_XP || ARMADA_38X || ARMADA_3700
  285. select PHYLIB
  286. help
  287. This driver supports the network interface units in the
  288. Marvell ARMADA XP, ARMADA 38X and ARMADA 3700 SoCs
  289. config MVPP2
  290. bool "Marvell Armada 375/7K/8K network interface support"
  291. depends on ARMADA_375 || ARMADA_8K
  292. select PHYLIB
  293. select MVMDIO
  294. select DM_MDIO
  295. help
  296. This driver supports the network interface units in the
  297. Marvell ARMADA 375, 7K and 8K SoCs.
  298. config MACB
  299. bool "Cadence MACB/GEM Ethernet Interface"
  300. depends on DM_ETH
  301. select PHYLIB
  302. help
  303. The Cadence MACB ethernet interface is found on many Atmel
  304. AT91 and SAMA5 parts. This driver also supports the Cadence
  305. GEM (Gigabit Ethernet MAC) found in some ARM SoC devices.
  306. Say Y to include support for the MACB/GEM chip.
  307. config MACB_ZYNQ
  308. bool "Cadence MACB/GEM Ethernet Interface for Xilinx Zynq"
  309. depends on MACB
  310. help
  311. The Cadence MACB ethernet interface was used on Zynq platform.
  312. Say Y to enable support for the MACB/GEM in Zynq chip.
  313. config MT7628_ETH
  314. bool "MediaTek MT7628 Ethernet Interface"
  315. depends on SOC_MT7628
  316. select PHYLIB
  317. help
  318. The MediaTek MT7628 ethernet interface is used on MT7628 and
  319. MT7688 based boards.
  320. config PCH_GBE
  321. bool "Intel Platform Controller Hub EG20T GMAC driver"
  322. depends on DM_ETH && DM_PCI
  323. select PHYLIB
  324. help
  325. This MAC is present in Intel Platform Controller Hub EG20T. It
  326. supports 10/100/1000 Mbps operation.
  327. config RGMII
  328. bool "Enable RGMII"
  329. help
  330. Enable the support of the Reduced Gigabit Media-Independent
  331. Interface (RGMII).
  332. config MII
  333. bool "Enable MII"
  334. help
  335. Enable support of the Media-Independent Interface (MII)
  336. config PCNET
  337. bool "AMD PCnet series Ethernet controller driver"
  338. help
  339. This driver supports AMD PCnet series fast ethernet family of
  340. PCI chipsets/adapters.
  341. config RTL8139
  342. bool "Realtek 8139 series Ethernet controller driver"
  343. help
  344. This driver supports Realtek 8139 series fast ethernet family of
  345. PCI chipsets/adapters.
  346. config RTL8169
  347. bool "Realtek 8169 series Ethernet controller driver"
  348. help
  349. This driver supports Realtek 8169 series gigabit ethernet family of
  350. PCI/PCIe chipsets/adapters.
  351. config SMC911X
  352. bool "SMSC LAN911x and LAN921x controller driver"
  353. if SMC911X
  354. if !DM_ETH
  355. config SMC911X_BASE
  356. hex "SMC911X Base Address"
  357. help
  358. Define this to hold the physical address
  359. of the device (I/O space)
  360. endif #DM_ETH
  361. choice
  362. prompt "SMC911X bus width"
  363. default SMC911X_16_BIT
  364. config SMC911X_32_BIT
  365. bool "Enable 32-bit interface"
  366. config SMC911X_16_BIT
  367. bool "Enable 16-bit interface"
  368. help
  369. Define this if data bus is 16 bits. If your processor
  370. automatically converts one 32 bit word to two 16 bit
  371. words you may also try CONFIG_SMC911X_32_BIT.
  372. endchoice
  373. endif #SMC911X
  374. config SUN7I_GMAC
  375. bool "Enable Allwinner GMAC Ethernet support"
  376. help
  377. Enable the support for Sun7i GMAC Ethernet controller
  378. config SUN7I_GMAC_FORCE_TXERR
  379. bool "Force PA17 as gmac function"
  380. depends on SUN7I_GMAC
  381. help
  382. Some ethernet phys needs TXERR control. Since the GMAC
  383. doesn't have such signal, setting PA17 as GMAC function
  384. makes the pin output low, which enables data transmission.
  385. config SUN4I_EMAC
  386. bool "Allwinner Sun4i Ethernet MAC support"
  387. depends on DM_ETH
  388. select PHYLIB
  389. help
  390. This driver supports the Allwinner based SUN4I Ethernet MAC.
  391. config SUN8I_EMAC
  392. bool "Allwinner Sun8i Ethernet MAC support"
  393. depends on DM_ETH
  394. select PHYLIB
  395. select PHY_GIGE
  396. help
  397. This driver supports the Allwinner based SUN8I/SUN50I Ethernet MAC.
  398. It can be found in H3/A64/A83T based SoCs and compatible with both
  399. External and Internal PHYs.
  400. config SH_ETHER
  401. bool "Renesas SH Ethernet MAC"
  402. select PHYLIB
  403. help
  404. This driver supports the Ethernet for Renesas SH and ARM SoCs.
  405. source "drivers/net/ti/Kconfig"
  406. config XILINX_AXIEMAC
  407. depends on DM_ETH && (MICROBLAZE || ARCH_ZYNQ || ARCH_ZYNQMP)
  408. select PHYLIB
  409. select MII
  410. bool "Xilinx AXI Ethernet"
  411. help
  412. This MAC is present in Xilinx Microblaze, Zynq and ZynqMP SoCs.
  413. config XILINX_EMACLITE
  414. depends on DM_ETH && (MICROBLAZE || ARCH_ZYNQ || ARCH_ZYNQMP || MIPS)
  415. select PHYLIB
  416. select MII
  417. bool "Xilinx Ethernetlite"
  418. help
  419. This MAC is present in Xilinx Microblaze, Zynq and ZynqMP SoCs.
  420. config ZYNQ_GEM
  421. depends on DM_ETH && (ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_VERSAL)
  422. select PHYLIB
  423. bool "Xilinx Ethernet GEM"
  424. help
  425. This MAC is present in Xilinx Zynq and ZynqMP SoCs.
  426. config PIC32_ETH
  427. bool "Microchip PIC32 Ethernet Support"
  428. depends on DM_ETH && MACH_PIC32
  429. select PHYLIB
  430. help
  431. This driver implements 10/100 Mbps Ethernet and MAC layer for
  432. Microchip PIC32 microcontrollers.
  433. config GMAC_ROCKCHIP
  434. bool "Rockchip Synopsys Designware Ethernet MAC"
  435. depends on DM_ETH && ETH_DESIGNWARE
  436. help
  437. This driver provides Rockchip SoCs network support based on the
  438. Synopsys Designware driver.
  439. config RENESAS_RAVB
  440. bool "Renesas Ethernet AVB MAC"
  441. depends on DM_ETH && RCAR_GEN3
  442. select PHYLIB
  443. help
  444. This driver implements support for the Ethernet AVB block in
  445. Renesas M3 and H3 SoCs.
  446. config MPC8XX_FEC
  447. bool "Fast Ethernet Controller on MPC8XX"
  448. depends on MPC8xx
  449. select MII
  450. help
  451. This driver implements support for the Fast Ethernet Controller
  452. on MPC8XX
  453. config SNI_AVE
  454. bool "Socionext AVE Ethernet support"
  455. depends on DM_ETH && ARCH_UNIPHIER
  456. select PHYLIB
  457. select SYSCON
  458. select REGMAP
  459. help
  460. This driver implements support for the Socionext AVE Ethernet
  461. controller, as found on the Socionext UniPhier family.
  462. source "drivers/net/mscc_eswitch/Kconfig"
  463. config ETHER_ON_FEC1
  464. bool "FEC1"
  465. depends on MPC8XX_FEC
  466. default y
  467. config FEC1_PHY
  468. int "FEC1 PHY"
  469. depends on ETHER_ON_FEC1
  470. default -1
  471. help
  472. Define to the hardcoded PHY address which corresponds
  473. to the given FEC; i. e.
  474. #define CONFIG_FEC1_PHY 4
  475. means that the PHY with address 4 is connected to FEC1
  476. When set to -1, means to probe for first available.
  477. config PHY_NORXERR
  478. bool "PHY_NORXERR"
  479. depends on ETHER_ON_FEC1
  480. default n
  481. help
  482. The PHY does not have a RXERR line (RMII only).
  483. (so program the FEC to ignore it).
  484. config ETHER_ON_FEC2
  485. bool "FEC2"
  486. depends on MPC8XX_FEC && MPC885
  487. default y
  488. config FEC2_PHY
  489. int "FEC2 PHY"
  490. depends on ETHER_ON_FEC2
  491. default -1
  492. help
  493. Define to the hardcoded PHY address which corresponds
  494. to the given FEC; i. e.
  495. #define CONFIG_FEC1_PHY 4
  496. means that the PHY with address 4 is connected to FEC1
  497. When set to -1, means to probe for first available.
  498. config FEC2_PHY_NORXERR
  499. bool "PHY_NORXERR"
  500. depends on ETHER_ON_FEC2
  501. default n
  502. help
  503. The PHY does not have a RXERR line (RMII only).
  504. (so program the FEC to ignore it).
  505. config SYS_DPAA_QBMAN
  506. bool "Device tree fixup for QBMan on freescale SOCs"
  507. depends on (ARM || PPC) && !SPL_BUILD
  508. default y if ARCH_B4860 || \
  509. ARCH_B4420 || \
  510. ARCH_P1023 || \
  511. ARCH_P2041 || \
  512. ARCH_T1023 || \
  513. ARCH_T1024 || \
  514. ARCH_T1040 || \
  515. ARCH_T1042 || \
  516. ARCH_T2080 || \
  517. ARCH_T2081 || \
  518. ARCH_T4240 || \
  519. ARCH_T4160 || \
  520. ARCH_P4080 || \
  521. ARCH_P3041 || \
  522. ARCH_P5040 || \
  523. ARCH_P5020 || \
  524. ARCH_LS1043A || \
  525. ARCH_LS1046A
  526. help
  527. QBman fixups to allow deep sleep in DPAA 1 SOCs
  528. config TSEC_ENET
  529. select PHYLIB
  530. bool "Enable Three-Speed Ethernet Controller"
  531. help
  532. This driver implements support for the (Enhanced) Three-Speed
  533. Ethernet Controller found on Freescale SoCs.
  534. config MEDIATEK_ETH
  535. bool "MediaTek Ethernet GMAC Driver"
  536. depends on DM_ETH
  537. select PHYLIB
  538. select DM_GPIO
  539. select DM_RESET
  540. help
  541. This Driver support MediaTek Ethernet GMAC
  542. Say Y to enable support for the MediaTek Ethernet GMAC.
  543. config HIGMACV300_ETH
  544. bool "HiSilicon Gigabit Ethernet Controller"
  545. depends on DM_ETH
  546. select DM_RESET
  547. select PHYLIB
  548. help
  549. This driver supports HIGMACV300 Ethernet controller found on
  550. HiSilicon SoCs.
  551. config FSL_ENETC
  552. bool "NXP ENETC Ethernet controller"
  553. depends on DM_PCI && DM_ETH && DM_MDIO
  554. help
  555. This driver supports the NXP ENETC Ethernet controller found on some
  556. of the NXP SoCs.
  557. config MDIO_MUX_I2CREG
  558. bool "MDIO MUX accessed as a register over I2C"
  559. depends on DM_MDIO_MUX && DM_I2C
  560. help
  561. This driver is used for MDIO muxes driven by writing to a register of
  562. an I2C chip. The board it was developed for uses a mux controlled by
  563. on-board FPGA which in turn is accessed as a chip over I2C.
  564. config MVMDIO
  565. bool "Marvell MDIO interface support"
  566. depends on DM_MDIO
  567. help
  568. This driver supports the MDIO interface found in the network
  569. interface units of the Marvell EBU SoCs (Kirkwood, Orion5x,
  570. Dove, Armada 370, Armada XP, Armada 37xx and Armada7K/8K/8KP).
  571. This driver is used by the MVPP2 and MVNETA drivers.
  572. config FSL_LS_MDIO
  573. bool "NXP Layerscape MDIO interface support"
  574. depends on DM_MDIO
  575. help
  576. This driver supports the MDIO bus found on the Fman 10G Ethernet MACs and
  577. on the mEMAC (which supports both Clauses 22 and 45).
  578. endif # NETDEVICES