spr600_mt47h128m8_3_266_cl5_async.c 1.5 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113
  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2000-2009
  4. * Vipin Kumar, ST Microelectronics, vipin.kumar@st.com
  5. */
  6. #include <common.h>
  7. #if (CONFIG_DDR_PLL2)
  8. const u32 mpmc_conf_vals[CONFIG_SPEAR_MPMCREGS] = {
  9. 0x00000001,
  10. 0x00000000,
  11. 0x01000000,
  12. 0x00000101,
  13. 0x00000001,
  14. 0x01000000,
  15. 0x00010001,
  16. 0x00000100,
  17. 0x00010001,
  18. 0x00000003,
  19. 0x01000201,
  20. 0x06000202,
  21. 0x06060106,
  22. 0x03050502,
  23. 0x03040404,
  24. 0x02020503,
  25. 0x02010106,
  26. 0x03000404,
  27. 0x02030202,
  28. 0x03000204,
  29. 0x0707073f,
  30. 0x07070707,
  31. 0x06060607,
  32. 0x06060606,
  33. 0x05050506,
  34. 0x05050505,
  35. 0x04040405,
  36. 0x04040404,
  37. 0x03030304,
  38. 0x03030303,
  39. 0x02020203,
  40. 0x02020202,
  41. 0x01010102,
  42. 0x01010101,
  43. 0x08080a01,
  44. 0x0000023f,
  45. 0x00040800,
  46. 0x00000000,
  47. 0x00000f02,
  48. 0x00001b1b,
  49. 0x7f000000,
  50. 0x005f0000,
  51. 0x1c040b6a,
  52. 0x00640064,
  53. 0x00640064,
  54. 0x00640064,
  55. 0x00000064,
  56. 0x00200020,
  57. 0x00200020,
  58. 0x00200020,
  59. 0x00200020,
  60. 0x00200020,
  61. 0x00200020,
  62. 0x00200020,
  63. 0x000007ff,
  64. 0x00000000,
  65. 0x47ec00c8,
  66. 0x00c8001f,
  67. 0x00000000,
  68. 0x0000cd98,
  69. 0x00000000,
  70. 0x03030100,
  71. 0x03030303,
  72. 0x03030303,
  73. 0x03030303,
  74. 0x00270000,
  75. 0x00250027,
  76. 0x00300000,
  77. 0x008900b7,
  78. 0x003fffff,
  79. 0x003fffff,
  80. 0x00000000,
  81. 0x00000000,
  82. 0x003fffff,
  83. 0x003fffff,
  84. 0x00000000,
  85. 0x00000000,
  86. 0x003fffff,
  87. 0x003fffff,
  88. 0x00000000,
  89. 0x00000000,
  90. 0x003fffff,
  91. 0x003fffff,
  92. 0x00000000,
  93. 0x00000000,
  94. 0x003fffff,
  95. 0x003fffff,
  96. 0x00000000,
  97. 0x00000000,
  98. 0x003fffff,
  99. 0x003fffff,
  100. 0x00000000,
  101. 0x00000000,
  102. 0x003fffff,
  103. 0x003fffff,
  104. 0x00000000,
  105. 0x00000000,
  106. 0x00000000,
  107. 0x00000000,
  108. 0x00000000
  109. };
  110. #endif