cpu.c 2.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2010
  4. * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com.
  5. */
  6. #include <common.h>
  7. #include <command.h>
  8. #include <init.h>
  9. #include <asm/io.h>
  10. #include <asm/arch/hardware.h>
  11. #include <asm/arch/spr_misc.h>
  12. int arch_cpu_init(void)
  13. {
  14. struct misc_regs *const misc_p =
  15. (struct misc_regs *)CONFIG_SPEAR_MISCBASE;
  16. u32 periph1_clken, periph_clk_cfg;
  17. periph1_clken = readl(&misc_p->periph1_clken);
  18. #if defined(CONFIG_SPEAR600)
  19. periph1_clken |= MISC_GPT3ENB;
  20. #endif
  21. #if defined(CONFIG_PL011_SERIAL)
  22. periph1_clken |= MISC_UART0ENB;
  23. periph_clk_cfg = readl(&misc_p->periph_clk_cfg);
  24. periph_clk_cfg &= ~CONFIG_SPEAR_UARTCLKMSK;
  25. periph_clk_cfg |= CONFIG_SPEAR_UART48M;
  26. writel(periph_clk_cfg, &misc_p->periph_clk_cfg);
  27. #endif
  28. #if defined(CONFIG_ETH_DESIGNWARE)
  29. periph1_clken |= MISC_ETHENB;
  30. #endif
  31. #if defined(CONFIG_DW_UDC)
  32. periph1_clken |= MISC_USBDENB;
  33. #endif
  34. #if defined(CONFIG_SYS_I2C_DW)
  35. periph1_clken |= MISC_I2CENB;
  36. #endif
  37. #if defined(CONFIG_ST_SMI)
  38. periph1_clken |= MISC_SMIENB;
  39. #endif
  40. #if defined(CONFIG_NAND_FSMC)
  41. periph1_clken |= MISC_FSMCENB;
  42. #endif
  43. #if defined(CONFIG_USB_EHCI_SPEAR)
  44. periph1_clken |= PERIPH_USBH1 | PERIPH_USBH2;
  45. #endif
  46. #if defined(CONFIG_SPEAR_GPIO)
  47. periph1_clken |= MISC_GPIO3ENB | MISC_GPIO4ENB;
  48. #endif
  49. #if defined(CONFIG_PL022_SPI)
  50. periph1_clken |= MISC_SSP1ENB | MISC_SSP2ENB | MISC_SSP3ENB;
  51. #endif
  52. writel(periph1_clken, &misc_p->periph1_clken);
  53. return 0;
  54. }
  55. #ifdef CONFIG_DISPLAY_CPUINFO
  56. int print_cpuinfo(void)
  57. {
  58. #if defined(CONFIG_SPEAR600)
  59. printf("CPU: SPEAr600\n");
  60. #else
  61. #error CPU not supported in spear platform
  62. #endif
  63. return 0;
  64. }
  65. #endif
  66. #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_NAND_ECC_BCH) && defined(CONFIG_NAND_FSMC)
  67. static int do_switch_ecc(struct cmd_tbl *cmdtp, int flag, int argc,
  68. char *const argv[])
  69. {
  70. if (argc != 2)
  71. goto usage;
  72. if (strncmp(argv[1], "hw", 2) == 0) {
  73. /* 1-bit HW ECC */
  74. printf("Switching to 1-bit HW ECC\n");
  75. fsmc_nand_switch_ecc(1);
  76. } else if (strncmp(argv[1], "bch4", 2) == 0) {
  77. /* 4-bit SW ECC BCH4 */
  78. printf("Switching to 4-bit SW ECC (BCH4)\n");
  79. fsmc_nand_switch_ecc(4);
  80. } else {
  81. goto usage;
  82. }
  83. return 0;
  84. usage:
  85. printf("Usage: nandecc %s\n", cmdtp->usage);
  86. return 1;
  87. }
  88. U_BOOT_CMD(
  89. nandecc, 2, 0, do_switch_ecc,
  90. "switch NAND ECC calculation algorithm",
  91. "hw|bch4 - Switch between NAND hardware 1-bit HW and"
  92. " 4-bit SW BCH\n"
  93. );
  94. #endif