board_f.c 25 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (c) 2011 The Chromium OS Authors.
  4. * (C) Copyright 2002-2006
  5. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  6. *
  7. * (C) Copyright 2002
  8. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  9. * Marius Groeger <mgroeger@sysgo.de>
  10. */
  11. #include <common.h>
  12. #include <bloblist.h>
  13. #include <console.h>
  14. #include <cpu.h>
  15. #include <dm.h>
  16. #include <env.h>
  17. #include <env_internal.h>
  18. #include <fdtdec.h>
  19. #include <fs.h>
  20. #include <i2c.h>
  21. #include <initcall.h>
  22. #include <lcd.h>
  23. #include <malloc.h>
  24. #include <mapmem.h>
  25. #include <os.h>
  26. #include <post.h>
  27. #include <relocate.h>
  28. #ifdef CONFIG_SPL
  29. #include <spl.h>
  30. #endif
  31. #include <status_led.h>
  32. #include <sysreset.h>
  33. #include <timer.h>
  34. #include <trace.h>
  35. #include <video.h>
  36. #include <watchdog.h>
  37. #ifdef CONFIG_MACH_TYPE
  38. #include <asm/mach-types.h>
  39. #endif
  40. #if defined(CONFIG_MP) && defined(CONFIG_PPC)
  41. #include <asm/mp.h>
  42. #endif
  43. #include <asm/io.h>
  44. #include <asm/sections.h>
  45. #include <dm/root.h>
  46. #include <linux/errno.h>
  47. /*
  48. * Pointer to initial global data area
  49. *
  50. * Here we initialize it if needed.
  51. */
  52. #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
  53. #undef XTRN_DECLARE_GLOBAL_DATA_PTR
  54. #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
  55. DECLARE_GLOBAL_DATA_PTR = (gd_t *)(CONFIG_SYS_INIT_GD_ADDR);
  56. #else
  57. DECLARE_GLOBAL_DATA_PTR;
  58. #endif
  59. /*
  60. * TODO(sjg@chromium.org): IMO this code should be
  61. * refactored to a single function, something like:
  62. *
  63. * void led_set_state(enum led_colour_t colour, int on);
  64. */
  65. /************************************************************************
  66. * Coloured LED functionality
  67. ************************************************************************
  68. * May be supplied by boards if desired
  69. */
  70. __weak void coloured_LED_init(void) {}
  71. __weak void red_led_on(void) {}
  72. __weak void red_led_off(void) {}
  73. __weak void green_led_on(void) {}
  74. __weak void green_led_off(void) {}
  75. __weak void yellow_led_on(void) {}
  76. __weak void yellow_led_off(void) {}
  77. __weak void blue_led_on(void) {}
  78. __weak void blue_led_off(void) {}
  79. /*
  80. * Why is gd allocated a register? Prior to reloc it might be better to
  81. * just pass it around to each function in this file?
  82. *
  83. * After reloc one could argue that it is hardly used and doesn't need
  84. * to be in a register. Or if it is it should perhaps hold pointers to all
  85. * global data for all modules, so that post-reloc we can avoid the massive
  86. * literal pool we get on ARM. Or perhaps just encourage each module to use
  87. * a structure...
  88. */
  89. #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
  90. static int init_func_watchdog_init(void)
  91. {
  92. # if defined(CONFIG_HW_WATCHDOG) && \
  93. (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
  94. defined(CONFIG_SH) || \
  95. defined(CONFIG_DESIGNWARE_WATCHDOG) || \
  96. defined(CONFIG_IMX_WATCHDOG))
  97. hw_watchdog_init();
  98. puts(" Watchdog enabled\n");
  99. # endif
  100. WATCHDOG_RESET();
  101. return 0;
  102. }
  103. int init_func_watchdog_reset(void)
  104. {
  105. WATCHDOG_RESET();
  106. return 0;
  107. }
  108. #endif /* CONFIG_WATCHDOG */
  109. __weak void board_add_ram_info(int use_default)
  110. {
  111. /* please define platform specific board_add_ram_info() */
  112. }
  113. static int init_baud_rate(void)
  114. {
  115. gd->baudrate = env_get_ulong("baudrate", 10, CONFIG_BAUDRATE);
  116. return 0;
  117. }
  118. static int display_text_info(void)
  119. {
  120. #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
  121. ulong bss_start, bss_end, text_base;
  122. bss_start = (ulong)&__bss_start;
  123. bss_end = (ulong)&__bss_end;
  124. #ifdef CONFIG_SYS_TEXT_BASE
  125. text_base = CONFIG_SYS_TEXT_BASE;
  126. #else
  127. text_base = CONFIG_SYS_MONITOR_BASE;
  128. #endif
  129. debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
  130. text_base, bss_start, bss_end);
  131. #endif
  132. return 0;
  133. }
  134. #ifdef CONFIG_SYSRESET
  135. static int print_resetinfo(void)
  136. {
  137. struct udevice *dev;
  138. char status[256];
  139. int ret;
  140. ret = uclass_first_device_err(UCLASS_SYSRESET, &dev);
  141. if (ret) {
  142. debug("%s: No sysreset device found (error: %d)\n",
  143. __func__, ret);
  144. /* Not all boards have sysreset drivers available during early
  145. * boot, so don't fail if one can't be found.
  146. */
  147. return 0;
  148. }
  149. if (!sysreset_get_status(dev, status, sizeof(status)))
  150. printf("%s", status);
  151. return 0;
  152. }
  153. #endif
  154. #if defined(CONFIG_DISPLAY_CPUINFO) && CONFIG_IS_ENABLED(CPU)
  155. static int print_cpuinfo(void)
  156. {
  157. struct udevice *dev;
  158. char desc[512];
  159. int ret;
  160. ret = uclass_first_device_err(UCLASS_CPU, &dev);
  161. if (ret) {
  162. debug("%s: Could not get CPU device (err = %d)\n",
  163. __func__, ret);
  164. return ret;
  165. }
  166. ret = cpu_get_desc(dev, desc, sizeof(desc));
  167. if (ret) {
  168. debug("%s: Could not get CPU description (err = %d)\n",
  169. dev->name, ret);
  170. return ret;
  171. }
  172. printf("CPU: %s\n", desc);
  173. return 0;
  174. }
  175. #endif
  176. static int announce_dram_init(void)
  177. {
  178. puts("DRAM: ");
  179. return 0;
  180. }
  181. static int show_dram_config(void)
  182. {
  183. unsigned long long size;
  184. #ifdef CONFIG_NR_DRAM_BANKS
  185. int i;
  186. debug("\nRAM Configuration:\n");
  187. for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
  188. size += gd->bd->bi_dram[i].size;
  189. debug("Bank #%d: %llx ", i,
  190. (unsigned long long)(gd->bd->bi_dram[i].start));
  191. #ifdef DEBUG
  192. print_size(gd->bd->bi_dram[i].size, "\n");
  193. #endif
  194. }
  195. debug("\nDRAM: ");
  196. #else
  197. size = gd->ram_size;
  198. #endif
  199. print_size(size, "");
  200. board_add_ram_info(0);
  201. putc('\n');
  202. return 0;
  203. }
  204. __weak int dram_init_banksize(void)
  205. {
  206. #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
  207. gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
  208. gd->bd->bi_dram[0].size = get_effective_memsize();
  209. #endif
  210. return 0;
  211. }
  212. #if defined(CONFIG_SYS_I2C)
  213. static int init_func_i2c(void)
  214. {
  215. puts("I2C: ");
  216. #ifdef CONFIG_SYS_I2C
  217. i2c_init_all();
  218. #else
  219. i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
  220. #endif
  221. puts("ready\n");
  222. return 0;
  223. }
  224. #endif
  225. #if defined(CONFIG_VID)
  226. __weak int init_func_vid(void)
  227. {
  228. return 0;
  229. }
  230. #endif
  231. static int setup_mon_len(void)
  232. {
  233. #if defined(__ARM__) || defined(__MICROBLAZE__)
  234. gd->mon_len = (ulong)&__bss_end - (ulong)_start;
  235. #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP)
  236. gd->mon_len = (ulong)&_end - (ulong)_init;
  237. #elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA)
  238. gd->mon_len = CONFIG_SYS_MONITOR_LEN;
  239. #elif defined(CONFIG_NDS32) || defined(CONFIG_SH) || defined(CONFIG_RISCV)
  240. gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
  241. #elif defined(CONFIG_SYS_MONITOR_BASE)
  242. /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
  243. gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
  244. #endif
  245. return 0;
  246. }
  247. static int setup_spl_handoff(void)
  248. {
  249. #if CONFIG_IS_ENABLED(HANDOFF)
  250. gd->spl_handoff = bloblist_find(BLOBLISTT_SPL_HANDOFF,
  251. sizeof(struct spl_handoff));
  252. debug("Found SPL hand-off info %p\n", gd->spl_handoff);
  253. #endif
  254. return 0;
  255. }
  256. __weak int arch_cpu_init(void)
  257. {
  258. return 0;
  259. }
  260. __weak int mach_cpu_init(void)
  261. {
  262. return 0;
  263. }
  264. /* Get the top of usable RAM */
  265. __weak ulong board_get_usable_ram_top(ulong total_size)
  266. {
  267. #ifdef CONFIG_SYS_SDRAM_BASE
  268. /*
  269. * Detect whether we have so much RAM that it goes past the end of our
  270. * 32-bit address space. If so, clip the usable RAM so it doesn't.
  271. */
  272. if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
  273. /*
  274. * Will wrap back to top of 32-bit space when reservations
  275. * are made.
  276. */
  277. return 0;
  278. #endif
  279. return gd->ram_top;
  280. }
  281. static int setup_dest_addr(void)
  282. {
  283. debug("Monitor len: %08lX\n", gd->mon_len);
  284. /*
  285. * Ram is setup, size stored in gd !!
  286. */
  287. debug("Ram size: %08lX\n", (ulong)gd->ram_size);
  288. #if defined(CONFIG_SYS_MEM_TOP_HIDE)
  289. /*
  290. * Subtract specified amount of memory to hide so that it won't
  291. * get "touched" at all by U-Boot. By fixing up gd->ram_size
  292. * the Linux kernel should now get passed the now "corrected"
  293. * memory size and won't touch it either. This should work
  294. * for arch/ppc and arch/powerpc. Only Linux board ports in
  295. * arch/powerpc with bootwrapper support, that recalculate the
  296. * memory size from the SDRAM controller setup will have to
  297. * get fixed.
  298. */
  299. gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
  300. #endif
  301. #ifdef CONFIG_SYS_SDRAM_BASE
  302. gd->ram_base = CONFIG_SYS_SDRAM_BASE;
  303. #endif
  304. gd->ram_top = gd->ram_base + get_effective_memsize();
  305. gd->ram_top = board_get_usable_ram_top(gd->mon_len);
  306. gd->relocaddr = gd->ram_top;
  307. debug("Ram top: %08lX\n", (ulong)gd->ram_top);
  308. #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
  309. /*
  310. * We need to make sure the location we intend to put secondary core
  311. * boot code is reserved and not used by any part of u-boot
  312. */
  313. if (gd->relocaddr > determine_mp_bootpg(NULL)) {
  314. gd->relocaddr = determine_mp_bootpg(NULL);
  315. debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
  316. }
  317. #endif
  318. return 0;
  319. }
  320. #ifdef CONFIG_PRAM
  321. /* reserve protected RAM */
  322. static int reserve_pram(void)
  323. {
  324. ulong reg;
  325. reg = env_get_ulong("pram", 10, CONFIG_PRAM);
  326. gd->relocaddr -= (reg << 10); /* size is in kB */
  327. debug("Reserving %ldk for protected RAM at %08lx\n", reg,
  328. gd->relocaddr);
  329. return 0;
  330. }
  331. #endif /* CONFIG_PRAM */
  332. /* Round memory pointer down to next 4 kB limit */
  333. static int reserve_round_4k(void)
  334. {
  335. gd->relocaddr &= ~(4096 - 1);
  336. return 0;
  337. }
  338. #ifdef CONFIG_ARM
  339. __weak int reserve_mmu(void)
  340. {
  341. #if !(CONFIG_IS_ENABLED(SYS_ICACHE_OFF) && CONFIG_IS_ENABLED(SYS_DCACHE_OFF))
  342. /* reserve TLB table */
  343. gd->arch.tlb_size = PGTABLE_SIZE;
  344. gd->relocaddr -= gd->arch.tlb_size;
  345. /* round down to next 64 kB limit */
  346. gd->relocaddr &= ~(0x10000 - 1);
  347. gd->arch.tlb_addr = gd->relocaddr;
  348. debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
  349. gd->arch.tlb_addr + gd->arch.tlb_size);
  350. #ifdef CONFIG_SYS_MEM_RESERVE_SECURE
  351. /*
  352. * Record allocated tlb_addr in case gd->tlb_addr to be overwritten
  353. * with location within secure ram.
  354. */
  355. gd->arch.tlb_allocated = gd->arch.tlb_addr;
  356. #endif
  357. #endif
  358. return 0;
  359. }
  360. #endif
  361. static int reserve_video(void)
  362. {
  363. #ifdef CONFIG_DM_VIDEO
  364. ulong addr;
  365. int ret;
  366. addr = gd->relocaddr;
  367. ret = video_reserve(&addr);
  368. if (ret)
  369. return ret;
  370. gd->relocaddr = addr;
  371. #elif defined(CONFIG_LCD)
  372. # ifdef CONFIG_FB_ADDR
  373. gd->fb_base = CONFIG_FB_ADDR;
  374. # else
  375. /* reserve memory for LCD display (always full pages) */
  376. gd->relocaddr = lcd_setmem(gd->relocaddr);
  377. gd->fb_base = gd->relocaddr;
  378. # endif /* CONFIG_FB_ADDR */
  379. #endif
  380. return 0;
  381. }
  382. static int reserve_trace(void)
  383. {
  384. #ifdef CONFIG_TRACE
  385. gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
  386. gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
  387. debug("Reserving %luk for trace data at: %08lx\n",
  388. (unsigned long)CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
  389. #endif
  390. return 0;
  391. }
  392. static int reserve_uboot(void)
  393. {
  394. if (!(gd->flags & GD_FLG_SKIP_RELOC)) {
  395. /*
  396. * reserve memory for U-Boot code, data & bss
  397. * round down to next 4 kB limit
  398. */
  399. gd->relocaddr -= gd->mon_len;
  400. gd->relocaddr &= ~(4096 - 1);
  401. #if defined(CONFIG_E500) || defined(CONFIG_MIPS)
  402. /* round down to next 64 kB limit so that IVPR stays aligned */
  403. gd->relocaddr &= ~(65536 - 1);
  404. #endif
  405. debug("Reserving %ldk for U-Boot at: %08lx\n",
  406. gd->mon_len >> 10, gd->relocaddr);
  407. }
  408. gd->start_addr_sp = gd->relocaddr;
  409. return 0;
  410. }
  411. #ifdef CONFIG_SYS_NONCACHED_MEMORY
  412. static int reserve_noncached(void)
  413. {
  414. /*
  415. * The value of gd->start_addr_sp must match the value of malloc_start
  416. * calculated in boatrd_f.c:initr_malloc(), which is passed to
  417. * board_r.c:mem_malloc_init() and then used by
  418. * cache.c:noncached_init()
  419. *
  420. * These calculations must match the code in cache.c:noncached_init()
  421. */
  422. gd->start_addr_sp = ALIGN(gd->start_addr_sp, MMU_SECTION_SIZE) -
  423. MMU_SECTION_SIZE;
  424. gd->start_addr_sp -= ALIGN(CONFIG_SYS_NONCACHED_MEMORY,
  425. MMU_SECTION_SIZE);
  426. debug("Reserving %dM for noncached_alloc() at: %08lx\n",
  427. CONFIG_SYS_NONCACHED_MEMORY >> 20, gd->start_addr_sp);
  428. return 0;
  429. }
  430. #endif
  431. /* reserve memory for malloc() area */
  432. static int reserve_malloc(void)
  433. {
  434. gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
  435. debug("Reserving %dk for malloc() at: %08lx\n",
  436. TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
  437. #ifdef CONFIG_SYS_NONCACHED_MEMORY
  438. reserve_noncached();
  439. #endif
  440. return 0;
  441. }
  442. /* (permanently) allocate a Board Info struct */
  443. static int reserve_board(void)
  444. {
  445. if (!gd->bd) {
  446. gd->start_addr_sp -= sizeof(bd_t);
  447. gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
  448. memset(gd->bd, '\0', sizeof(bd_t));
  449. debug("Reserving %zu Bytes for Board Info at: %08lx\n",
  450. sizeof(bd_t), gd->start_addr_sp);
  451. }
  452. return 0;
  453. }
  454. static int setup_machine(void)
  455. {
  456. #ifdef CONFIG_MACH_TYPE
  457. gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
  458. #endif
  459. return 0;
  460. }
  461. static int reserve_global_data(void)
  462. {
  463. gd->start_addr_sp -= sizeof(gd_t);
  464. gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
  465. debug("Reserving %zu Bytes for Global Data at: %08lx\n",
  466. sizeof(gd_t), gd->start_addr_sp);
  467. return 0;
  468. }
  469. static int reserve_fdt(void)
  470. {
  471. #ifndef CONFIG_OF_EMBED
  472. /*
  473. * If the device tree is sitting immediately above our image then we
  474. * must relocate it. If it is embedded in the data section, then it
  475. * will be relocated with other data.
  476. */
  477. if (gd->fdt_blob) {
  478. gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
  479. gd->start_addr_sp -= gd->fdt_size;
  480. gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
  481. debug("Reserving %lu Bytes for FDT at: %08lx\n",
  482. gd->fdt_size, gd->start_addr_sp);
  483. }
  484. #endif
  485. return 0;
  486. }
  487. static int reserve_bootstage(void)
  488. {
  489. #ifdef CONFIG_BOOTSTAGE
  490. int size = bootstage_get_size();
  491. gd->start_addr_sp -= size;
  492. gd->new_bootstage = map_sysmem(gd->start_addr_sp, size);
  493. debug("Reserving %#x Bytes for bootstage at: %08lx\n", size,
  494. gd->start_addr_sp);
  495. #endif
  496. return 0;
  497. }
  498. __weak int arch_reserve_stacks(void)
  499. {
  500. return 0;
  501. }
  502. static int reserve_stacks(void)
  503. {
  504. /* make stack pointer 16-byte aligned */
  505. gd->start_addr_sp -= 16;
  506. gd->start_addr_sp &= ~0xf;
  507. /*
  508. * let the architecture-specific code tailor gd->start_addr_sp and
  509. * gd->irq_sp
  510. */
  511. return arch_reserve_stacks();
  512. }
  513. static int reserve_bloblist(void)
  514. {
  515. #ifdef CONFIG_BLOBLIST
  516. gd->start_addr_sp &= ~0xf;
  517. gd->start_addr_sp -= CONFIG_BLOBLIST_SIZE;
  518. gd->new_bloblist = map_sysmem(gd->start_addr_sp, CONFIG_BLOBLIST_SIZE);
  519. #endif
  520. return 0;
  521. }
  522. static int display_new_sp(void)
  523. {
  524. debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
  525. return 0;
  526. }
  527. #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
  528. defined(CONFIG_SH)
  529. static int setup_board_part1(void)
  530. {
  531. bd_t *bd = gd->bd;
  532. /*
  533. * Save local variables to board info struct
  534. */
  535. bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
  536. bd->bi_memsize = gd->ram_size; /* size in bytes */
  537. #ifdef CONFIG_SYS_SRAM_BASE
  538. bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
  539. bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
  540. #endif
  541. #if defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
  542. bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
  543. #endif
  544. #if defined(CONFIG_M68K)
  545. bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
  546. #endif
  547. #if defined(CONFIG_MPC83xx)
  548. bd->bi_immrbar = CONFIG_SYS_IMMR;
  549. #endif
  550. return 0;
  551. }
  552. #endif
  553. #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
  554. static int setup_board_part2(void)
  555. {
  556. bd_t *bd = gd->bd;
  557. bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
  558. bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
  559. #if defined(CONFIG_CPM2)
  560. bd->bi_cpmfreq = gd->arch.cpm_clk;
  561. bd->bi_brgfreq = gd->arch.brg_clk;
  562. bd->bi_sccfreq = gd->arch.scc_clk;
  563. bd->bi_vco = gd->arch.vco_out;
  564. #endif /* CONFIG_CPM2 */
  565. #if defined(CONFIG_M68K) && defined(CONFIG_PCI)
  566. bd->bi_pcifreq = gd->pci_clk;
  567. #endif
  568. #if defined(CONFIG_EXTRA_CLOCK)
  569. bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */
  570. bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */
  571. bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */
  572. #endif
  573. return 0;
  574. }
  575. #endif
  576. #ifdef CONFIG_POST
  577. static int init_post(void)
  578. {
  579. post_bootmode_init();
  580. post_run(NULL, POST_ROM | post_bootmode_get(0));
  581. return 0;
  582. }
  583. #endif
  584. static int reloc_fdt(void)
  585. {
  586. #ifndef CONFIG_OF_EMBED
  587. if (gd->flags & GD_FLG_SKIP_RELOC)
  588. return 0;
  589. if (gd->new_fdt) {
  590. memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
  591. gd->fdt_blob = gd->new_fdt;
  592. }
  593. #endif
  594. return 0;
  595. }
  596. static int reloc_bootstage(void)
  597. {
  598. #ifdef CONFIG_BOOTSTAGE
  599. if (gd->flags & GD_FLG_SKIP_RELOC)
  600. return 0;
  601. if (gd->new_bootstage) {
  602. int size = bootstage_get_size();
  603. debug("Copying bootstage from %p to %p, size %x\n",
  604. gd->bootstage, gd->new_bootstage, size);
  605. memcpy(gd->new_bootstage, gd->bootstage, size);
  606. gd->bootstage = gd->new_bootstage;
  607. bootstage_relocate();
  608. }
  609. #endif
  610. return 0;
  611. }
  612. static int reloc_bloblist(void)
  613. {
  614. #ifdef CONFIG_BLOBLIST
  615. if (gd->flags & GD_FLG_SKIP_RELOC)
  616. return 0;
  617. if (gd->new_bloblist) {
  618. int size = CONFIG_BLOBLIST_SIZE;
  619. debug("Copying bloblist from %p to %p, size %x\n",
  620. gd->bloblist, gd->new_bloblist, size);
  621. memcpy(gd->new_bloblist, gd->bloblist, size);
  622. gd->bloblist = gd->new_bloblist;
  623. }
  624. #endif
  625. return 0;
  626. }
  627. static int setup_reloc(void)
  628. {
  629. if (gd->flags & GD_FLG_SKIP_RELOC) {
  630. debug("Skipping relocation due to flag\n");
  631. return 0;
  632. }
  633. #ifdef CONFIG_SYS_TEXT_BASE
  634. #ifdef ARM
  635. gd->reloc_off = gd->relocaddr - (unsigned long)__image_copy_start;
  636. #elif defined(CONFIG_M68K)
  637. /*
  638. * On all ColdFire arch cpu, monitor code starts always
  639. * just after the default vector table location, so at 0x400
  640. */
  641. gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
  642. #elif !defined(CONFIG_SANDBOX)
  643. gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
  644. #endif
  645. #endif
  646. memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
  647. debug("Relocation Offset is: %08lx\n", gd->reloc_off);
  648. debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
  649. gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
  650. gd->start_addr_sp);
  651. return 0;
  652. }
  653. #ifdef CONFIG_OF_BOARD_FIXUP
  654. static int fix_fdt(void)
  655. {
  656. return board_fix_fdt((void *)gd->fdt_blob);
  657. }
  658. #endif
  659. /* ARM calls relocate_code from its crt0.S */
  660. #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
  661. !CONFIG_IS_ENABLED(X86_64)
  662. static int jump_to_copy(void)
  663. {
  664. if (gd->flags & GD_FLG_SKIP_RELOC)
  665. return 0;
  666. /*
  667. * x86 is special, but in a nice way. It uses a trampoline which
  668. * enables the dcache if possible.
  669. *
  670. * For now, other archs use relocate_code(), which is implemented
  671. * similarly for all archs. When we do generic relocation, hopefully
  672. * we can make all archs enable the dcache prior to relocation.
  673. */
  674. #if defined(CONFIG_X86) || defined(CONFIG_ARC)
  675. /*
  676. * SDRAM and console are now initialised. The final stack can now
  677. * be setup in SDRAM. Code execution will continue in Flash, but
  678. * with the stack in SDRAM and Global Data in temporary memory
  679. * (CPU cache)
  680. */
  681. arch_setup_gd(gd->new_gd);
  682. board_init_f_r_trampoline(gd->start_addr_sp);
  683. #else
  684. relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
  685. #endif
  686. return 0;
  687. }
  688. #endif
  689. /* Record the board_init_f() bootstage (after arch_cpu_init()) */
  690. static int initf_bootstage(void)
  691. {
  692. bool from_spl = IS_ENABLED(CONFIG_SPL_BOOTSTAGE) &&
  693. IS_ENABLED(CONFIG_BOOTSTAGE_STASH);
  694. int ret;
  695. ret = bootstage_init(!from_spl);
  696. if (ret)
  697. return ret;
  698. if (from_spl) {
  699. const void *stash = map_sysmem(CONFIG_BOOTSTAGE_STASH_ADDR,
  700. CONFIG_BOOTSTAGE_STASH_SIZE);
  701. ret = bootstage_unstash(stash, CONFIG_BOOTSTAGE_STASH_SIZE);
  702. if (ret && ret != -ENOENT) {
  703. debug("Failed to unstash bootstage: err=%d\n", ret);
  704. return ret;
  705. }
  706. }
  707. bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
  708. return 0;
  709. }
  710. static int initf_console_record(void)
  711. {
  712. #if defined(CONFIG_CONSOLE_RECORD) && CONFIG_VAL(SYS_MALLOC_F_LEN)
  713. return console_record_init();
  714. #else
  715. return 0;
  716. #endif
  717. }
  718. static int initf_dm(void)
  719. {
  720. #if defined(CONFIG_DM) && CONFIG_VAL(SYS_MALLOC_F_LEN)
  721. int ret;
  722. bootstage_start(BOOTSTATE_ID_ACCUM_DM_F, "dm_f");
  723. ret = dm_init_and_scan(true);
  724. bootstage_accum(BOOTSTATE_ID_ACCUM_DM_F);
  725. if (ret)
  726. return ret;
  727. #endif
  728. #ifdef CONFIG_TIMER_EARLY
  729. ret = dm_timer_init();
  730. if (ret)
  731. return ret;
  732. #endif
  733. return 0;
  734. }
  735. /* Architecture-specific memory reservation */
  736. __weak int reserve_arch(void)
  737. {
  738. return 0;
  739. }
  740. __weak int arch_cpu_init_dm(void)
  741. {
  742. return 0;
  743. }
  744. static const init_fnc_t init_sequence_f[] = {
  745. setup_mon_len,
  746. #ifdef CONFIG_OF_CONTROL
  747. fdtdec_setup,
  748. #endif
  749. #ifdef CONFIG_TRACE_EARLY
  750. trace_early_init,
  751. #endif
  752. initf_malloc,
  753. log_init,
  754. initf_bootstage, /* uses its own timer, so does not need DM */
  755. #ifdef CONFIG_BLOBLIST
  756. bloblist_init,
  757. #endif
  758. setup_spl_handoff,
  759. initf_console_record,
  760. #if defined(CONFIG_HAVE_FSP)
  761. arch_fsp_init,
  762. #endif
  763. arch_cpu_init, /* basic arch cpu dependent setup */
  764. mach_cpu_init, /* SoC/machine dependent CPU setup */
  765. initf_dm,
  766. arch_cpu_init_dm,
  767. #if defined(CONFIG_BOARD_EARLY_INIT_F)
  768. board_early_init_f,
  769. #endif
  770. #if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
  771. /* get CPU and bus clocks according to the environment variable */
  772. get_clocks, /* get CPU and bus clocks (etc.) */
  773. #endif
  774. #if !defined(CONFIG_M68K)
  775. timer_init, /* initialize timer */
  776. #endif
  777. #if defined(CONFIG_BOARD_POSTCLK_INIT)
  778. board_postclk_init,
  779. #endif
  780. env_init, /* initialize environment */
  781. init_baud_rate, /* initialze baudrate settings */
  782. serial_init, /* serial communications setup */
  783. console_init_f, /* stage 1 init of console */
  784. display_options, /* say that we are here */
  785. display_text_info, /* show debugging info if required */
  786. #if defined(CONFIG_PPC) || defined(CONFIG_SH) || defined(CONFIG_X86)
  787. checkcpu,
  788. #endif
  789. #if defined(CONFIG_SYSRESET)
  790. print_resetinfo,
  791. #endif
  792. #if defined(CONFIG_DISPLAY_CPUINFO)
  793. print_cpuinfo, /* display cpu info (and speed) */
  794. #endif
  795. #if defined(CONFIG_DTB_RESELECT)
  796. embedded_dtb_select,
  797. #endif
  798. #if defined(CONFIG_DISPLAY_BOARDINFO)
  799. show_board_info,
  800. #endif
  801. INIT_FUNC_WATCHDOG_INIT
  802. #if defined(CONFIG_MISC_INIT_F)
  803. misc_init_f,
  804. #endif
  805. INIT_FUNC_WATCHDOG_RESET
  806. #if defined(CONFIG_SYS_I2C)
  807. init_func_i2c,
  808. #endif
  809. #if defined(CONFIG_VID) && !defined(CONFIG_SPL)
  810. init_func_vid,
  811. #endif
  812. announce_dram_init,
  813. dram_init, /* configure available RAM banks */
  814. #ifdef CONFIG_POST
  815. post_init_f,
  816. #endif
  817. INIT_FUNC_WATCHDOG_RESET
  818. #if defined(CONFIG_SYS_DRAM_TEST)
  819. testdram,
  820. #endif /* CONFIG_SYS_DRAM_TEST */
  821. INIT_FUNC_WATCHDOG_RESET
  822. #ifdef CONFIG_POST
  823. init_post,
  824. #endif
  825. INIT_FUNC_WATCHDOG_RESET
  826. /*
  827. * Now that we have DRAM mapped and working, we can
  828. * relocate the code and continue running from DRAM.
  829. *
  830. * Reserve memory at end of RAM for (top down in that order):
  831. * - area that won't get touched by U-Boot and Linux (optional)
  832. * - kernel log buffer
  833. * - protected RAM
  834. * - LCD framebuffer
  835. * - monitor code
  836. * - board info struct
  837. */
  838. setup_dest_addr,
  839. #ifdef CONFIG_PRAM
  840. reserve_pram,
  841. #endif
  842. reserve_round_4k,
  843. #ifdef CONFIG_ARM
  844. reserve_mmu,
  845. #endif
  846. reserve_video,
  847. reserve_trace,
  848. reserve_uboot,
  849. reserve_malloc,
  850. reserve_board,
  851. setup_machine,
  852. reserve_global_data,
  853. reserve_fdt,
  854. reserve_bootstage,
  855. reserve_bloblist,
  856. reserve_arch,
  857. reserve_stacks,
  858. dram_init_banksize,
  859. show_dram_config,
  860. #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
  861. defined(CONFIG_SH)
  862. setup_board_part1,
  863. #endif
  864. #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
  865. INIT_FUNC_WATCHDOG_RESET
  866. setup_board_part2,
  867. #endif
  868. display_new_sp,
  869. #ifdef CONFIG_OF_BOARD_FIXUP
  870. fix_fdt,
  871. #endif
  872. INIT_FUNC_WATCHDOG_RESET
  873. reloc_fdt,
  874. reloc_bootstage,
  875. reloc_bloblist,
  876. setup_reloc,
  877. #if defined(CONFIG_X86) || defined(CONFIG_ARC)
  878. copy_uboot_to_ram,
  879. do_elf_reloc_fixups,
  880. clear_bss,
  881. #endif
  882. #if defined(CONFIG_XTENSA)
  883. clear_bss,
  884. #endif
  885. #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
  886. !CONFIG_IS_ENABLED(X86_64)
  887. jump_to_copy,
  888. #endif
  889. NULL,
  890. };
  891. void board_init_f(ulong boot_flags)
  892. {
  893. gd->flags = boot_flags;
  894. gd->have_console = 0;
  895. if (initcall_run_list(init_sequence_f))
  896. hang();
  897. #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
  898. !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64) && \
  899. !defined(CONFIG_ARC)
  900. /* NOTREACHED - jump_to_copy() does not return */
  901. hang();
  902. #endif
  903. }
  904. #if defined(CONFIG_X86) || defined(CONFIG_ARC)
  905. /*
  906. * For now this code is only used on x86.
  907. *
  908. * init_sequence_f_r is the list of init functions which are run when
  909. * U-Boot is executing from Flash with a semi-limited 'C' environment.
  910. * The following limitations must be considered when implementing an
  911. * '_f_r' function:
  912. * - 'static' variables are read-only
  913. * - Global Data (gd->xxx) is read/write
  914. *
  915. * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
  916. * supported). It _should_, if possible, copy global data to RAM and
  917. * initialise the CPU caches (to speed up the relocation process)
  918. *
  919. * NOTE: At present only x86 uses this route, but it is intended that
  920. * all archs will move to this when generic relocation is implemented.
  921. */
  922. static const init_fnc_t init_sequence_f_r[] = {
  923. #if !CONFIG_IS_ENABLED(X86_64)
  924. init_cache_f_r,
  925. #endif
  926. NULL,
  927. };
  928. void board_init_f_r(void)
  929. {
  930. if (initcall_run_list(init_sequence_f_r))
  931. hang();
  932. /*
  933. * The pre-relocation drivers may be using memory that has now gone
  934. * away. Mark serial as unavailable - this will fall back to the debug
  935. * UART if available.
  936. *
  937. * Do the same with log drivers since the memory may not be available.
  938. */
  939. gd->flags &= ~(GD_FLG_SERIAL_READY | GD_FLG_LOG_READY);
  940. #ifdef CONFIG_TIMER
  941. gd->timer = NULL;
  942. #endif
  943. /*
  944. * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
  945. * Transfer execution from Flash to RAM by calculating the address
  946. * of the in-RAM copy of board_init_r() and calling it
  947. */
  948. (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
  949. /* NOTREACHED - board_init_r() does not return */
  950. hang();
  951. }
  952. #endif /* CONFIG_X86 */