starfive_visionfive2.dts 8.8 KB

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  1. // SPDX-License-Identifier: GPL-2.0 OR MIT
  2. /*
  3. * Copyright (C) 2022 StarFive Technology Co., Ltd.
  4. */
  5. /dts-v1/;
  6. #include "jh7110.dtsi"
  7. #include <dt-bindings/gpio/gpio.h>
  8. #include <dt-bindings/pinctrl/pinctrl-starfive-jh7110.h>
  9. / {
  10. #address-cells = <2>;
  11. #size-cells = <2>;
  12. model = "StarFive VisionFive V2";
  13. compatible = "starfive,jh7110";
  14. aliases {
  15. spi0="/soc/spi@13010000";
  16. gpio0="/soc/gpio@13040000";
  17. ethernet0=&gmac0;
  18. ethernet1=&gmac1;
  19. mmc0=&sdio0;
  20. mmc1=&sdio1;
  21. i2c0 = &i2c5;
  22. };
  23. chosen {
  24. stdout-path = "/soc/serial@10000000:115200";
  25. starfive,boot-hart-id = <1>;
  26. };
  27. memory@80000000 {
  28. device_type = "memory";
  29. reg = <0x0 0x40000000 0x1 0x0>;
  30. };
  31. reserved-memory {
  32. #size-cells = <2>;
  33. #address-cells = <2>;
  34. ranges;
  35. opensbi {
  36. reg = <0x00 0x40000000 0x00 0x80000>;
  37. no-map;
  38. };
  39. };
  40. soc {
  41. };
  42. gpio-restart {
  43. compatible = "gpio-restart";
  44. gpios = <&gpio 35 GPIO_ACTIVE_HIGH>;
  45. };
  46. };
  47. &cpu0 {
  48. status = "okay";
  49. };
  50. &clkgen {
  51. clocks = <&osc>, <&gmac1_rmii_refin>,
  52. <&stg_apb>, <&gmac0_rmii_refin>;
  53. clock-names = "osc", "gmac1_rmii_refin",
  54. "stg_apb", "gmac0_rmii_refin";
  55. };
  56. &gpio {
  57. status = "okay";
  58. gpio-controller;
  59. uart0_pins: uart0-0 {
  60. tx-pins {
  61. pinmux = <GPIOMUX(5, GPOUT_SYS_UART0_TX,
  62. GPOEN_ENABLE, GPI_NONE)>;
  63. bias-disable;
  64. drive-strength = <12>;
  65. input-disable;
  66. input-schmitt-disable;
  67. slew-rate = <0>;
  68. };
  69. rx-pins {
  70. pinmux = <GPIOMUX(6, GPOUT_LOW,
  71. GPOEN_DISABLE, GPI_SYS_UART0_RX)>;
  72. bias-pull-up;
  73. drive-strength = <2>;
  74. input-enable;
  75. input-schmitt-enable;
  76. slew-rate = <0>;
  77. };
  78. };
  79. mmc0_pins: mmc0-pins {
  80. mmc0-pins-rest {
  81. pinmux = <GPIOMUX(62, GPOUT_SYS_SDIO0_RST,
  82. GPOEN_ENABLE, GPI_NONE)>;
  83. bias-pull-up;
  84. drive-strength = <12>;
  85. input-disable;
  86. input-schmitt-disable;
  87. slew-rate = <0>;
  88. };
  89. };
  90. sdcard1_pins: sdcard1-pins {
  91. sdcard1-pins0 {
  92. pinmux = <GPIOMUX(10, GPOUT_SYS_SDIO1_CLK,
  93. GPOEN_ENABLE, GPI_NONE)>;
  94. bias-pull-up;
  95. drive-strength = <12>;
  96. input-disable;
  97. input-schmitt-disable;
  98. slew-rate = <0>;
  99. };
  100. sdcard1-pins1 {
  101. pinmux = <GPIOMUX(9, GPOUT_SYS_SDIO1_CMD,
  102. GPOEN_SYS_SDIO1_CMD, GPI_SYS_SDIO1_CMD)>;
  103. bias-pull-up;
  104. drive-strength = <12>;
  105. input-enable;
  106. input-schmitt-enable;
  107. slew-rate = <0>;
  108. };
  109. sdcard1-pins2 {
  110. pinmux = <GPIOMUX(11, GPOUT_SYS_SDIO1_DATA0,
  111. GPOEN_SYS_SDIO1_DATA0, GPI_SYS_SDIO1_DATA0)>;
  112. bias-pull-up;
  113. drive-strength = <12>;
  114. input-enable;
  115. input-schmitt-enable;
  116. slew-rate = <0>;
  117. };
  118. sdcard1-pins3 {
  119. pinmux = <GPIOMUX(12, GPOUT_SYS_SDIO1_DATA1,
  120. GPOEN_SYS_SDIO1_DATA1, GPI_SYS_SDIO1_DATA1)>;
  121. bias-pull-up;
  122. drive-strength = <12>;
  123. input-enable;
  124. input-schmitt-enable;
  125. slew-rate = <0>;
  126. };
  127. sdcard1-pins4 {
  128. pinmux = <GPIOMUX(7, GPOUT_SYS_SDIO1_DATA2,
  129. GPOEN_SYS_SDIO1_DATA2, GPI_SYS_SDIO1_DATA2)>;
  130. bias-pull-up;
  131. drive-strength = <12>;
  132. input-enable;
  133. input-schmitt-enable;
  134. slew-rate = <0>;
  135. };
  136. sdcard1-pins5 {
  137. pinmux = <GPIOMUX(8, GPOUT_SYS_SDIO1_DATA3,
  138. GPOEN_SYS_SDIO1_DATA3, GPI_SYS_SDIO1_DATA3)>;
  139. bias-pull-up;
  140. drive-strength = <12>;
  141. input-enable;
  142. input-schmitt-enable;
  143. slew-rate = <0>;
  144. };
  145. };
  146. pcie0_perst_default: pcie0_perst_default {
  147. perst-pins {
  148. pinmux = <GPIOMUX(26, GPOUT_HIGH, GPOEN_ENABLE, GPI_NONE)>;
  149. drive-strength = <2>;
  150. input-disable;
  151. input-schmitt-disable;
  152. slew-rate = <0>;
  153. };
  154. };
  155. pcie0_perst_active: pcie0_perst_active {
  156. perst-pins {
  157. pinmux = <GPIOMUX(26, GPOUT_LOW, GPOEN_ENABLE, GPI_NONE)>;
  158. drive-strength = <2>;
  159. input-disable;
  160. input-schmitt-disable;
  161. slew-rate = <0>;
  162. };
  163. };
  164. pcie0_wake_default: pcie0_wake_default {
  165. wake-pins {
  166. pinmux = <GPIOMUX(32, GPOUT_HIGH, GPOEN_ENABLE, GPI_NONE)>;
  167. drive-strength = <2>;
  168. input-enable;
  169. input-schmitt-disable;
  170. slew-rate = <0>;
  171. };
  172. };
  173. pcie0_clkreq_default: pcie0_clkreq_default {
  174. clkreq-pins {
  175. pinmux = <GPIOMUX(27, GPOUT_HIGH, GPOEN_ENABLE, GPI_NONE)>;
  176. drive-strength = <2>;
  177. input-enable;
  178. input-schmitt-disable;
  179. slew-rate = <0>;
  180. };
  181. };
  182. pcie1_perst_default: pcie1_perst_default {
  183. perst-pins {
  184. pinmux = <GPIOMUX(28, GPOUT_HIGH, GPOEN_ENABLE, GPI_NONE)>;
  185. drive-strength = <2>;
  186. input-disable;
  187. input-schmitt-disable;
  188. slew-rate = <0>;
  189. };
  190. };
  191. pcie1_perst_active: pcie1_perst_active {
  192. perst-pins {
  193. pinmux = <GPIOMUX(28, GPOUT_LOW, GPOEN_ENABLE, GPI_NONE)>;
  194. drive-strength = <2>;
  195. input-disable;
  196. input-schmitt-disable;
  197. slew-rate = <0>;
  198. };
  199. };
  200. pcie1_wake_default: pcie1_wake_default {
  201. wake-pins {
  202. pinmux = <GPIOMUX(21, GPOUT_HIGH, GPOEN_ENABLE, GPI_NONE)>;
  203. drive-strength = <2>;
  204. input-enable;
  205. input-schmitt-disable;
  206. slew-rate = <0>;
  207. };
  208. };
  209. pcie1_clkreq_default: pcie1_clkreq_default {
  210. clkreq-pins {
  211. pinmux = <GPIOMUX(29, GPOUT_HIGH, GPOEN_ENABLE, GPI_NONE)>;
  212. drive-strength = <2>;
  213. input-enable;
  214. input-schmitt-disable;
  215. slew-rate = <0>;
  216. };
  217. };
  218. i2c2_pins: i2c2-0 {
  219. i2c-pins {
  220. pinmux = <GPIOMUX(3, GPOUT_LOW,
  221. GPOEN_SYS_I2C2_CLK,
  222. GPI_SYS_I2C2_CLK)>,
  223. <GPIOMUX(2, GPOUT_LOW,
  224. GPOEN_SYS_I2C2_DATA,
  225. GPI_SYS_I2C2_DATA)>;
  226. bias-disable; /* external pull-up */
  227. input-enable;
  228. input-schmitt-enable;
  229. };
  230. };
  231. i2c5_pins: i2c5-0 {
  232. i2c-pins {
  233. pinmux = <GPIOMUX(19, GPOUT_LOW,
  234. GPOEN_SYS_I2C5_CLK,
  235. GPI_SYS_I2C5_CLK)>,
  236. <GPIOMUX(20, GPOUT_LOW,
  237. GPOEN_SYS_I2C5_DATA,
  238. GPI_SYS_I2C5_DATA)>;
  239. bias-disable; /* external pull-up */
  240. input-enable;
  241. input-schmitt-enable;
  242. };
  243. };
  244. hdmi_pins: hdmi-0 {
  245. cec-pins {
  246. pinmux = <GPIOMUX(14, GPOUT_SYS_HDMI_CEC_SDA,
  247. GPOEN_SYS_HDMI_CEC_SDA,
  248. GPI_SYS_HDMI_CEC_SDA)>;
  249. bias-pull-up;
  250. input-enable;
  251. };
  252. hpd-pins {
  253. pinmux = <GPIOMUX(15, GPOUT_LOW,
  254. GPOEN_DISABLE,
  255. GPI_SYS_HDMI_HPD)>;
  256. input-enable;
  257. };
  258. };
  259. };
  260. &sdio0 {
  261. fifo-depth = <32>;
  262. bus-width = <8>;
  263. pinctrl-names = "default";
  264. pinctrl-0 = <&mmc0_pins>;
  265. status = "okay";
  266. };
  267. &sdio1 {
  268. fifo-depth = <32>;
  269. bus-width = <4>;
  270. pinctrl-names = "default";
  271. pinctrl-0 = <&sdcard1_pins>;
  272. status = "okay";
  273. };
  274. &gmac0 {
  275. status = "okay";
  276. #address-cells = <1>;
  277. #size-cells = <0>;
  278. phy0: ethernet-phy@0 {
  279. rgmii_sw_dr_2 = <0x0>;
  280. rgmii_sw_dr = <0x3>;
  281. rgmii_sw_dr_rxc = <0x6>;
  282. rxc_dly_en = <0>;
  283. rx_delay_sel = <0xa>;
  284. tx_delay_sel_fe = <5>;
  285. tx_delay_sel = <0xa>;
  286. tx_inverted_10 = <0x1>;
  287. tx_inverted_100 = <0x1>;
  288. tx_inverted_1000 = <0x1>;
  289. };
  290. };
  291. &gmac1 {
  292. status = "okay";
  293. #address-cells = <1>;
  294. #size-cells = <0>;
  295. phy1: ethernet-phy@1 {
  296. rgmii_sw_dr_2 = <0x0>;
  297. rgmii_sw_dr = <0x3>;
  298. rgmii_sw_dr_rxc = <0x6>;
  299. tx_delay_sel_fe = <5>;
  300. tx_delay_sel = <0>;
  301. rxc_dly_en = <0>;
  302. rx_delay_sel = <0x2>;
  303. tx_inverted_10 = <0x1>;
  304. tx_inverted_100 = <0x1>;
  305. tx_inverted_1000 = <0x0>;
  306. };
  307. };
  308. &uart0 {
  309. reg-offset = <0>;
  310. current-speed = <115200>;
  311. pinctrl-names = "default";
  312. pinctrl-0 = <&uart0_pins>;
  313. status = "okay";
  314. };
  315. &i2c5 {
  316. clock-frequency = <100000>;
  317. i2c-sda-hold-time-ns = <300>;
  318. i2c-sda-falling-time-ns = <3000>;
  319. i2c-scl-falling-time-ns = <3000>;
  320. auto_calc_scl_lhcnt;
  321. status = "okay";
  322. eeprom@50 {
  323. compatible = "atmel,24c04";
  324. reg = <0x50>;
  325. pagesize = <16>;
  326. };
  327. pmic: axp15060_reg@36 {
  328. compatible = "stf,axp15060-regulator";
  329. reg = <0x36>;
  330. };
  331. };
  332. &gpioa {
  333. status = "disabled";
  334. };
  335. &usbdrd30 {
  336. status = "okay";
  337. };
  338. &usbdrd_cdns3 {
  339. dr_mode = "host";
  340. };
  341. &pcie0 {
  342. pinctrl-names = "perst-default", "perst-active", "wake-default", "clkreq-default";
  343. pinctrl-0 = <&pcie0_perst_default>;
  344. pinctrl-1 = <&pcie0_perst_active>;
  345. pinctrl-2 = <&pcie0_wake_default>;
  346. pinctrl-3 = <&pcie0_clkreq_default>;
  347. status = "disabled";
  348. };
  349. &pcie1 {
  350. pinctrl-names = "perst-default", "perst-active", "wake-default", "clkreq-default";
  351. pinctrl-0 = <&pcie1_perst_default>;
  352. pinctrl-1 = <&pcie1_perst_active>;
  353. pinctrl-2 = <&pcie1_wake_default>;
  354. pinctrl-3 = <&pcie1_clkreq_default>;
  355. status = "okay";
  356. };
  357. &timer {
  358. status = "disabled";
  359. };
  360. &wdog {
  361. status = "disabled";
  362. };
  363. &clkvout {
  364. status = "okay";
  365. };
  366. &pdm {
  367. status = "disabled";
  368. };
  369. &mipi_dsi0 {
  370. status = "okay";
  371. rockchip,panel = <&rm68200_panel>;
  372. data-lanes-num = <1>;
  373. display-timings {
  374. timing0 {
  375. bits-per-pixel = <24>;
  376. clock-frequency = <160000000>;
  377. hfront-porch = <120>;
  378. hsync-len = <20>;
  379. hback-porch = <21>;
  380. hactive = <1200>;
  381. vfront-porch = <21>;
  382. vsync-len = <3>;
  383. vback-porch = <18>;
  384. vactive = <1920>;
  385. hsync-active = <0>;
  386. vsync-active = <0>;
  387. de-active = <1>;
  388. pixelclk-active = <0>;
  389. };
  390. };
  391. };
  392. &hdmi{
  393. pinctrl-names = "default";
  394. pinctrl-0 = <&hdmi_pins>;
  395. status = "okay";
  396. };
  397. &i2c2 {
  398. clock-frequency = <100000>;
  399. i2c-sda-hold-time-ns = <300>;
  400. i2c-sda-falling-time-ns = <3000>;
  401. i2c-scl-falling-time-ns = <3000>;
  402. auto_calc_scl_lhcnt;
  403. pinctrl-names = "default";
  404. pinctrl-0 = <&i2c2_pins>;
  405. status = "okay";
  406. rm68200_panel: rm68200_panel@45 {
  407. compatible = "raydium,rm68200";
  408. reg = <0x45>;
  409. };
  410. };