starfive_evb.dts 8.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0 OR MIT
  2. /*
  3. * Copyright (C) 2022 StarFive Technology Co., Ltd.
  4. */
  5. /dts-v1/;
  6. #include "jh7110.dtsi"
  7. #include <dt-bindings/pinctrl/pinctrl-starfive-jh7110.h>
  8. / {
  9. #address-cells = <2>;
  10. #size-cells = <2>;
  11. model = "StarFive JH7110 EVB";
  12. compatible = "starfive,jh7110";
  13. aliases {
  14. spi0="/soc/spi@13010000";
  15. gpio0="/soc/gpio@13040000";
  16. ethernet0=&gmac0;
  17. ethernet1=&gmac1;
  18. mmc0=&sdio0;
  19. mmc1=&sdio1;
  20. };
  21. chosen {
  22. stdout-path = "/soc/serial@10000000:115200";
  23. starfive,boot-hart-id = <1>;
  24. };
  25. memory@80000000 {
  26. device_type = "memory";
  27. reg = <0x0 0x40000000 0x1 0x0>;
  28. };
  29. reserved-memory {
  30. #size-cells = <2>;
  31. #address-cells = <2>;
  32. ranges;
  33. opensbi {
  34. reg = <0x00 0x40000000 0x00 0x80000>;
  35. no-map;
  36. };
  37. };
  38. soc {
  39. };
  40. };
  41. &cpu0 {
  42. status = "okay";
  43. };
  44. &clkgen {
  45. clocks = <&osc>, <&gmac1_rmii_refin>,
  46. <&stg_apb>, <&gmac0_rmii_refin>;
  47. clock-names = "osc", "gmac1_rmii_refin",
  48. "stg_apb", "gmac0_rmii_refin";
  49. };
  50. &gpio {
  51. status = "okay";
  52. usb_pins: usb-pins {
  53. drive-vbus-pin {
  54. pinmux = <GPIOMUX(33, GPOUT_SYS_USB_DRIVE_VBUS,
  55. GPOEN_ENABLE, GPI_NONE)>;
  56. bias-pull-up;
  57. drive-strength = <2>;
  58. input-disable;
  59. input-schmitt-disable;
  60. slew-rate = <0>;
  61. };
  62. overcurrent-pin {
  63. pinmux = <GPIOMUX(34, GPOUT_LOW,
  64. GPOEN_DISABLE, GPI_SYS_USB_OVERCURRENT)>;
  65. bias-pull-up;
  66. drive-strength = <2>;
  67. input-disable;
  68. input-schmitt-disable;
  69. slew-rate = <0>;
  70. };
  71. };
  72. mmc0_pins: mmc0-pins {
  73. mmc0-pins-rest {
  74. pinmux = <GPIOMUX(22, GPOUT_SYS_SDIO0_RST,
  75. GPOEN_ENABLE, GPI_NONE)>;
  76. bias-pull-up;
  77. drive-strength = <12>;
  78. input-disable;
  79. input-schmitt-disable;
  80. slew-rate = <0>;
  81. };
  82. };
  83. mmc1_pins: mmc1-pins {
  84. mmc1-pins-rest {
  85. pinmux = <GPIOMUX(24, GPOUT_SYS_SDIO1_RST,
  86. GPOEN_ENABLE, GPI_NONE)>;
  87. bias-pull-up;
  88. drive-strength = <12>;
  89. input-disable;
  90. input-schmitt-disable;
  91. slew-rate = <0>;
  92. };
  93. };
  94. i2c2_pins: i2c2-0 {
  95. i2c-pins {
  96. pinmux = <GPIOMUX(11, GPOUT_LOW,
  97. GPOEN_SYS_I2C2_CLK,
  98. GPI_SYS_I2C2_CLK)>,
  99. <GPIOMUX(9, GPOUT_LOW,
  100. GPOEN_SYS_I2C2_DATA,
  101. GPI_SYS_I2C2_DATA)>;
  102. bias-disable; /* external pull-up */
  103. input-enable;
  104. input-schmitt-enable;
  105. };
  106. };
  107. i2c5_pins: i2c5-0 {
  108. i2c-pins {
  109. pinmux = <GPIOMUX(19, GPOUT_LOW,
  110. GPOEN_SYS_I2C5_CLK,
  111. GPI_SYS_I2C5_CLK)>,
  112. <GPIOMUX(20, GPOUT_LOW,
  113. GPOEN_SYS_I2C5_DATA,
  114. GPI_SYS_I2C5_DATA)>;
  115. bias-disable; /* external pull-up */
  116. input-enable;
  117. input-schmitt-enable;
  118. };
  119. };
  120. hdmi_pins: hdmi-0 {
  121. i2c-pins {
  122. pinmux = <GPIOMUX(7, GPOUT_SYS_HDMI_DDC_SCL,
  123. GPOEN_SYS_HDMI_DDC_SCL,
  124. GPI_SYS_HDMI_DDC_SCL)>,
  125. <GPIOMUX(8, GPOUT_SYS_HDMI_DDC_SDA,
  126. GPOEN_SYS_HDMI_DDC_SDA,
  127. GPI_SYS_HDMI_DDC_SDA)>;
  128. bias-pull-up;
  129. input-enable;
  130. };
  131. cec-pins {
  132. pinmux = <GPIOMUX(14, GPOUT_SYS_HDMI_CEC_SDA,
  133. GPOEN_SYS_HDMI_CEC_SDA,
  134. GPI_SYS_HDMI_CEC_SDA)>;
  135. bias-pull-up;
  136. input-enable;
  137. };
  138. hpd-pins {
  139. pinmux = <GPIOMUX(15, GPOUT_LOW,
  140. GPOEN_DISABLE,
  141. GPI_SYS_HDMI_HPD)>;
  142. input-enable;
  143. };
  144. };
  145. pcie0_perst_default: pcie0_perst_default {
  146. perst-pins {
  147. pinmux = <GPIOMUX(26, GPOUT_HIGH, GPOEN_ENABLE, GPI_NONE)>;
  148. drive-strength = <2>;
  149. input-disable;
  150. input-schmitt-disable;
  151. slew-rate = <0>;
  152. };
  153. };
  154. pcie0_perst_active: pcie0_perst_active {
  155. perst-pins {
  156. pinmux = <GPIOMUX(26, GPOUT_LOW, GPOEN_ENABLE, GPI_NONE)>;
  157. drive-strength = <2>;
  158. input-disable;
  159. input-schmitt-disable;
  160. slew-rate = <0>;
  161. };
  162. };
  163. pcie0_power_default: pcie0_power_default {
  164. power-pins {
  165. pinmux = <GPIOMUX(32, GPOUT_LOW, GPOEN_ENABLE, GPI_NONE)>;
  166. drive-strength = <2>;
  167. input-disable;
  168. input-schmitt-disable;
  169. slew-rate = <0>;
  170. };
  171. };
  172. pcie0_power_active: pcie0_power_active {
  173. power-pins {
  174. pinmux = <GPIOMUX(32, GPOUT_HIGH, GPOEN_ENABLE, GPI_NONE)>;
  175. drive-strength = <2>;
  176. input-disable;
  177. input-schmitt-disable;
  178. slew-rate = <0>;
  179. };
  180. };
  181. pcie1_perst_default: pcie1_perst_default {
  182. perst-pins {
  183. pinmux = <GPIOMUX(28, GPOUT_HIGH, GPOEN_ENABLE, GPI_NONE)>;
  184. drive-strength = <2>;
  185. input-disable;
  186. input-schmitt-disable;
  187. slew-rate = <0>;
  188. };
  189. };
  190. pcie1_perst_active: pcie1_perst_active {
  191. perst-pins {
  192. pinmux = <GPIOMUX(28, GPOUT_LOW, GPOEN_ENABLE, GPI_NONE)>;
  193. drive-strength = <2>;
  194. input-disable;
  195. input-schmitt-disable;
  196. slew-rate = <0>;
  197. };
  198. };
  199. pcie1_power_default: pcie1_power_default {
  200. power-pins {
  201. pinmux = <GPIOMUX(21, GPOUT_LOW, GPOEN_ENABLE, GPI_NONE)>;
  202. drive-strength = <2>;
  203. input-disable;
  204. input-schmitt-disable;
  205. slew-rate = <0>;
  206. };
  207. };
  208. pcie1_power_active: pcie1_power_active {
  209. power-pins {
  210. pinmux = <GPIOMUX(21, GPOUT_HIGH, GPOEN_ENABLE, GPI_NONE)>;
  211. drive-strength = <2>;
  212. input-disable;
  213. input-schmitt-disable;
  214. slew-rate = <0>;
  215. };
  216. };
  217. };
  218. &sdio0 {
  219. fifo-depth = <32>;
  220. bus-width = <4>;
  221. status = "okay";
  222. pinctrl-names = "default";
  223. pinctrl-0 = <&mmc0_pins>;
  224. };
  225. &sdio1 {
  226. status = "disabled";
  227. pinctrl-names = "default";
  228. pinctrl-0 = <&mmc1_pins>;
  229. };
  230. &gmac0 {
  231. status = "okay";
  232. #address-cells = <1>;
  233. #size-cells = <0>;
  234. phy0: ethernet-phy@0 {
  235. rxc_dly_en = <1>;
  236. tx_delay_sel_fe = <5>;
  237. tx_delay_sel = <0xb>;
  238. tx_inverted_10 = <0x0>;
  239. tx_inverted_100 = <0x0>;
  240. tx_inverted_1000 = <0x0>;
  241. };
  242. };
  243. &gmac1 {
  244. status = "okay";
  245. #address-cells = <1>;
  246. #size-cells = <0>;
  247. phy1: ethernet-phy@1 {
  248. rxc-skew-ps = <1060>;
  249. txc-skew-ps = <1800>;
  250. reg = <0>;
  251. };
  252. };
  253. &uart0 {
  254. reg-offset = <0>;
  255. current-speed = <115200>;
  256. status = "okay";
  257. };
  258. &gpioa {
  259. status = "disabled";
  260. };
  261. &usbdrd30 {
  262. status = "okay";
  263. };
  264. &usbdrd_cdns3 {
  265. dr_mode = "host";
  266. pinctrl-names = "default";
  267. pinctrl-0 = <&usb_pins>;
  268. };
  269. &pcie0 {
  270. pinctrl-names = "perst-default", "perst-active", "power-default", "power-active";
  271. pinctrl-0 = <&pcie0_perst_default>;
  272. pinctrl-1 = <&pcie0_perst_active>;
  273. pinctrl-2 = <&pcie0_power_default>;
  274. pinctrl-3 = <&pcie0_power_active>;
  275. status = "disabled";
  276. };
  277. &pcie1 {
  278. pinctrl-names = "perst-default", "perst-active", "power-default", "power-active";
  279. pinctrl-0 = <&pcie1_perst_default>;
  280. pinctrl-1 = <&pcie1_perst_active>;
  281. pinctrl-2 = <&pcie1_power_default>;
  282. pinctrl-3 = <&pcie1_power_active>;
  283. status = "okay";
  284. };
  285. &timer {
  286. status = "disabled";
  287. };
  288. &wdog {
  289. status = "disabled";
  290. };
  291. &clkvout {
  292. status = "okay";
  293. };
  294. &pdm {
  295. status = "disabled";
  296. };
  297. &mipi_dsi0 {
  298. status = "okay";
  299. rockchip,panel = <&rm68200_panel>;
  300. data-lanes-num = <1>;
  301. display-timings {
  302. timing0 {
  303. bits-per-pixel = <24>;
  304. clock-frequency = <160000000>;
  305. hfront-porch = <120>;
  306. hsync-len = <20>;
  307. hback-porch = <21>;
  308. hactive = <1200>;
  309. vfront-porch = <21>;
  310. vsync-len = <3>;
  311. vback-porch = <18>;
  312. vactive = <1920>;
  313. hsync-active = <0>;
  314. vsync-active = <0>;
  315. de-active = <1>;
  316. pixelclk-active = <0>;
  317. };
  318. };
  319. };
  320. &hdmi{
  321. pinctrl-names = "default";
  322. pinctrl-0 = <&hdmi_pins>;
  323. status = "okay";
  324. };
  325. &i2c2 {
  326. clock-frequency = <100000>;
  327. i2c-sda-hold-time-ns = <300>;
  328. i2c-sda-falling-time-ns = <3000>;
  329. i2c-scl-falling-time-ns = <3000>;
  330. auto_calc_scl_lhcnt;
  331. pinctrl-names = "default";
  332. pinctrl-0 = <&i2c2_pins>;
  333. status = "okay";
  334. rm68200_panel: rm68200_panel@45 {
  335. compatible = "raydium,rm68200";
  336. reg = <0x45>;
  337. };
  338. };
  339. &i2c5 {
  340. clock-frequency = <100000>;
  341. i2c-sda-hold-time-ns = <300>;
  342. i2c-sda-falling-time-ns = <3000>;
  343. i2c-scl-falling-time-ns = <3000>;
  344. auto_calc_scl_lhcnt;
  345. pinctrl-names = "default";
  346. pinctrl-0 = <&i2c5_pins>;
  347. status = "okay";
  348. pmic_axp15060: axp15060_reg@36 {
  349. compatible = "stf,axp15060-regulator";
  350. reg = <0x36>;
  351. };
  352. pmic: jh7110_evb_reg@50 {
  353. compatible = "starfive,jh7110-evb-regulator";
  354. reg = <0x50>;
  355. regulators {
  356. hdmi_1p8: ldo1 {
  357. regulator-name = "lp8733-ldo1";
  358. regulator-min-microvolt = <1800000>;
  359. regulator-max-microvolt = <1800000>;
  360. regulator-boot-on;
  361. regulator-always-on;
  362. };
  363. mipitx_1p8: ldo2 {
  364. regulator-name = "lp8733-ldo2";
  365. regulator-min-microvolt = <1800000>;
  366. regulator-max-microvolt = <1800000>;
  367. regulator-boot-on;
  368. regulator-always-on;
  369. };
  370. mipirx_1p8: ldo3 {
  371. regulator-name = "lp8733-ldo3";
  372. regulator-min-microvolt = <1800000>;
  373. regulator-max-microvolt = <1800000>;
  374. regulator-boot-on;
  375. regulator-always-on;
  376. };
  377. hdmi_0p9: ldo4 {
  378. regulator-name = "lp8733-ldo4";
  379. regulator-min-microvolt = <900000>;
  380. regulator-max-microvolt = <900000>;
  381. regulator-boot-on;
  382. regulator-always-on;
  383. };
  384. mipitx_0p9: ldo5 {
  385. regulator-name = "lp8733-ldo5";
  386. regulator-min-microvolt = <900000>;
  387. regulator-max-microvolt = <900000>;
  388. regulator-boot-on;
  389. regulator-always-on;
  390. };
  391. mipirx_0p9: ldo6 {
  392. regulator-name = "lp8733-ldo6";
  393. regulator-min-microvolt = <900000>;
  394. regulator-max-microvolt = <900000>;
  395. regulator-boot-on;
  396. regulator-always-on;
  397. };
  398. sdio_vdd: ldo7 {
  399. regulator-name = "lp8733-ldo7";
  400. regulator-min-microvolt = <1800000>;
  401. regulator-max-microvolt = <3300000>;
  402. regulator-boot-on;
  403. regulator-always-on;
  404. };
  405. };
  406. };
  407. };