k210.dtsi 15 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2019-20 Sean Anderson <seanga2@gmail.com>
  4. */
  5. #include <dt-bindings/clock/k210-sysctl.h>
  6. #include <dt-bindings/mfd/k210-sysctl.h>
  7. #include <dt-bindings/pinctrl/k210-pinctrl.h>
  8. #include <dt-bindings/reset/k210-sysctl.h>
  9. / {
  10. /*
  11. * Although the K210 is a 64-bit CPU, the address bus is only 32-bits
  12. * wide, and the upper half of all addresses is ignored.
  13. */
  14. #address-cells = <1>;
  15. #size-cells = <1>;
  16. compatible = "kendryte,k210";
  17. aliases {
  18. cpu0 = &cpu0;
  19. cpu1 = &cpu1;
  20. dma0 = &dmac0;
  21. gpio0 = &gpio0;
  22. gpio1 = &gpio1_0;
  23. i2c0 = &i2c0;
  24. i2c1 = &i2c1;
  25. i2c2 = &i2c2;
  26. pinctrl0 = &fpioa;
  27. serial0 = &uarths0;
  28. serial1 = &uart1;
  29. serial2 = &uart2;
  30. serial3 = &uart3;
  31. spi0 = &spi0;
  32. spi1 = &spi1;
  33. spi2 = &spi2;
  34. spi3 = &spi3;
  35. timer0 = &timer0;
  36. timer1 = &timer1;
  37. timer2 = &timer2;
  38. };
  39. cpus {
  40. #address-cells = <1>;
  41. #size-cells = <0>;
  42. timebase-frequency = <7800000>;
  43. cpu0: cpu@0 {
  44. device_type = "cpu";
  45. compatible = "kendryte,k210", "sifive,rocket0", "riscv";
  46. reg = <0>;
  47. riscv,isa = "rv64imafdgc";
  48. mmu-type = "sv39";
  49. i-cache-block-size = <64>;
  50. i-cache-size = <0x8000>;
  51. d-cache-block-size = <64>;
  52. d-cache-size = <0x8000>;
  53. clocks = <&sysclk K210_CLK_CPU>;
  54. cpu0_intc: interrupt-controller {
  55. #interrupt-cells = <1>;
  56. interrupt-controller;
  57. compatible = "riscv,cpu-intc";
  58. };
  59. };
  60. cpu1: cpu@1 {
  61. device_type = "cpu";
  62. compatible = "kendryte,k210", "sifive,rocket0", "riscv";
  63. reg = <1>;
  64. riscv,isa = "rv64imafdgc";
  65. mmu-type = "sv39";
  66. i-cache-block-size = <64>;
  67. i-cache-size = <0x8000>;
  68. d-cache-block-size = <64>;
  69. d-cache-size = <0x8000>;
  70. clocks = <&sysclk K210_CLK_CPU>;
  71. cpu1_intc: interrupt-controller {
  72. #interrupt-cells = <1>;
  73. interrupt-controller;
  74. compatible = "riscv,cpu-intc";
  75. };
  76. };
  77. };
  78. sram: memory@80000000 {
  79. device_type = "memory";
  80. compatible = "kendryte,k210-sram";
  81. reg = <0x80000000 0x400000>,
  82. <0x80400000 0x200000>,
  83. <0x80600000 0x200000>;
  84. reg-names = "sram0", "sram1", "aisram";
  85. clocks = <&sysclk K210_CLK_SRAM0>,
  86. <&sysclk K210_CLK_SRAM1>,
  87. <&sysclk K210_CLK_AI>;
  88. clock-names = "sram0", "sram1", "aisram";
  89. u-boot,dm-pre-reloc;
  90. };
  91. clocks {
  92. in0: osc {
  93. compatible = "fixed-clock";
  94. #clock-cells = <0>;
  95. clock-frequency = <26000000>;
  96. u-boot,dm-pre-reloc;
  97. };
  98. };
  99. soc {
  100. #address-cells = <1>;
  101. #size-cells = <1>;
  102. compatible = "kendryte,k210-soc", "simple-bus";
  103. ranges;
  104. interrupt-parent = <&plic0>;
  105. debug0: debug@0 {
  106. compatible = "kendryte,k210-debug", "riscv,debug";
  107. reg = <0x0 0x1000>;
  108. };
  109. rom0: nvmem@1000 {
  110. reg = <0x1000 0x1000>;
  111. read-only;
  112. };
  113. clint0: clint@2000000 {
  114. #interrupt-cells = <1>;
  115. compatible = "kendryte,k210-clint", "riscv,clint0";
  116. reg = <0x2000000 0xC000>;
  117. interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>,
  118. <&cpu1_intc 3>, <&cpu1_intc 7>;
  119. clocks = <&sysclk K210_CLK_CLINT>;
  120. };
  121. plic0: interrupt-controller@C000000 {
  122. #interrupt-cells = <1>;
  123. compatible = "kendryte,k210-plic", "riscv,plic0";
  124. reg = <0xC000000 0x4000000>;
  125. interrupt-controller;
  126. interrupts-extended = <&cpu0_intc 9>, <&cpu0_intc 11>,
  127. <&cpu1_intc 9>, <&cpu1_intc 11>;
  128. riscv,ndev = <65>;
  129. riscv,max-priority = <7>;
  130. };
  131. uarths0: serial@38000000 {
  132. compatible = "kendryte,k210-uarths", "sifive,uart0";
  133. reg = <0x38000000 0x1000>;
  134. interrupts = <33>;
  135. clocks = <&sysclk K210_CLK_CPU>;
  136. status = "disabled";
  137. };
  138. gpio0: gpio-controller@38001000 {
  139. #interrupt-cells = <2>;
  140. #gpio-cells = <2>;
  141. compatible = "kendryte,k210-gpiohs", "sifive,gpio0";
  142. reg = <0x38001000 0x1000>;
  143. interrupt-controller;
  144. interrupts = <34 35 36 37 38 39 40 41
  145. 42 43 44 45 46 47 48 49
  146. 50 51 52 53 54 55 56 57
  147. 58 59 60 61 62 63 64 65>;
  148. gpio-controller;
  149. ngpios = <32>;
  150. status = "disabled";
  151. };
  152. kpu0: kpu@40800000 {
  153. compatible = "kendryte,k210-kpu";
  154. reg = <0x40800000 0xc00000>;
  155. interrupts = <25>;
  156. clocks = <&sysclk K210_CLK_AI>;
  157. status = "disabled";
  158. };
  159. fft0: fft@42000000 {
  160. compatible = "kendryte,k210-fft";
  161. reg = <0x42000000 0x400000>;
  162. interrupts = <26>;
  163. clocks = <&sysclk K210_CLK_FFT>;
  164. resets = <&sysrst K210_RST_FFT>;
  165. status = "disabled";
  166. };
  167. dmac0: dma-controller@50000000 {
  168. compatible = "kendryte,k210-dmac", "snps,axi-dma-1.01a";
  169. reg = <0x50000000 0x1000>;
  170. interrupts = <27 28 29 30 31 32>;
  171. clocks = <&sysclk K210_CLK_DMA>, <&sysclk K210_CLK_DMA>;
  172. clock-names = "core-clk", "cfgr-clk";
  173. resets = <&sysrst K210_RST_DMA>;
  174. dma-channels = <6>;
  175. snps,dma-masters = <2>;
  176. snps,data-width = <5>;
  177. snps,block-size = <0x200000 0x200000 0x200000
  178. 0x200000 0x200000 0x200000>;
  179. snps,axi-max-burst-len = <256>;
  180. status = "disabled";
  181. };
  182. apb0: bus@50200000 {
  183. #address-cells = <1>;
  184. #size-cells = <1>;
  185. compatible = "kendryte,k210-apb", "simple-pm-bus";
  186. ranges;
  187. clocks = <&sysclk K210_CLK_APB0>;
  188. gpio1: gpio-controller@50200000 {
  189. #address-cells = <1>;
  190. #size-cells = <0>;
  191. compatible = "kendryte,k210-gpio",
  192. "snps,dw-apb-gpio";
  193. reg = <0x50200000 0x80>;
  194. clocks = <&sysclk K210_CLK_GPIO>;
  195. resets = <&sysrst K210_RST_GPIO>;
  196. status = "disabled";
  197. gpio1_0: gpio1@0 {
  198. #gpio-cells = <2>;
  199. #interrupt-cells = <2>;
  200. compatible = "snps,dw-apb-gpio-port";
  201. reg = <0>;
  202. interrupt-controller;
  203. interrupts = <23>;
  204. gpio-controller;
  205. snps,nr-gpios = <8>;
  206. };
  207. };
  208. uart1: serial@50210000 {
  209. compatible = "kendryte,k210-uart",
  210. "snps,dw-apb-uart";
  211. reg = <0x50210000 0x100>;
  212. interrupts = <11>;
  213. clocks = <&sysclk K210_CLK_UART1>;
  214. resets = <&sysrst K210_RST_UART1>;
  215. reg-io-width = <4>;
  216. reg-shift = <2>;
  217. dcd-override;
  218. dsr-override;
  219. cts-override;
  220. ri-override;
  221. status = "disabled";
  222. };
  223. uart2: serial@50220000 {
  224. compatible = "kendryte,k210-uart",
  225. "snps,dw-apb-uart";
  226. reg = <0x50220000 0x100>;
  227. interrupts = <12>;
  228. clocks = <&sysclk K210_CLK_UART2>;
  229. resets = <&sysrst K210_RST_UART2>;
  230. reg-io-width = <4>;
  231. reg-shift = <2>;
  232. dcd-override;
  233. dsr-override;
  234. cts-override;
  235. ri-override;
  236. status = "disabled";
  237. };
  238. uart3: serial@50230000 {
  239. compatible = "kendryte,k210-uart",
  240. "snps,dw-apb-uart";
  241. reg = <0x50230000 0x100>;
  242. interrupts = <13>;
  243. clocks = <&sysclk K210_CLK_UART3>;
  244. resets = <&sysrst K210_RST_UART3>;
  245. reg-io-width = <4>;
  246. reg-shift = <2>;
  247. dcd-override;
  248. dsr-override;
  249. cts-override;
  250. ri-override;
  251. status = "disabled";
  252. };
  253. spi2: spi@50240000 {
  254. compatible = "canaan,kendryte-k210-spi",
  255. "snps,dw-apb-ssi-4.01",
  256. "snps,dw-apb-ssi";
  257. spi-slave;
  258. reg = <0x50240000 0x100>;
  259. interrupts = <2>;
  260. clocks = <&sysclk K210_CLK_SPI2>;
  261. resets = <&sysrst K210_RST_SPI2>;
  262. spi-max-frequency = <25000000>;
  263. status = "disabled";
  264. };
  265. i2s0: i2s@50250000 {
  266. compatible = "kendryte,k210-i2s",
  267. "snps,designware-i2s";
  268. reg = <0x50250000 0x200>;
  269. interrupts = <5>;
  270. clocks = <&sysclk K210_CLK_I2S0>;
  271. clock-names = "i2sclk";
  272. resets = <&sysrst K210_RST_I2S0>;
  273. status = "disabled";
  274. };
  275. apu0: sound@520250200 {
  276. compatible = "kendryte,k210-apu";
  277. reg = <0x50250200 0x200>;
  278. status = "disabled";
  279. };
  280. i2s1: i2s@50260000 {
  281. compatible = "kendryte,k210-i2s",
  282. "snps,designware-i2s";
  283. reg = <0x50260000 0x200>;
  284. interrupts = <6>;
  285. clocks = <&sysclk K210_CLK_I2S1>;
  286. clock-names = "i2sclk";
  287. resets = <&sysrst K210_RST_I2S1>;
  288. status = "disabled";
  289. };
  290. i2s2: i2s@50270000 {
  291. compatible = "kendryte,k210-i2s",
  292. "snps,designware-i2s";
  293. reg = <0x50270000 0x200>;
  294. interrupts = <7>;
  295. clocks = <&sysclk K210_CLK_I2S2>;
  296. clock-names = "i2sclk";
  297. resets = <&sysrst K210_RST_I2S2>;
  298. status = "disabled";
  299. };
  300. i2c0: i2c@50280000 {
  301. compatible = "kendryte,k210-i2c",
  302. "snps,designware-i2c";
  303. reg = <0x50280000 0x100>;
  304. interrupts = <8>;
  305. clocks = <&sysclk K210_CLK_I2C0>;
  306. resets = <&sysrst K210_RST_I2C0>;
  307. status = "disabled";
  308. };
  309. i2c1: i2c@50290000 {
  310. compatible = "kendryte,k210-i2c",
  311. "snps,designware-i2c";
  312. reg = <0x50290000 0x100>;
  313. interrupts = <9>;
  314. clocks = <&sysclk K210_CLK_I2C1>;
  315. resets = <&sysrst K210_RST_I2C1>;
  316. status = "disabled";
  317. };
  318. i2c2: i2c@502A0000 {
  319. compatible = "kendryte,k210-i2c",
  320. "snps,designware-i2c";
  321. reg = <0x502A0000 0x100>;
  322. interrupts = <10>;
  323. clocks = <&sysclk K210_CLK_I2C2>;
  324. resets = <&sysrst K210_RST_I2C2>;
  325. status = "disabled";
  326. };
  327. fpioa: pinmux@502B0000 {
  328. compatible = "kendryte,k210-fpioa";
  329. reg = <0x502B0000 0x100>;
  330. clocks = <&sysclk K210_CLK_FPIOA>;
  331. resets = <&sysrst K210_RST_FPIOA>;
  332. kendryte,sysctl = <&sysctl>;
  333. kendryte,power-offset = <K210_SYSCTL_POWER_SEL>;
  334. pinctrl-0 = <&fpioa_jtag>;
  335. pinctrl-names = "default";
  336. status = "disabled";
  337. fpioa_jtag: jtag {
  338. pinmux = <K210_FPIOA(0, K210_PCF_JTAG_TCLK)>,
  339. <K210_FPIOA(1, K210_PCF_JTAG_TDI)>,
  340. <K210_FPIOA(2, K210_PCF_JTAG_TMS)>,
  341. <K210_FPIOA(3, K210_PCF_JTAG_TDO)>;
  342. };
  343. };
  344. sha256: sha256@502C0000 {
  345. compatible = "kendryte,k210-sha256";
  346. reg = <0x502C0000 0x100>;
  347. clocks = <&sysclk K210_CLK_SHA>;
  348. resets = <&sysrst K210_RST_SHA>;
  349. status = "disabled";
  350. };
  351. timer0: timer@502D0000 {
  352. compatible = "kendryte,k210-timer",
  353. "snps,dw-apb-timer";
  354. reg = <0x502D0000 0x100>;
  355. interrupts = <14 15>;
  356. clocks = <&sysclk K210_CLK_TIMER0>;
  357. clock-names = "timer";
  358. resets = <&sysrst K210_RST_TIMER0>;
  359. status = "disabled";
  360. };
  361. timer1: timer@502E0000 {
  362. compatible = "kendryte,k210-timer",
  363. "snps,dw-apb-timer";
  364. reg = <0x502E0000 0x100>;
  365. interrupts = <16 17>;
  366. clocks = <&sysclk K210_CLK_TIMER1>;
  367. clock-names = "timer";
  368. resets = <&sysrst K210_RST_TIMER1>;
  369. status = "disabled";
  370. };
  371. timer2: timer@502F0000 {
  372. compatible = "kendryte,k210-timer",
  373. "snps,dw-apb-timer";
  374. reg = <0x502F0000 0x100>;
  375. interrupts = <18 19>;
  376. clocks = <&sysclk K210_CLK_TIMER2>;
  377. clock-names = "timer";
  378. resets = <&sysrst K210_RST_TIMER2>;
  379. status = "disabled";
  380. };
  381. };
  382. apb1: bus@50400000 {
  383. #address-cells = <1>;
  384. #size-cells = <1>;
  385. compatible = "kendryte,k210-apb", "simple-pm-bus";
  386. ranges;
  387. clocks = <&sysclk K210_CLK_APB1>;
  388. wdt0: watchdog@50400000 {
  389. compatible = "kendryte,k210-wdt", "snps,dw-wdt";
  390. reg = <0x50400000 0x100>;
  391. interrupts = <21>;
  392. clocks = <&sysclk K210_CLK_WDT0>;
  393. resets = <&sysrst K210_RST_WDT0>;
  394. };
  395. wdt1: watchdog@50410000 {
  396. compatible = "kendryte,k210-wdt", "snps,dw-wdt";
  397. reg = <0x50410000 0x100>;
  398. interrupts = <22>;
  399. clocks = <&sysclk K210_CLK_WDT1>;
  400. resets = <&sysrst K210_RST_WDT1>;
  401. status = "disabled";
  402. };
  403. otp0: nvmem@50420000 {
  404. #address-cells = <1>;
  405. #size-cells = <1>;
  406. compatible = "kendryte,k210-otp";
  407. reg = <0x50420000 0x100>,
  408. <0x88000000 0x20000>;
  409. reg-names = "reg", "mem";
  410. clocks = <&sysclk K210_CLK_ROM>;
  411. resets = <&sysrst K210_RST_ROM>;
  412. read-only;
  413. status = "disabled";
  414. /* Bootloader */
  415. firmware@00000 {
  416. reg = <0x00000 0xC200>;
  417. };
  418. /*
  419. * config string as described in RISC-V
  420. * privileged spec 1.9
  421. */
  422. config-1-9@1c000 {
  423. reg = <0x1C000 0x1000>;
  424. };
  425. /*
  426. * Device tree containing only registers,
  427. * interrupts, and cpus
  428. */
  429. fdt@1d000 {
  430. reg = <0x1D000 0x2000>;
  431. };
  432. /* CPU/ROM credits */
  433. credits@1f000 {
  434. reg = <0x1F000 0x1000>;
  435. };
  436. };
  437. dvp0: camera@50430000 {
  438. compatible = "kendryte,k210-dvp";
  439. reg = <0x50430000 0x100>;
  440. interrupts = <24>;
  441. clocks = <&sysclk K210_CLK_DVP>;
  442. resets = <&sysrst K210_RST_DVP>;
  443. kendryte,sysctl = <&sysctl>;
  444. kendryte,misc-offset = <K210_SYSCTL_MISC>;
  445. status = "disabled";
  446. };
  447. sysctl: syscon@50440000 {
  448. compatible = "kendryte,k210-sysctl",
  449. "syscon", "simple-mfd";
  450. reg = <0x50440000 0x100>;
  451. reg-io-width = <4>;
  452. u-boot,dm-pre-reloc;
  453. sysclk: clock-controller {
  454. #clock-cells = <1>;
  455. compatible = "kendryte,k210-clk";
  456. clocks = <&in0>;
  457. assigned-clocks = <&sysclk K210_CLK_PLL1>;
  458. assigned-clock-rates = <390000000>;
  459. u-boot,dm-pre-reloc;
  460. };
  461. sysrst: reset-controller {
  462. compatible = "kendryte,k210-rst",
  463. "syscon-reset";
  464. #reset-cells = <1>;
  465. regmap = <&sysctl>;
  466. offset = <K210_SYSCTL_PERI_RESET>;
  467. mask = <0x27FFFFFF>;
  468. assert-high = <1>;
  469. };
  470. reboot {
  471. compatible = "syscon-reboot";
  472. regmap = <&sysctl>;
  473. offset = <K210_SYSCTL_SOFT_RESET>;
  474. mask = <1>;
  475. value = <1>;
  476. };
  477. };
  478. aes0: aes@50450000 {
  479. compatible = "kendryte,k210-aes";
  480. reg = <0x50450000 0x100>;
  481. clocks = <&sysclk K210_CLK_AES>;
  482. resets = <&sysrst K210_RST_AES>;
  483. status = "disabled";
  484. };
  485. rtc: rtc@50460000 {
  486. compatible = "kendryte,k210-rtc";
  487. reg = <0x50460000 0x100>;
  488. clocks = <&in0>;
  489. resets = <&sysrst K210_RST_RTC>;
  490. interrupts = <20>;
  491. status = "disabled";
  492. };
  493. };
  494. apb2: bus@52000000 {
  495. #address-cells = <1>;
  496. #size-cells = <1>;
  497. compatible = "kendryte,k210-apb", "simple-pm-bus";
  498. ranges;
  499. clocks = <&sysclk K210_CLK_APB2>;
  500. spi0: spi@52000000 {
  501. #address-cells = <1>;
  502. #size-cells = <0>;
  503. compatible = "canaan,kendryte-k210-spi",
  504. "snps,dw-apb-ssi-4.01",
  505. "snps,dw-apb-ssi";
  506. reg = <0x52000000 0x100>;
  507. interrupts = <1>;
  508. clocks = <&sysclk K210_CLK_SPI0>;
  509. clock-names = "ssi_clk";
  510. resets = <&sysrst K210_RST_SPI0>;
  511. spi-max-frequency = <25000000>;
  512. num-cs = <4>;
  513. reg-io-width = <4>;
  514. status = "disabled";
  515. };
  516. spi1: spi@53000000 {
  517. #address-cells = <1>;
  518. #size-cells = <0>;
  519. compatible = "canaan,kendryte-k210-spi",
  520. "snps,dw-apb-ssi-4.01",
  521. "snps,dw-apb-ssi";
  522. reg = <0x53000000 0x100>;
  523. interrupts = <2>;
  524. clocks = <&sysclk K210_CLK_SPI1>;
  525. clock-names = "ssi_clk";
  526. resets = <&sysrst K210_RST_SPI1>;
  527. spi-max-frequency = <25000000>;
  528. num-cs = <4>;
  529. reg-io-width = <4>;
  530. status = "disabled";
  531. };
  532. spi3: spi@54000000 {
  533. #address-cells = <1>;
  534. #size-cells = <0>;
  535. compatible = "canaan,kendryte-k210-ssi",
  536. "snps,dwc-ssi-1.01a";
  537. reg = <0x54000000 0x200>;
  538. interrupts = <4>;
  539. clocks = <&sysclk K210_CLK_SPI3>;
  540. clock-names = "ssi_clk";
  541. resets = <&sysrst K210_RST_SPI3>;
  542. /* Could possibly go up to 200 MHz */
  543. spi-max-frequency = <100000000>;
  544. num-cs = <4>;
  545. reg-io-width = <4>;
  546. status = "disabled";
  547. };
  548. };
  549. };
  550. };