atmel_lcd.h 1.6 KB

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  1. /*
  2. * atmel_lcd.h - Atmel LCD Controller structures
  3. *
  4. * (C) Copyright 2001
  5. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  6. *
  7. * SPDX-License-Identifier: GPL-2.0+
  8. */
  9. #ifndef _ATMEL_LCD_H_
  10. #define _ATMEL_LCD_H_
  11. /**
  12. * struct atmel_lcd_platdata - platform data for Atmel LCDs with driver model
  13. *
  14. * @timing_index: Index of LCD timing to use in device tree node
  15. */
  16. struct atmel_lcd_platdata {
  17. int timing_index;
  18. };
  19. typedef struct vidinfo {
  20. ushort vl_col; /* Number of columns (i.e. 640) */
  21. ushort vl_row; /* Number of rows (i.e. 480) */
  22. ushort vl_rot; /* Rotation of Display (0, 1, 2, 3) */
  23. u_long vl_clk; /* pixel clock in ps */
  24. /* LCD configuration register */
  25. u_long vl_sync; /* Horizontal / vertical sync */
  26. u_long vl_bpix; /* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8, 4 = 16 */
  27. u_long vl_tft; /* 0 = passive, 1 = TFT */
  28. u_long vl_cont_pol_low; /* contrast polarity is low */
  29. u_long vl_clk_pol; /* clock polarity */
  30. /* Horizontal control register. */
  31. u_long vl_hsync_len; /* Length of horizontal sync */
  32. u_long vl_left_margin; /* Time from sync to picture */
  33. u_long vl_right_margin; /* Time from picture to sync */
  34. /* Vertical control register. */
  35. u_long vl_vsync_len; /* Length of vertical sync */
  36. u_long vl_upper_margin; /* Time from sync to picture */
  37. u_long vl_lower_margin; /* Time from picture to sync */
  38. u_long mmio; /* Memory mapped registers */
  39. u_int logo_width;
  40. u_int logo_height;
  41. int logo_x_offset;
  42. int logo_y_offset;
  43. u_long logo_addr;
  44. } vidinfo_t;
  45. void atmel_logo_info(vidinfo_t *info);
  46. void microchip_logo_info(vidinfo_t *info);
  47. #endif