ds1374.c 5.8 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2001, 2002, 2003
  4. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  5. * Keith Outwater, keith_outwater@mvis.com`
  6. * Steven Scholz, steven.scholz@imc-berlin.de
  7. */
  8. /*
  9. * Date & Time support (no alarms) for Dallas Semiconductor (now Maxim)
  10. * DS1374 Real Time Clock (RTC).
  11. *
  12. * based on ds1337.c
  13. */
  14. #include <common.h>
  15. #include <command.h>
  16. #include <rtc.h>
  17. #include <i2c.h>
  18. /*---------------------------------------------------------------------*/
  19. #undef DEBUG_RTC
  20. #define DEBUG_RTC
  21. #ifdef DEBUG_RTC
  22. #define DEBUGR(fmt,args...) printf(fmt ,##args)
  23. #else
  24. #define DEBUGR(fmt,args...)
  25. #endif
  26. /*---------------------------------------------------------------------*/
  27. #ifndef CONFIG_SYS_I2C_RTC_ADDR
  28. # define CONFIG_SYS_I2C_RTC_ADDR 0x68
  29. #endif
  30. #if defined(CONFIG_RTC_DS1374) && (CONFIG_SYS_I2C_SPEED > 400000)
  31. # error The DS1374 is specified up to 400kHz in fast mode!
  32. #endif
  33. /*
  34. * RTC register addresses
  35. */
  36. #define RTC_TOD_CNT_BYTE0_ADDR 0x00 /* TimeOfDay */
  37. #define RTC_TOD_CNT_BYTE1_ADDR 0x01
  38. #define RTC_TOD_CNT_BYTE2_ADDR 0x02
  39. #define RTC_TOD_CNT_BYTE3_ADDR 0x03
  40. #define RTC_WD_ALM_CNT_BYTE0_ADDR 0x04
  41. #define RTC_WD_ALM_CNT_BYTE1_ADDR 0x05
  42. #define RTC_WD_ALM_CNT_BYTE2_ADDR 0x06
  43. #define RTC_CTL_ADDR 0x07 /* RTC-CoNTrol-register */
  44. #define RTC_SR_ADDR 0x08 /* RTC-StatusRegister */
  45. #define RTC_TCS_DS_ADDR 0x09 /* RTC-TrickleChargeSelect DiodeSelect-register */
  46. #define RTC_CTL_BIT_AIE (1<<0) /* Bit 0 - Alarm Interrupt enable */
  47. #define RTC_CTL_BIT_RS1 (1<<1) /* Bit 1/2 - Rate Select square wave output */
  48. #define RTC_CTL_BIT_RS2 (1<<2) /* Bit 2/2 - Rate Select square wave output */
  49. #define RTC_CTL_BIT_WDSTR (1<<3) /* Bit 3 - Watchdog Reset Steering */
  50. #define RTC_CTL_BIT_BBSQW (1<<4) /* Bit 4 - Battery-Backed Square-Wave */
  51. #define RTC_CTL_BIT_WD_ALM (1<<5) /* Bit 5 - Watchdog/Alarm Counter Select */
  52. #define RTC_CTL_BIT_WACE (1<<6) /* Bit 6 - Watchdog/Alarm Counter Enable WACE*/
  53. #define RTC_CTL_BIT_EN_OSC (1<<7) /* Bit 7 - Enable Oscilator */
  54. #define RTC_SR_BIT_AF 0x01 /* Bit 0 = Alarm Flag */
  55. #define RTC_SR_BIT_OSF 0x80 /* Bit 7 - Osc Stop Flag */
  56. const char RtcTodAddr[] = {
  57. RTC_TOD_CNT_BYTE0_ADDR,
  58. RTC_TOD_CNT_BYTE1_ADDR,
  59. RTC_TOD_CNT_BYTE2_ADDR,
  60. RTC_TOD_CNT_BYTE3_ADDR
  61. };
  62. static uchar rtc_read (uchar reg);
  63. static void rtc_write(uchar reg, uchar val, bool set);
  64. static void rtc_write_raw (uchar reg, uchar val);
  65. /*
  66. * Get the current time from the RTC
  67. */
  68. int rtc_get (struct rtc_time *tm){
  69. int rel = 0;
  70. unsigned long time1, time2;
  71. unsigned int limit;
  72. unsigned char tmp;
  73. unsigned int i;
  74. /*
  75. * Since the reads are being performed one byte at a time,
  76. * there is a chance that a carry will occur during the read.
  77. * To detect this, 2 reads are performed and compared.
  78. */
  79. limit = 10;
  80. do {
  81. i = 4;
  82. time1 = 0;
  83. while (i--) {
  84. tmp = rtc_read(RtcTodAddr[i]);
  85. time1 = (time1 << 8) | (tmp & 0xff);
  86. }
  87. i = 4;
  88. time2 = 0;
  89. while (i--) {
  90. tmp = rtc_read(RtcTodAddr[i]);
  91. time2 = (time2 << 8) | (tmp & 0xff);
  92. }
  93. } while ((time1 != time2) && limit--);
  94. if (time1 != time2) {
  95. printf("can't get consistent time from rtc chip\n");
  96. rel = -1;
  97. }
  98. DEBUGR ("Get RTC s since 1.1.1970: %ld\n", time1);
  99. rtc_to_tm(time1, tm); /* To Gregorian Date */
  100. if (rtc_read(RTC_SR_ADDR) & RTC_SR_BIT_OSF) {
  101. printf ("### Warning: RTC oscillator has stopped\n");
  102. rel = -1;
  103. }
  104. DEBUGR ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
  105. tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday,
  106. tm->tm_hour, tm->tm_min, tm->tm_sec);
  107. return rel;
  108. }
  109. /*
  110. * Set the RTC
  111. */
  112. int rtc_set (struct rtc_time *tmp){
  113. unsigned long time;
  114. unsigned i;
  115. DEBUGR ("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
  116. tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
  117. tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
  118. if (tmp->tm_year < 1970 || tmp->tm_year > 2069)
  119. printf("WARNING: year should be between 1970 and 2069!\n");
  120. time = rtc_mktime(tmp);
  121. DEBUGR ("Set RTC s since 1.1.1970: %ld (0x%02lx)\n", time, time);
  122. /* write to RTC_TOD_CNT_BYTEn_ADDR */
  123. for (i = 0; i <= 3; i++) {
  124. rtc_write_raw(RtcTodAddr[i], (unsigned char)(time & 0xff));
  125. time = time >> 8;
  126. }
  127. /* Start clock */
  128. rtc_write(RTC_CTL_ADDR, RTC_CTL_BIT_EN_OSC, false);
  129. return 0;
  130. }
  131. /*
  132. * Reset the RTC. We setting the date back to 1970-01-01.
  133. * We also enable the oscillator output on the SQW/OUT pin and program
  134. * it for 32,768 Hz output. Note that according to the datasheet, turning
  135. * on the square wave output increases the current drain on the backup
  136. * battery to something between 480nA and 800nA.
  137. */
  138. void rtc_reset (void){
  139. /* clear status flags */
  140. rtc_write(RTC_SR_ADDR, (RTC_SR_BIT_AF|RTC_SR_BIT_OSF), false); /* clearing OSF and AF */
  141. /* Initialise DS1374 oriented to MPC8349E-ADS */
  142. rtc_write (RTC_CTL_ADDR, (RTC_CTL_BIT_EN_OSC
  143. |RTC_CTL_BIT_WACE
  144. |RTC_CTL_BIT_AIE), false);/* start osc, disable WACE, clear AIE
  145. - set to 0 */
  146. rtc_write (RTC_CTL_ADDR, (RTC_CTL_BIT_WD_ALM
  147. |RTC_CTL_BIT_WDSTR
  148. |RTC_CTL_BIT_RS1
  149. |RTC_CTL_BIT_RS2
  150. |RTC_CTL_BIT_BBSQW), true);/* disable WD/ALM, WDSTR set to INT-pin,
  151. set BBSQW and SQW to 32k
  152. - set to 1 */
  153. rtc_write(RTC_WD_ALM_CNT_BYTE2_ADDR, 0xAC, true);
  154. rtc_write(RTC_WD_ALM_CNT_BYTE1_ADDR, 0xDE, true);
  155. rtc_write(RTC_WD_ALM_CNT_BYTE2_ADDR, 0xAD, true);
  156. }
  157. /*
  158. * Helper functions
  159. */
  160. static uchar rtc_read (uchar reg)
  161. {
  162. return (i2c_reg_read (CONFIG_SYS_I2C_RTC_ADDR, reg));
  163. }
  164. static void rtc_write(uchar reg, uchar val, bool set)
  165. {
  166. if (set == true) {
  167. val |= i2c_reg_read (CONFIG_SYS_I2C_RTC_ADDR, reg);
  168. i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val);
  169. } else {
  170. val = i2c_reg_read (CONFIG_SYS_I2C_RTC_ADDR, reg) & ~val;
  171. i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val);
  172. }
  173. }
  174. static void rtc_write_raw (uchar reg, uchar val)
  175. {
  176. i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val);
  177. }