board_f.c 25 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (c) 2011 The Chromium OS Authors.
  4. * (C) Copyright 2002-2006
  5. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  6. *
  7. * (C) Copyright 2002
  8. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  9. * Marius Groeger <mgroeger@sysgo.de>
  10. */
  11. #include <common.h>
  12. #include <bloblist.h>
  13. #include <clock_legacy.h>
  14. #include <console.h>
  15. #include <cpu.h>
  16. #include <cpu_func.h>
  17. #include <dm.h>
  18. #include <env.h>
  19. #include <env_internal.h>
  20. #include <fdtdec.h>
  21. #include <fs.h>
  22. #include <hang.h>
  23. #include <i2c.h>
  24. #include <init.h>
  25. #include <initcall.h>
  26. #include <lcd.h>
  27. #include <malloc.h>
  28. #include <mapmem.h>
  29. #include <os.h>
  30. #include <post.h>
  31. #include <relocate.h>
  32. #include <serial.h>
  33. #ifdef CONFIG_SPL
  34. #include <spl.h>
  35. #endif
  36. #include <status_led.h>
  37. #include <sysreset.h>
  38. #include <timer.h>
  39. #include <trace.h>
  40. #include <video.h>
  41. #include <watchdog.h>
  42. #ifdef CONFIG_MACH_TYPE
  43. #include <asm/mach-types.h>
  44. #endif
  45. #if defined(CONFIG_MP) && defined(CONFIG_PPC)
  46. #include <asm/mp.h>
  47. #endif
  48. #include <asm/io.h>
  49. #include <asm/sections.h>
  50. #include <dm/root.h>
  51. #include <linux/errno.h>
  52. /*
  53. * Pointer to initial global data area
  54. *
  55. * Here we initialize it if needed.
  56. */
  57. #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
  58. #undef XTRN_DECLARE_GLOBAL_DATA_PTR
  59. #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
  60. DECLARE_GLOBAL_DATA_PTR = (gd_t *)(CONFIG_SYS_INIT_GD_ADDR);
  61. #else
  62. DECLARE_GLOBAL_DATA_PTR;
  63. #endif
  64. /*
  65. * TODO(sjg@chromium.org): IMO this code should be
  66. * refactored to a single function, something like:
  67. *
  68. * void led_set_state(enum led_colour_t colour, int on);
  69. */
  70. /************************************************************************
  71. * Coloured LED functionality
  72. ************************************************************************
  73. * May be supplied by boards if desired
  74. */
  75. __weak void coloured_LED_init(void) {}
  76. __weak void red_led_on(void) {}
  77. __weak void red_led_off(void) {}
  78. __weak void green_led_on(void) {}
  79. __weak void green_led_off(void) {}
  80. __weak void yellow_led_on(void) {}
  81. __weak void yellow_led_off(void) {}
  82. __weak void blue_led_on(void) {}
  83. __weak void blue_led_off(void) {}
  84. /*
  85. * Why is gd allocated a register? Prior to reloc it might be better to
  86. * just pass it around to each function in this file?
  87. *
  88. * After reloc one could argue that it is hardly used and doesn't need
  89. * to be in a register. Or if it is it should perhaps hold pointers to all
  90. * global data for all modules, so that post-reloc we can avoid the massive
  91. * literal pool we get on ARM. Or perhaps just encourage each module to use
  92. * a structure...
  93. */
  94. #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
  95. static int init_func_watchdog_init(void)
  96. {
  97. # if defined(CONFIG_HW_WATCHDOG) && \
  98. (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
  99. defined(CONFIG_SH) || \
  100. defined(CONFIG_DESIGNWARE_WATCHDOG) || \
  101. defined(CONFIG_IMX_WATCHDOG))
  102. hw_watchdog_init();
  103. puts(" Watchdog enabled\n");
  104. # endif
  105. WATCHDOG_RESET();
  106. return 0;
  107. }
  108. int init_func_watchdog_reset(void)
  109. {
  110. WATCHDOG_RESET();
  111. return 0;
  112. }
  113. #endif /* CONFIG_WATCHDOG */
  114. __weak void board_add_ram_info(int use_default)
  115. {
  116. /* please define platform specific board_add_ram_info() */
  117. }
  118. static int init_baud_rate(void)
  119. {
  120. gd->baudrate = env_get_ulong("baudrate", 10, CONFIG_BAUDRATE);
  121. return 0;
  122. }
  123. static int display_text_info(void)
  124. {
  125. #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
  126. ulong bss_start, bss_end, text_base;
  127. bss_start = (ulong)&__bss_start;
  128. bss_end = (ulong)&__bss_end;
  129. #ifdef CONFIG_SYS_TEXT_BASE
  130. text_base = CONFIG_SYS_TEXT_BASE;
  131. #else
  132. text_base = CONFIG_SYS_MONITOR_BASE;
  133. #endif
  134. debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
  135. text_base, bss_start, bss_end);
  136. #endif
  137. return 0;
  138. }
  139. #ifdef CONFIG_SYSRESET
  140. static int print_resetinfo(void)
  141. {
  142. struct udevice *dev;
  143. char status[256];
  144. int ret;
  145. ret = uclass_first_device_err(UCLASS_SYSRESET, &dev);
  146. if (ret) {
  147. debug("%s: No sysreset device found (error: %d)\n",
  148. __func__, ret);
  149. /* Not all boards have sysreset drivers available during early
  150. * boot, so don't fail if one can't be found.
  151. */
  152. return 0;
  153. }
  154. if (!sysreset_get_status(dev, status, sizeof(status)))
  155. printf("%s", status);
  156. return 0;
  157. }
  158. #endif
  159. #if defined(CONFIG_DISPLAY_CPUINFO) && CONFIG_IS_ENABLED(CPU)
  160. static int print_cpuinfo(void)
  161. {
  162. struct udevice *dev;
  163. char desc[512];
  164. int ret;
  165. ret = uclass_first_device_err(UCLASS_CPU, &dev);
  166. if (ret) {
  167. debug("%s: Could not get CPU device (err = %d)\n",
  168. __func__, ret);
  169. return ret;
  170. }
  171. ret = cpu_get_desc(dev, desc, sizeof(desc));
  172. if (ret) {
  173. debug("%s: Could not get CPU description (err = %d)\n",
  174. dev->name, ret);
  175. return ret;
  176. }
  177. printf("CPU: %s\n", desc);
  178. return 0;
  179. }
  180. #endif
  181. static int announce_dram_init(void)
  182. {
  183. puts("DRAM: ");
  184. return 0;
  185. }
  186. static int show_dram_config(void)
  187. {
  188. unsigned long long size;
  189. #ifdef CONFIG_NR_DRAM_BANKS
  190. int i;
  191. debug("\nRAM Configuration:\n");
  192. for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
  193. size += gd->bd->bi_dram[i].size;
  194. debug("Bank #%d: %llx ", i,
  195. (unsigned long long)(gd->bd->bi_dram[i].start));
  196. #ifdef DEBUG
  197. print_size(gd->bd->bi_dram[i].size, "\n");
  198. #endif
  199. }
  200. debug("\nDRAM: ");
  201. #else
  202. size = gd->ram_size;
  203. #endif
  204. print_size(size, "");
  205. board_add_ram_info(0);
  206. putc('\n');
  207. return 0;
  208. }
  209. __weak int dram_init_banksize(void)
  210. {
  211. #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
  212. gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
  213. gd->bd->bi_dram[0].size = get_effective_memsize();
  214. #endif
  215. return 0;
  216. }
  217. #if defined(CONFIG_SYS_I2C)
  218. static int init_func_i2c(void)
  219. {
  220. puts("I2C: ");
  221. #ifdef CONFIG_SYS_I2C
  222. i2c_init_all();
  223. #else
  224. i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
  225. #endif
  226. puts("ready\n");
  227. return 0;
  228. }
  229. #endif
  230. #if defined(CONFIG_VID)
  231. __weak int init_func_vid(void)
  232. {
  233. return 0;
  234. }
  235. #endif
  236. static int setup_mon_len(void)
  237. {
  238. #if defined(__ARM__) || defined(__MICROBLAZE__)
  239. gd->mon_len = (ulong)&__bss_end - (ulong)_start;
  240. #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP)
  241. gd->mon_len = (ulong)&_end - (ulong)_init;
  242. #elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA)
  243. gd->mon_len = CONFIG_SYS_MONITOR_LEN;
  244. #elif defined(CONFIG_NDS32) || defined(CONFIG_SH) || defined(CONFIG_RISCV)
  245. gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
  246. #elif defined(CONFIG_SYS_MONITOR_BASE)
  247. /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
  248. gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
  249. #endif
  250. return 0;
  251. }
  252. static int setup_spl_handoff(void)
  253. {
  254. #if CONFIG_IS_ENABLED(HANDOFF)
  255. gd->spl_handoff = bloblist_find(BLOBLISTT_SPL_HANDOFF,
  256. sizeof(struct spl_handoff));
  257. debug("Found SPL hand-off info %p\n", gd->spl_handoff);
  258. #endif
  259. return 0;
  260. }
  261. __weak int arch_cpu_init(void)
  262. {
  263. return 0;
  264. }
  265. __weak int mach_cpu_init(void)
  266. {
  267. return 0;
  268. }
  269. /* Get the top of usable RAM */
  270. __weak ulong board_get_usable_ram_top(ulong total_size)
  271. {
  272. #ifdef CONFIG_SYS_SDRAM_BASE
  273. /*
  274. * Detect whether we have so much RAM that it goes past the end of our
  275. * 32-bit address space. If so, clip the usable RAM so it doesn't.
  276. */
  277. if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
  278. /*
  279. * Will wrap back to top of 32-bit space when reservations
  280. * are made.
  281. */
  282. return 0;
  283. #endif
  284. return gd->ram_top;
  285. }
  286. static int setup_dest_addr(void)
  287. {
  288. debug("Monitor len: %08lX\n", gd->mon_len);
  289. /*
  290. * Ram is setup, size stored in gd !!
  291. */
  292. debug("Ram size: %08lX\n", (ulong)gd->ram_size);
  293. #if defined(CONFIG_SYS_MEM_TOP_HIDE)
  294. /*
  295. * Subtract specified amount of memory to hide so that it won't
  296. * get "touched" at all by U-Boot. By fixing up gd->ram_size
  297. * the Linux kernel should now get passed the now "corrected"
  298. * memory size and won't touch it either. This should work
  299. * for arch/ppc and arch/powerpc. Only Linux board ports in
  300. * arch/powerpc with bootwrapper support, that recalculate the
  301. * memory size from the SDRAM controller setup will have to
  302. * get fixed.
  303. */
  304. gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
  305. #endif
  306. #ifdef CONFIG_SYS_SDRAM_BASE
  307. gd->ram_base = CONFIG_SYS_SDRAM_BASE;
  308. #endif
  309. gd->ram_top = gd->ram_base + get_effective_memsize();
  310. gd->ram_top = board_get_usable_ram_top(gd->mon_len);
  311. gd->relocaddr = gd->ram_top;
  312. debug("Ram top: %08lX\n", (ulong)gd->ram_top);
  313. #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
  314. /*
  315. * We need to make sure the location we intend to put secondary core
  316. * boot code is reserved and not used by any part of u-boot
  317. */
  318. if (gd->relocaddr > determine_mp_bootpg(NULL)) {
  319. gd->relocaddr = determine_mp_bootpg(NULL);
  320. debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
  321. }
  322. #endif
  323. return 0;
  324. }
  325. #ifdef CONFIG_PRAM
  326. /* reserve protected RAM */
  327. static int reserve_pram(void)
  328. {
  329. ulong reg;
  330. reg = env_get_ulong("pram", 10, CONFIG_PRAM);
  331. gd->relocaddr -= (reg << 10); /* size is in kB */
  332. debug("Reserving %ldk for protected RAM at %08lx\n", reg,
  333. gd->relocaddr);
  334. return 0;
  335. }
  336. #endif /* CONFIG_PRAM */
  337. /* Round memory pointer down to next 4 kB limit */
  338. static int reserve_round_4k(void)
  339. {
  340. gd->relocaddr &= ~(4096 - 1);
  341. return 0;
  342. }
  343. __weak int arch_reserve_mmu(void)
  344. {
  345. return 0;
  346. }
  347. static int reserve_video(void)
  348. {
  349. #ifdef CONFIG_DM_VIDEO
  350. ulong addr;
  351. int ret;
  352. addr = gd->relocaddr;
  353. ret = video_reserve(&addr);
  354. if (ret)
  355. return ret;
  356. gd->relocaddr = addr;
  357. #elif defined(CONFIG_LCD)
  358. # ifdef CONFIG_FB_ADDR
  359. gd->fb_base = CONFIG_FB_ADDR;
  360. # else
  361. /* reserve memory for LCD display (always full pages) */
  362. gd->relocaddr = lcd_setmem(gd->relocaddr);
  363. gd->fb_base = gd->relocaddr;
  364. # endif /* CONFIG_FB_ADDR */
  365. #endif
  366. return 0;
  367. }
  368. static int reserve_trace(void)
  369. {
  370. #ifdef CONFIG_TRACE
  371. gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
  372. gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
  373. debug("Reserving %luk for trace data at: %08lx\n",
  374. (unsigned long)CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
  375. #endif
  376. return 0;
  377. }
  378. static int reserve_uboot(void)
  379. {
  380. if (!(gd->flags & GD_FLG_SKIP_RELOC)) {
  381. /*
  382. * reserve memory for U-Boot code, data & bss
  383. * round down to next 4 kB limit
  384. */
  385. gd->relocaddr -= gd->mon_len;
  386. gd->relocaddr &= ~(4096 - 1);
  387. #if defined(CONFIG_E500) || defined(CONFIG_MIPS)
  388. /* round down to next 64 kB limit so that IVPR stays aligned */
  389. gd->relocaddr &= ~(65536 - 1);
  390. #endif
  391. debug("Reserving %ldk for U-Boot at: %08lx\n",
  392. gd->mon_len >> 10, gd->relocaddr);
  393. }
  394. gd->start_addr_sp = gd->relocaddr;
  395. return 0;
  396. }
  397. /*
  398. * reserve after start_addr_sp the requested size and make the stack pointer
  399. * 16-byte aligned, this alignment is needed for cast on the reserved memory
  400. * ref = x86_64 ABI: https://reviews.llvm.org/D30049: 16 bytes
  401. * = ARMv8 Instruction Set Overview: quad word, 16 bytes
  402. */
  403. static unsigned long reserve_stack_aligned(size_t size)
  404. {
  405. return ALIGN_DOWN(gd->start_addr_sp - size, 16);
  406. }
  407. #ifdef CONFIG_SYS_NONCACHED_MEMORY
  408. static int reserve_noncached(void)
  409. {
  410. /*
  411. * The value of gd->start_addr_sp must match the value of malloc_start
  412. * calculated in boatrd_f.c:initr_malloc(), which is passed to
  413. * board_r.c:mem_malloc_init() and then used by
  414. * cache.c:noncached_init()
  415. *
  416. * These calculations must match the code in cache.c:noncached_init()
  417. */
  418. gd->start_addr_sp = ALIGN(gd->start_addr_sp, MMU_SECTION_SIZE) -
  419. MMU_SECTION_SIZE;
  420. gd->start_addr_sp -= ALIGN(CONFIG_SYS_NONCACHED_MEMORY,
  421. MMU_SECTION_SIZE);
  422. debug("Reserving %dM for noncached_alloc() at: %08lx\n",
  423. CONFIG_SYS_NONCACHED_MEMORY >> 20, gd->start_addr_sp);
  424. return 0;
  425. }
  426. #endif
  427. /* reserve memory for malloc() area */
  428. static int reserve_malloc(void)
  429. {
  430. gd->start_addr_sp = reserve_stack_aligned(TOTAL_MALLOC_LEN);
  431. debug("Reserving %dk for malloc() at: %08lx\n",
  432. TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
  433. #ifdef CONFIG_SYS_NONCACHED_MEMORY
  434. reserve_noncached();
  435. #endif
  436. return 0;
  437. }
  438. /* (permanently) allocate a Board Info struct */
  439. static int reserve_board(void)
  440. {
  441. if (!gd->bd) {
  442. gd->start_addr_sp = reserve_stack_aligned(sizeof(bd_t));
  443. gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
  444. memset(gd->bd, '\0', sizeof(bd_t));
  445. debug("Reserving %zu Bytes for Board Info at: %08lx\n",
  446. sizeof(bd_t), gd->start_addr_sp);
  447. }
  448. return 0;
  449. }
  450. static int setup_machine(void)
  451. {
  452. #ifdef CONFIG_MACH_TYPE
  453. gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
  454. #endif
  455. return 0;
  456. }
  457. static int reserve_global_data(void)
  458. {
  459. gd->start_addr_sp = reserve_stack_aligned(sizeof(gd_t));
  460. gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
  461. debug("Reserving %zu Bytes for Global Data at: %08lx\n",
  462. sizeof(gd_t), gd->start_addr_sp);
  463. return 0;
  464. }
  465. static int reserve_fdt(void)
  466. {
  467. #ifndef CONFIG_OF_EMBED
  468. /*
  469. * If the device tree is sitting immediately above our image then we
  470. * must relocate it. If it is embedded in the data section, then it
  471. * will be relocated with other data.
  472. */
  473. if (gd->fdt_blob) {
  474. gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
  475. gd->start_addr_sp = reserve_stack_aligned(gd->fdt_size);
  476. gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
  477. debug("Reserving %lu Bytes for FDT at: %08lx\n",
  478. gd->fdt_size, gd->start_addr_sp);
  479. }
  480. #endif
  481. return 0;
  482. }
  483. static int reserve_bootstage(void)
  484. {
  485. #ifdef CONFIG_BOOTSTAGE
  486. int size = bootstage_get_size();
  487. gd->start_addr_sp = reserve_stack_aligned(size);
  488. gd->new_bootstage = map_sysmem(gd->start_addr_sp, size);
  489. debug("Reserving %#x Bytes for bootstage at: %08lx\n", size,
  490. gd->start_addr_sp);
  491. #endif
  492. return 0;
  493. }
  494. __weak int arch_reserve_stacks(void)
  495. {
  496. return 0;
  497. }
  498. static int reserve_stacks(void)
  499. {
  500. /* make stack pointer 16-byte aligned */
  501. gd->start_addr_sp = reserve_stack_aligned(16);
  502. /*
  503. * let the architecture-specific code tailor gd->start_addr_sp and
  504. * gd->irq_sp
  505. */
  506. return arch_reserve_stacks();
  507. }
  508. static int reserve_bloblist(void)
  509. {
  510. #ifdef CONFIG_BLOBLIST
  511. gd->start_addr_sp = reserve_stack_aligned(CONFIG_BLOBLIST_SIZE);
  512. gd->new_bloblist = map_sysmem(gd->start_addr_sp, CONFIG_BLOBLIST_SIZE);
  513. #endif
  514. return 0;
  515. }
  516. static int display_new_sp(void)
  517. {
  518. debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
  519. return 0;
  520. }
  521. #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
  522. defined(CONFIG_SH)
  523. static int setup_board_part1(void)
  524. {
  525. bd_t *bd = gd->bd;
  526. /*
  527. * Save local variables to board info struct
  528. */
  529. bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
  530. bd->bi_memsize = gd->ram_size; /* size in bytes */
  531. #ifdef CONFIG_SYS_SRAM_BASE
  532. bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
  533. bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
  534. #endif
  535. #if defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
  536. bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
  537. #endif
  538. #if defined(CONFIG_M68K)
  539. bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
  540. #endif
  541. #if defined(CONFIG_MPC83xx)
  542. bd->bi_immrbar = CONFIG_SYS_IMMR;
  543. #endif
  544. return 0;
  545. }
  546. #endif
  547. #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
  548. static int setup_board_part2(void)
  549. {
  550. bd_t *bd = gd->bd;
  551. bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
  552. bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
  553. #if defined(CONFIG_CPM2)
  554. bd->bi_cpmfreq = gd->arch.cpm_clk;
  555. bd->bi_brgfreq = gd->arch.brg_clk;
  556. bd->bi_sccfreq = gd->arch.scc_clk;
  557. bd->bi_vco = gd->arch.vco_out;
  558. #endif /* CONFIG_CPM2 */
  559. #if defined(CONFIG_M68K) && defined(CONFIG_PCI)
  560. bd->bi_pcifreq = gd->pci_clk;
  561. #endif
  562. #if defined(CONFIG_EXTRA_CLOCK)
  563. bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */
  564. bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */
  565. bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */
  566. #endif
  567. return 0;
  568. }
  569. #endif
  570. #ifdef CONFIG_POST
  571. static int init_post(void)
  572. {
  573. post_bootmode_init();
  574. post_run(NULL, POST_ROM | post_bootmode_get(0));
  575. return 0;
  576. }
  577. #endif
  578. static int reloc_fdt(void)
  579. {
  580. #ifndef CONFIG_OF_EMBED
  581. if (gd->flags & GD_FLG_SKIP_RELOC)
  582. return 0;
  583. if (gd->new_fdt) {
  584. memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
  585. gd->fdt_blob = gd->new_fdt;
  586. }
  587. #endif
  588. return 0;
  589. }
  590. static int reloc_bootstage(void)
  591. {
  592. #ifdef CONFIG_BOOTSTAGE
  593. if (gd->flags & GD_FLG_SKIP_RELOC)
  594. return 0;
  595. if (gd->new_bootstage) {
  596. int size = bootstage_get_size();
  597. debug("Copying bootstage from %p to %p, size %x\n",
  598. gd->bootstage, gd->new_bootstage, size);
  599. memcpy(gd->new_bootstage, gd->bootstage, size);
  600. gd->bootstage = gd->new_bootstage;
  601. bootstage_relocate();
  602. }
  603. #endif
  604. return 0;
  605. }
  606. static int reloc_bloblist(void)
  607. {
  608. #ifdef CONFIG_BLOBLIST
  609. if (gd->flags & GD_FLG_SKIP_RELOC)
  610. return 0;
  611. if (gd->new_bloblist) {
  612. int size = CONFIG_BLOBLIST_SIZE;
  613. debug("Copying bloblist from %p to %p, size %x\n",
  614. gd->bloblist, gd->new_bloblist, size);
  615. memcpy(gd->new_bloblist, gd->bloblist, size);
  616. gd->bloblist = gd->new_bloblist;
  617. }
  618. #endif
  619. return 0;
  620. }
  621. static int setup_reloc(void)
  622. {
  623. if (gd->flags & GD_FLG_SKIP_RELOC) {
  624. debug("Skipping relocation due to flag\n");
  625. return 0;
  626. }
  627. #ifdef CONFIG_SYS_TEXT_BASE
  628. #ifdef ARM
  629. gd->reloc_off = gd->relocaddr - (unsigned long)__image_copy_start;
  630. #elif defined(CONFIG_M68K)
  631. /*
  632. * On all ColdFire arch cpu, monitor code starts always
  633. * just after the default vector table location, so at 0x400
  634. */
  635. gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
  636. #elif !defined(CONFIG_SANDBOX)
  637. gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
  638. #endif
  639. #endif
  640. memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
  641. debug("Relocation Offset is: %08lx\n", gd->reloc_off);
  642. debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
  643. gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
  644. gd->start_addr_sp);
  645. return 0;
  646. }
  647. #ifdef CONFIG_OF_BOARD_FIXUP
  648. static int fix_fdt(void)
  649. {
  650. return board_fix_fdt((void *)gd->fdt_blob);
  651. }
  652. #endif
  653. /* ARM calls relocate_code from its crt0.S */
  654. #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
  655. !CONFIG_IS_ENABLED(X86_64)
  656. static int jump_to_copy(void)
  657. {
  658. if (gd->flags & GD_FLG_SKIP_RELOC)
  659. return 0;
  660. /*
  661. * x86 is special, but in a nice way. It uses a trampoline which
  662. * enables the dcache if possible.
  663. *
  664. * For now, other archs use relocate_code(), which is implemented
  665. * similarly for all archs. When we do generic relocation, hopefully
  666. * we can make all archs enable the dcache prior to relocation.
  667. */
  668. #if defined(CONFIG_X86) || defined(CONFIG_ARC)
  669. /*
  670. * SDRAM and console are now initialised. The final stack can now
  671. * be setup in SDRAM. Code execution will continue in Flash, but
  672. * with the stack in SDRAM and Global Data in temporary memory
  673. * (CPU cache)
  674. */
  675. arch_setup_gd(gd->new_gd);
  676. board_init_f_r_trampoline(gd->start_addr_sp);
  677. #else
  678. relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
  679. #endif
  680. return 0;
  681. }
  682. #endif
  683. /* Record the board_init_f() bootstage (after arch_cpu_init()) */
  684. static int initf_bootstage(void)
  685. {
  686. bool from_spl = IS_ENABLED(CONFIG_SPL_BOOTSTAGE) &&
  687. IS_ENABLED(CONFIG_BOOTSTAGE_STASH);
  688. int ret;
  689. ret = bootstage_init(!from_spl);
  690. if (ret)
  691. return ret;
  692. if (from_spl) {
  693. const void *stash = map_sysmem(CONFIG_BOOTSTAGE_STASH_ADDR,
  694. CONFIG_BOOTSTAGE_STASH_SIZE);
  695. ret = bootstage_unstash(stash, CONFIG_BOOTSTAGE_STASH_SIZE);
  696. if (ret && ret != -ENOENT) {
  697. debug("Failed to unstash bootstage: err=%d\n", ret);
  698. return ret;
  699. }
  700. }
  701. bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
  702. return 0;
  703. }
  704. static int initf_console_record(void)
  705. {
  706. #if defined(CONFIG_CONSOLE_RECORD) && CONFIG_VAL(SYS_MALLOC_F_LEN)
  707. return console_record_init();
  708. #else
  709. return 0;
  710. #endif
  711. }
  712. static int initf_dm(void)
  713. {
  714. #if defined(CONFIG_DM) && CONFIG_VAL(SYS_MALLOC_F_LEN)
  715. int ret;
  716. bootstage_start(BOOTSTATE_ID_ACCUM_DM_F, "dm_f");
  717. ret = dm_init_and_scan(true);
  718. bootstage_accum(BOOTSTATE_ID_ACCUM_DM_F);
  719. if (ret)
  720. return ret;
  721. #endif
  722. #ifdef CONFIG_TIMER_EARLY
  723. ret = dm_timer_init();
  724. if (ret)
  725. return ret;
  726. #endif
  727. return 0;
  728. }
  729. /* Architecture-specific memory reservation */
  730. __weak int reserve_arch(void)
  731. {
  732. return 0;
  733. }
  734. __weak int arch_cpu_init_dm(void)
  735. {
  736. return 0;
  737. }
  738. __weak int checkcpu(void)
  739. {
  740. return 0;
  741. }
  742. __weak int clear_bss(void)
  743. {
  744. return 0;
  745. }
  746. static const init_fnc_t init_sequence_f[] = {
  747. setup_mon_len,
  748. #ifdef CONFIG_OF_CONTROL
  749. fdtdec_setup,
  750. #endif
  751. #ifdef CONFIG_TRACE_EARLY
  752. trace_early_init,
  753. #endif
  754. initf_malloc,
  755. log_init,
  756. initf_bootstage, /* uses its own timer, so does not need DM */
  757. #ifdef CONFIG_BLOBLIST
  758. bloblist_init,
  759. #endif
  760. setup_spl_handoff,
  761. initf_console_record,
  762. #if defined(CONFIG_HAVE_FSP)
  763. arch_fsp_init,
  764. #endif
  765. arch_cpu_init, /* basic arch cpu dependent setup */
  766. mach_cpu_init, /* SoC/machine dependent CPU setup */
  767. initf_dm,
  768. arch_cpu_init_dm,
  769. #if defined(CONFIG_BOARD_EARLY_INIT_F)
  770. board_early_init_f,
  771. #endif
  772. #if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
  773. /* get CPU and bus clocks according to the environment variable */
  774. get_clocks, /* get CPU and bus clocks (etc.) */
  775. #endif
  776. #if !defined(CONFIG_M68K)
  777. timer_init, /* initialize timer */
  778. #endif
  779. #if defined(CONFIG_BOARD_POSTCLK_INIT)
  780. board_postclk_init,
  781. #endif
  782. env_init, /* initialize environment */
  783. init_baud_rate, /* initialze baudrate settings */
  784. serial_init, /* serial communications setup */
  785. console_init_f, /* stage 1 init of console */
  786. display_options, /* say that we are here */
  787. display_text_info, /* show debugging info if required */
  788. checkcpu,
  789. #if defined(CONFIG_SYSRESET)
  790. print_resetinfo,
  791. #endif
  792. #if defined(CONFIG_DISPLAY_CPUINFO)
  793. print_cpuinfo, /* display cpu info (and speed) */
  794. #endif
  795. #if defined(CONFIG_DTB_RESELECT)
  796. embedded_dtb_select,
  797. #endif
  798. #if defined(CONFIG_DISPLAY_BOARDINFO)
  799. show_board_info,
  800. #endif
  801. INIT_FUNC_WATCHDOG_INIT
  802. #if defined(CONFIG_MISC_INIT_F)
  803. misc_init_f,
  804. #endif
  805. INIT_FUNC_WATCHDOG_RESET
  806. #if defined(CONFIG_SYS_I2C)
  807. init_func_i2c,
  808. #endif
  809. #if defined(CONFIG_VID) && !defined(CONFIG_SPL)
  810. init_func_vid,
  811. #endif
  812. announce_dram_init,
  813. dram_init, /* configure available RAM banks */
  814. #ifdef CONFIG_POST
  815. post_init_f,
  816. #endif
  817. INIT_FUNC_WATCHDOG_RESET
  818. #if defined(CONFIG_SYS_DRAM_TEST)
  819. testdram,
  820. #endif /* CONFIG_SYS_DRAM_TEST */
  821. INIT_FUNC_WATCHDOG_RESET
  822. #ifdef CONFIG_POST
  823. init_post,
  824. #endif
  825. INIT_FUNC_WATCHDOG_RESET
  826. /*
  827. * Now that we have DRAM mapped and working, we can
  828. * relocate the code and continue running from DRAM.
  829. *
  830. * Reserve memory at end of RAM for (top down in that order):
  831. * - area that won't get touched by U-Boot and Linux (optional)
  832. * - kernel log buffer
  833. * - protected RAM
  834. * - LCD framebuffer
  835. * - monitor code
  836. * - board info struct
  837. */
  838. setup_dest_addr,
  839. #ifdef CONFIG_PRAM
  840. reserve_pram,
  841. #endif
  842. reserve_round_4k,
  843. arch_reserve_mmu,
  844. reserve_video,
  845. reserve_trace,
  846. reserve_uboot,
  847. reserve_malloc,
  848. reserve_board,
  849. setup_machine,
  850. reserve_global_data,
  851. reserve_fdt,
  852. reserve_bootstage,
  853. reserve_bloblist,
  854. reserve_arch,
  855. reserve_stacks,
  856. dram_init_banksize,
  857. show_dram_config,
  858. #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
  859. defined(CONFIG_SH)
  860. setup_board_part1,
  861. #endif
  862. #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
  863. INIT_FUNC_WATCHDOG_RESET
  864. setup_board_part2,
  865. #endif
  866. display_new_sp,
  867. #ifdef CONFIG_OF_BOARD_FIXUP
  868. fix_fdt,
  869. #endif
  870. INIT_FUNC_WATCHDOG_RESET
  871. reloc_fdt,
  872. reloc_bootstage,
  873. reloc_bloblist,
  874. setup_reloc,
  875. #if defined(CONFIG_X86) || defined(CONFIG_ARC)
  876. copy_uboot_to_ram,
  877. do_elf_reloc_fixups,
  878. #endif
  879. clear_bss,
  880. #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
  881. !CONFIG_IS_ENABLED(X86_64)
  882. jump_to_copy,
  883. #endif
  884. NULL,
  885. };
  886. void board_init_f(ulong boot_flags)
  887. {
  888. gd->flags = boot_flags;
  889. gd->have_console = 0;
  890. if (initcall_run_list(init_sequence_f))
  891. hang();
  892. #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
  893. !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64) && \
  894. !defined(CONFIG_ARC)
  895. /* NOTREACHED - jump_to_copy() does not return */
  896. hang();
  897. #endif
  898. }
  899. #if defined(CONFIG_X86) || defined(CONFIG_ARC)
  900. /*
  901. * For now this code is only used on x86.
  902. *
  903. * init_sequence_f_r is the list of init functions which are run when
  904. * U-Boot is executing from Flash with a semi-limited 'C' environment.
  905. * The following limitations must be considered when implementing an
  906. * '_f_r' function:
  907. * - 'static' variables are read-only
  908. * - Global Data (gd->xxx) is read/write
  909. *
  910. * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
  911. * supported). It _should_, if possible, copy global data to RAM and
  912. * initialise the CPU caches (to speed up the relocation process)
  913. *
  914. * NOTE: At present only x86 uses this route, but it is intended that
  915. * all archs will move to this when generic relocation is implemented.
  916. */
  917. static const init_fnc_t init_sequence_f_r[] = {
  918. #if !CONFIG_IS_ENABLED(X86_64)
  919. init_cache_f_r,
  920. #endif
  921. NULL,
  922. };
  923. void board_init_f_r(void)
  924. {
  925. if (initcall_run_list(init_sequence_f_r))
  926. hang();
  927. /*
  928. * The pre-relocation drivers may be using memory that has now gone
  929. * away. Mark serial as unavailable - this will fall back to the debug
  930. * UART if available.
  931. *
  932. * Do the same with log drivers since the memory may not be available.
  933. */
  934. gd->flags &= ~(GD_FLG_SERIAL_READY | GD_FLG_LOG_READY);
  935. #ifdef CONFIG_TIMER
  936. gd->timer = NULL;
  937. #endif
  938. /*
  939. * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
  940. * Transfer execution from Flash to RAM by calculating the address
  941. * of the in-RAM copy of board_init_r() and calling it
  942. */
  943. (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
  944. /* NOTREACHED - board_init_r() does not return */
  945. hang();
  946. }
  947. #endif /* CONFIG_X86 */