Kconfig 45 KB

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  1. menu "ARM architecture"
  2. depends on ARM
  3. config SYS_ARCH
  4. default "arm"
  5. config ARM64
  6. bool
  7. select PHYS_64BIT
  8. select SYS_CACHE_SHIFT_6
  9. if ARM64
  10. config POSITION_INDEPENDENT
  11. bool "Generate position-independent pre-relocation code"
  12. select INIT_SP_RELATIVE
  13. help
  14. U-Boot expects to be linked to a specific hard-coded address, and to
  15. be loaded to and run from that address. This option lifts that
  16. restriction, thus allowing the code to be loaded to and executed
  17. from almost any address. This logic relies on the relocation
  18. information that is embedded in the binary to support U-Boot
  19. relocating itself to the top-of-RAM later during execution.
  20. config INIT_SP_RELATIVE
  21. bool "Specify the early stack pointer relative to the .bss section"
  22. help
  23. U-Boot typically uses a hard-coded value for the stack pointer
  24. before relocation. Enable this option to instead calculate the
  25. initial SP at run-time. This is useful to avoid hard-coding addresses
  26. into U-Boot, so that it can be loaded and executed at arbitrary
  27. addresses and thus avoid using arbitrary addresses at runtime.
  28. If this option is enabled, the early stack pointer is set to
  29. &_bss_start with a offset value added. The offset is specified by
  30. SYS_INIT_SP_BSS_OFFSET.
  31. config SYS_INIT_SP_BSS_OFFSET
  32. int "Early stack offset from the .bss base address"
  33. depends on INIT_SP_RELATIVE
  34. default 524288
  35. help
  36. This option's value is the offset added to &_bss_start in order to
  37. calculate the stack pointer. This offset should be large enough so
  38. that the early malloc region, global data (gd), and early stack usage
  39. do not overlap any appended DTB.
  40. config LINUX_KERNEL_IMAGE_HEADER
  41. bool
  42. help
  43. Place a Linux kernel image header at the start of the U-Boot binary.
  44. The format of the header is described in the Linux kernel source at
  45. Documentation/arm64/booting.txt. This feature is useful since the
  46. image header reports the amount of memory (BSS and similar) that
  47. U-Boot needs to use, but which isn't part of the binary.
  48. if LINUX_KERNEL_IMAGE_HEADER
  49. config LNX_KRNL_IMG_TEXT_OFFSET_BASE
  50. hex
  51. help
  52. The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
  53. TEXT_OFFSET value written to the Linux kernel image header.
  54. endif
  55. endif
  56. config GIC_V3_ITS
  57. bool "ARM GICV3 ITS"
  58. help
  59. ARM GICV3 Interrupt translation service (ITS).
  60. Basic support for programming locality specific peripheral
  61. interrupts (LPI) configuration tables and enable LPI tables.
  62. LPI configuration table can be used by u-boot or Linux.
  63. ARM GICV3 has limitation, once the LPI table is enabled, LPI
  64. configuration table can not be re-programmed, unless GICV3 reset.
  65. config STATIC_RELA
  66. bool
  67. default y if ARM64 && !POSITION_INDEPENDENT
  68. config DMA_ADDR_T_64BIT
  69. bool
  70. default y if ARM64
  71. config HAS_VBAR
  72. bool
  73. config HAS_THUMB2
  74. bool
  75. # Used for compatibility with asm files copied from the kernel
  76. config ARM_ASM_UNIFIED
  77. bool
  78. default y
  79. # Used for compatibility with asm files copied from the kernel
  80. config THUMB2_KERNEL
  81. bool
  82. config SYS_ICACHE_OFF
  83. bool "Do not enable icache"
  84. default n
  85. help
  86. Do not enable instruction cache in U-Boot.
  87. config SPL_SYS_ICACHE_OFF
  88. bool "Do not enable icache in SPL"
  89. depends on SPL
  90. default SYS_ICACHE_OFF
  91. help
  92. Do not enable instruction cache in SPL.
  93. config SYS_DCACHE_OFF
  94. bool "Do not enable dcache"
  95. default n
  96. help
  97. Do not enable data cache in U-Boot.
  98. config SPL_SYS_DCACHE_OFF
  99. bool "Do not enable dcache in SPL"
  100. depends on SPL
  101. default SYS_DCACHE_OFF
  102. help
  103. Do not enable data cache in SPL.
  104. config SYS_ARM_CACHE_CP15
  105. bool "CP15 based cache enabling support"
  106. help
  107. Select this if your processor suports enabling caches by using
  108. CP15 registers.
  109. config SYS_ARM_MMU
  110. bool "MMU-based Paged Memory Management Support"
  111. select SYS_ARM_CACHE_CP15
  112. help
  113. Select if you want MMU-based virtualised addressing space
  114. support via paged memory management.
  115. config SYS_ARM_MPU
  116. bool 'Use the ARM v7 PMSA Compliant MPU'
  117. help
  118. Some ARM systems without an MMU have instead a Memory Protection
  119. Unit (MPU) that defines the type and permissions for regions of
  120. memory.
  121. If your CPU has an MPU then you should choose 'y' here unless you
  122. know that you do not want to use the MPU.
  123. # If set, the workarounds for these ARM errata are applied early during U-Boot
  124. # startup. Note that in general these options force the workarounds to be
  125. # applied; no CPU-type/version detection exists, unlike the similar options in
  126. # the Linux kernel. Do not set these options unless they apply! Also note that
  127. # the following can be machine-specific errata. These do have ability to
  128. # provide rudimentary version and machine-specific checks, but expect no
  129. # product checks:
  130. # CONFIG_ARM_ERRATA_430973
  131. # CONFIG_ARM_ERRATA_454179
  132. # CONFIG_ARM_ERRATA_621766
  133. # CONFIG_ARM_ERRATA_798870
  134. # CONFIG_ARM_ERRATA_801819
  135. # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
  136. # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
  137. config ARM_ERRATA_430973
  138. bool
  139. config ARM_ERRATA_454179
  140. bool
  141. config ARM_ERRATA_621766
  142. bool
  143. config ARM_ERRATA_716044
  144. bool
  145. config ARM_ERRATA_725233
  146. bool
  147. config ARM_ERRATA_742230
  148. bool
  149. config ARM_ERRATA_743622
  150. bool
  151. config ARM_ERRATA_751472
  152. bool
  153. config ARM_ERRATA_761320
  154. bool
  155. config ARM_ERRATA_773022
  156. bool
  157. config ARM_ERRATA_774769
  158. bool
  159. config ARM_ERRATA_794072
  160. bool
  161. config ARM_ERRATA_798870
  162. bool
  163. config ARM_ERRATA_801819
  164. bool
  165. config ARM_ERRATA_826974
  166. bool
  167. config ARM_ERRATA_828024
  168. bool
  169. config ARM_ERRATA_829520
  170. bool
  171. config ARM_ERRATA_833069
  172. bool
  173. config ARM_ERRATA_833471
  174. bool
  175. config ARM_ERRATA_845369
  176. bool
  177. config ARM_ERRATA_852421
  178. bool
  179. config ARM_ERRATA_852423
  180. bool
  181. config ARM_ERRATA_855873
  182. bool
  183. config ARM_CORTEX_A8_CVE_2017_5715
  184. bool
  185. config ARM_CORTEX_A15_CVE_2017_5715
  186. bool
  187. config CPU_ARM720T
  188. bool
  189. select SYS_CACHE_SHIFT_5
  190. imply SYS_ARM_MMU
  191. config CPU_ARM920T
  192. bool
  193. select SYS_CACHE_SHIFT_5
  194. imply SYS_ARM_MMU
  195. config CPU_ARM926EJS
  196. bool
  197. select SYS_CACHE_SHIFT_5
  198. imply SYS_ARM_MMU
  199. config CPU_ARM946ES
  200. bool
  201. select SYS_CACHE_SHIFT_5
  202. imply SYS_ARM_MMU
  203. config CPU_ARM1136
  204. bool
  205. select SYS_CACHE_SHIFT_5
  206. imply SYS_ARM_MMU
  207. config CPU_ARM1176
  208. bool
  209. select HAS_VBAR
  210. select SYS_CACHE_SHIFT_5
  211. imply SYS_ARM_MMU
  212. config CPU_V7A
  213. bool
  214. select HAS_THUMB2
  215. select HAS_VBAR
  216. select SYS_CACHE_SHIFT_6
  217. imply SYS_ARM_MMU
  218. config CPU_V7M
  219. bool
  220. select HAS_THUMB2
  221. select SYS_ARM_MPU
  222. select SYS_CACHE_SHIFT_5
  223. select SYS_THUMB_BUILD
  224. select THUMB2_KERNEL
  225. config CPU_V7R
  226. bool
  227. select HAS_THUMB2
  228. select SYS_ARM_CACHE_CP15
  229. select SYS_ARM_MPU
  230. select SYS_CACHE_SHIFT_6
  231. config CPU_PXA
  232. bool
  233. select SYS_CACHE_SHIFT_5
  234. imply SYS_ARM_MMU
  235. config CPU_SA1100
  236. bool
  237. select SYS_CACHE_SHIFT_5
  238. imply SYS_ARM_MMU
  239. config SYS_CPU
  240. default "arm720t" if CPU_ARM720T
  241. default "arm920t" if CPU_ARM920T
  242. default "arm926ejs" if CPU_ARM926EJS
  243. default "arm946es" if CPU_ARM946ES
  244. default "arm1136" if CPU_ARM1136
  245. default "arm1176" if CPU_ARM1176
  246. default "armv7" if CPU_V7A
  247. default "armv7" if CPU_V7R
  248. default "armv7m" if CPU_V7M
  249. default "pxa" if CPU_PXA
  250. default "sa1100" if CPU_SA1100
  251. default "armv8" if ARM64
  252. config SYS_ARM_ARCH
  253. int
  254. default 4 if CPU_ARM720T
  255. default 4 if CPU_ARM920T
  256. default 5 if CPU_ARM926EJS
  257. default 5 if CPU_ARM946ES
  258. default 6 if CPU_ARM1136
  259. default 6 if CPU_ARM1176
  260. default 7 if CPU_V7A
  261. default 7 if CPU_V7M
  262. default 7 if CPU_V7R
  263. default 5 if CPU_PXA
  264. default 4 if CPU_SA1100
  265. default 8 if ARM64
  266. config SYS_CACHE_SHIFT_5
  267. bool
  268. config SYS_CACHE_SHIFT_6
  269. bool
  270. config SYS_CACHE_SHIFT_7
  271. bool
  272. config SYS_CACHELINE_SIZE
  273. int
  274. default 128 if SYS_CACHE_SHIFT_7
  275. default 64 if SYS_CACHE_SHIFT_6
  276. default 32 if SYS_CACHE_SHIFT_5
  277. config ARCH_CPU_INIT
  278. bool "Enable ARCH_CPU_INIT"
  279. help
  280. Some architectures require a call to arch_cpu_init().
  281. Say Y here to enable it
  282. config SYS_ARCH_TIMER
  283. bool "ARM Generic Timer support"
  284. depends on CPU_V7A || ARM64
  285. default y if ARM64
  286. help
  287. The ARM Generic Timer (aka arch-timer) provides an architected
  288. interface to a timer source on an SoC.
  289. It is mandatory for ARMv8 implementation and widely available
  290. on ARMv7 systems.
  291. config ARM_SMCCC
  292. bool "Support for ARM SMC Calling Convention (SMCCC)"
  293. depends on CPU_V7A || ARM64
  294. select ARM_PSCI_FW
  295. help
  296. Say Y here if you want to enable ARM SMC Calling Convention.
  297. This should be enabled if U-Boot needs to communicate with system
  298. firmware (for example, PSCI) according to SMCCC.
  299. config SEMIHOSTING
  300. bool "support boot from semihosting"
  301. help
  302. In emulated environments, semihosting is a way for
  303. the hosted environment to call out to the emulator to
  304. retrieve files from the host machine.
  305. config SYS_THUMB_BUILD
  306. bool "Build U-Boot using the Thumb instruction set"
  307. depends on !ARM64
  308. help
  309. Use this flag to build U-Boot using the Thumb instruction set for
  310. ARM architectures. Thumb instruction set provides better code
  311. density. For ARM architectures that support Thumb2 this flag will
  312. result in Thumb2 code generated by GCC.
  313. config SPL_SYS_THUMB_BUILD
  314. bool "Build SPL using the Thumb instruction set"
  315. default y if SYS_THUMB_BUILD
  316. depends on !ARM64 && SPL
  317. help
  318. Use this flag to build SPL using the Thumb instruction set for
  319. ARM architectures. Thumb instruction set provides better code
  320. density. For ARM architectures that support Thumb2 this flag will
  321. result in Thumb2 code generated by GCC.
  322. config TPL_SYS_THUMB_BUILD
  323. bool "Build TPL using the Thumb instruction set"
  324. default y if SYS_THUMB_BUILD
  325. depends on TPL && !ARM64
  326. help
  327. Use this flag to build TPL using the Thumb instruction set for
  328. ARM architectures. Thumb instruction set provides better code
  329. density. For ARM architectures that support Thumb2 this flag will
  330. result in Thumb2 code generated by GCC.
  331. config SYS_L2CACHE_OFF
  332. bool "L2cache off"
  333. help
  334. If SoC does not support L2CACHE or one does not want to enable
  335. L2CACHE, choose this option.
  336. config ENABLE_ARM_SOC_BOOT0_HOOK
  337. bool "prepare BOOT0 header"
  338. help
  339. If the SoC's BOOT0 requires a header area filled with (magic)
  340. values, then choose this option, and create a file included as
  341. <asm/arch/boot0.h> which contains the required assembler code.
  342. config ARM_CORTEX_CPU_IS_UP
  343. bool
  344. default n
  345. config USE_ARCH_MEMCPY
  346. bool "Use an assembly optimized implementation of memcpy"
  347. default y
  348. depends on !ARM64
  349. help
  350. Enable the generation of an optimized version of memcpy.
  351. Such an implementation may be faster under some conditions
  352. but may increase the binary size.
  353. config SPL_USE_ARCH_MEMCPY
  354. bool "Use an assembly optimized implementation of memcpy for SPL"
  355. default y if USE_ARCH_MEMCPY
  356. depends on !ARM64 && SPL
  357. help
  358. Enable the generation of an optimized version of memcpy.
  359. Such an implementation may be faster under some conditions
  360. but may increase the binary size.
  361. config TPL_USE_ARCH_MEMCPY
  362. bool "Use an assembly optimized implementation of memcpy for TPL"
  363. default y if USE_ARCH_MEMCPY
  364. depends on !ARM64 && TPL
  365. help
  366. Enable the generation of an optimized version of memcpy.
  367. Such an implementation may be faster under some conditions
  368. but may increase the binary size.
  369. config USE_ARCH_MEMSET
  370. bool "Use an assembly optimized implementation of memset"
  371. default y
  372. depends on !ARM64
  373. help
  374. Enable the generation of an optimized version of memset.
  375. Such an implementation may be faster under some conditions
  376. but may increase the binary size.
  377. config SPL_USE_ARCH_MEMSET
  378. bool "Use an assembly optimized implementation of memset for SPL"
  379. default y if USE_ARCH_MEMSET
  380. depends on !ARM64 && SPL
  381. help
  382. Enable the generation of an optimized version of memset.
  383. Such an implementation may be faster under some conditions
  384. but may increase the binary size.
  385. config TPL_USE_ARCH_MEMSET
  386. bool "Use an assembly optimized implementation of memset for TPL"
  387. default y if USE_ARCH_MEMSET
  388. depends on !ARM64 && TPL
  389. help
  390. Enable the generation of an optimized version of memset.
  391. Such an implementation may be faster under some conditions
  392. but may increase the binary size.
  393. config SET_STACK_SIZE
  394. bool "Enable an option to set max stack size that can be used"
  395. default y if ARCH_VERSAL || ARCH_ZYNQMP
  396. help
  397. This will enable an option to set max stack size that can be
  398. used by U-Boot.
  399. config STACK_SIZE
  400. hex "Define max stack size that can be used by U-Boot"
  401. depends on SET_STACK_SIZE
  402. default 0x4000000 if ARCH_VERSAL || ARCH_ZYNQMP
  403. help
  404. Define Max stack size that can be used by U-Boot so that the
  405. initrd_high will be calculated as base stack pointer minus this
  406. stack size.
  407. config ARM64_SUPPORT_AARCH32
  408. bool "ARM64 system support AArch32 execution state"
  409. depends on ARM64
  410. default y if !TARGET_THUNDERX_88XX
  411. help
  412. This ARM64 system supports AArch32 execution state.
  413. choice
  414. prompt "Target select"
  415. default TARGET_HIKEY
  416. config ARCH_AT91
  417. bool "Atmel AT91"
  418. select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
  419. config TARGET_EDB93XX
  420. bool "Support edb93xx"
  421. select CPU_ARM920T
  422. select PL010_SERIAL
  423. config TARGET_ASPENITE
  424. bool "Support aspenite"
  425. select CPU_ARM926EJS
  426. config TARGET_GPLUGD
  427. bool "Support gplugd"
  428. select CPU_ARM926EJS
  429. config ARCH_DAVINCI
  430. bool "TI DaVinci"
  431. select CPU_ARM926EJS
  432. imply CMD_SAVES
  433. help
  434. Support for TI's DaVinci platform.
  435. config KIRKWOOD
  436. bool "Marvell Kirkwood"
  437. select ARCH_MISC_INIT
  438. select BOARD_EARLY_INIT_F
  439. select CPU_ARM926EJS
  440. config ARCH_MVEBU
  441. bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
  442. select DM
  443. select DM_ETH
  444. select DM_SERIAL
  445. select DM_SPI
  446. select DM_SPI_FLASH
  447. select OF_CONTROL
  448. select OF_SEPARATE
  449. select SPI
  450. imply CMD_DM
  451. config TARGET_APF27
  452. bool "Support apf27"
  453. select CPU_ARM926EJS
  454. select SUPPORT_SPL
  455. config ORION5X
  456. bool "Marvell Orion"
  457. select CPU_ARM926EJS
  458. config TARGET_SPEAR300
  459. bool "Support spear300"
  460. select BOARD_EARLY_INIT_F
  461. select CPU_ARM926EJS
  462. select PL011_SERIAL
  463. imply CMD_SAVES
  464. config TARGET_SPEAR310
  465. bool "Support spear310"
  466. select BOARD_EARLY_INIT_F
  467. select CPU_ARM926EJS
  468. select PL011_SERIAL
  469. imply CMD_SAVES
  470. config TARGET_SPEAR320
  471. bool "Support spear320"
  472. select BOARD_EARLY_INIT_F
  473. select CPU_ARM926EJS
  474. select PL011_SERIAL
  475. imply CMD_SAVES
  476. config TARGET_SPEAR600
  477. bool "Support spear600"
  478. select BOARD_EARLY_INIT_F
  479. select CPU_ARM926EJS
  480. select PL011_SERIAL
  481. imply CMD_SAVES
  482. config TARGET_STV0991
  483. bool "Support stv0991"
  484. select CPU_V7A
  485. select DM
  486. select DM_SERIAL
  487. select DM_SPI
  488. select DM_SPI_FLASH
  489. select PL01X_SERIAL
  490. select SPI
  491. select SPI_FLASH
  492. imply CMD_DM
  493. config TARGET_X600
  494. bool "Support x600"
  495. select BOARD_LATE_INIT
  496. select CPU_ARM926EJS
  497. select PL011_SERIAL
  498. select SUPPORT_SPL
  499. config TARGET_FLEA3
  500. bool "Support flea3"
  501. select CPU_ARM1136
  502. config TARGET_MX35PDK
  503. bool "Support mx35pdk"
  504. select BOARD_LATE_INIT
  505. select CPU_ARM1136
  506. config ARCH_BCM283X
  507. bool "Broadcom BCM283X family"
  508. select DM
  509. select DM_GPIO
  510. select DM_SERIAL
  511. select OF_CONTROL
  512. select PL01X_SERIAL
  513. select SERIAL_SEARCH_ALL
  514. imply CMD_DM
  515. imply FAT_WRITE
  516. config ARCH_BCM63158
  517. bool "Broadcom BCM63158 family"
  518. select DM
  519. select OF_CONTROL
  520. imply CMD_DM
  521. config ARCH_BCM68360
  522. bool "Broadcom BCM68360 family"
  523. select DM
  524. select OF_CONTROL
  525. imply CMD_DM
  526. config ARCH_BCM6858
  527. bool "Broadcom BCM6858 family"
  528. select DM
  529. select OF_CONTROL
  530. imply CMD_DM
  531. config TARGET_VEXPRESS_CA15_TC2
  532. bool "Support vexpress_ca15_tc2"
  533. select CPU_V7A
  534. select CPU_V7_HAS_NONSEC
  535. select CPU_V7_HAS_VIRT
  536. select PL011_SERIAL
  537. config ARCH_BCMSTB
  538. bool "Broadcom BCM7XXX family"
  539. select CPU_V7A
  540. select DM
  541. select OF_CONTROL
  542. select OF_PRIOR_STAGE
  543. imply CMD_DM
  544. help
  545. This enables support for Broadcom ARM-based set-top box
  546. chipsets, including the 7445 family of chips.
  547. config TARGET_VEXPRESS_CA5X2
  548. bool "Support vexpress_ca5x2"
  549. select CPU_V7A
  550. select PL011_SERIAL
  551. config TARGET_VEXPRESS_CA9X4
  552. bool "Support vexpress_ca9x4"
  553. select CPU_V7A
  554. select PL011_SERIAL
  555. config TARGET_BCM23550_W1D
  556. bool "Support bcm23550_w1d"
  557. select CPU_V7A
  558. imply CRC32_VERIFY
  559. imply FAT_WRITE
  560. config TARGET_BCM28155_AP
  561. bool "Support bcm28155_ap"
  562. select CPU_V7A
  563. imply CRC32_VERIFY
  564. imply FAT_WRITE
  565. config TARGET_BCMCYGNUS
  566. bool "Support bcmcygnus"
  567. select CPU_V7A
  568. imply BCM_SF2_ETH
  569. imply BCM_SF2_ETH_GMAC
  570. imply CMD_HASH
  571. imply CRC32_VERIFY
  572. imply FAT_WRITE
  573. imply HASH_VERIFY
  574. imply NETDEVICES
  575. config TARGET_BCMNSP
  576. bool "Support bcmnsp"
  577. select CPU_V7A
  578. config TARGET_BCMNS2
  579. bool "Support Broadcom Northstar2"
  580. select ARM64
  581. help
  582. Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
  583. ARMv8 Cortex-A57 processors targeting a broad range of networking
  584. applications.
  585. config ARCH_EXYNOS
  586. bool "Samsung EXYNOS"
  587. select DM
  588. select DM_GPIO
  589. select DM_I2C
  590. select DM_KEYBOARD
  591. select DM_SERIAL
  592. select DM_SPI
  593. select DM_SPI_FLASH
  594. select SPI
  595. imply SYS_THUMB_BUILD
  596. imply CMD_DM
  597. imply FAT_WRITE
  598. config ARCH_S5PC1XX
  599. bool "Samsung S5PC1XX"
  600. select CPU_V7A
  601. select DM
  602. select DM_GPIO
  603. select DM_I2C
  604. select DM_SERIAL
  605. imply CMD_DM
  606. config ARCH_HIGHBANK
  607. bool "Calxeda Highbank"
  608. select CPU_V7A
  609. select PL011_SERIAL
  610. config ARCH_INTEGRATOR
  611. bool "ARM Ltd. Integrator family"
  612. select DM
  613. select DM_SERIAL
  614. select PL01X_SERIAL
  615. imply CMD_DM
  616. config ARCH_KEYSTONE
  617. bool "TI Keystone"
  618. select CMD_POWEROFF
  619. select CPU_V7A
  620. select SUPPORT_SPL
  621. select SYS_ARCH_TIMER
  622. select SYS_THUMB_BUILD
  623. imply CMD_MTDPARTS
  624. imply CMD_SAVES
  625. imply FIT
  626. config ARCH_K3
  627. bool "Texas Instruments' K3 Architecture"
  628. select SPL
  629. select SUPPORT_SPL
  630. select FIT
  631. config ARCH_OMAP2PLUS
  632. bool "TI OMAP2+"
  633. select CPU_V7A
  634. select SPL_BOARD_INIT if SPL
  635. select SPL_STACK_R if SPL
  636. select SUPPORT_SPL
  637. imply FIT
  638. config ARCH_MESON
  639. bool "Amlogic Meson"
  640. imply DISTRO_DEFAULTS
  641. imply DM_RNG
  642. help
  643. Support for the Meson SoC family developed by Amlogic Inc.,
  644. targeted at media players and tablet computers. We currently
  645. support the S905 (GXBaby) 64-bit SoC.
  646. config ARCH_MEDIATEK
  647. bool "MediaTek SoCs"
  648. select DM
  649. select OF_CONTROL
  650. select SPL_DM if SPL
  651. select SPL_LIBCOMMON_SUPPORT if SPL
  652. select SPL_LIBGENERIC_SUPPORT if SPL
  653. select SPL_OF_CONTROL if SPL
  654. select SUPPORT_SPL
  655. help
  656. Support for the MediaTek SoCs family developed by MediaTek Inc.
  657. Please refer to doc/README.mediatek for more information.
  658. config ARCH_LPC32XX
  659. bool "NXP LPC32xx platform"
  660. select CPU_ARM926EJS
  661. select DM
  662. select DM_GPIO
  663. select DM_SERIAL
  664. select SPL_DM if SPL
  665. select SUPPORT_SPL
  666. imply CMD_DM
  667. config ARCH_IMX8
  668. bool "NXP i.MX8 platform"
  669. select ARM64
  670. select DM
  671. select OF_CONTROL
  672. select ENABLE_ARM_SOC_BOOT0_HOOK
  673. config ARCH_IMX8M
  674. bool "NXP i.MX8M platform"
  675. select ARM64
  676. select DM
  677. select SUPPORT_SPL
  678. imply CMD_DM
  679. config ARCH_IMXRT
  680. bool "NXP i.MXRT platform"
  681. select CPU_V7M
  682. select DM
  683. select DM_SERIAL
  684. select SUPPORT_SPL
  685. imply CMD_DM
  686. config ARCH_MX23
  687. bool "NXP i.MX23 family"
  688. select CPU_ARM926EJS
  689. select PL011_SERIAL
  690. select SUPPORT_SPL
  691. config ARCH_MX25
  692. bool "NXP MX25"
  693. select CPU_ARM926EJS
  694. imply MXC_GPIO
  695. config ARCH_MX28
  696. bool "NXP i.MX28 family"
  697. select CPU_ARM926EJS
  698. select PL011_SERIAL
  699. select SUPPORT_SPL
  700. config ARCH_MX31
  701. bool "NXP i.MX31 family"
  702. select CPU_ARM1136
  703. config ARCH_MX7ULP
  704. bool "NXP MX7ULP"
  705. select CPU_V7A
  706. select ROM_UNIFIED_SECTIONS
  707. imply MXC_GPIO
  708. imply SYS_THUMB_BUILD
  709. config ARCH_MX7
  710. bool "Freescale MX7"
  711. select ARCH_MISC_INIT
  712. select BOARD_EARLY_INIT_F
  713. select CPU_V7A
  714. select SYS_FSL_HAS_SEC if IMX_HAB
  715. select SYS_FSL_SEC_COMPAT_4
  716. select SYS_FSL_SEC_LE
  717. imply MXC_GPIO
  718. imply SYS_THUMB_BUILD
  719. config ARCH_MX6
  720. bool "Freescale MX6"
  721. select CPU_V7A
  722. select SYS_FSL_HAS_SEC if IMX_HAB
  723. select SYS_FSL_SEC_COMPAT_4
  724. select SYS_FSL_SEC_LE
  725. imply MXC_GPIO
  726. imply SYS_THUMB_BUILD
  727. if ARCH_MX6
  728. config SPL_LDSCRIPT
  729. default "arch/arm/mach-omap2/u-boot-spl.lds"
  730. endif
  731. config ARCH_MX5
  732. bool "Freescale MX5"
  733. select BOARD_EARLY_INIT_F
  734. select CPU_V7A
  735. imply MXC_GPIO
  736. config ARCH_OWL
  737. bool "Actions Semi OWL SoCs"
  738. select DM
  739. select DM_SERIAL
  740. select OWL_SERIAL
  741. select CLK
  742. select CLK_OWL
  743. select OF_CONTROL
  744. select CONFIG_SYS_RELOC_GD_ENV_ADDR
  745. imply CMD_DM
  746. config ARCH_QEMU
  747. bool "QEMU Virtual Platform"
  748. select ARCH_SUPPORT_TFABOOT
  749. select DM
  750. select DM_SERIAL
  751. select OF_CONTROL
  752. select PL01X_SERIAL
  753. imply CMD_DM
  754. imply DM_RTC
  755. imply RTC_PL031
  756. config ARCH_RMOBILE
  757. bool "Renesas ARM SoCs"
  758. select BOARD_EARLY_INIT_F if !RZA1
  759. select DM
  760. select DM_SERIAL
  761. imply CMD_DM
  762. imply FAT_WRITE
  763. imply SYS_THUMB_BUILD
  764. imply ARCH_MISC_INIT if DISPLAY_CPUINFO
  765. config TARGET_S32V234EVB
  766. bool "Support s32v234evb"
  767. select ARM64
  768. select SYS_FSL_ERRATUM_ESDHC111
  769. config ARCH_SNAPDRAGON
  770. bool "Qualcomm Snapdragon SoCs"
  771. select ARM64
  772. select DM
  773. select DM_GPIO
  774. select DM_SERIAL
  775. select MSM_SMEM
  776. select OF_CONTROL
  777. select OF_SEPARATE
  778. select SMEM
  779. select SPMI
  780. imply CMD_DM
  781. config ARCH_SOCFPGA
  782. bool "Altera SOCFPGA family"
  783. select ARCH_EARLY_INIT_R
  784. select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
  785. select ARM64 if TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX
  786. select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
  787. select DM
  788. select DM_SERIAL
  789. select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
  790. select OF_CONTROL
  791. select SPL_DM_RESET if DM_RESET
  792. select SPL_DM_SERIAL
  793. select SPL_LIBCOMMON_SUPPORT
  794. select SPL_LIBGENERIC_SUPPORT
  795. select SPL_NAND_SUPPORT if SPL_NAND_DENALI
  796. select SPL_OF_CONTROL
  797. select SPL_SEPARATE_BSS if TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX
  798. select SPL_SERIAL_SUPPORT
  799. select SPL_SYSRESET
  800. select SPL_WATCHDOG_SUPPORT
  801. select SUPPORT_SPL
  802. select SYS_NS16550
  803. select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
  804. select SYSRESET
  805. select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
  806. select SYSRESET_SOCFPGA_S10 if TARGET_SOCFPGA_STRATIX10
  807. imply CMD_DM
  808. imply CMD_MTDPARTS
  809. imply CRC32_VERIFY
  810. imply DM_SPI
  811. imply DM_SPI_FLASH
  812. imply FAT_WRITE
  813. imply SPL
  814. imply SPL_DM
  815. imply SPL_LIBDISK_SUPPORT
  816. imply SPL_MMC_SUPPORT
  817. imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
  818. imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
  819. imply SPL_SPI_FLASH_SUPPORT
  820. imply SPL_SPI_SUPPORT
  821. imply L2X0_CACHE
  822. config ARCH_SUNXI
  823. bool "Support sunxi (Allwinner) SoCs"
  824. select BINMAN
  825. select CMD_GPIO
  826. select CMD_MMC if MMC
  827. select CMD_USB if DISTRO_DEFAULTS
  828. select CLK
  829. select DM
  830. select DM_ETH
  831. select DM_GPIO
  832. select DM_KEYBOARD
  833. select DM_MMC if MMC
  834. select DM_SCSI if SCSI
  835. select DM_SERIAL
  836. select DM_USB if DISTRO_DEFAULTS
  837. select OF_BOARD_SETUP
  838. select OF_CONTROL
  839. select OF_SEPARATE
  840. select SPECIFY_CONSOLE_INDEX
  841. select SPL_STACK_R if SPL
  842. select SPL_SYS_MALLOC_SIMPLE if SPL
  843. select SPL_SYS_THUMB_BUILD if !ARM64
  844. select SUNXI_GPIO
  845. select SYS_NS16550
  846. select SYS_THUMB_BUILD if !ARM64
  847. select USB if DISTRO_DEFAULTS
  848. select USB_KEYBOARD if DISTRO_DEFAULTS
  849. select USB_STORAGE if DISTRO_DEFAULTS
  850. select SPL_USE_TINY_PRINTF
  851. select USE_PREBOOT
  852. select SYS_RELOC_GD_ENV_ADDR
  853. imply CMD_DM
  854. imply CMD_GPT
  855. imply CMD_UBI if MTD_RAW_NAND
  856. imply DISTRO_DEFAULTS
  857. imply FAT_WRITE
  858. imply FIT
  859. imply OF_LIBFDT_OVERLAY
  860. imply PRE_CONSOLE_BUFFER
  861. imply SPL_GPIO_SUPPORT
  862. imply SPL_LIBCOMMON_SUPPORT
  863. imply SPL_LIBGENERIC_SUPPORT
  864. imply SPL_MMC_SUPPORT if MMC
  865. imply SPL_POWER_SUPPORT
  866. imply SPL_SERIAL_SUPPORT
  867. imply USB_GADGET
  868. config ARCH_U8500
  869. bool "ST-Ericsson U8500 Series"
  870. select CPU_V7A
  871. select DM
  872. select DM_GPIO
  873. select DM_MMC if MMC
  874. select DM_SERIAL
  875. select DM_USB if USB
  876. select OF_CONTROL
  877. select SYSRESET
  878. select TIMER
  879. imply ARM_PL180_MMCI
  880. imply DM_RTC
  881. imply NOMADIK_MTU_TIMER
  882. imply PL01X_SERIAL
  883. imply RTC_PL031
  884. imply SYSRESET_SYSCON
  885. config ARCH_VERSAL
  886. bool "Support Xilinx Versal Platform"
  887. select ARM64
  888. select CLK
  889. select DM
  890. select DM_ETH if NET
  891. select DM_MMC if MMC
  892. select DM_SERIAL
  893. select OF_CONTROL
  894. imply BOARD_LATE_INIT
  895. config ARCH_VF610
  896. bool "Freescale Vybrid"
  897. select CPU_V7A
  898. select SYS_FSL_ERRATUM_ESDHC111
  899. imply CMD_MTDPARTS
  900. imply MTD_RAW_NAND
  901. config ARCH_ZYNQ
  902. bool "Xilinx Zynq based platform"
  903. select CLK
  904. select CLK_ZYNQ
  905. select CPU_V7A
  906. select DM
  907. select DM_ETH if NET
  908. select DM_MMC if MMC
  909. select DM_SERIAL
  910. select DM_SPI
  911. select DM_SPI_FLASH
  912. select DM_USB if USB
  913. select OF_CONTROL
  914. select SPI
  915. select SPL_BOARD_INIT if SPL
  916. select SPL_CLK if SPL
  917. select SPL_DM if SPL
  918. select SPL_OF_CONTROL if SPL
  919. select SPL_SEPARATE_BSS if SPL
  920. select SUPPORT_SPL
  921. imply ARCH_EARLY_INIT_R
  922. imply BOARD_LATE_INIT
  923. imply CMD_CLK
  924. imply CMD_DM
  925. imply CMD_SPL
  926. imply FAT_WRITE
  927. config ARCH_ZYNQMP_R5
  928. bool "Xilinx ZynqMP R5 based platform"
  929. select CLK
  930. select CPU_V7R
  931. select DM
  932. select DM_ETH if NET
  933. select DM_MMC if MMC
  934. select DM_SERIAL
  935. select OF_CONTROL
  936. imply CMD_DM
  937. imply DM_USB_GADGET
  938. config ARCH_ZYNQMP
  939. bool "Xilinx ZynqMP based platform"
  940. select ARM64
  941. select CLK
  942. select DM
  943. select DM_ETH if NET
  944. select DM_MAILBOX
  945. select DM_MMC if MMC
  946. select DM_SERIAL
  947. select DM_SPI if SPI
  948. select DM_SPI_FLASH if DM_SPI
  949. select DM_USB if USB
  950. select FIRMWARE
  951. select OF_CONTROL
  952. select SPL_BOARD_INIT if SPL
  953. select SPL_CLK if SPL
  954. select SPL_DM_MAILBOX if SPL
  955. select SPL_FIRMWARE if SPL
  956. select SPL_SEPARATE_BSS if SPL
  957. select SUPPORT_SPL
  958. select ZYNQMP_IPI
  959. imply BOARD_LATE_INIT
  960. imply CMD_DM
  961. imply FAT_WRITE
  962. imply MP
  963. imply DM_USB_GADGET
  964. config TEGRA
  965. bool "NVIDIA Tegra"
  966. imply DISTRO_DEFAULTS
  967. imply FAT_WRITE
  968. config TARGET_VEXPRESS64_AEMV8A
  969. bool "Support vexpress_aemv8a"
  970. select ARM64
  971. select PL01X_SERIAL
  972. config TARGET_VEXPRESS64_BASE_FVP
  973. bool "Support Versatile Express ARMv8a FVP BASE model"
  974. select ARM64
  975. select PL01X_SERIAL
  976. select SEMIHOSTING
  977. config TARGET_VEXPRESS64_JUNO
  978. bool "Support Versatile Express Juno Development Platform"
  979. select ARM64
  980. select PL01X_SERIAL
  981. config TARGET_LS2080A_EMU
  982. bool "Support ls2080a_emu"
  983. select ARCH_LS2080A
  984. select ARM64
  985. select ARMV8_MULTIENTRY
  986. select FSL_DDR_SYNC_REFRESH
  987. help
  988. Support for Freescale LS2080A_EMU platform.
  989. The LS2080A Development System (EMULATOR) is a pre-silicon
  990. development platform that supports the QorIQ LS2080A
  991. Layerscape Architecture processor.
  992. config TARGET_LS2080A_SIMU
  993. bool "Support ls2080a_simu"
  994. select ARCH_LS2080A
  995. select ARM64
  996. select ARMV8_MULTIENTRY
  997. select BOARD_LATE_INIT
  998. help
  999. Support for Freescale LS2080A_SIMU platform.
  1000. The LS2080A Development System (QDS) is a pre silicon
  1001. development platform that supports the QorIQ LS2080A
  1002. Layerscape Architecture processor.
  1003. config TARGET_LS1088AQDS
  1004. bool "Support ls1088aqds"
  1005. select ARCH_LS1088A
  1006. select ARM64
  1007. select ARMV8_MULTIENTRY
  1008. select ARCH_SUPPORT_TFABOOT
  1009. select BOARD_LATE_INIT
  1010. select SUPPORT_SPL
  1011. select FSL_DDR_INTERACTIVE if !SD_BOOT
  1012. help
  1013. Support for NXP LS1088AQDS platform.
  1014. The LS1088A Development System (QDS) is a high-performance
  1015. development platform that supports the QorIQ LS1088A
  1016. Layerscape Architecture processor.
  1017. config TARGET_LS2080AQDS
  1018. bool "Support ls2080aqds"
  1019. select ARCH_LS2080A
  1020. select ARM64
  1021. select ARMV8_MULTIENTRY
  1022. select ARCH_SUPPORT_TFABOOT
  1023. select BOARD_LATE_INIT
  1024. select SUPPORT_SPL
  1025. imply SCSI
  1026. imply SCSI_AHCI
  1027. select FSL_DDR_BIST
  1028. select FSL_DDR_INTERACTIVE if !SPL
  1029. help
  1030. Support for Freescale LS2080AQDS platform.
  1031. The LS2080A Development System (QDS) is a high-performance
  1032. development platform that supports the QorIQ LS2080A
  1033. Layerscape Architecture processor.
  1034. config TARGET_LS2080ARDB
  1035. bool "Support ls2080ardb"
  1036. select ARCH_LS2080A
  1037. select ARM64
  1038. select ARMV8_MULTIENTRY
  1039. select ARCH_SUPPORT_TFABOOT
  1040. select BOARD_LATE_INIT
  1041. select SUPPORT_SPL
  1042. select FSL_DDR_BIST
  1043. select FSL_DDR_INTERACTIVE if !SPL
  1044. imply SCSI
  1045. imply SCSI_AHCI
  1046. help
  1047. Support for Freescale LS2080ARDB platform.
  1048. The LS2080A Reference design board (RDB) is a high-performance
  1049. development platform that supports the QorIQ LS2080A
  1050. Layerscape Architecture processor.
  1051. config TARGET_LS2081ARDB
  1052. bool "Support ls2081ardb"
  1053. select ARCH_LS2080A
  1054. select ARM64
  1055. select ARMV8_MULTIENTRY
  1056. select BOARD_LATE_INIT
  1057. select SUPPORT_SPL
  1058. help
  1059. Support for Freescale LS2081ARDB platform.
  1060. The LS2081A Reference design board (RDB) is a high-performance
  1061. development platform that supports the QorIQ LS2081A/LS2041A
  1062. Layerscape Architecture processor.
  1063. config TARGET_LX2160ARDB
  1064. bool "Support lx2160ardb"
  1065. select ARCH_LX2160A
  1066. select ARM64
  1067. select ARMV8_MULTIENTRY
  1068. select ARCH_SUPPORT_TFABOOT
  1069. select BOARD_LATE_INIT
  1070. help
  1071. Support for NXP LX2160ARDB platform.
  1072. The lx2160ardb (LX2160A Reference design board (RDB)
  1073. is a high-performance development platform that supports the
  1074. QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
  1075. config TARGET_LX2160AQDS
  1076. bool "Support lx2160aqds"
  1077. select ARCH_LX2160A
  1078. select ARM64
  1079. select ARMV8_MULTIENTRY
  1080. select ARCH_SUPPORT_TFABOOT
  1081. select BOARD_LATE_INIT
  1082. help
  1083. Support for NXP LX2160AQDS platform.
  1084. The lx2160aqds (LX2160A QorIQ Development System (QDS)
  1085. is a high-performance development platform that supports the
  1086. QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
  1087. config TARGET_HIKEY
  1088. bool "Support HiKey 96boards Consumer Edition Platform"
  1089. select ARM64
  1090. select DM
  1091. select DM_GPIO
  1092. select DM_SERIAL
  1093. select OF_CONTROL
  1094. select PL01X_SERIAL
  1095. select SPECIFY_CONSOLE_INDEX
  1096. imply CMD_DM
  1097. help
  1098. Support for HiKey 96boards platform. It features a HI6220
  1099. SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
  1100. config TARGET_HIKEY960
  1101. bool "Support HiKey960 96boards Consumer Edition Platform"
  1102. select ARM64
  1103. select DM
  1104. select DM_SERIAL
  1105. select OF_CONTROL
  1106. select PL01X_SERIAL
  1107. imply CMD_DM
  1108. help
  1109. Support for HiKey960 96boards platform. It features a HI3660
  1110. SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
  1111. config TARGET_POPLAR
  1112. bool "Support Poplar 96boards Enterprise Edition Platform"
  1113. select ARM64
  1114. select DM
  1115. select DM_SERIAL
  1116. select DM_USB
  1117. select OF_CONTROL
  1118. select PL01X_SERIAL
  1119. imply CMD_DM
  1120. help
  1121. Support for Poplar 96boards EE platform. It features a HI3798cv200
  1122. SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
  1123. making it capable of running any commercial set-top solution based on
  1124. Linux or Android.
  1125. config TARGET_LS1012AQDS
  1126. bool "Support ls1012aqds"
  1127. select ARCH_LS1012A
  1128. select ARM64
  1129. select ARCH_SUPPORT_TFABOOT
  1130. select BOARD_LATE_INIT
  1131. help
  1132. Support for Freescale LS1012AQDS platform.
  1133. The LS1012A Development System (QDS) is a high-performance
  1134. development platform that supports the QorIQ LS1012A
  1135. Layerscape Architecture processor.
  1136. config TARGET_LS1012ARDB
  1137. bool "Support ls1012ardb"
  1138. select ARCH_LS1012A
  1139. select ARM64
  1140. select ARCH_SUPPORT_TFABOOT
  1141. select BOARD_LATE_INIT
  1142. imply SCSI
  1143. imply SCSI_AHCI
  1144. help
  1145. Support for Freescale LS1012ARDB platform.
  1146. The LS1012A Reference design board (RDB) is a high-performance
  1147. development platform that supports the QorIQ LS1012A
  1148. Layerscape Architecture processor.
  1149. config TARGET_LS1012A2G5RDB
  1150. bool "Support ls1012a2g5rdb"
  1151. select ARCH_LS1012A
  1152. select ARM64
  1153. select ARCH_SUPPORT_TFABOOT
  1154. select BOARD_LATE_INIT
  1155. imply SCSI
  1156. help
  1157. Support for Freescale LS1012A2G5RDB platform.
  1158. The LS1012A 2G5 Reference design board (RDB) is a high-performance
  1159. development platform that supports the QorIQ LS1012A
  1160. Layerscape Architecture processor.
  1161. config TARGET_LS1012AFRWY
  1162. bool "Support ls1012afrwy"
  1163. select ARCH_LS1012A
  1164. select ARM64
  1165. select ARCH_SUPPORT_TFABOOT
  1166. select BOARD_LATE_INIT
  1167. imply SCSI
  1168. imply SCSI_AHCI
  1169. help
  1170. Support for Freescale LS1012AFRWY platform.
  1171. The LS1012A FRWY board (FRWY) is a high-performance
  1172. development platform that supports the QorIQ LS1012A
  1173. Layerscape Architecture processor.
  1174. config TARGET_LS1012AFRDM
  1175. bool "Support ls1012afrdm"
  1176. select ARCH_LS1012A
  1177. select ARM64
  1178. select ARCH_SUPPORT_TFABOOT
  1179. help
  1180. Support for Freescale LS1012AFRDM platform.
  1181. The LS1012A Freedom board (FRDM) is a high-performance
  1182. development platform that supports the QorIQ LS1012A
  1183. Layerscape Architecture processor.
  1184. config TARGET_LS1028AQDS
  1185. bool "Support ls1028aqds"
  1186. select ARCH_LS1028A
  1187. select ARM64
  1188. select ARMV8_MULTIENTRY
  1189. select ARCH_SUPPORT_TFABOOT
  1190. select BOARD_LATE_INIT
  1191. help
  1192. Support for Freescale LS1028AQDS platform
  1193. The LS1028A Development System (QDS) is a high-performance
  1194. development platform that supports the QorIQ LS1028A
  1195. Layerscape Architecture processor.
  1196. config TARGET_LS1028ARDB
  1197. bool "Support ls1028ardb"
  1198. select ARCH_LS1028A
  1199. select ARM64
  1200. select ARMV8_MULTIENTRY
  1201. select ARCH_SUPPORT_TFABOOT
  1202. select BOARD_LATE_INIT
  1203. help
  1204. Support for Freescale LS1028ARDB platform
  1205. The LS1028A Development System (RDB) is a high-performance
  1206. development platform that supports the QorIQ LS1028A
  1207. Layerscape Architecture processor.
  1208. config TARGET_LS1088ARDB
  1209. bool "Support ls1088ardb"
  1210. select ARCH_LS1088A
  1211. select ARM64
  1212. select ARMV8_MULTIENTRY
  1213. select ARCH_SUPPORT_TFABOOT
  1214. select BOARD_LATE_INIT
  1215. select SUPPORT_SPL
  1216. select FSL_DDR_INTERACTIVE if !SD_BOOT
  1217. help
  1218. Support for NXP LS1088ARDB platform.
  1219. The LS1088A Reference design board (RDB) is a high-performance
  1220. development platform that supports the QorIQ LS1088A
  1221. Layerscape Architecture processor.
  1222. config TARGET_LS1021AQDS
  1223. bool "Support ls1021aqds"
  1224. select ARCH_LS1021A
  1225. select ARCH_SUPPORT_PSCI
  1226. select BOARD_EARLY_INIT_F
  1227. select BOARD_LATE_INIT
  1228. select CPU_V7A
  1229. select CPU_V7_HAS_NONSEC
  1230. select CPU_V7_HAS_VIRT
  1231. select LS1_DEEP_SLEEP
  1232. select SUPPORT_SPL
  1233. select SYS_FSL_DDR
  1234. select FSL_DDR_INTERACTIVE
  1235. imply SCSI
  1236. config TARGET_LS1021ATWR
  1237. bool "Support ls1021atwr"
  1238. select ARCH_LS1021A
  1239. select ARCH_SUPPORT_PSCI
  1240. select BOARD_EARLY_INIT_F
  1241. select BOARD_LATE_INIT
  1242. select CPU_V7A
  1243. select CPU_V7_HAS_NONSEC
  1244. select CPU_V7_HAS_VIRT
  1245. select LS1_DEEP_SLEEP
  1246. select SUPPORT_SPL
  1247. imply SCSI
  1248. config TARGET_LS1021ATSN
  1249. bool "Support ls1021atsn"
  1250. select ARCH_LS1021A
  1251. select ARCH_SUPPORT_PSCI
  1252. select BOARD_EARLY_INIT_F
  1253. select BOARD_LATE_INIT
  1254. select CPU_V7A
  1255. select CPU_V7_HAS_NONSEC
  1256. select CPU_V7_HAS_VIRT
  1257. select LS1_DEEP_SLEEP
  1258. select SUPPORT_SPL
  1259. imply SCSI
  1260. config TARGET_LS1021AIOT
  1261. bool "Support ls1021aiot"
  1262. select ARCH_LS1021A
  1263. select ARCH_SUPPORT_PSCI
  1264. select BOARD_LATE_INIT
  1265. select CPU_V7A
  1266. select CPU_V7_HAS_NONSEC
  1267. select CPU_V7_HAS_VIRT
  1268. select SUPPORT_SPL
  1269. imply SCSI
  1270. help
  1271. Support for Freescale LS1021AIOT platform.
  1272. The LS1021A Freescale board (IOT) is a high-performance
  1273. development platform that supports the QorIQ LS1021A
  1274. Layerscape Architecture processor.
  1275. config TARGET_LS1043AQDS
  1276. bool "Support ls1043aqds"
  1277. select ARCH_LS1043A
  1278. select ARM64
  1279. select ARMV8_MULTIENTRY
  1280. select ARCH_SUPPORT_TFABOOT
  1281. select BOARD_EARLY_INIT_F
  1282. select BOARD_LATE_INIT
  1283. select SUPPORT_SPL
  1284. select FSL_DDR_INTERACTIVE if !SPL
  1285. imply SCSI
  1286. imply SCSI_AHCI
  1287. help
  1288. Support for Freescale LS1043AQDS platform.
  1289. config TARGET_LS1043ARDB
  1290. bool "Support ls1043ardb"
  1291. select ARCH_LS1043A
  1292. select ARM64
  1293. select ARMV8_MULTIENTRY
  1294. select ARCH_SUPPORT_TFABOOT
  1295. select BOARD_EARLY_INIT_F
  1296. select BOARD_LATE_INIT
  1297. select SUPPORT_SPL
  1298. help
  1299. Support for Freescale LS1043ARDB platform.
  1300. config TARGET_LS1046AQDS
  1301. bool "Support ls1046aqds"
  1302. select ARCH_LS1046A
  1303. select ARM64
  1304. select ARMV8_MULTIENTRY
  1305. select ARCH_SUPPORT_TFABOOT
  1306. select BOARD_EARLY_INIT_F
  1307. select BOARD_LATE_INIT
  1308. select DM_SPI_FLASH if DM_SPI
  1309. select SUPPORT_SPL
  1310. select FSL_DDR_BIST if !SPL
  1311. select FSL_DDR_INTERACTIVE if !SPL
  1312. select FSL_DDR_INTERACTIVE if !SPL
  1313. imply SCSI
  1314. help
  1315. Support for Freescale LS1046AQDS platform.
  1316. The LS1046A Development System (QDS) is a high-performance
  1317. development platform that supports the QorIQ LS1046A
  1318. Layerscape Architecture processor.
  1319. config TARGET_LS1046ARDB
  1320. bool "Support ls1046ardb"
  1321. select ARCH_LS1046A
  1322. select ARM64
  1323. select ARMV8_MULTIENTRY
  1324. select ARCH_SUPPORT_TFABOOT
  1325. select BOARD_EARLY_INIT_F
  1326. select BOARD_LATE_INIT
  1327. select DM_SPI_FLASH if DM_SPI
  1328. select POWER_MC34VR500
  1329. select SUPPORT_SPL
  1330. select FSL_DDR_BIST
  1331. select FSL_DDR_INTERACTIVE if !SPL
  1332. imply SCSI
  1333. help
  1334. Support for Freescale LS1046ARDB platform.
  1335. The LS1046A Reference Design Board (RDB) is a high-performance
  1336. development platform that supports the QorIQ LS1046A
  1337. Layerscape Architecture processor.
  1338. config TARGET_LS1046AFRWY
  1339. bool "Support ls1046afrwy"
  1340. select ARCH_LS1046A
  1341. select ARM64
  1342. select ARMV8_MULTIENTRY
  1343. select ARCH_SUPPORT_TFABOOT
  1344. select BOARD_EARLY_INIT_F
  1345. select BOARD_LATE_INIT
  1346. select DM_SPI_FLASH if DM_SPI
  1347. imply SCSI
  1348. help
  1349. Support for Freescale LS1046AFRWY platform.
  1350. The LS1046A Freeway Board (FRWY) is a high-performance
  1351. development platform that supports the QorIQ LS1046A
  1352. Layerscape Architecture processor.
  1353. config TARGET_COLIBRI_PXA270
  1354. bool "Support colibri_pxa270"
  1355. select CPU_PXA
  1356. config ARCH_UNIPHIER
  1357. bool "Socionext UniPhier SoCs"
  1358. select BOARD_LATE_INIT
  1359. select DM
  1360. select DM_GPIO
  1361. select DM_I2C
  1362. select DM_MMC
  1363. select DM_MTD
  1364. select DM_RESET
  1365. select DM_SERIAL
  1366. select DM_USB
  1367. select OF_BOARD_SETUP
  1368. select OF_CONTROL
  1369. select OF_LIBFDT
  1370. select PINCTRL
  1371. select SPL_BOARD_INIT if SPL
  1372. select SPL_DM if SPL
  1373. select SPL_LIBCOMMON_SUPPORT if SPL
  1374. select SPL_LIBGENERIC_SUPPORT if SPL
  1375. select SPL_OF_CONTROL if SPL
  1376. select SPL_PINCTRL if SPL
  1377. select SUPPORT_SPL
  1378. imply CMD_DM
  1379. imply DISTRO_DEFAULTS
  1380. imply FAT_WRITE
  1381. help
  1382. Support for UniPhier SoC family developed by Socionext Inc.
  1383. (formerly, System LSI Business Division of Panasonic Corporation)
  1384. config STM32
  1385. bool "Support STMicroelectronics STM32 MCU with cortex M"
  1386. select CPU_V7M
  1387. select DM
  1388. select DM_SERIAL
  1389. imply CMD_DM
  1390. config ARCH_STI
  1391. bool "Support STMicrolectronics SoCs"
  1392. select BLK
  1393. select CPU_V7A
  1394. select DM
  1395. select DM_MMC
  1396. select DM_RESET
  1397. select DM_SERIAL
  1398. imply CMD_DM
  1399. help
  1400. Support for STMicroelectronics STiH407/10 SoC family.
  1401. This SoC is used on Linaro 96Board STiH410-B2260
  1402. config ARCH_STM32MP
  1403. bool "Support STMicroelectronics STM32MP Socs with cortex A"
  1404. select ARCH_MISC_INIT
  1405. select ARCH_SUPPORT_TFABOOT
  1406. select BOARD_LATE_INIT
  1407. select CLK
  1408. select DM
  1409. select DM_GPIO
  1410. select DM_RESET
  1411. select DM_SERIAL
  1412. select MISC
  1413. select OF_CONTROL
  1414. select OF_LIBFDT
  1415. select OF_SYSTEM_SETUP
  1416. select PINCTRL
  1417. select REGMAP
  1418. select SUPPORT_SPL
  1419. select SYSCON
  1420. select SYSRESET
  1421. select SYS_THUMB_BUILD
  1422. imply SPL_SYSRESET
  1423. imply CMD_DM
  1424. imply CMD_POWEROFF
  1425. imply OF_LIBFDT_OVERLAY
  1426. imply ENV_VARS_UBOOT_RUNTIME_CONFIG
  1427. imply USE_PREBOOT
  1428. help
  1429. Support for STM32MP SoC family developed by STMicroelectronics,
  1430. MPUs based on ARM cortex A core
  1431. U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
  1432. FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
  1433. chain.
  1434. SPL is the unsecure FSBL for the basic boot chain.
  1435. config ARCH_ROCKCHIP
  1436. bool "Support Rockchip SoCs"
  1437. select BLK
  1438. select BINMAN if !ARM64
  1439. select DM
  1440. select DM_GPIO
  1441. select DM_I2C
  1442. select DM_MMC
  1443. select DM_PWM
  1444. select DM_REGULATOR
  1445. select DM_SERIAL
  1446. select DM_SPI
  1447. select DM_SPI_FLASH
  1448. select DM_USB if USB
  1449. select ENABLE_ARM_SOC_BOOT0_HOOK
  1450. select OF_CONTROL
  1451. select SPI
  1452. select SPL_DM if SPL
  1453. select SYS_MALLOC_F
  1454. select SYS_THUMB_BUILD if !ARM64
  1455. imply ADC
  1456. imply CMD_DM
  1457. imply DEBUG_UART_BOARD_INIT
  1458. imply DISTRO_DEFAULTS
  1459. imply FAT_WRITE
  1460. imply SARADC_ROCKCHIP
  1461. imply SPL_SYSRESET
  1462. imply SPL_SYS_MALLOC_SIMPLE
  1463. imply SYS_NS16550
  1464. imply TPL_SYSRESET
  1465. imply USB_FUNCTION_FASTBOOT
  1466. config TARGET_THUNDERX_88XX
  1467. bool "Support ThunderX 88xx"
  1468. select ARM64
  1469. select OF_CONTROL
  1470. select PL01X_SERIAL
  1471. select SYS_CACHE_SHIFT_7
  1472. config ARCH_ASPEED
  1473. bool "Support Aspeed SoCs"
  1474. select DM
  1475. select OF_CONTROL
  1476. imply CMD_DM
  1477. config TARGET_DURIAN
  1478. bool "Support Phytium Durian Platform"
  1479. select ARM64
  1480. help
  1481. Support for durian platform.
  1482. It has 2GB Sdram, uart and pcie.
  1483. config TARGET_PRESIDIO_ASIC
  1484. bool "Support Cortina Presidio ASIC Platform"
  1485. select ARM64
  1486. endchoice
  1487. config ARCH_SUPPORT_TFABOOT
  1488. bool
  1489. config TFABOOT
  1490. bool "Support for booting from TF-A"
  1491. depends on ARCH_SUPPORT_TFABOOT
  1492. default n
  1493. help
  1494. Enabling this will make a U-Boot binary that is capable of being
  1495. booted via TF-A (Trusted Firmware for Cortex-A).
  1496. config TI_SECURE_DEVICE
  1497. bool "HS Device Type Support"
  1498. depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
  1499. help
  1500. If a high secure (HS) device type is being used, this config
  1501. must be set. This option impacts various aspects of the
  1502. build system (to create signed boot images that can be
  1503. authenticated) and the code. See the doc/README.ti-secure
  1504. file for further details.
  1505. if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
  1506. config ISW_ENTRY_ADDR
  1507. hex "Address in memory or XIP address of bootloader entry point"
  1508. default 0x402F4000 if AM43XX
  1509. default 0x402F0400 if AM33XX
  1510. default 0x40301350 if OMAP54XX
  1511. help
  1512. After any reset, the boot ROM searches the boot media for a valid
  1513. boot image. For non-XIP devices, the ROM then copies the image into
  1514. internal memory. For all boot modes, after the ROM processes the
  1515. boot image it eventually computes the entry point address depending
  1516. on the device type (secure/non-secure), boot media (xip/non-xip) and
  1517. image headers.
  1518. endif
  1519. source "arch/arm/mach-aspeed/Kconfig"
  1520. source "arch/arm/mach-at91/Kconfig"
  1521. source "arch/arm/mach-bcm283x/Kconfig"
  1522. source "arch/arm/mach-bcmstb/Kconfig"
  1523. source "arch/arm/mach-davinci/Kconfig"
  1524. source "arch/arm/mach-exynos/Kconfig"
  1525. source "arch/arm/mach-highbank/Kconfig"
  1526. source "arch/arm/mach-integrator/Kconfig"
  1527. source "arch/arm/mach-k3/Kconfig"
  1528. source "arch/arm/mach-keystone/Kconfig"
  1529. source "arch/arm/mach-kirkwood/Kconfig"
  1530. source "arch/arm/cpu/arm926ejs/lpc32xx/Kconfig"
  1531. source "arch/arm/mach-mvebu/Kconfig"
  1532. source "arch/arm/cpu/armv7/ls102xa/Kconfig"
  1533. source "arch/arm/mach-imx/mx2/Kconfig"
  1534. source "arch/arm/mach-imx/mx3/Kconfig"
  1535. source "arch/arm/mach-imx/mx5/Kconfig"
  1536. source "arch/arm/mach-imx/mx6/Kconfig"
  1537. source "arch/arm/mach-imx/mx7/Kconfig"
  1538. source "arch/arm/mach-imx/mx7ulp/Kconfig"
  1539. source "arch/arm/mach-imx/imx8/Kconfig"
  1540. source "arch/arm/mach-imx/imx8m/Kconfig"
  1541. source "arch/arm/mach-imx/imxrt/Kconfig"
  1542. source "arch/arm/mach-imx/mxs/Kconfig"
  1543. source "arch/arm/mach-omap2/Kconfig"
  1544. source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
  1545. source "arch/arm/mach-orion5x/Kconfig"
  1546. source "arch/arm/mach-owl/Kconfig"
  1547. source "arch/arm/mach-rmobile/Kconfig"
  1548. source "arch/arm/mach-meson/Kconfig"
  1549. source "arch/arm/mach-mediatek/Kconfig"
  1550. source "arch/arm/mach-qemu/Kconfig"
  1551. source "arch/arm/mach-rockchip/Kconfig"
  1552. source "arch/arm/mach-s5pc1xx/Kconfig"
  1553. source "arch/arm/mach-snapdragon/Kconfig"
  1554. source "arch/arm/mach-socfpga/Kconfig"
  1555. source "arch/arm/mach-sti/Kconfig"
  1556. source "arch/arm/mach-stm32/Kconfig"
  1557. source "arch/arm/mach-stm32mp/Kconfig"
  1558. source "arch/arm/mach-sunxi/Kconfig"
  1559. source "arch/arm/mach-tegra/Kconfig"
  1560. source "arch/arm/mach-u8500/Kconfig"
  1561. source "arch/arm/mach-uniphier/Kconfig"
  1562. source "arch/arm/cpu/armv7/vf610/Kconfig"
  1563. source "arch/arm/mach-zynq/Kconfig"
  1564. source "arch/arm/mach-zynqmp/Kconfig"
  1565. source "arch/arm/mach-versal/Kconfig"
  1566. source "arch/arm/mach-zynqmp-r5/Kconfig"
  1567. source "arch/arm/cpu/armv7/Kconfig"
  1568. source "arch/arm/cpu/armv8/Kconfig"
  1569. source "arch/arm/mach-imx/Kconfig"
  1570. source "board/bosch/shc/Kconfig"
  1571. source "board/bosch/guardian/Kconfig"
  1572. source "board/CarMediaLab/flea3/Kconfig"
  1573. source "board/Marvell/aspenite/Kconfig"
  1574. source "board/Marvell/gplugd/Kconfig"
  1575. source "board/armadeus/apf27/Kconfig"
  1576. source "board/armltd/vexpress/Kconfig"
  1577. source "board/armltd/vexpress64/Kconfig"
  1578. source "board/cortina/presidio-asic/Kconfig"
  1579. source "board/broadcom/bcm23550_w1d/Kconfig"
  1580. source "board/broadcom/bcm28155_ap/Kconfig"
  1581. source "board/broadcom/bcm963158/Kconfig"
  1582. source "board/broadcom/bcm968360bg/Kconfig"
  1583. source "board/broadcom/bcm968580xref/Kconfig"
  1584. source "board/broadcom/bcmcygnus/Kconfig"
  1585. source "board/broadcom/bcmnsp/Kconfig"
  1586. source "board/broadcom/bcmns2/Kconfig"
  1587. source "board/cavium/thunderx/Kconfig"
  1588. source "board/cirrus/edb93xx/Kconfig"
  1589. source "board/eets/pdu001/Kconfig"
  1590. source "board/emulation/qemu-arm/Kconfig"
  1591. source "board/freescale/ls2080a/Kconfig"
  1592. source "board/freescale/ls2080aqds/Kconfig"
  1593. source "board/freescale/ls2080ardb/Kconfig"
  1594. source "board/freescale/ls1088a/Kconfig"
  1595. source "board/freescale/ls1028a/Kconfig"
  1596. source "board/freescale/ls1021aqds/Kconfig"
  1597. source "board/freescale/ls1043aqds/Kconfig"
  1598. source "board/freescale/ls1021atwr/Kconfig"
  1599. source "board/freescale/ls1021atsn/Kconfig"
  1600. source "board/freescale/ls1021aiot/Kconfig"
  1601. source "board/freescale/ls1046aqds/Kconfig"
  1602. source "board/freescale/ls1043ardb/Kconfig"
  1603. source "board/freescale/ls1046ardb/Kconfig"
  1604. source "board/freescale/ls1046afrwy/Kconfig"
  1605. source "board/freescale/ls1012aqds/Kconfig"
  1606. source "board/freescale/ls1012ardb/Kconfig"
  1607. source "board/freescale/ls1012afrdm/Kconfig"
  1608. source "board/freescale/lx2160a/Kconfig"
  1609. source "board/freescale/mx35pdk/Kconfig"
  1610. source "board/freescale/s32v234evb/Kconfig"
  1611. source "board/grinn/chiliboard/Kconfig"
  1612. source "board/gumstix/pepper/Kconfig"
  1613. source "board/hisilicon/hikey/Kconfig"
  1614. source "board/hisilicon/hikey960/Kconfig"
  1615. source "board/hisilicon/poplar/Kconfig"
  1616. source "board/isee/igep003x/Kconfig"
  1617. source "board/phytec/pcm051/Kconfig"
  1618. source "board/silica/pengwyn/Kconfig"
  1619. source "board/spear/spear300/Kconfig"
  1620. source "board/spear/spear310/Kconfig"
  1621. source "board/spear/spear320/Kconfig"
  1622. source "board/spear/spear600/Kconfig"
  1623. source "board/spear/x600/Kconfig"
  1624. source "board/st/stv0991/Kconfig"
  1625. source "board/tcl/sl50/Kconfig"
  1626. source "board/birdland/bav335x/Kconfig"
  1627. source "board/toradex/colibri_pxa270/Kconfig"
  1628. source "board/variscite/dart_6ul/Kconfig"
  1629. source "board/vscom/baltos/Kconfig"
  1630. source "board/xilinx/Kconfig"
  1631. source "board/xilinx/zynq/Kconfig"
  1632. source "board/xilinx/zynqmp/Kconfig"
  1633. source "board/phytium/durian/Kconfig"
  1634. source "arch/arm/Kconfig.debug"
  1635. endmenu
  1636. config SPL_LDSCRIPT
  1637. default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
  1638. default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
  1639. default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64