galileo.c 1.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
  4. */
  5. #include <common.h>
  6. #include <asm/io.h>
  7. #include <asm/arch/device.h>
  8. #include <asm/arch/quark.h>
  9. /*
  10. * Intel Galileo gen2 board uses GPIO Resume Well bank pin0 as the PERST# pin.
  11. *
  12. * We cannot use any public GPIO APIs in <asm-generic/gpio.h> to control this
  13. * pin, as these APIs will eventually call into gpio_ich6_of_to_plat()
  14. * in the Intel ICH6 GPIO driver where it calls PCI configuration space access
  15. * APIs which will trigger PCI enumeration process.
  16. *
  17. * Check <asm/arch-quark/quark.h> for more details.
  18. */
  19. void board_assert_perst(void)
  20. {
  21. u32 base, port, val;
  22. /* retrieve the GPIO IO base */
  23. qrk_pci_read_config_dword(QUARK_LEGACY_BRIDGE, LB_GBA, &base);
  24. base = (base & 0xffff) & ~0x7f;
  25. /* enable the pin */
  26. port = base + 0x20;
  27. val = inl(port);
  28. val |= (1 << 0);
  29. outl(val, port);
  30. /* configure the pin as output */
  31. port = base + 0x24;
  32. val = inl(port);
  33. val &= ~(1 << 0);
  34. outl(val, port);
  35. /* pull it down (assert) */
  36. port = base + 0x28;
  37. val = inl(port);
  38. val &= ~(1 << 0);
  39. outl(val, port);
  40. }
  41. void board_deassert_perst(void)
  42. {
  43. u32 base, port, val;
  44. /* retrieve the GPIO IO base */
  45. qrk_pci_read_config_dword(QUARK_LEGACY_BRIDGE, LB_GBA, &base);
  46. base = (base & 0xffff) & ~0x7f;
  47. /* pull it up (de-assert) */
  48. port = base + 0x28;
  49. val = inl(port);
  50. val |= (1 << 0);
  51. outl(val, port);
  52. }