s5p4418.dtsi 3.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2020 Stefan Bosch <stefan_b@posteo.net>
  4. *
  5. * (C) Copyright 2016 Nexell
  6. * Youngbok, Park <park@nexell.co.kr>
  7. *
  8. */
  9. #include "skeleton.dtsi"
  10. / {
  11. #include "s5p4418-pinctrl.dtsi"
  12. aliases {
  13. mmc0 = &mmc0;
  14. mmc1 = &mmc1;
  15. mmc2 = &mmc2;
  16. gmac = "/ethernet@c0060000";
  17. };
  18. mmc2:mmc@c0069000 {
  19. #address-cells = <1>;
  20. #size-cells = <0>;
  21. compatible = "nexell,nexell-dwmmc";
  22. reg = <0xc0069000 0x1000>;
  23. bus-width = <4>;
  24. index = <2>;
  25. max-frequency = <50000000>;
  26. pinctrl-names = "default";
  27. pinctrl-0 = <&mmc2_clk>, <&mmc2_cmd>, <&mmc2_bus4>;
  28. status = "disabled";
  29. };
  30. mmc1:mmc@c0068000 {
  31. #address-cells = <1>;
  32. #size-cells = <0>;
  33. compatible = "nexell,nexell-dwmmc";
  34. reg = <0xc0068000 0x1000>;
  35. bus-width = <4>;
  36. index = <1>;
  37. max-frequency = <50000000>;
  38. pinctrl-names = "default";
  39. pinctrl-0 = <&mmc1_clk>, <&mmc1_cmd>, <&mmc1_bus4>;
  40. status = "disabled";
  41. };
  42. mmc0:mmc@c0062000 {
  43. #address-cells = <1>;
  44. #size-cells = <0>;
  45. compatible = "nexell,nexell-dwmmc";
  46. reg = <0xc0062000 0x1000>;
  47. bus-width = <4>;
  48. index = <0>;
  49. max-frequency = <50000000>;
  50. pinctrl-names = "default";
  51. pinctrl-0 = <&mmc0_clk>, <&mmc0_cmd>, <&mmc0_bus4>;
  52. status = "disabled";
  53. };
  54. i2c0:i2c@c00a4000 {
  55. #address-cells = <1>;
  56. #size-cells = <0>;
  57. compatible = "nexell,s5pxx18-i2c";
  58. reg = <0xc00a4000 0x100>;
  59. clock-frequency = <100000>;
  60. pinctrl-names = "default";
  61. pinctrl-0 = <&i2c0_sda>, <&i2c0_scl>;
  62. status ="disabled";
  63. };
  64. i2c1:i2c@c00a5000 {
  65. #address-cells = <1>;
  66. #size-cells = <0>;
  67. compatible = "nexell,s5pxx18-i2c";
  68. reg = <0xc00a5000 0x100>;
  69. clock-frequency = <100000>;
  70. pinctrl-names = "default";
  71. pinctrl-0 = <&i2c1_sda>, <&i2c1_scl>;
  72. status ="disabled";
  73. };
  74. i2c2:i2c@c00a6000 {
  75. #address-cells = <1>;
  76. #size-cells = <0>;
  77. compatible = "nexell,s5pxx18-i2c";
  78. reg = <0xc00a6000 0x100>;
  79. clock-frequency = <100000>;
  80. pinctrl-names = "default";
  81. pinctrl-0 = <&i2c2_sda>, <&i2c2_scl>;
  82. status ="disabled";
  83. };
  84. dp0:dp@c0102800 {
  85. compatible = "nexell,nexell-display";
  86. reg = <0xc0102800 0x100>;
  87. index = <0>;
  88. u-boot,dm-pre-reloc;
  89. status = "disabled";
  90. };
  91. dp1:dp@c0102c00 {
  92. #address-cells = <1>;
  93. #size-cells = <0>;
  94. compatible = "nexell,nexell-display";
  95. reg = <0xc0102c00 0x100>;
  96. index = <1>;
  97. status = "disabled";
  98. };
  99. gpio_a:gpio@c001a000 {
  100. compatible = "nexell,nexell-gpio";
  101. reg = <0xc001a000 0x00000010>;
  102. altr,gpio-bank-width = <32>;
  103. gpio-bank-name = "gpio_a";
  104. gpio-controller;
  105. #gpio-cells = <2>;
  106. };
  107. gpio_b:gpio@c001b000 {
  108. compatible = "nexell,nexell-gpio";
  109. reg = <0xc001b000 0x00000010>;
  110. altr,gpio-bank-width = <32>;
  111. gpio-bank-name = "gpio_b";
  112. gpio-controller;
  113. #gpio-cells = <2>;
  114. };
  115. gpio_c:gpio@c001c000 {
  116. compatible = "nexell,nexell-gpio";
  117. reg = <0xc001c000 0x00000010>;
  118. nexell,gpio-bank-width = <32>;
  119. gpio-bank-name = "gpio_c";
  120. gpio-controller;
  121. #gpio-cells = <2>;
  122. };
  123. gpio_d:gpio@c001d000 {
  124. compatible = "nexell,nexell-gpio";
  125. reg = <0xc001d000 0x00000010>;
  126. nexell,gpio-bank-width = <32>;
  127. gpio-bank-name = "gpio_d";
  128. gpio-controller;
  129. #gpio-cells = <2>;
  130. };
  131. gpio_e:gpio@c001e000 {
  132. compatible = "nexell,nexell-gpio";
  133. reg = <0xc001e000 0x00000010>;
  134. nexell,gpio-bank-width = <32>;
  135. gpio-bank-name = "gpio_e";
  136. gpio-controller;
  137. #gpio-cells = <2>;
  138. };
  139. gpio_alv:gpio@c0010800 {
  140. compatible = "nexell,nexell-gpio";
  141. reg = <0xc0010800 0x00000010>;
  142. nexell,gpio-bank-width = <32>;
  143. gpio-bank-name = "gpio_alv";
  144. gpio-controller;
  145. #gpio-cells = <2>;
  146. };
  147. pinctrl@C0010000 {
  148. compatible = "nexell,s5pxx18-pinctrl";
  149. reg = <0xc0010000 0xf000>;
  150. u-boot,dm-pre-reloc;
  151. };
  152. };