Makefile.build 13 KB

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  1. # SPDX-License-Identifier: GPL-2.0
  2. # ==========================================================================
  3. # Building
  4. # ==========================================================================
  5. # Modified for U-Boot
  6. prefix := vpl
  7. src := $(patsubst $(prefix)/%,%,$(obj))
  8. ifeq ($(obj),$(src))
  9. prefix := tpl
  10. src := $(patsubst $(prefix)/%,%,$(obj))
  11. ifeq ($(obj),$(src))
  12. prefix := spl
  13. src := $(patsubst $(prefix)/%,%,$(obj))
  14. ifeq ($(obj),$(src))
  15. prefix := .
  16. endif
  17. endif
  18. endif
  19. PHONY := __build
  20. __build:
  21. # Init all relevant variables used in kbuild files so
  22. # 1) they have correct type
  23. # 2) they do not inherit any value from the environment
  24. obj-y :=
  25. obj-m :=
  26. lib-y :=
  27. lib-m :=
  28. always :=
  29. targets :=
  30. subdir-y :=
  31. subdir-m :=
  32. EXTRA_AFLAGS :=
  33. EXTRA_CFLAGS :=
  34. EXTRA_CPPFLAGS :=
  35. EXTRA_LDFLAGS :=
  36. asflags-y :=
  37. ccflags-y :=
  38. cppflags-y :=
  39. ldflags-y :=
  40. subdir-asflags-y :=
  41. subdir-ccflags-y :=
  42. # Read auto.conf if it exists, otherwise ignore
  43. # Modified for U-Boot
  44. -include include/config/auto.conf
  45. -include $(prefix)/include/autoconf.mk
  46. include scripts/Kbuild.include
  47. # The filename Kbuild has precedence over Makefile
  48. kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
  49. kbuild-file := $(if $(wildcard $(kbuild-dir)/Kbuild),$(kbuild-dir)/Kbuild,$(kbuild-dir)/Makefile)
  50. include $(kbuild-file)
  51. # Added for U-Boot
  52. asflags-y += $(PLATFORM_CPPFLAGS)
  53. ccflags-y += $(PLATFORM_CPPFLAGS)
  54. cppflags-y += $(PLATFORM_CPPFLAGS)
  55. include scripts/Makefile.lib
  56. # Do not include host rules unless needed
  57. ifneq ($(hostprogs-y)$(hostprogs-m)$(hostlibs-y)$(hostlibs-m)$(hostcxxlibs-y)$(hostcxxlibs-m),)
  58. include scripts/Makefile.host
  59. endif
  60. ifndef obj
  61. $(warning kbuild: Makefile.build is included improperly)
  62. endif
  63. # ===========================================================================
  64. ifneq ($(strip $(lib-y) $(lib-m) $(lib-)),)
  65. lib-target := $(obj)/lib.a
  66. endif
  67. ifneq ($(strip $(obj-y) $(obj-m) $(obj-) $(subdir-m) $(lib-target)),)
  68. builtin-target := $(obj)/built-in.o
  69. endif
  70. modorder-target := $(obj)/modules.order
  71. # We keep a list of all modules in $(MODVERDIR)
  72. __build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
  73. $(if $(KBUILD_MODULES),$(obj-m) $(modorder-target)) \
  74. $(subdir-ym) $(always)
  75. @:
  76. # Linus' kernel sanity checking tool
  77. ifeq ($(KBUILD_CHECKSRC),1)
  78. quiet_cmd_checksrc = CHECK $<
  79. cmd_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
  80. else ifeq ($(KBUILD_CHECKSRC),2)
  81. quiet_cmd_force_checksrc = CHECK $<
  82. cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
  83. endif
  84. # Do section mismatch analysis for each module/built-in.o
  85. ifdef CONFIG_DEBUG_SECTION_MISMATCH
  86. cmd_secanalysis = ; scripts/mod/modpost $@
  87. endif
  88. # Compile C sources (.c)
  89. # ---------------------------------------------------------------------------
  90. # Default is built-in, unless we know otherwise
  91. modkern_cflags = \
  92. $(if $(part-of-module), \
  93. $(KBUILD_CFLAGS_MODULE) $(CFLAGS_MODULE), \
  94. $(KBUILD_CFLAGS_KERNEL) $(CFLAGS_KERNEL))
  95. quiet_modtag := $(empty) $(empty)
  96. $(real-objs-m) : part-of-module := y
  97. $(real-objs-m:.o=.i) : part-of-module := y
  98. $(real-objs-m:.o=.s) : part-of-module := y
  99. $(real-objs-m:.o=.lst): part-of-module := y
  100. $(real-objs-m) : quiet_modtag := [M]
  101. $(real-objs-m:.o=.i) : quiet_modtag := [M]
  102. $(real-objs-m:.o=.s) : quiet_modtag := [M]
  103. $(real-objs-m:.o=.lst): quiet_modtag := [M]
  104. $(obj-m) : quiet_modtag := [M]
  105. # Default for not multi-part modules
  106. modname = $(basetarget)
  107. $(multi-objs-m) : modname = $(modname-multi)
  108. $(multi-objs-m:.o=.i) : modname = $(modname-multi)
  109. $(multi-objs-m:.o=.s) : modname = $(modname-multi)
  110. $(multi-objs-m:.o=.lst) : modname = $(modname-multi)
  111. $(multi-objs-y) : modname = $(modname-multi)
  112. $(multi-objs-y:.o=.i) : modname = $(modname-multi)
  113. $(multi-objs-y:.o=.s) : modname = $(modname-multi)
  114. $(multi-objs-y:.o=.lst) : modname = $(modname-multi)
  115. quiet_cmd_cc_s_c = CC $(quiet_modtag) $@
  116. cmd_cc_s_c = $(CC) $(c_flags) $(DISABLE_LTO) -fverbose-asm -S -o $@ $<
  117. $(obj)/%.s: $(src)/%.c FORCE
  118. $(call if_changed_dep,cc_s_c)
  119. quiet_cmd_cc_i_c = CPP $(quiet_modtag) $@
  120. cmd_cc_i_c = $(CPP) $(c_flags) -o $@ $<
  121. $(obj)/%.i: $(src)/%.c FORCE
  122. $(call if_changed_dep,cc_i_c)
  123. cmd_gensymtypes = \
  124. $(CPP) -D__GENKSYMS__ $(c_flags) $< | \
  125. $(GENKSYMS) $(if $(1), -T $(2)) \
  126. $(if $(KBUILD_PRESERVE),-p) \
  127. -r $(firstword $(wildcard $(2:.symtypes=.symref) /dev/null))
  128. quiet_cmd_cc_symtypes_c = SYM $(quiet_modtag) $@
  129. cmd_cc_symtypes_c = \
  130. set -e; \
  131. $(call cmd_gensymtypes,true,$@) >/dev/null; \
  132. test -s $@ || rm -f $@
  133. $(obj)/%.symtypes : $(src)/%.c FORCE
  134. $(call cmd,cc_symtypes_c)
  135. # C (.c) files
  136. # The C file is compiled and updated dependency information is generated.
  137. # (See cmd_cc_o_c + relevant part of rule_cc_o_c)
  138. quiet_cmd_cc_o_c = CC $(quiet_modtag) $@
  139. ifndef CONFIG_MODVERSIONS
  140. cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
  141. else
  142. # When module versioning is enabled the following steps are executed:
  143. # o compile a .tmp_<file>.o from <file>.c
  144. # o if .tmp_<file>.o doesn't contain a __ksymtab version, i.e. does
  145. # not export symbols, we just rename .tmp_<file>.o to <file>.o and
  146. # are done.
  147. # o otherwise, we calculate symbol versions using the good old
  148. # genksyms on the preprocessed source and postprocess them in a way
  149. # that they are usable as a linker script
  150. # o generate <file>.o from .tmp_<file>.o using the linker to
  151. # replace the unresolved symbols __crc_exported_symbol with
  152. # the actual value of the checksum generated by genksyms
  153. cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $<
  154. cmd_modversions = \
  155. if $(OBJDUMP) -h $(@D)/.tmp_$(@F) | grep -q __ksymtab; then \
  156. $(call cmd_gensymtypes,$(KBUILD_SYMTYPES),$(@:.o=.symtypes)) \
  157. > $(@D)/.tmp_$(@F:.o=.ver); \
  158. \
  159. $(LD) $(KBUILD_LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F) \
  160. -T $(@D)/.tmp_$(@F:.o=.ver); \
  161. rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver); \
  162. else \
  163. mv -f $(@D)/.tmp_$(@F) $@; \
  164. fi;
  165. endif
  166. ifdef CONFIG_FTRACE_MCOUNT_RECORD
  167. # gcc 5 supports generating the mcount tables directly
  168. ifneq ($(call cc-option,-mrecord-mcount,y),y)
  169. KBUILD_CFLAGS += -mrecord-mcount
  170. else
  171. # else do it all manually
  172. ifdef BUILD_C_RECORDMCOUNT
  173. ifeq ("$(origin RECORDMCOUNT_WARN)", "command line")
  174. RECORDMCOUNT_FLAGS = -w
  175. endif
  176. # Due to recursion, we must skip empty.o.
  177. # The empty.o file is created in the make process in order to determine
  178. # the target endianness and word size. It is made before all other C
  179. # files, including recordmcount.
  180. sub_cmd_record_mcount = \
  181. if [ $(@) != "scripts/mod/empty.o" ]; then \
  182. $(objtree)/scripts/recordmcount $(RECORDMCOUNT_FLAGS) "$(@)"; \
  183. fi;
  184. recordmcount_source := $(srctree)/scripts/recordmcount.c \
  185. $(srctree)/scripts/recordmcount.h
  186. else
  187. sub_cmd_record_mcount = set -e ; perl $(srctree)/scripts/recordmcount.pl "$(ARCH)" \
  188. "$(if $(CONFIG_CPU_BIG_ENDIAN),big,little)" \
  189. "$(if $(CONFIG_64BIT),64,32)" \
  190. "$(OBJDUMP)" "$(OBJCOPY)" "$(CC) $(KBUILD_CPPFLAGS) $(KBUILD_CFLAGS)" \
  191. "$(LD) $(KBUILD_LDFLAGS)" "$(NM)" "$(RM)" "$(MV)" \
  192. "$(if $(part-of-module),1,0)" "$(@)";
  193. recordmcount_source := $(srctree)/scripts/recordmcount.pl
  194. endif
  195. cmd_record_mcount = \
  196. if [ "$(findstring $(CC_FLAGS_FTRACE),$(_c_flags))" = \
  197. "$(CC_FLAGS_FTRACE)" ]; then \
  198. $(sub_cmd_record_mcount) \
  199. fi;
  200. endif # -record-mcount
  201. endif
  202. define rule_cc_o_c
  203. $(call echo-cmd,checksrc) $(cmd_checksrc) \
  204. $(call echo-cmd,cc_o_c) $(cmd_cc_o_c); \
  205. $(cmd_modversions) \
  206. $(call echo-cmd,record_mcount) \
  207. $(cmd_record_mcount) \
  208. scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,cc_o_c)' > \
  209. $(dot-target).tmp; \
  210. rm -f $(depfile); \
  211. mv -f $(dot-target).tmp $(dot-target).cmd
  212. endef
  213. # Built-in and composite module parts
  214. $(obj)/%.o: $(src)/%.c $(recordmcount_source) FORCE
  215. $(call cmd,force_checksrc)
  216. $(call if_changed_rule,cc_o_c)
  217. # Single-part modules are special since we need to mark them in $(MODVERDIR)
  218. $(single-used-m): $(obj)/%.o: $(src)/%.c $(recordmcount_source) FORCE
  219. $(call cmd,force_checksrc)
  220. $(call if_changed_rule,cc_o_c)
  221. @{ echo $(@:.o=.ko); echo $@; } > $(MODVERDIR)/$(@F:.o=.mod)
  222. quiet_cmd_cc_lst_c = MKLST $@
  223. cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \
  224. $(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \
  225. System.map $(OBJDUMP) > $@
  226. $(obj)/%.lst: $(src)/%.c FORCE
  227. $(call if_changed_dep,cc_lst_c)
  228. # Compile assembler sources (.S)
  229. # ---------------------------------------------------------------------------
  230. modkern_aflags := $(KBUILD_AFLAGS_KERNEL) $(AFLAGS_KERNEL)
  231. $(real-objs-m) : modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
  232. $(real-objs-m:.o=.s): modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
  233. quiet_cmd_as_s_S = CPP $(quiet_modtag) $@
  234. cmd_as_s_S = $(CPP) $(a_flags) -o $@ $<
  235. $(obj)/%.s: $(src)/%.S FORCE
  236. $(call if_changed_dep,as_s_S)
  237. quiet_cmd_as_o_S = AS $(quiet_modtag) $@
  238. cmd_as_o_S = $(CC) $(a_flags) -c -o $@ $<
  239. $(obj)/%.o: $(src)/%.S FORCE
  240. $(call if_changed_dep,as_o_S)
  241. targets += $(real-objs-y) $(real-objs-m) $(lib-y)
  242. targets += $(extra-y) $(MAKECMDGOALS) $(always)
  243. # Linker scripts preprocessor (.lds.S -> .lds)
  244. # ---------------------------------------------------------------------------
  245. quiet_cmd_cpp_lds_S = LDS $@
  246. cmd_cpp_lds_S = $(CPP) $(cpp_flags) -P -C -U$(ARCH) \
  247. -D__ASSEMBLY__ -DLINKER_SCRIPT -o $@ $<
  248. $(obj)/%.lds: $(src)/%.lds.S FORCE
  249. $(call if_changed_dep,cpp_lds_S)
  250. # ASN.1 grammar
  251. # ---------------------------------------------------------------------------
  252. quiet_cmd_asn1_compiler = ASN.1 $@
  253. cmd_asn1_compiler = $(objtree)/tools/asn1_compiler $< \
  254. $(subst .h,.c,$@) $(subst .c,.h,$@)
  255. $(obj)/%.asn1.c $(obj)/%.asn1.h: $(src)/%.asn1 $(objtree)/tools/asn1_compiler
  256. $(call cmd,asn1_compiler)
  257. # Build the compiled-in targets
  258. # ---------------------------------------------------------------------------
  259. # To build objects in subdirs, we need to descend into the directories
  260. $(sort $(subdir-obj-y)): $(subdir-ym) ;
  261. #
  262. # Rule to compile a set of .o files into one .o file
  263. #
  264. ifdef builtin-target
  265. quiet_cmd_link_o_target = AR $@
  266. # If the list of objects to link is empty, just create an empty built-in.o
  267. cmd_link_o_target = $(if $(strip $(obj-y)),\
  268. rm -f $@; $(AR) cDPrsT $@ $(filter $(obj-y), $^), \
  269. rm -f $@; $(AR) cDPrsT$(KBUILD_ARFLAGS) $@)
  270. $(builtin-target): $(obj-y) FORCE
  271. $(call if_changed,link_o_target)
  272. targets += $(builtin-target)
  273. endif # builtin-target
  274. #
  275. # Rule to create modules.order file
  276. #
  277. # Create commands to either record .ko file or cat modules.order from
  278. # a subdirectory
  279. modorder-cmds = \
  280. $(foreach m, $(modorder), \
  281. $(if $(filter %/modules.order, $m), \
  282. cat $m;, echo kernel/$m;))
  283. $(modorder-target): $(subdir-ym) FORCE
  284. $(Q)(cat /dev/null; $(modorder-cmds)) > $@
  285. #
  286. # Rule to compile a set of .o files into one .a file
  287. #
  288. ifdef lib-target
  289. quiet_cmd_link_l_target = AR $@
  290. cmd_link_l_target = rm -f $@; $(AR) cDPrsT$(KBUILD_ARFLAGS) $@ $(lib-y)
  291. $(lib-target): $(lib-y) FORCE
  292. $(call if_changed,link_l_target)
  293. targets += $(lib-target)
  294. endif
  295. quiet_cmd_link_multi-y = AR $@
  296. cmd_link_multi-y = rm -f $@; $(AR) cDPrsT$(KBUILD_ARFLAGS) $@ $(filter %.o,$^)
  297. quiet_cmd_link_multi-m = AR [M] $@
  298. cmd_link_multi-m = $(cmd_link_multi-y)
  299. $(multi-used-y): FORCE
  300. $(call if_changed,link_multi-y)
  301. $(call multi_depend, $(multi-used-y), .o, -objs -y)
  302. $(multi-used-m): FORCE
  303. $(call if_changed,link_multi-m)
  304. @{ echo $(@:.o=.ko); echo $(filter %.o,$^); } > $(MODVERDIR)/$(@F:.o=.mod)
  305. $(call multi_depend, $(multi-used-m), .o, -objs -y)
  306. targets += $(multi-used-y) $(multi-used-m)
  307. # Add intermediate targets:
  308. # When building objects with specific suffix patterns, add intermediate
  309. # targets that the final targets are derived from.
  310. intermediate_targets = $(foreach sfx, $(2), \
  311. $(patsubst %$(strip $(1)),%$(sfx), \
  312. $(filter %$(strip $(1)), $(targets))))
  313. # %.lex.o <- %.lex.c <- %.l
  314. # %.tab.o <- %.tab.[ch] <- %.y
  315. targets += $(call intermediate_targets, .lex.o, .lex.c) \
  316. $(call intermediate_targets, .tab.o, .tab.c .tab.h)
  317. # Descending
  318. # ---------------------------------------------------------------------------
  319. PHONY += $(subdir-ym)
  320. $(subdir-ym):
  321. $(Q)$(MAKE) $(build)=$@
  322. # Add FORCE to the prequisites of a target to force it to be always rebuilt.
  323. # ---------------------------------------------------------------------------
  324. PHONY += FORCE
  325. FORCE:
  326. # Read all saved command lines and dependencies for the $(targets) we
  327. # may be building above, using $(if_changed{,_dep}). As an
  328. # optimization, we don't need to read them if the target does not
  329. # exist, we will rebuild anyway in that case.
  330. cmd_files := $(wildcard $(foreach f,$(sort $(targets)),$(dir $(f)).$(notdir $(f)).cmd))
  331. ifneq ($(cmd_files),)
  332. include $(cmd_files)
  333. endif
  334. # Create directories for object files if they do not exist
  335. obj-dirs := $(sort $(obj) $(patsubst %/,%, $(dir $(targets))))
  336. $(shell mkdir -p $(obj-dirs))
  337. .PHONY: $(PHONY)